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arm64: dts: apm: Add APM X-Gene SoC PMU DTS entries
This patch adds APM X-Gene SoC PMU DTS entries. Signed-off-by: Tai Nguyen <ttnguyen@apm.com>
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@ -553,6 +553,64 @@
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};
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pmu: pmu@78810000 {
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compatible = "apm,xgene-pmu-v2";
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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regmap-csw = <&csw>;
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regmap-mcba = <&mcba>;
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regmap-mcbb = <&mcbb>;
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reg = <0x0 0x78810000 0x0 0x1000>;
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interrupts = <0x0 0x22 0x4>;
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pmul3c@7e610000 {
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compatible = "apm,xgene-pmu-l3c";
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reg = <0x0 0x7e610000 0x0 0x1000>;
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};
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pmuiob@7e940000 {
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compatible = "apm,xgene-pmu-iob";
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reg = <0x0 0x7e940000 0x0 0x1000>;
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};
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pmucmcb@7e710000 {
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compatible = "apm,xgene-pmu-mcb";
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reg = <0x0 0x7e710000 0x0 0x1000>;
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enable-bit-index = <0>;
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};
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pmucmcb@7e730000 {
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compatible = "apm,xgene-pmu-mcb";
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reg = <0x0 0x7e730000 0x0 0x1000>;
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enable-bit-index = <1>;
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};
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pmucmc@7e810000 {
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compatible = "apm,xgene-pmu-mc";
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reg = <0x0 0x7e810000 0x0 0x1000>;
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enable-bit-index = <0>;
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};
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pmucmc@7e850000 {
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compatible = "apm,xgene-pmu-mc";
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reg = <0x0 0x7e850000 0x0 0x1000>;
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enable-bit-index = <1>;
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};
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pmucmc@7e890000 {
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compatible = "apm,xgene-pmu-mc";
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reg = <0x0 0x7e890000 0x0 0x1000>;
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enable-bit-index = <2>;
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};
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pmucmc@7e8d0000 {
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compatible = "apm,xgene-pmu-mc";
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reg = <0x0 0x7e8d0000 0x0 0x1000>;
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enable-bit-index = <3>;
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};
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};
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pcie0: pcie@1f2b0000 {
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status = "disabled";
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device_type = "pci";
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