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clk/samsung: exynos5433: add pclk_decon clock
This undocumented gate clock is used by DECON IP. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
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@ -2822,6 +2822,8 @@ static struct samsung_gate_clock disp_gate_clks[] __initdata = {
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ENABLE_PCLK_DISP, 2, 0, 0),
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GATE(CLK_PCLK_DECON_TV, "pclk_decon_tv", "div_pclk_disp",
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ENABLE_PCLK_DISP, 1, 0, 0),
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GATE(CLK_PCLK_DECON, "pclk_decon", "div_pclk_disp",
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ENABLE_PCLK_DISP, 0, 0, 0),
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/* ENABLE_SCLK_DISP */
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GATE(CLK_PHYCLK_MIPIDPHY1_BITCLKDIV8, "phyclk_mipidphy1_bitclkdiv8",
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@ -768,7 +768,9 @@
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#define CLK_PHYCLK_HDMIPHY_PIXEL_CLKO_PHY 111
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#define CLK_PHYCLK_HDMIPHY_TMDS_CLKO_PHY 112
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#define DISP_NR_CLK 113
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#define CLK_PCLK_DECON 113
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#define DISP_NR_CLK 114
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/* CMU_AUD */
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#define CLK_MOUT_AUD_PLL_USER 1
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