mirror of
https://github.com/edk2-porting/linux-next.git
synced 2024-11-20 16:46:23 +08:00
unicore32 core architecture: timer and time handling
This patch implements timer and time. RTC and PWM device drivers are also here. Signed-off-by: Guan Xuetao <gxt@mprc.pku.edu.cn>
This commit is contained in:
parent
10c9c10c31
commit
02b2ee16cc
34
arch/unicore32/include/asm/timex.h
Normal file
34
arch/unicore32/include/asm/timex.h
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@ -0,0 +1,34 @@
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/*
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* linux/arch/unicore32/include/asm/timex.h
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*
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* Code specific to PKUnity SoC and UniCore ISA
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*
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* Copyright (C) 2001-2010 GUAN Xue-tao
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __UNICORE_TIMEX_H__
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#define __UNICORE_TIMEX_H__
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#ifdef CONFIG_ARCH_FPGA
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/* in FPGA, APB clock is 33M, and OST clock is 32K, */
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/* so, 1M is selected for timer interrupt correctly */
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#define CLOCK_TICK_RATE (32*1024)
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#endif
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#if defined(CONFIG_PUV3_DB0913) \
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|| defined(CONFIG_PUV3_NB0916) \
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|| defined(CONFIG_PUV3_SMW0919)
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#define CLOCK_TICK_RATE (14318000)
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#endif
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#include <asm-generic/timex.h>
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#endif
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263
arch/unicore32/kernel/pwm.c
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263
arch/unicore32/kernel/pwm.c
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@ -0,0 +1,263 @@
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/*
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* linux/arch/unicore32/kernel/pwm.c
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*
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* Code specific to PKUnity SoC and UniCore ISA
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*
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* Maintained by GUAN Xue-tao <gxt@mprc.pku.edu.cn>
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* Copyright (C) 2001-2010 Guan Xuetao
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <linux/err.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/pwm.h>
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#include <asm/div64.h>
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#include <mach/hardware.h>
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struct pwm_device {
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struct list_head node;
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struct platform_device *pdev;
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const char *label;
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struct clk *clk;
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int clk_enabled;
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unsigned int use_count;
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unsigned int pwm_id;
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};
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/*
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* period_ns = 10^9 * (PRESCALE + 1) * (PV + 1) / PWM_CLK_RATE
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* duty_ns = 10^9 * (PRESCALE + 1) * DC / PWM_CLK_RATE
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*/
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int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns)
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{
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unsigned long long c;
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unsigned long period_cycles, prescale, pv, dc;
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if (pwm == NULL || period_ns == 0 || duty_ns > period_ns)
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return -EINVAL;
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c = clk_get_rate(pwm->clk);
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c = c * period_ns;
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do_div(c, 1000000000);
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period_cycles = c;
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if (period_cycles < 1)
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period_cycles = 1;
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prescale = (period_cycles - 1) / 1024;
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pv = period_cycles / (prescale + 1) - 1;
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if (prescale > 63)
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return -EINVAL;
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if (duty_ns == period_ns)
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dc = OST_PWMDCCR_FDCYCLE;
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else
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dc = (pv + 1) * duty_ns / period_ns;
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/* NOTE: the clock to PWM has to be enabled first
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* before writing to the registers
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*/
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clk_enable(pwm->clk);
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OST_PWMPWCR = prescale;
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OST_PWMDCCR = pv - dc;
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OST_PWMPCR = pv;
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clk_disable(pwm->clk);
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return 0;
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}
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EXPORT_SYMBOL(pwm_config);
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int pwm_enable(struct pwm_device *pwm)
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{
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int rc = 0;
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if (!pwm->clk_enabled) {
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rc = clk_enable(pwm->clk);
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if (!rc)
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pwm->clk_enabled = 1;
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}
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return rc;
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}
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EXPORT_SYMBOL(pwm_enable);
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void pwm_disable(struct pwm_device *pwm)
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{
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if (pwm->clk_enabled) {
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clk_disable(pwm->clk);
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pwm->clk_enabled = 0;
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}
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}
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EXPORT_SYMBOL(pwm_disable);
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static DEFINE_MUTEX(pwm_lock);
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static LIST_HEAD(pwm_list);
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struct pwm_device *pwm_request(int pwm_id, const char *label)
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{
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struct pwm_device *pwm;
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int found = 0;
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mutex_lock(&pwm_lock);
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list_for_each_entry(pwm, &pwm_list, node) {
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if (pwm->pwm_id == pwm_id) {
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found = 1;
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break;
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}
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}
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if (found) {
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if (pwm->use_count == 0) {
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pwm->use_count++;
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pwm->label = label;
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} else
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pwm = ERR_PTR(-EBUSY);
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} else
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pwm = ERR_PTR(-ENOENT);
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mutex_unlock(&pwm_lock);
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return pwm;
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}
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EXPORT_SYMBOL(pwm_request);
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void pwm_free(struct pwm_device *pwm)
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{
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mutex_lock(&pwm_lock);
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if (pwm->use_count) {
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pwm->use_count--;
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pwm->label = NULL;
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} else
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pr_warning("PWM device already freed\n");
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mutex_unlock(&pwm_lock);
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}
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EXPORT_SYMBOL(pwm_free);
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static inline void __add_pwm(struct pwm_device *pwm)
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{
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mutex_lock(&pwm_lock);
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list_add_tail(&pwm->node, &pwm_list);
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mutex_unlock(&pwm_lock);
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}
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static struct pwm_device *pwm_probe(struct platform_device *pdev,
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unsigned int pwm_id, struct pwm_device *parent_pwm)
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{
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struct pwm_device *pwm;
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struct resource *r;
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int ret = 0;
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pwm = kzalloc(sizeof(struct pwm_device), GFP_KERNEL);
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if (pwm == NULL) {
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dev_err(&pdev->dev, "failed to allocate memory\n");
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return ERR_PTR(-ENOMEM);
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}
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pwm->clk = clk_get(NULL, "OST_CLK");
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if (IS_ERR(pwm->clk)) {
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ret = PTR_ERR(pwm->clk);
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goto err_free;
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}
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pwm->clk_enabled = 0;
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pwm->use_count = 0;
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pwm->pwm_id = pwm_id;
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pwm->pdev = pdev;
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r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (r == NULL) {
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dev_err(&pdev->dev, "no memory resource defined\n");
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ret = -ENODEV;
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goto err_free_clk;
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}
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r = request_mem_region(r->start, resource_size(r), pdev->name);
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if (r == NULL) {
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dev_err(&pdev->dev, "failed to request memory resource\n");
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ret = -EBUSY;
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goto err_free_clk;
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}
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__add_pwm(pwm);
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platform_set_drvdata(pdev, pwm);
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return pwm;
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err_free_clk:
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clk_put(pwm->clk);
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err_free:
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kfree(pwm);
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return ERR_PTR(ret);
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}
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static int __devinit puv3_pwm_probe(struct platform_device *pdev)
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{
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struct pwm_device *pwm = pwm_probe(pdev, pdev->id, NULL);
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if (IS_ERR(pwm))
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return PTR_ERR(pwm);
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return 0;
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}
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static int __devexit pwm_remove(struct platform_device *pdev)
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{
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struct pwm_device *pwm;
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struct resource *r;
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pwm = platform_get_drvdata(pdev);
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if (pwm == NULL)
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return -ENODEV;
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mutex_lock(&pwm_lock);
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list_del(&pwm->node);
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mutex_unlock(&pwm_lock);
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r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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release_mem_region(r->start, resource_size(r));
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clk_put(pwm->clk);
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kfree(pwm);
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return 0;
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}
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static struct platform_driver puv3_pwm_driver = {
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.driver = {
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.name = "PKUnity-v3-PWM",
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},
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.probe = puv3_pwm_probe,
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.remove = __devexit_p(pwm_remove),
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};
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static int __init pwm_init(void)
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{
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int ret = 0;
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ret = platform_driver_register(&puv3_pwm_driver);
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if (ret) {
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printk(KERN_ERR "failed to register puv3_pwm_driver\n");
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return ret;
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}
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return ret;
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}
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arch_initcall(pwm_init);
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static void __exit pwm_exit(void)
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{
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platform_driver_unregister(&puv3_pwm_driver);
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}
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module_exit(pwm_exit);
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MODULE_LICENSE("GPL v2");
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380
arch/unicore32/kernel/rtc.c
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380
arch/unicore32/kernel/rtc.c
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@ -0,0 +1,380 @@
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/*
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* linux/arch/unicore32/kernel/rtc.c
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*
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* Code specific to PKUnity SoC and UniCore ISA
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*
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* Maintained by GUAN Xue-tao <gxt@mprc.pku.edu.cn>
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* Copyright (C) 2001-2010 Guan Xuetao
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/module.h>
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#include <linux/fs.h>
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#include <linux/string.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/interrupt.h>
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#include <linux/rtc.h>
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#include <linux/bcd.h>
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#include <linux/clk.h>
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#include <linux/log2.h>
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#include <linux/slab.h>
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#include <linux/uaccess.h>
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#include <linux/io.h>
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#include <asm/irq.h>
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#include <mach/hardware.h>
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static struct resource *puv3_rtc_mem;
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static int puv3_rtc_alarmno = IRQ_RTCAlarm;
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static int puv3_rtc_tickno = IRQ_RTC;
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static DEFINE_SPINLOCK(puv3_rtc_pie_lock);
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/* IRQ Handlers */
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static irqreturn_t puv3_rtc_alarmirq(int irq, void *id)
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{
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struct rtc_device *rdev = id;
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RTC_RTSR |= RTC_RTSR_AL;
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rtc_update_irq(rdev, 1, RTC_AF | RTC_IRQF);
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return IRQ_HANDLED;
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}
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static irqreturn_t puv3_rtc_tickirq(int irq, void *id)
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{
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struct rtc_device *rdev = id;
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RTC_RTSR |= RTC_RTSR_HZ;
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rtc_update_irq(rdev, 1, RTC_PF | RTC_IRQF);
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return IRQ_HANDLED;
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}
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/* Update control registers */
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static void puv3_rtc_setaie(int to)
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{
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unsigned int tmp;
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pr_debug("%s: aie=%d\n", __func__, to);
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tmp = RTC_RTSR & ~RTC_RTSR_ALE;
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if (to)
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tmp |= RTC_RTSR_ALE;
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RTC_RTSR = tmp;
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}
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static int puv3_rtc_setpie(struct device *dev, int enabled)
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{
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unsigned int tmp;
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pr_debug("%s: pie=%d\n", __func__, enabled);
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spin_lock_irq(&puv3_rtc_pie_lock);
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tmp = RTC_RTSR & ~RTC_RTSR_HZE;
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if (enabled)
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tmp |= RTC_RTSR_HZE;
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RTC_RTSR = tmp;
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spin_unlock_irq(&puv3_rtc_pie_lock);
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return 0;
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}
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static int puv3_rtc_setfreq(struct device *dev, int freq)
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{
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return 0;
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}
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/* Time read/write */
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static int puv3_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
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{
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rtc_time_to_tm(RTC_RCNR, rtc_tm);
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pr_debug("read time %02x.%02x.%02x %02x/%02x/%02x\n",
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rtc_tm->tm_year, rtc_tm->tm_mon, rtc_tm->tm_mday,
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rtc_tm->tm_hour, rtc_tm->tm_min, rtc_tm->tm_sec);
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return 0;
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}
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static int puv3_rtc_settime(struct device *dev, struct rtc_time *tm)
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{
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unsigned long rtc_count = 0;
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pr_debug("set time %02d.%02d.%02d %02d/%02d/%02d\n",
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tm->tm_year, tm->tm_mon, tm->tm_mday,
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tm->tm_hour, tm->tm_min, tm->tm_sec);
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rtc_tm_to_time(tm, &rtc_count);
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RTC_RCNR = rtc_count;
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return 0;
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}
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static int puv3_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm)
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{
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struct rtc_time *alm_tm = &alrm->time;
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rtc_time_to_tm(RTC_RTAR, alm_tm);
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alrm->enabled = RTC_RTSR & RTC_RTSR_ALE;
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pr_debug("read alarm %02x %02x.%02x.%02x %02x/%02x/%02x\n",
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alrm->enabled,
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alm_tm->tm_year, alm_tm->tm_mon, alm_tm->tm_mday,
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alm_tm->tm_hour, alm_tm->tm_min, alm_tm->tm_sec);
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return 0;
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}
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static int puv3_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
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{
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struct rtc_time *tm = &alrm->time;
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unsigned long rtcalarm_count = 0;
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pr_debug("puv3_rtc_setalarm: %d, %02x/%02x/%02x %02x.%02x.%02x\n",
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alrm->enabled,
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tm->tm_mday & 0xff, tm->tm_mon & 0xff, tm->tm_year & 0xff,
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tm->tm_hour & 0xff, tm->tm_min & 0xff, tm->tm_sec);
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rtc_tm_to_time(tm, &rtcalarm_count);
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RTC_RTAR = rtcalarm_count;
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puv3_rtc_setaie(alrm->enabled);
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if (alrm->enabled)
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enable_irq_wake(puv3_rtc_alarmno);
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else
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disable_irq_wake(puv3_rtc_alarmno);
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return 0;
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}
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static int puv3_rtc_proc(struct device *dev, struct seq_file *seq)
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{
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seq_printf(seq, "periodic_IRQ\t: %s\n",
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(RTC_RTSR & RTC_RTSR_HZE) ? "yes" : "no");
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return 0;
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}
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static int puv3_rtc_open(struct device *dev)
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{
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struct platform_device *pdev = to_platform_device(dev);
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struct rtc_device *rtc_dev = platform_get_drvdata(pdev);
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int ret;
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ret = request_irq(puv3_rtc_alarmno, puv3_rtc_alarmirq,
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IRQF_DISABLED, "pkunity-rtc alarm", rtc_dev);
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if (ret) {
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dev_err(dev, "IRQ%d error %d\n", puv3_rtc_alarmno, ret);
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return ret;
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}
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ret = request_irq(puv3_rtc_tickno, puv3_rtc_tickirq,
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IRQF_DISABLED, "pkunity-rtc tick", rtc_dev);
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if (ret) {
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dev_err(dev, "IRQ%d error %d\n", puv3_rtc_tickno, ret);
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goto tick_err;
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}
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||||
|
||||
return ret;
|
||||
|
||||
tick_err:
|
||||
free_irq(puv3_rtc_alarmno, rtc_dev);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void puv3_rtc_release(struct device *dev)
|
||||
{
|
||||
struct platform_device *pdev = to_platform_device(dev);
|
||||
struct rtc_device *rtc_dev = platform_get_drvdata(pdev);
|
||||
|
||||
/* do not clear AIE here, it may be needed for wake */
|
||||
|
||||
puv3_rtc_setpie(dev, 0);
|
||||
free_irq(puv3_rtc_alarmno, rtc_dev);
|
||||
free_irq(puv3_rtc_tickno, rtc_dev);
|
||||
}
|
||||
|
||||
static const struct rtc_class_ops puv3_rtcops = {
|
||||
.open = puv3_rtc_open,
|
||||
.release = puv3_rtc_release,
|
||||
.read_time = puv3_rtc_gettime,
|
||||
.set_time = puv3_rtc_settime,
|
||||
.read_alarm = puv3_rtc_getalarm,
|
||||
.set_alarm = puv3_rtc_setalarm,
|
||||
.irq_set_freq = puv3_rtc_setfreq,
|
||||
.irq_set_state = puv3_rtc_setpie,
|
||||
.proc = puv3_rtc_proc,
|
||||
};
|
||||
|
||||
static void puv3_rtc_enable(struct platform_device *pdev, int en)
|
||||
{
|
||||
if (!en) {
|
||||
RTC_RTSR &= ~RTC_RTSR_HZE;
|
||||
} else {
|
||||
/* re-enable the device, and check it is ok */
|
||||
|
||||
if ((RTC_RTSR & RTC_RTSR_HZE) == 0) {
|
||||
dev_info(&pdev->dev, "rtc disabled, re-enabling\n");
|
||||
RTC_RTSR |= RTC_RTSR_HZE;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static int puv3_rtc_remove(struct platform_device *dev)
|
||||
{
|
||||
struct rtc_device *rtc = platform_get_drvdata(dev);
|
||||
|
||||
platform_set_drvdata(dev, NULL);
|
||||
rtc_device_unregister(rtc);
|
||||
|
||||
puv3_rtc_setpie(&dev->dev, 0);
|
||||
puv3_rtc_setaie(0);
|
||||
|
||||
release_resource(puv3_rtc_mem);
|
||||
kfree(puv3_rtc_mem);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int puv3_rtc_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct rtc_device *rtc;
|
||||
struct resource *res;
|
||||
int ret;
|
||||
|
||||
pr_debug("%s: probe=%p\n", __func__, pdev);
|
||||
|
||||
/* find the IRQs */
|
||||
|
||||
puv3_rtc_tickno = platform_get_irq(pdev, 1);
|
||||
if (puv3_rtc_tickno < 0) {
|
||||
dev_err(&pdev->dev, "no irq for rtc tick\n");
|
||||
return -ENOENT;
|
||||
}
|
||||
|
||||
puv3_rtc_alarmno = platform_get_irq(pdev, 0);
|
||||
if (puv3_rtc_alarmno < 0) {
|
||||
dev_err(&pdev->dev, "no irq for alarm\n");
|
||||
return -ENOENT;
|
||||
}
|
||||
|
||||
pr_debug("PKUnity_rtc: tick irq %d, alarm irq %d\n",
|
||||
puv3_rtc_tickno, puv3_rtc_alarmno);
|
||||
|
||||
/* get the memory region */
|
||||
|
||||
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
if (res == NULL) {
|
||||
dev_err(&pdev->dev, "failed to get memory region resource\n");
|
||||
return -ENOENT;
|
||||
}
|
||||
|
||||
puv3_rtc_mem = request_mem_region(res->start,
|
||||
res->end-res->start+1,
|
||||
pdev->name);
|
||||
|
||||
if (puv3_rtc_mem == NULL) {
|
||||
dev_err(&pdev->dev, "failed to reserve memory region\n");
|
||||
ret = -ENOENT;
|
||||
goto err_nores;
|
||||
}
|
||||
|
||||
puv3_rtc_enable(pdev, 1);
|
||||
|
||||
puv3_rtc_setfreq(&pdev->dev, 1);
|
||||
|
||||
/* register RTC and exit */
|
||||
|
||||
rtc = rtc_device_register("pkunity", &pdev->dev, &puv3_rtcops,
|
||||
THIS_MODULE);
|
||||
|
||||
if (IS_ERR(rtc)) {
|
||||
dev_err(&pdev->dev, "cannot attach rtc\n");
|
||||
ret = PTR_ERR(rtc);
|
||||
goto err_nortc;
|
||||
}
|
||||
|
||||
/* platform setup code should have handled this; sigh */
|
||||
if (!device_can_wakeup(&pdev->dev))
|
||||
device_init_wakeup(&pdev->dev, 1);
|
||||
|
||||
platform_set_drvdata(pdev, rtc);
|
||||
return 0;
|
||||
|
||||
err_nortc:
|
||||
puv3_rtc_enable(pdev, 0);
|
||||
release_resource(puv3_rtc_mem);
|
||||
|
||||
err_nores:
|
||||
return ret;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
|
||||
/* RTC Power management control */
|
||||
|
||||
static int ticnt_save;
|
||||
|
||||
static int puv3_rtc_suspend(struct platform_device *pdev, pm_message_t state)
|
||||
{
|
||||
/* save RTAR for anyone using periodic interrupts */
|
||||
ticnt_save = RTC_RTAR;
|
||||
puv3_rtc_enable(pdev, 0);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int puv3_rtc_resume(struct platform_device *pdev)
|
||||
{
|
||||
puv3_rtc_enable(pdev, 1);
|
||||
RTC_RTAR = ticnt_save;
|
||||
return 0;
|
||||
}
|
||||
#else
|
||||
#define puv3_rtc_suspend NULL
|
||||
#define puv3_rtc_resume NULL
|
||||
#endif
|
||||
|
||||
static struct platform_driver puv3_rtcdrv = {
|
||||
.probe = puv3_rtc_probe,
|
||||
.remove = __devexit_p(puv3_rtc_remove),
|
||||
.suspend = puv3_rtc_suspend,
|
||||
.resume = puv3_rtc_resume,
|
||||
.driver = {
|
||||
.name = "PKUnity-v3-RTC",
|
||||
.owner = THIS_MODULE,
|
||||
}
|
||||
};
|
||||
|
||||
static char __initdata banner[] = "PKUnity-v3 RTC, (c) 2009 PKUnity Co.\n";
|
||||
|
||||
static int __init puv3_rtc_init(void)
|
||||
{
|
||||
printk(banner);
|
||||
return platform_driver_register(&puv3_rtcdrv);
|
||||
}
|
||||
|
||||
static void __exit puv3_rtc_exit(void)
|
||||
{
|
||||
platform_driver_unregister(&puv3_rtcdrv);
|
||||
}
|
||||
|
||||
module_init(puv3_rtc_init);
|
||||
module_exit(puv3_rtc_exit);
|
||||
|
||||
MODULE_DESCRIPTION("RTC Driver for the PKUnity v3 chip");
|
||||
MODULE_AUTHOR("Hu Dongliang");
|
||||
MODULE_LICENSE("GPL v2");
|
||||
|
148
arch/unicore32/kernel/time.c
Normal file
148
arch/unicore32/kernel/time.c
Normal file
@ -0,0 +1,148 @@
|
||||
/*
|
||||
* linux/arch/unicore32/kernel/time.c
|
||||
*
|
||||
* Code specific to PKUnity SoC and UniCore ISA
|
||||
*
|
||||
* Maintained by GUAN Xue-tao <gxt@mprc.pku.edu.cn>
|
||||
* Copyright (C) 2001-2010 Guan Xuetao
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#include <linux/init.h>
|
||||
#include <linux/errno.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/timex.h>
|
||||
#include <linux/clockchips.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
|
||||
#define MIN_OSCR_DELTA 2
|
||||
|
||||
static irqreturn_t puv3_ost0_interrupt(int irq, void *dev_id)
|
||||
{
|
||||
struct clock_event_device *c = dev_id;
|
||||
|
||||
/* Disarm the compare/match, signal the event. */
|
||||
OST_OIER &= ~OST_OIER_E0;
|
||||
OST_OSSR &= ~OST_OSSR_M0;
|
||||
c->event_handler(c);
|
||||
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
static int
|
||||
puv3_osmr0_set_next_event(unsigned long delta, struct clock_event_device *c)
|
||||
{
|
||||
unsigned long next, oscr;
|
||||
|
||||
OST_OIER |= OST_OIER_E0;
|
||||
next = OST_OSCR + delta;
|
||||
OST_OSMR0 = next;
|
||||
oscr = OST_OSCR;
|
||||
|
||||
return (signed)(next - oscr) <= MIN_OSCR_DELTA ? -ETIME : 0;
|
||||
}
|
||||
|
||||
static void
|
||||
puv3_osmr0_set_mode(enum clock_event_mode mode, struct clock_event_device *c)
|
||||
{
|
||||
switch (mode) {
|
||||
case CLOCK_EVT_MODE_ONESHOT:
|
||||
case CLOCK_EVT_MODE_UNUSED:
|
||||
case CLOCK_EVT_MODE_SHUTDOWN:
|
||||
OST_OIER &= ~OST_OIER_E0;
|
||||
OST_OSSR &= ~OST_OSSR_M0;
|
||||
break;
|
||||
|
||||
case CLOCK_EVT_MODE_RESUME:
|
||||
case CLOCK_EVT_MODE_PERIODIC:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
static struct clock_event_device ckevt_puv3_osmr0 = {
|
||||
.name = "osmr0",
|
||||
.features = CLOCK_EVT_FEAT_ONESHOT,
|
||||
#ifdef CONFIG_ARCH_FPGA
|
||||
.shift = 18, /* correct shift val: 16, but warn_on_slowpath */
|
||||
#else
|
||||
.shift = 30,
|
||||
#endif
|
||||
.rating = 200,
|
||||
.set_next_event = puv3_osmr0_set_next_event,
|
||||
.set_mode = puv3_osmr0_set_mode,
|
||||
};
|
||||
|
||||
static cycle_t puv3_read_oscr(struct clocksource *cs)
|
||||
{
|
||||
return OST_OSCR;
|
||||
}
|
||||
|
||||
static struct clocksource cksrc_puv3_oscr = {
|
||||
.name = "oscr",
|
||||
.rating = 200,
|
||||
.read = puv3_read_oscr,
|
||||
.mask = CLOCKSOURCE_MASK(32),
|
||||
.flags = CLOCK_SOURCE_IS_CONTINUOUS,
|
||||
};
|
||||
|
||||
static struct irqaction puv3_timer_irq = {
|
||||
.name = "ost0",
|
||||
.flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
|
||||
.handler = puv3_ost0_interrupt,
|
||||
.dev_id = &ckevt_puv3_osmr0,
|
||||
};
|
||||
|
||||
void __init time_init(void)
|
||||
{
|
||||
OST_OIER = 0; /* disable any timer interrupts */
|
||||
OST_OSSR = 0; /* clear status on all timers */
|
||||
|
||||
ckevt_puv3_osmr0.mult =
|
||||
div_sc(CLOCK_TICK_RATE, NSEC_PER_SEC, ckevt_puv3_osmr0.shift);
|
||||
ckevt_puv3_osmr0.max_delta_ns =
|
||||
clockevent_delta2ns(0x7fffffff, &ckevt_puv3_osmr0);
|
||||
ckevt_puv3_osmr0.min_delta_ns =
|
||||
clockevent_delta2ns(MIN_OSCR_DELTA * 2, &ckevt_puv3_osmr0) + 1;
|
||||
ckevt_puv3_osmr0.cpumask = cpumask_of(0);
|
||||
|
||||
setup_irq(IRQ_TIMER0, &puv3_timer_irq);
|
||||
|
||||
clocksource_register_hz(&cksrc_puv3_oscr, CLOCK_TICK_RATE);
|
||||
clockevents_register_device(&ckevt_puv3_osmr0);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
unsigned long osmr[4], oier;
|
||||
|
||||
void puv3_timer_suspend(void)
|
||||
{
|
||||
osmr[0] = OST_OSMR0;
|
||||
osmr[1] = OST_OSMR1;
|
||||
osmr[2] = OST_OSMR2;
|
||||
osmr[3] = OST_OSMR3;
|
||||
oier = OST_OIER;
|
||||
}
|
||||
|
||||
void puv3_timer_resume(void)
|
||||
{
|
||||
OST_OSSR = 0;
|
||||
OST_OSMR0 = osmr[0];
|
||||
OST_OSMR1 = osmr[1];
|
||||
OST_OSMR2 = osmr[2];
|
||||
OST_OSMR3 = osmr[3];
|
||||
OST_OIER = oier;
|
||||
|
||||
/*
|
||||
* OSMR0 is the system timer: make sure OSCR is sufficiently behind
|
||||
*/
|
||||
OST_OSCR = OST_OSMR0 - LATCH;
|
||||
}
|
||||
#else
|
||||
void puv3_timer_suspend(void) { };
|
||||
void puv3_timer_resume(void) { };
|
||||
#endif
|
||||
|
Loading…
Reference in New Issue
Block a user