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[MTD] XIP for AMD CFI flash.
Author: Vitaly Wool <vwool@ru.mvista.com> Signed-off-by: Todd Poynor <tpoynor@mvista.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
This commit is contained in:
Todd Poynor
Thomas Gleixner
parent
0dfc62465e
commit
02b15e343a
@ -1,5 +1,5 @@
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# drivers/mtd/chips/Kconfig
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# $Id: Kconfig,v 1.14 2005/02/08 17:11:15 nico Exp $
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# $Id: Kconfig,v 1.15 2005/06/06 23:04:35 tpoynor Exp $
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menu "RAM/ROM/Flash chip drivers"
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depends on MTD!=n
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@ -300,7 +300,7 @@ config MTD_JEDEC
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config MTD_XIP
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bool "XIP aware MTD support"
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depends on !SMP && MTD_CFI_INTELEXT && EXPERIMENTAL
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depends on !SMP && (MTD_CFI_INTELEXT || MTD_CFI_AMDSTD) && EXPERIMENTAL
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default y if XIP_KERNEL
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help
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This allows MTD support to work with flash memory which is also
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@ -4,16 +4,20 @@
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*
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* Copyright (C) 2000 Crossnet Co. <info@crossnet.co.jp>
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* Copyright (C) 2004 Arcom Control Systems Ltd <linux@arcom.com>
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* Copyright (C) 2005 MontaVista Software Inc. <source@mvista.com>
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*
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* 2_by_8 routines added by Simon Munton
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*
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* 4_by_16 work by Carolyn J. Smith
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*
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* XIP support hooks by Vitaly Wool (based on code for Intel flash
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* by Nicolas Pitre)
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*
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* Occasionally maintained by Thayne Harbaugh tharbaugh at lnxi dot com
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*
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* This code is GPL
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*
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* $Id: cfi_cmdset_0002.c,v 1.116 2005/05/24 13:29:42 gleixner Exp $
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* $Id: cfi_cmdset_0002.c,v 1.117 2005/06/06 23:04:35 tpoynor Exp $
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*
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*/
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@ -34,6 +38,7 @@
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#include <linux/mtd/map.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/cfi.h>
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#include <linux/mtd/xip.h>
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#define AMD_BOOTLOC_BUG
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#define FORCE_WORD_WRITE 0
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@ -393,7 +398,7 @@ static struct mtd_info *cfi_amdstd_setup(struct mtd_info *mtd)
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* correctly and is therefore not done (particulary with interleaved chips
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* as each chip must be checked independantly of the others).
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*/
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static int chip_ready(struct map_info *map, unsigned long addr)
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static int __xipram chip_ready(struct map_info *map, unsigned long addr)
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{
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map_word d, t;
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@ -418,7 +423,7 @@ static int chip_ready(struct map_info *map, unsigned long addr)
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* as each chip must be checked independantly of the others).
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*
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*/
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static int chip_good(struct map_info *map, unsigned long addr, map_word expected)
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static int __xipram chip_good(struct map_info *map, unsigned long addr, map_word expected)
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{
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map_word oldd, curd;
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@ -448,12 +453,12 @@ static int get_chip(struct map_info *map, struct flchip *chip, unsigned long adr
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if (time_after(jiffies, timeo)) {
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printk(KERN_ERR "Waiting for chip to be ready timed out.\n");
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cfi_spin_unlock(chip->mutex);
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spin_unlock(chip->mutex);
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return -EIO;
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}
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cfi_spin_unlock(chip->mutex);
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spin_unlock(chip->mutex);
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cfi_udelay(1);
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cfi_spin_lock(chip->mutex);
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spin_lock(chip->mutex);
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/* Someone else might have been playing with it. */
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goto retry;
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}
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@ -501,15 +506,23 @@ static int get_chip(struct map_info *map, struct flchip *chip, unsigned long adr
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return -EIO;
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}
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cfi_spin_unlock(chip->mutex);
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spin_unlock(chip->mutex);
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cfi_udelay(1);
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cfi_spin_lock(chip->mutex);
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spin_lock(chip->mutex);
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/* Nobody will touch it while it's in state FL_ERASE_SUSPENDING.
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So we can just loop here. */
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}
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chip->state = FL_READY;
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return 0;
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case FL_XIP_WHILE_ERASING:
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if (mode != FL_READY && mode != FL_POINT &&
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(!cfip || !(cfip->EraseSuspend&2)))
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goto sleep;
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chip->oldstate = chip->state;
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chip->state = FL_READY;
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return 0;
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case FL_POINT:
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/* Only if there's no operation suspended... */
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if (mode == FL_READY && chip->oldstate == FL_READY)
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@ -519,10 +532,10 @@ static int get_chip(struct map_info *map, struct flchip *chip, unsigned long adr
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sleep:
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set_current_state(TASK_UNINTERRUPTIBLE);
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add_wait_queue(&chip->wq, &wait);
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cfi_spin_unlock(chip->mutex);
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spin_unlock(chip->mutex);
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schedule();
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remove_wait_queue(&chip->wq, &wait);
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cfi_spin_lock(chip->mutex);
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spin_lock(chip->mutex);
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goto resettime;
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}
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}
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@ -540,6 +553,11 @@ static void put_chip(struct map_info *map, struct flchip *chip, unsigned long ad
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chip->state = FL_ERASING;
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break;
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case FL_XIP_WHILE_ERASING:
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chip->state = chip->oldstate;
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chip->oldstate = FL_READY;
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break;
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case FL_READY:
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case FL_STATUS:
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/* We should really make set_vpp() count, rather than doing this */
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@ -551,6 +569,198 @@ static void put_chip(struct map_info *map, struct flchip *chip, unsigned long ad
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wake_up(&chip->wq);
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}
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#ifdef CONFIG_MTD_XIP
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/*
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* No interrupt what so ever can be serviced while the flash isn't in array
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* mode. This is ensured by the xip_disable() and xip_enable() functions
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* enclosing any code path where the flash is known not to be in array mode.
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* And within a XIP disabled code path, only functions marked with __xipram
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* may be called and nothing else (it's a good thing to inspect generated
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* assembly to make sure inline functions were actually inlined and that gcc
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* didn't emit calls to its own support functions). Also configuring MTD CFI
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* support to a single buswidth and a single interleave is also recommended.
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*/
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#include <asm/hardware.h>
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static void xip_disable(struct map_info *map, struct flchip *chip,
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unsigned long adr)
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{
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/* TODO: chips with no XIP use should ignore and return */
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(void) map_read(map, adr); /* ensure mmu mapping is up to date */
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local_irq_disable();
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}
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static void __xipram xip_enable(struct map_info *map, struct flchip *chip,
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unsigned long adr)
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{
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struct cfi_private *cfi = map->fldrv_priv;
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if (chip->state != FL_POINT && chip->state != FL_READY) {
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map_write(map, CMD(0xf0), adr);
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chip->state = FL_READY;
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}
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(void) map_read(map, adr);
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asm volatile (".rep 8; nop; .endr"); /* fill instruction prefetch */
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local_irq_enable();
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}
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/*
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* When a delay is required for the flash operation to complete, the
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* xip_udelay() function is polling for both the given timeout and pending
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* (but still masked) hardware interrupts. Whenever there is an interrupt
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* pending then the flash erase operation is suspended, array mode restored
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* and interrupts unmasked. Task scheduling might also happen at that
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* point. The CPU eventually returns from the interrupt or the call to
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* schedule() and the suspended flash operation is resumed for the remaining
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* of the delay period.
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*
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* Warning: this function _will_ fool interrupt latency tracing tools.
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*/
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static void __xipram xip_udelay(struct map_info *map, struct flchip *chip,
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unsigned long adr, int usec)
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{
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struct cfi_private *cfi = map->fldrv_priv;
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struct cfi_pri_amdstd *extp = cfi->cmdset_priv;
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map_word status, OK = CMD(0x80);
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unsigned long suspended, start = xip_currtime();
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flstate_t oldstate;
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do {
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cpu_relax();
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if (xip_irqpending() && extp &&
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((chip->state == FL_ERASING && (extp->EraseSuspend & 2))) &&
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(cfi_interleave_is_1(cfi) || chip->oldstate == FL_READY)) {
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/*
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* Let's suspend the erase operation when supported.
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* Note that we currently don't try to suspend
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* interleaved chips if there is already another
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* operation suspended (imagine what happens
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* when one chip was already done with the current
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* operation while another chip suspended it, then
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* we resume the whole thing at once). Yes, it
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* can happen!
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*/
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map_write(map, CMD(0xb0), adr);
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usec -= xip_elapsed_since(start);
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suspended = xip_currtime();
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do {
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if (xip_elapsed_since(suspended) > 100000) {
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/*
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* The chip doesn't want to suspend
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* after waiting for 100 msecs.
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* This is a critical error but there
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* is not much we can do here.
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*/
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return;
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}
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status = map_read(map, adr);
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} while (!map_word_andequal(map, status, OK, OK));
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/* Suspend succeeded */
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oldstate = chip->state;
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if (!map_word_bitsset(map, status, CMD(0x40)))
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break;
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chip->state = FL_XIP_WHILE_ERASING;
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chip->erase_suspended = 1;
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map_write(map, CMD(0xf0), adr);
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(void) map_read(map, adr);
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asm volatile (".rep 8; nop; .endr");
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local_irq_enable();
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spin_unlock(chip->mutex);
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asm volatile (".rep 8; nop; .endr");
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cond_resched();
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/*
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* We're back. However someone else might have
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* decided to go write to the chip if we are in
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* a suspended erase state. If so let's wait
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* until it's done.
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*/
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spin_lock(chip->mutex);
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while (chip->state != FL_XIP_WHILE_ERASING) {
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DECLARE_WAITQUEUE(wait, current);
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set_current_state(TASK_UNINTERRUPTIBLE);
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add_wait_queue(&chip->wq, &wait);
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spin_unlock(chip->mutex);
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schedule();
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remove_wait_queue(&chip->wq, &wait);
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spin_lock(chip->mutex);
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}
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/* Disallow XIP again */
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local_irq_disable();
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/* Resume the write or erase operation */
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map_write(map, CMD(0x30), adr);
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chip->state = oldstate;
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start = xip_currtime();
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} else if (usec >= 1000000/HZ) {
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/*
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* Try to save on CPU power when waiting delay
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* is at least a system timer tick period.
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* No need to be extremely accurate here.
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*/
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xip_cpu_idle();
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}
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status = map_read(map, adr);
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} while (!map_word_andequal(map, status, OK, OK)
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&& xip_elapsed_since(start) < usec);
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}
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#define UDELAY(map, chip, adr, usec) xip_udelay(map, chip, adr, usec)
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/*
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* The INVALIDATE_CACHED_RANGE() macro is normally used in parallel while
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* the flash is actively programming or erasing since we have to poll for
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* the operation to complete anyway. We can't do that in a generic way with
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* a XIP setup so do it before the actual flash operation in this case
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* and stub it out from INVALIDATE_CACHE_UDELAY.
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*/
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#define XIP_INVAL_CACHED_RANGE(map, from, size) \
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INVALIDATE_CACHED_RANGE(map, from, size)
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#define INVALIDATE_CACHE_UDELAY(map, chip, adr, len, usec) \
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UDELAY(map, chip, adr, usec)
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/*
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* Extra notes:
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*
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* Activating this XIP support changes the way the code works a bit. For
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* example the code to suspend the current process when concurrent access
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* happens is never executed because xip_udelay() will always return with the
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* same chip state as it was entered with. This is why there is no care for
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* the presence of add_wait_queue() or schedule() calls from within a couple
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* xip_disable()'d areas of code, like in do_erase_oneblock for example.
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* The queueing and scheduling are always happening within xip_udelay().
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*
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* Similarly, get_chip() and put_chip() just happen to always be executed
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* with chip->state set to FL_READY (or FL_XIP_WHILE_*) where flash state
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* is in array mode, therefore never executing many cases therein and not
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* causing any problem with XIP.
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*/
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#else
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#define xip_disable(map, chip, adr)
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#define xip_enable(map, chip, adr)
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#define XIP_INVAL_CACHED_RANGE(x...)
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#define UDELAY(map, chip, adr, usec) \
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do { \
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spin_unlock(chip->mutex); \
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cfi_udelay(usec); \
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spin_lock(chip->mutex); \
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} while (0)
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#define INVALIDATE_CACHE_UDELAY(map, chip, adr, len, usec) \
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do { \
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spin_unlock(chip->mutex); \
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INVALIDATE_CACHED_RANGE(map, adr, len); \
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cfi_udelay(usec); \
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spin_lock(chip->mutex); \
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} while (0)
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#endif
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static inline int do_read_onechip(struct map_info *map, struct flchip *chip, loff_t adr, size_t len, u_char *buf)
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{
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@ -563,10 +773,10 @@ static inline int do_read_onechip(struct map_info *map, struct flchip *chip, lof
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/* Ensure cmd read/writes are aligned. */
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cmd_addr = adr & ~(map_bankwidth(map)-1);
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cfi_spin_lock(chip->mutex);
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spin_lock(chip->mutex);
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ret = get_chip(map, chip, cmd_addr, FL_READY);
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if (ret) {
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cfi_spin_unlock(chip->mutex);
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spin_unlock(chip->mutex);
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return ret;
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}
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@ -579,7 +789,7 @@ static inline int do_read_onechip(struct map_info *map, struct flchip *chip, lof
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put_chip(map, chip, cmd_addr);
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cfi_spin_unlock(chip->mutex);
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spin_unlock(chip->mutex);
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return 0;
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}
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@ -633,7 +843,7 @@ static inline int do_read_secsi_onechip(struct map_info *map, struct flchip *chi
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struct cfi_private *cfi = map->fldrv_priv;
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retry:
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cfi_spin_lock(chip->mutex);
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spin_lock(chip->mutex);
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if (chip->state != FL_READY){
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#if 0
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@ -642,7 +852,7 @@ static inline int do_read_secsi_onechip(struct map_info *map, struct flchip *chi
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set_current_state(TASK_UNINTERRUPTIBLE);
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add_wait_queue(&chip->wq, &wait);
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cfi_spin_unlock(chip->mutex);
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spin_unlock(chip->mutex);
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schedule();
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remove_wait_queue(&chip->wq, &wait);
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@ -671,7 +881,7 @@ static inline int do_read_secsi_onechip(struct map_info *map, struct flchip *chi
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cfi_send_gen_cmd(0x00, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL);
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wake_up(&chip->wq);
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cfi_spin_unlock(chip->mutex);
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spin_unlock(chip->mutex);
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return 0;
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}
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@ -720,7 +930,7 @@ static int cfi_amdstd_secsi_read (struct mtd_info *mtd, loff_t from, size_t len,
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}
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static int do_write_oneword(struct map_info *map, struct flchip *chip, unsigned long adr, map_word datum)
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static int __xipram do_write_oneword(struct map_info *map, struct flchip *chip, unsigned long adr, map_word datum)
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{
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struct cfi_private *cfi = map->fldrv_priv;
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unsigned long timeo = jiffies + HZ;
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@ -740,10 +950,10 @@ static int do_write_oneword(struct map_info *map, struct flchip *chip, unsigned
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adr += chip->start;
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cfi_spin_lock(chip->mutex);
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spin_lock(chip->mutex);
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ret = get_chip(map, chip, adr, FL_WRITING);
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if (ret) {
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cfi_spin_unlock(chip->mutex);
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spin_unlock(chip->mutex);
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return ret;
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}
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@ -763,7 +973,9 @@ static int do_write_oneword(struct map_info *map, struct flchip *chip, unsigned
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goto op_done;
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}
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XIP_INVAL_CACHED_RANGE(map, adr, map_bankwidth(map));
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ENABLE_VPP(map);
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xip_disable(map, chip, adr);
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retry:
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cfi_send_gen_cmd(0xAA, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL);
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cfi_send_gen_cmd(0x55, cfi->addr_unlock2, chip->start, map, cfi, cfi->device_type, NULL);
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@ -771,9 +983,9 @@ static int do_write_oneword(struct map_info *map, struct flchip *chip, unsigned
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map_write(map, datum, adr);
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chip->state = FL_WRITING;
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cfi_spin_unlock(chip->mutex);
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cfi_udelay(chip->word_write_time);
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cfi_spin_lock(chip->mutex);
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INVALIDATE_CACHE_UDELAY(map, chip,
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adr, map_bankwidth(map),
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chip->word_write_time);
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/* See comment above for timeout value. */
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||||
timeo = jiffies + uWriteTimeout;
|
||||
@ -784,11 +996,11 @@ static int do_write_oneword(struct map_info *map, struct flchip *chip, unsigned
|
||||
|
||||
set_current_state(TASK_UNINTERRUPTIBLE);
|
||||
add_wait_queue(&chip->wq, &wait);
|
||||
cfi_spin_unlock(chip->mutex);
|
||||
spin_unlock(chip->mutex);
|
||||
schedule();
|
||||
remove_wait_queue(&chip->wq, &wait);
|
||||
timeo = jiffies + (HZ / 2); /* FIXME */
|
||||
cfi_spin_lock(chip->mutex);
|
||||
spin_lock(chip->mutex);
|
||||
continue;
|
||||
}
|
||||
|
||||
@ -796,14 +1008,14 @@ static int do_write_oneword(struct map_info *map, struct flchip *chip, unsigned
|
||||
break;
|
||||
|
||||
if (time_after(jiffies, timeo)) {
|
||||
xip_enable(map, chip, adr);
|
||||
printk(KERN_WARNING "MTD %s(): software timeout\n", __func__);
|
||||
xip_disable(map, chip, adr);
|
||||
break;
|
||||
}
|
||||
|
||||
/* Latency issues. Drop the lock, wait a while and retry */
|
||||
cfi_spin_unlock(chip->mutex);
|
||||
cfi_udelay(1);
|
||||
cfi_spin_lock(chip->mutex);
|
||||
UDELAY(map, chip, adr, 1);
|
||||
}
|
||||
/* Did we succeed? */
|
||||
if (!chip_good(map, adr, datum)) {
|
||||
@ -816,10 +1028,11 @@ static int do_write_oneword(struct map_info *map, struct flchip *chip, unsigned
|
||||
|
||||
ret = -EIO;
|
||||
}
|
||||
xip_enable(map, chip, adr);
|
||||
op_done:
|
||||
chip->state = FL_READY;
|
||||
put_chip(map, chip, adr);
|
||||
cfi_spin_unlock(chip->mutex);
|
||||
spin_unlock(chip->mutex);
|
||||
|
||||
return ret;
|
||||
}
|
||||
@ -851,7 +1064,7 @@ static int cfi_amdstd_write_words(struct mtd_info *mtd, loff_t to, size_t len,
|
||||
map_word tmp_buf;
|
||||
|
||||
retry:
|
||||
cfi_spin_lock(cfi->chips[chipnum].mutex);
|
||||
spin_lock(cfi->chips[chipnum].mutex);
|
||||
|
||||
if (cfi->chips[chipnum].state != FL_READY) {
|
||||
#if 0
|
||||
@ -860,7 +1073,7 @@ static int cfi_amdstd_write_words(struct mtd_info *mtd, loff_t to, size_t len,
|
||||
set_current_state(TASK_UNINTERRUPTIBLE);
|
||||
add_wait_queue(&cfi->chips[chipnum].wq, &wait);
|
||||
|
||||
cfi_spin_unlock(cfi->chips[chipnum].mutex);
|
||||
spin_unlock(cfi->chips[chipnum].mutex);
|
||||
|
||||
schedule();
|
||||
remove_wait_queue(&cfi->chips[chipnum].wq, &wait);
|
||||
@ -874,7 +1087,7 @@ static int cfi_amdstd_write_words(struct mtd_info *mtd, loff_t to, size_t len,
|
||||
/* Load 'tmp_buf' with old contents of flash */
|
||||
tmp_buf = map_read(map, bus_ofs+chipstart);
|
||||
|
||||
cfi_spin_unlock(cfi->chips[chipnum].mutex);
|
||||
spin_unlock(cfi->chips[chipnum].mutex);
|
||||
|
||||
/* Number of bytes to copy from buffer */
|
||||
n = min_t(int, len, map_bankwidth(map)-i);
|
||||
@ -929,7 +1142,7 @@ static int cfi_amdstd_write_words(struct mtd_info *mtd, loff_t to, size_t len,
|
||||
map_word tmp_buf;
|
||||
|
||||
retry1:
|
||||
cfi_spin_lock(cfi->chips[chipnum].mutex);
|
||||
spin_lock(cfi->chips[chipnum].mutex);
|
||||
|
||||
if (cfi->chips[chipnum].state != FL_READY) {
|
||||
#if 0
|
||||
@ -938,7 +1151,7 @@ static int cfi_amdstd_write_words(struct mtd_info *mtd, loff_t to, size_t len,
|
||||
set_current_state(TASK_UNINTERRUPTIBLE);
|
||||
add_wait_queue(&cfi->chips[chipnum].wq, &wait);
|
||||
|
||||
cfi_spin_unlock(cfi->chips[chipnum].mutex);
|
||||
spin_unlock(cfi->chips[chipnum].mutex);
|
||||
|
||||
schedule();
|
||||
remove_wait_queue(&cfi->chips[chipnum].wq, &wait);
|
||||
@ -951,7 +1164,7 @@ static int cfi_amdstd_write_words(struct mtd_info *mtd, loff_t to, size_t len,
|
||||
|
||||
tmp_buf = map_read(map, ofs + chipstart);
|
||||
|
||||
cfi_spin_unlock(cfi->chips[chipnum].mutex);
|
||||
spin_unlock(cfi->chips[chipnum].mutex);
|
||||
|
||||
tmp_buf = map_word_load_partial(map, tmp_buf, buf, 0, len);
|
||||
|
||||
@ -970,8 +1183,9 @@ static int cfi_amdstd_write_words(struct mtd_info *mtd, loff_t to, size_t len,
|
||||
/*
|
||||
* FIXME: interleaved mode not tested, and probably not supported!
|
||||
*/
|
||||
static inline int do_write_buffer(struct map_info *map, struct flchip *chip,
|
||||
unsigned long adr, const u_char *buf, int len)
|
||||
static int __xipram do_write_buffer(struct map_info *map, struct flchip *chip,
|
||||
unsigned long adr, const u_char *buf,
|
||||
int len)
|
||||
{
|
||||
struct cfi_private *cfi = map->fldrv_priv;
|
||||
unsigned long timeo = jiffies + HZ;
|
||||
@ -985,10 +1199,10 @@ static inline int do_write_buffer(struct map_info *map, struct flchip *chip,
|
||||
adr += chip->start;
|
||||
cmd_adr = adr;
|
||||
|
||||
cfi_spin_lock(chip->mutex);
|
||||
spin_lock(chip->mutex);
|
||||
ret = get_chip(map, chip, adr, FL_WRITING);
|
||||
if (ret) {
|
||||
cfi_spin_unlock(chip->mutex);
|
||||
spin_unlock(chip->mutex);
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -997,7 +1211,10 @@ static inline int do_write_buffer(struct map_info *map, struct flchip *chip,
|
||||
DEBUG( MTD_DEBUG_LEVEL3, "MTD %s(): WRITE 0x%.8lx(0x%.8lx)\n",
|
||||
__func__, adr, datum.x[0] );
|
||||
|
||||
XIP_INVAL_CACHED_RANGE(map, adr, len);
|
||||
ENABLE_VPP(map);
|
||||
xip_disable(map, chip, cmd_adr);
|
||||
|
||||
cfi_send_gen_cmd(0xAA, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL);
|
||||
cfi_send_gen_cmd(0x55, cfi->addr_unlock2, chip->start, map, cfi, cfi->device_type, NULL);
|
||||
//cfi_send_gen_cmd(0xA0, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL);
|
||||
@ -1027,9 +1244,9 @@ static inline int do_write_buffer(struct map_info *map, struct flchip *chip,
|
||||
map_write(map, CMD(0x29), cmd_adr);
|
||||
chip->state = FL_WRITING;
|
||||
|
||||
cfi_spin_unlock(chip->mutex);
|
||||
cfi_udelay(chip->buffer_write_time);
|
||||
cfi_spin_lock(chip->mutex);
|
||||
INVALIDATE_CACHE_UDELAY(map, chip,
|
||||
adr, map_bankwidth(map),
|
||||
chip->word_write_time);
|
||||
|
||||
timeo = jiffies + uWriteTimeout;
|
||||
|
||||
@ -1040,38 +1257,39 @@ static inline int do_write_buffer(struct map_info *map, struct flchip *chip,
|
||||
|
||||
set_current_state(TASK_UNINTERRUPTIBLE);
|
||||
add_wait_queue(&chip->wq, &wait);
|
||||
cfi_spin_unlock(chip->mutex);
|
||||
spin_unlock(chip->mutex);
|
||||
schedule();
|
||||
remove_wait_queue(&chip->wq, &wait);
|
||||
timeo = jiffies + (HZ / 2); /* FIXME */
|
||||
cfi_spin_lock(chip->mutex);
|
||||
spin_lock(chip->mutex);
|
||||
continue;
|
||||
}
|
||||
|
||||
if (chip_ready(map, adr))
|
||||
if (chip_ready(map, adr)) {
|
||||
xip_enable(map, chip, adr);
|
||||
goto op_done;
|
||||
}
|
||||
|
||||
if( time_after(jiffies, timeo))
|
||||
break;
|
||||
|
||||
/* Latency issues. Drop the lock, wait a while and retry */
|
||||
cfi_spin_unlock(chip->mutex);
|
||||
cfi_udelay(1);
|
||||
cfi_spin_lock(chip->mutex);
|
||||
UDELAY(map, chip, adr, 1);
|
||||
}
|
||||
|
||||
printk(KERN_WARNING "MTD %s(): software timeout\n",
|
||||
__func__ );
|
||||
|
||||
/* reset on all failures. */
|
||||
map_write( map, CMD(0xF0), chip->start );
|
||||
xip_enable(map, chip, adr);
|
||||
/* FIXME - should have reset delay before continuing */
|
||||
|
||||
printk(KERN_WARNING "MTD %s(): software timeout\n",
|
||||
__func__ );
|
||||
|
||||
ret = -EIO;
|
||||
op_done:
|
||||
chip->state = FL_READY;
|
||||
put_chip(map, chip, adr);
|
||||
cfi_spin_unlock(chip->mutex);
|
||||
spin_unlock(chip->mutex);
|
||||
|
||||
return ret;
|
||||
}
|
||||
@ -1161,7 +1379,7 @@ static int cfi_amdstd_write_buffers(struct mtd_info *mtd, loff_t to, size_t len,
|
||||
* Handle devices with one erase region, that only implement
|
||||
* the chip erase command.
|
||||
*/
|
||||
static inline int do_erase_chip(struct map_info *map, struct flchip *chip)
|
||||
static int __xipram do_erase_chip(struct map_info *map, struct flchip *chip)
|
||||
{
|
||||
struct cfi_private *cfi = map->fldrv_priv;
|
||||
unsigned long timeo = jiffies + HZ;
|
||||
@ -1171,17 +1389,20 @@ static inline int do_erase_chip(struct map_info *map, struct flchip *chip)
|
||||
|
||||
adr = cfi->addr_unlock1;
|
||||
|
||||
cfi_spin_lock(chip->mutex);
|
||||
spin_lock(chip->mutex);
|
||||
ret = get_chip(map, chip, adr, FL_WRITING);
|
||||
if (ret) {
|
||||
cfi_spin_unlock(chip->mutex);
|
||||
spin_unlock(chip->mutex);
|
||||
return ret;
|
||||
}
|
||||
|
||||
DEBUG( MTD_DEBUG_LEVEL3, "MTD %s(): ERASE 0x%.8lx\n",
|
||||
__func__, chip->start );
|
||||
|
||||
XIP_INVAL_CACHED_RANGE(map, adr, map->size);
|
||||
ENABLE_VPP(map);
|
||||
xip_disable(map, chip, adr);
|
||||
|
||||
cfi_send_gen_cmd(0xAA, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL);
|
||||
cfi_send_gen_cmd(0x55, cfi->addr_unlock2, chip->start, map, cfi, cfi->device_type, NULL);
|
||||
cfi_send_gen_cmd(0x80, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL);
|
||||
@ -1193,9 +1414,9 @@ static inline int do_erase_chip(struct map_info *map, struct flchip *chip)
|
||||
chip->erase_suspended = 0;
|
||||
chip->in_progress_block_addr = adr;
|
||||
|
||||
cfi_spin_unlock(chip->mutex);
|
||||
msleep(chip->erase_time/2);
|
||||
cfi_spin_lock(chip->mutex);
|
||||
INVALIDATE_CACHE_UDELAY(map, chip,
|
||||
adr, map->size,
|
||||
chip->erase_time*500);
|
||||
|
||||
timeo = jiffies + (HZ*20);
|
||||
|
||||
@ -1204,10 +1425,10 @@ static inline int do_erase_chip(struct map_info *map, struct flchip *chip)
|
||||
/* Someone's suspended the erase. Sleep */
|
||||
set_current_state(TASK_UNINTERRUPTIBLE);
|
||||
add_wait_queue(&chip->wq, &wait);
|
||||
cfi_spin_unlock(chip->mutex);
|
||||
spin_unlock(chip->mutex);
|
||||
schedule();
|
||||
remove_wait_queue(&chip->wq, &wait);
|
||||
cfi_spin_lock(chip->mutex);
|
||||
spin_lock(chip->mutex);
|
||||
continue;
|
||||
}
|
||||
if (chip->erase_suspended) {
|
||||
@ -1227,10 +1448,7 @@ static inline int do_erase_chip(struct map_info *map, struct flchip *chip)
|
||||
}
|
||||
|
||||
/* Latency issues. Drop the lock, wait a while and retry */
|
||||
cfi_spin_unlock(chip->mutex);
|
||||
set_current_state(TASK_UNINTERRUPTIBLE);
|
||||
schedule_timeout(1);
|
||||
cfi_spin_lock(chip->mutex);
|
||||
UDELAY(map, chip, adr, 1000000/HZ);
|
||||
}
|
||||
/* Did we succeed? */
|
||||
if (!chip_good(map, adr, map_word_ff(map))) {
|
||||
@ -1242,14 +1460,15 @@ static inline int do_erase_chip(struct map_info *map, struct flchip *chip)
|
||||
}
|
||||
|
||||
chip->state = FL_READY;
|
||||
xip_enable(map, chip, adr);
|
||||
put_chip(map, chip, adr);
|
||||
cfi_spin_unlock(chip->mutex);
|
||||
spin_unlock(chip->mutex);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
||||
static inline int do_erase_oneblock(struct map_info *map, struct flchip *chip, unsigned long adr, int len, void *thunk)
|
||||
static int __xipram do_erase_oneblock(struct map_info *map, struct flchip *chip, unsigned long adr, int len, void *thunk)
|
||||
{
|
||||
struct cfi_private *cfi = map->fldrv_priv;
|
||||
unsigned long timeo = jiffies + HZ;
|
||||
@ -1258,17 +1477,20 @@ static inline int do_erase_oneblock(struct map_info *map, struct flchip *chip, u
|
||||
|
||||
adr += chip->start;
|
||||
|
||||
cfi_spin_lock(chip->mutex);
|
||||
spin_lock(chip->mutex);
|
||||
ret = get_chip(map, chip, adr, FL_ERASING);
|
||||
if (ret) {
|
||||
cfi_spin_unlock(chip->mutex);
|
||||
spin_unlock(chip->mutex);
|
||||
return ret;
|
||||
}
|
||||
|
||||
DEBUG( MTD_DEBUG_LEVEL3, "MTD %s(): ERASE 0x%.8lx\n",
|
||||
__func__, adr );
|
||||
|
||||
XIP_INVAL_CACHED_RANGE(map, adr, len);
|
||||
ENABLE_VPP(map);
|
||||
xip_disable(map, chip, adr);
|
||||
|
||||
cfi_send_gen_cmd(0xAA, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL);
|
||||
cfi_send_gen_cmd(0x55, cfi->addr_unlock2, chip->start, map, cfi, cfi->device_type, NULL);
|
||||
cfi_send_gen_cmd(0x80, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL);
|
||||
@ -1280,9 +1502,9 @@ static inline int do_erase_oneblock(struct map_info *map, struct flchip *chip, u
|
||||
chip->erase_suspended = 0;
|
||||
chip->in_progress_block_addr = adr;
|
||||
|
||||
cfi_spin_unlock(chip->mutex);
|
||||
msleep(chip->erase_time/2);
|
||||
cfi_spin_lock(chip->mutex);
|
||||
INVALIDATE_CACHE_UDELAY(map, chip,
|
||||
adr, len,
|
||||
chip->erase_time*500);
|
||||
|
||||
timeo = jiffies + (HZ*20);
|
||||
|
||||
@ -1291,10 +1513,10 @@ static inline int do_erase_oneblock(struct map_info *map, struct flchip *chip, u
|
||||
/* Someone's suspended the erase. Sleep */
|
||||
set_current_state(TASK_UNINTERRUPTIBLE);
|
||||
add_wait_queue(&chip->wq, &wait);
|
||||
cfi_spin_unlock(chip->mutex);
|
||||
spin_unlock(chip->mutex);
|
||||
schedule();
|
||||
remove_wait_queue(&chip->wq, &wait);
|
||||
cfi_spin_lock(chip->mutex);
|
||||
spin_lock(chip->mutex);
|
||||
continue;
|
||||
}
|
||||
if (chip->erase_suspended) {
|
||||
@ -1304,20 +1526,20 @@ static inline int do_erase_oneblock(struct map_info *map, struct flchip *chip, u
|
||||
chip->erase_suspended = 0;
|
||||
}
|
||||
|
||||
if (chip_ready(map, adr))
|
||||
if (chip_ready(map, adr)) {
|
||||
xip_enable(map, chip, adr);
|
||||
break;
|
||||
}
|
||||
|
||||
if (time_after(jiffies, timeo)) {
|
||||
xip_enable(map, chip, adr);
|
||||
printk(KERN_WARNING "MTD %s(): software timeout\n",
|
||||
__func__ );
|
||||
break;
|
||||
}
|
||||
|
||||
/* Latency issues. Drop the lock, wait a while and retry */
|
||||
cfi_spin_unlock(chip->mutex);
|
||||
set_current_state(TASK_UNINTERRUPTIBLE);
|
||||
schedule_timeout(1);
|
||||
cfi_spin_lock(chip->mutex);
|
||||
UDELAY(map, chip, adr, 1000000/HZ);
|
||||
}
|
||||
/* Did we succeed? */
|
||||
if (!chip_good(map, adr, map_word_ff(map))) {
|
||||
@ -1330,7 +1552,7 @@ static inline int do_erase_oneblock(struct map_info *map, struct flchip *chip, u
|
||||
|
||||
chip->state = FL_READY;
|
||||
put_chip(map, chip, adr);
|
||||
cfi_spin_unlock(chip->mutex);
|
||||
spin_unlock(chip->mutex);
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -1390,7 +1612,7 @@ static void cfi_amdstd_sync (struct mtd_info *mtd)
|
||||
chip = &cfi->chips[i];
|
||||
|
||||
retry:
|
||||
cfi_spin_lock(chip->mutex);
|
||||
spin_lock(chip->mutex);
|
||||
|
||||
switch(chip->state) {
|
||||
case FL_READY:
|
||||
@ -1404,14 +1626,14 @@ static void cfi_amdstd_sync (struct mtd_info *mtd)
|
||||
* with the chip now anyway.
|
||||
*/
|
||||
case FL_SYNCING:
|
||||
cfi_spin_unlock(chip->mutex);
|
||||
spin_unlock(chip->mutex);
|
||||
break;
|
||||
|
||||
default:
|
||||
/* Not an idle state */
|
||||
add_wait_queue(&chip->wq, &wait);
|
||||
|
||||
cfi_spin_unlock(chip->mutex);
|
||||
spin_unlock(chip->mutex);
|
||||
|
||||
schedule();
|
||||
|
||||
@ -1426,13 +1648,13 @@ static void cfi_amdstd_sync (struct mtd_info *mtd)
|
||||
for (i--; i >=0; i--) {
|
||||
chip = &cfi->chips[i];
|
||||
|
||||
cfi_spin_lock(chip->mutex);
|
||||
spin_lock(chip->mutex);
|
||||
|
||||
if (chip->state == FL_SYNCING) {
|
||||
chip->state = chip->oldstate;
|
||||
wake_up(&chip->wq);
|
||||
}
|
||||
cfi_spin_unlock(chip->mutex);
|
||||
spin_unlock(chip->mutex);
|
||||
}
|
||||
}
|
||||
|
||||
@ -1448,7 +1670,7 @@ static int cfi_amdstd_suspend(struct mtd_info *mtd)
|
||||
for (i=0; !ret && i<cfi->numchips; i++) {
|
||||
chip = &cfi->chips[i];
|
||||
|
||||
cfi_spin_lock(chip->mutex);
|
||||
spin_lock(chip->mutex);
|
||||
|
||||
switch(chip->state) {
|
||||
case FL_READY:
|
||||
@ -1468,7 +1690,7 @@ static int cfi_amdstd_suspend(struct mtd_info *mtd)
|
||||
ret = -EAGAIN;
|
||||
break;
|
||||
}
|
||||
cfi_spin_unlock(chip->mutex);
|
||||
spin_unlock(chip->mutex);
|
||||
}
|
||||
|
||||
/* Unlock the chips again */
|
||||
@ -1477,13 +1699,13 @@ static int cfi_amdstd_suspend(struct mtd_info *mtd)
|
||||
for (i--; i >=0; i--) {
|
||||
chip = &cfi->chips[i];
|
||||
|
||||
cfi_spin_lock(chip->mutex);
|
||||
spin_lock(chip->mutex);
|
||||
|
||||
if (chip->state == FL_PM_SUSPENDED) {
|
||||
chip->state = chip->oldstate;
|
||||
wake_up(&chip->wq);
|
||||
}
|
||||
cfi_spin_unlock(chip->mutex);
|
||||
spin_unlock(chip->mutex);
|
||||
}
|
||||
}
|
||||
|
||||
@ -1502,7 +1724,7 @@ static void cfi_amdstd_resume(struct mtd_info *mtd)
|
||||
|
||||
chip = &cfi->chips[i];
|
||||
|
||||
cfi_spin_lock(chip->mutex);
|
||||
spin_lock(chip->mutex);
|
||||
|
||||
if (chip->state == FL_PM_SUSPENDED) {
|
||||
chip->state = FL_READY;
|
||||
@ -1512,7 +1734,7 @@ static void cfi_amdstd_resume(struct mtd_info *mtd)
|
||||
else
|
||||
printk(KERN_ERR "Argh. Chip not in PM_SUSPENDED state upon resume()\n");
|
||||
|
||||
cfi_spin_unlock(chip->mutex);
|
||||
spin_unlock(chip->mutex);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@ -58,10 +58,10 @@ static int fwh_xxlock_oneblock(struct map_info *map, struct flchip *chip,
|
||||
* to flash memory - that means that we don't have to check status
|
||||
* and timeout.
|
||||
*/
|
||||
cfi_spin_lock(chip->mutex);
|
||||
spin_lock(chip->mutex);
|
||||
ret = get_chip(map, chip, adr, FL_LOCKING);
|
||||
if (ret) {
|
||||
cfi_spin_unlock(chip->mutex);
|
||||
spin_unlock(chip->mutex);
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -71,7 +71,7 @@ static int fwh_xxlock_oneblock(struct map_info *map, struct flchip *chip,
|
||||
/* Done and happy. */
|
||||
chip->state = FL_READY;
|
||||
put_chip(map, chip, adr);
|
||||
cfi_spin_unlock(chip->mutex);
|
||||
spin_unlock(chip->mutex);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* $Id: map_funcs.c,v 1.9 2004/07/13 22:33:15 dwmw2 Exp $
|
||||
* $Id: map_funcs.c,v 1.10 2005/06/06 23:04:36 tpoynor Exp $
|
||||
*
|
||||
* Out-of-line map I/O functions for simple maps when CONFIG_COMPLEX_MAPPINGS
|
||||
* is enabled.
|
||||
@ -9,23 +9,24 @@
|
||||
#include <linux/module.h>
|
||||
|
||||
#include <linux/mtd/map.h>
|
||||
#include <linux/mtd/xip.h>
|
||||
|
||||
static map_word simple_map_read(struct map_info *map, unsigned long ofs)
|
||||
static map_word __xipram simple_map_read(struct map_info *map, unsigned long ofs)
|
||||
{
|
||||
return inline_map_read(map, ofs);
|
||||
}
|
||||
|
||||
static void simple_map_write(struct map_info *map, const map_word datum, unsigned long ofs)
|
||||
static void __xipram simple_map_write(struct map_info *map, const map_word datum, unsigned long ofs)
|
||||
{
|
||||
inline_map_write(map, datum, ofs);
|
||||
}
|
||||
|
||||
static void simple_map_copy_from(struct map_info *map, void *to, unsigned long from, ssize_t len)
|
||||
static void __xipram simple_map_copy_from(struct map_info *map, void *to, unsigned long from, ssize_t len)
|
||||
{
|
||||
inline_map_copy_from(map, to, from, len);
|
||||
}
|
||||
|
||||
static void simple_map_copy_to(struct map_info *map, unsigned long to, const void *from, ssize_t len)
|
||||
static void __xipram simple_map_copy_to(struct map_info *map, unsigned long to, const void *from, ssize_t len)
|
||||
{
|
||||
inline_map_copy_to(map, to, from, len);
|
||||
}
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
|
||||
/* Common Flash Interface structures
|
||||
* See http://support.intel.com/design/flash/technote/index.htm
|
||||
* $Id: cfi.h,v 1.53 2005/03/15 19:03:13 gleixner Exp $
|
||||
* $Id: cfi.h,v 1.54 2005/06/06 23:04:36 tpoynor Exp $
|
||||
*/
|
||||
|
||||
#ifndef __MTD_CFI_H__
|
||||
@ -428,16 +428,6 @@ static inline void cfi_udelay(int us)
|
||||
}
|
||||
}
|
||||
|
||||
static inline void cfi_spin_lock(spinlock_t *mutex)
|
||||
{
|
||||
spin_lock_bh(mutex);
|
||||
}
|
||||
|
||||
static inline void cfi_spin_unlock(spinlock_t *mutex)
|
||||
{
|
||||
spin_unlock_bh(mutex);
|
||||
}
|
||||
|
||||
struct cfi_extquery *cfi_read_pri(struct map_info *map, uint16_t adr, uint16_t size,
|
||||
const char* name);
|
||||
struct cfi_fixup {
|
||||
|
||||
Loading…
Reference in New Issue
Block a user