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tty: serial: men_z135_uart: Fix driver for changes in hardware
16z135 IP Core has changed so the driver needs to be updated to respect
these changes. The following changes have been made:
* Don't invert the 16z135 modem status register when reading.
* Add module parameter to configure the (baud rate dependent) RX timeout.
Character timeout in seconds = (timeout_reg * baud_reg * 4)/freq_reg.
* Enable the handling of UART core's automatic flow control feature.
When AFE is active disable generation of modem status IRQs.
* Rework the handling of IRQs to be conform with newer FPGA versions and
take precautions not to miss an interrupt because of the destructive read
of the IIR register.
* Correct men_z135_handle_modem_status(), MSR is stat_reg[15:8] not
stat_reg[7:0]
* Correct calling of uart_handle_{dcd,cts}_change()
* Reset CLOCAL when CRTSCTS is set
Signed-off-by: Johannes Thumshirn <johannes.thumshirn@men.de>
Reviewed-by: Peter Hurley <peter@hurleysoftware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Johannes Thumshirn
Greg Kroah-Hartman
parent
b164c9721e
commit
01ba8d6af4
@ -23,7 +23,6 @@
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#define MEN_Z135_MAX_PORTS 12
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#define MEN_Z135_BASECLK 29491200
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#define MEN_Z135_FIFO_SIZE 1024
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#define MEN_Z135_NUM_MSI_VECTORS 2
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#define MEN_Z135_FIFO_WATERMARK 1020
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#define MEN_Z135_STAT_REG 0x0
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@ -34,12 +33,11 @@
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#define MEN_Z135_CONF_REG 0x808
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#define MEN_Z135_UART_FREQ 0x80c
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#define MEN_Z135_BAUD_REG 0x810
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#define MENZ135_TIMEOUT 0x814
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#define MEN_Z135_TIMEOUT 0x814
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#define MEN_Z135_MEM_SIZE 0x818
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#define IS_IRQ(x) ((x) & 1)
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#define IRQ_ID(x) (((x) >> 1) & 7)
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#define IRQ_ID(x) ((x) & 0x1f)
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#define MEN_Z135_IER_RXCIEN BIT(0) /* RX Space IRQ */
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#define MEN_Z135_IER_TXCIEN BIT(1) /* TX Space IRQ */
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@ -94,11 +92,11 @@
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#define MEN_Z135_LSR_TEXP BIT(6)
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#define MEN_Z135_LSR_RXFIFOERR BIT(7)
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#define MEN_Z135_IRQ_ID_MST 0
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#define MEN_Z135_IRQ_ID_TSA 1
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#define MEN_Z135_IRQ_ID_RDA 2
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#define MEN_Z135_IRQ_ID_RLS 3
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#define MEN_Z135_IRQ_ID_CTI 6
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#define MEN_Z135_IRQ_ID_RLS BIT(0)
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#define MEN_Z135_IRQ_ID_RDA BIT(1)
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#define MEN_Z135_IRQ_ID_CTI BIT(2)
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#define MEN_Z135_IRQ_ID_TSA BIT(3)
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#define MEN_Z135_IRQ_ID_MST BIT(4)
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#define LCR(x) (((x) >> MEN_Z135_LCR_SHIFT) & 0xff)
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@ -118,12 +116,18 @@ static int align;
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module_param(align, int, S_IRUGO);
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MODULE_PARM_DESC(align, "Keep hardware FIFO write pointer aligned, default 0");
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static uint rx_timeout;
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module_param(rx_timeout, uint, S_IRUGO);
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MODULE_PARM_DESC(rx_timeout, "RX timeout. "
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"Timeout in seconds = (timeout_reg * baud_reg * 4) / freq_reg");
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struct men_z135_port {
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struct uart_port port;
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struct mcb_device *mdev;
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unsigned char *rxbuf;
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u32 stat_reg;
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spinlock_t lock;
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bool automode;
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};
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#define to_men_z135(port) container_of((port), struct men_z135_port, port)
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@ -180,12 +184,16 @@ static inline void men_z135_reg_clr(struct men_z135_port *uart,
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*/
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static void men_z135_handle_modem_status(struct men_z135_port *uart)
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{
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if (uart->stat_reg & MEN_Z135_MSR_DDCD)
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u8 msr;
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msr = (uart->stat_reg >> 8) & 0xff;
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if (msr & MEN_Z135_MSR_DDCD)
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uart_handle_dcd_change(&uart->port,
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uart->stat_reg & ~MEN_Z135_MSR_DCD);
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if (uart->stat_reg & MEN_Z135_MSR_DCTS)
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msr & MEN_Z135_MSR_DCD);
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if (msr & MEN_Z135_MSR_DCTS)
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uart_handle_cts_change(&uart->port,
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uart->stat_reg & ~MEN_Z135_MSR_CTS);
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msr & MEN_Z135_MSR_CTS);
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}
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static void men_z135_handle_lsr(struct men_z135_port *uart)
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@ -322,7 +330,8 @@ static void men_z135_handle_tx(struct men_z135_port *uart)
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txfree = MEN_Z135_FIFO_WATERMARK - txc;
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if (txfree <= 0) {
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pr_err("Not enough room in TX FIFO have %d, need %d\n",
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dev_err(&uart->mdev->dev,
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"Not enough room in TX FIFO have %d, need %d\n",
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txfree, qlen);
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goto irq_en;
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}
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@ -373,43 +382,54 @@ out:
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* @irq: The IRQ number
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* @data: Pointer to UART port
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*
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* Check IIR register to see which tasklet to start.
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* Check IIR register to find the cause of the interrupt and handle it.
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* It is possible that multiple interrupts reason bits are set and reading
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* the IIR is a destructive read, so we always need to check for all possible
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* interrupts and handle them.
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*/
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static irqreturn_t men_z135_intr(int irq, void *data)
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{
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struct men_z135_port *uart = (struct men_z135_port *)data;
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struct uart_port *port = &uart->port;
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bool handled = false;
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unsigned long flags;
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int irq_id;
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uart->stat_reg = ioread32(port->membase + MEN_Z135_STAT_REG);
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/* IRQ pending is low active */
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if (IS_IRQ(uart->stat_reg))
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return IRQ_NONE;
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irq_id = IRQ_ID(uart->stat_reg);
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switch (irq_id) {
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case MEN_Z135_IRQ_ID_MST:
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men_z135_handle_modem_status(uart);
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break;
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case MEN_Z135_IRQ_ID_TSA:
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men_z135_handle_tx(uart);
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break;
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case MEN_Z135_IRQ_ID_CTI:
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dev_dbg(&uart->mdev->dev, "Character Timeout Indication\n");
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/* Fallthrough */
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case MEN_Z135_IRQ_ID_RDA:
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/* Reading data clears RX IRQ */
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men_z135_handle_rx(uart);
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break;
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case MEN_Z135_IRQ_ID_RLS:
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if (!irq_id)
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goto out;
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spin_lock_irqsave(&port->lock, flags);
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/* It's save to write to IIR[7:6] RXC[9:8] */
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iowrite8(irq_id, port->membase + MEN_Z135_STAT_REG);
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if (irq_id & MEN_Z135_IRQ_ID_RLS) {
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men_z135_handle_lsr(uart);
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break;
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default:
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dev_warn(&uart->mdev->dev, "Unknown IRQ id %d\n", irq_id);
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return IRQ_NONE;
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handled = true;
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}
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return IRQ_HANDLED;
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if (irq_id & (MEN_Z135_IRQ_ID_RDA | MEN_Z135_IRQ_ID_CTI)) {
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if (irq_id & MEN_Z135_IRQ_ID_CTI)
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dev_dbg(&uart->mdev->dev, "Character Timeout Indication\n");
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men_z135_handle_rx(uart);
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handled = true;
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}
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if (irq_id & MEN_Z135_IRQ_ID_TSA) {
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men_z135_handle_tx(uart);
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handled = true;
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}
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if (irq_id & MEN_Z135_IRQ_ID_MST) {
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men_z135_handle_modem_status(uart);
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handled = true;
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}
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spin_unlock_irqrestore(&port->lock, flags);
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out:
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return IRQ_RETVAL(handled);
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}
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/**
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@ -464,21 +484,37 @@ static unsigned int men_z135_tx_empty(struct uart_port *port)
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*/
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static void men_z135_set_mctrl(struct uart_port *port, unsigned int mctrl)
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{
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struct men_z135_port *uart = to_men_z135(port);
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u32 conf_reg = 0;
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u32 old;
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u32 conf_reg;
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conf_reg = old = ioread32(port->membase + MEN_Z135_CONF_REG);
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if (mctrl & TIOCM_RTS)
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conf_reg |= MEN_Z135_MCR_RTS;
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else
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conf_reg &= ~MEN_Z135_MCR_RTS;
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if (mctrl & TIOCM_DTR)
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conf_reg |= MEN_Z135_MCR_DTR;
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else
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conf_reg &= ~MEN_Z135_MCR_DTR;
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if (mctrl & TIOCM_OUT1)
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conf_reg |= MEN_Z135_MCR_OUT1;
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else
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conf_reg &= ~MEN_Z135_MCR_OUT1;
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if (mctrl & TIOCM_OUT2)
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conf_reg |= MEN_Z135_MCR_OUT2;
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else
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conf_reg &= ~MEN_Z135_MCR_OUT2;
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if (mctrl & TIOCM_LOOP)
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conf_reg |= MEN_Z135_MCR_LOOP;
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else
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conf_reg &= ~MEN_Z135_MCR_LOOP;
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men_z135_reg_set(uart, MEN_Z135_CONF_REG, conf_reg);
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if (conf_reg != old)
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iowrite32(conf_reg, port->membase + MEN_Z135_CONF_REG);
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}
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/**
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@ -490,12 +526,9 @@ static void men_z135_set_mctrl(struct uart_port *port, unsigned int mctrl)
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static unsigned int men_z135_get_mctrl(struct uart_port *port)
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{
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unsigned int mctrl = 0;
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u32 stat_reg;
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u8 msr;
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stat_reg = ioread32(port->membase + MEN_Z135_STAT_REG);
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msr = ~((stat_reg >> 8) & 0xff);
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msr = ioread8(port->membase + MEN_Z135_STAT_REG + 1);
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if (msr & MEN_Z135_MSR_CTS)
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mctrl |= TIOCM_CTS;
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@ -524,6 +557,19 @@ static void men_z135_stop_tx(struct uart_port *port)
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men_z135_reg_clr(uart, MEN_Z135_CONF_REG, MEN_Z135_IER_TXCIEN);
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}
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/*
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* men_z135_disable_ms() - Disable Modem Status
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* port: The UART port
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*
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* Enable Modem Status IRQ.
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*/
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static void men_z135_disable_ms(struct uart_port *port)
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{
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struct men_z135_port *uart = to_men_z135(port);
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men_z135_reg_clr(uart, MEN_Z135_CONF_REG, MEN_Z135_IER_MSIEN);
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}
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/**
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* men_z135_start_tx() - Start transmitting characters
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* @port: The UART port
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@ -535,6 +581,9 @@ static void men_z135_start_tx(struct uart_port *port)
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{
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struct men_z135_port *uart = to_men_z135(port);
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if (uart->automode)
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men_z135_disable_ms(port);
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men_z135_handle_tx(uart);
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}
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@ -584,6 +633,9 @@ static int men_z135_startup(struct uart_port *port)
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iowrite32(conf_reg, port->membase + MEN_Z135_CONF_REG);
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if (rx_timeout)
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iowrite32(rx_timeout, port->membase + MEN_Z135_TIMEOUT);
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return 0;
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}
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@ -603,6 +655,7 @@ static void men_z135_set_termios(struct uart_port *port,
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struct ktermios *termios,
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struct ktermios *old)
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{
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struct men_z135_port *uart = to_men_z135(port);
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unsigned int baud;
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u32 conf_reg;
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u32 bd_reg;
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@ -643,6 +696,16 @@ static void men_z135_set_termios(struct uart_port *port,
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} else
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lcr |= MEN_Z135_PAR_DIS << MEN_Z135_PEN_SHIFT;
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conf_reg |= MEN_Z135_IER_MSIEN;
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if (termios->c_cflag & CRTSCTS) {
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conf_reg |= MEN_Z135_MCR_RCFC;
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uart->automode = true;
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termios->c_cflag &= ~CLOCAL;
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} else {
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conf_reg &= ~MEN_Z135_MCR_RCFC;
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uart->automode = false;
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}
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termios->c_cflag &= ~CMSPAR; /* Mark/Space parity is not supported */
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conf_reg |= lcr << MEN_Z135_LCR_SHIFT;
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