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ARM: dts: omap3-igep: OneNAND support
Add OneNAND node for IGEP and leave it disabled by default. It is up to bootloader to enable proper node. Timing just works, but values are copied over from N900 as I was unable to find chip datasheet. Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
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@ -37,6 +37,13 @@
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};
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&omap3_pmx_core {
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gpmc_pins: pinmux_gpmc_pins {
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pinctrl-single,pins = <
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/* OneNAND seems to require PIN_INPUT on clock. */
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OMAP3_CORE1_IOPAD(0x20be, PIN_INPUT | MUX_MODE0) /* gpmc_clk.gpmc_clk */
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>;
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};
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uart1_pins: pinmux_uart1_pins {
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | MUX_MODE0) /* uart1_rx.uart1_rx */
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@ -98,6 +105,9 @@
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};
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&gpmc {
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pinctrl-names = "default";
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pinctrl-0 = <&gpmc_pins>;
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nand@0,0 {
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compatible = "ti,omap2-nand";
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reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
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@ -126,6 +136,48 @@
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#address-cells = <1>;
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#size-cells = <1>;
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status = "okay";
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};
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onenand@0,0 {
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compatible = "ti,omap2-onenand";
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reg = <0 0 0x20000>; /* CS0, offset 0, IO size 128K */
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gpmc,sync-read;
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gpmc,sync-write;
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gpmc,burst-length = <16>;
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gpmc,burst-read;
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gpmc,burst-wrap;
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gpmc,burst-write;
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gpmc,device-width = <2>; /* GPMC_DEVWIDTH_16BIT */
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gpmc,mux-add-data = <2>; /* GPMC_MUX_AD */
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gpmc,cs-on-ns = <0>;
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gpmc,cs-rd-off-ns = <87>;
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gpmc,cs-wr-off-ns = <87>;
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gpmc,adv-on-ns = <0>;
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gpmc,adv-rd-off-ns = <10>;
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gpmc,adv-wr-off-ns = <10>;
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gpmc,oe-on-ns = <15>;
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gpmc,oe-off-ns = <87>;
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gpmc,we-on-ns = <0>;
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gpmc,we-off-ns = <87>;
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gpmc,rd-cycle-ns = <112>;
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gpmc,wr-cycle-ns = <112>;
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gpmc,access-ns = <81>;
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gpmc,page-burst-access-ns = <15>;
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gpmc,bus-turnaround-ns = <0>;
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gpmc,cycle2cycle-delay-ns = <0>;
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gpmc,wait-monitoring-ns = <0>;
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gpmc,clk-activation-ns = <5>;
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gpmc,wr-data-mux-bus-ns = <30>;
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gpmc,wr-access-ns = <81>;
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gpmc,sync-clk-ps = <15000>;
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#address-cells = <1>;
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#size-cells = <1>;
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status = "disabled";
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};
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};
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