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perf auxtrace: Add itrace option '-M' for memory events

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This patch is to add itrace option '-M' to synthesize memory event.

Signed-off-by: Leo Yan <leo.yan@linaro.org>
Acked-by: Jiri Olsa <jolsa@redhat.com>
Link: https://lore.kernel.org/r/20201106094853.21082-7-leo.yan@linaro.org
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
This commit is contained in:
Leo Yan 2020-11-06 17:48:50 +08:00 committed by Arnaldo Carvalho de Melo
parent 436cce0071
commit 014a771c78
3 changed files with 7 additions and 0 deletions
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1
tools/perf/Documentation/itrace.txt
View File

@ -11,6 +11,7 @@
d create a debug log
f synthesize first level cache events
m synthesize last level cache events
M synthesize memory events
t synthesize TLB events
a synthesize remote access events
g synthesize a call chain (use with i or x)

4
tools/perf/util/auxtrace.c
View File

@ -1333,6 +1333,7 @@ void itrace_synth_opts__set_default(struct itrace_synth_opts *synth_opts,
synth_opts->flc = true;
synth_opts->llc = true;
synth_opts->tlb = true;
synth_opts->mem = true;
synth_opts->remote_access = true;
if (no_sample) {
@ -1554,6 +1555,9 @@ int itrace_parse_synth_opts(const struct option *opt, const char *str,
case 'a':
synth_opts->remote_access = true;
break;
case 'M':
synth_opts->mem = true;
break;
case 'q':
synth_opts->quick += 1;
break;

2
tools/perf/util/auxtrace.h
View File

@ -88,6 +88,7 @@ enum itrace_period_type {
* @llc: whether to synthesize last level cache events
* @tlb: whether to synthesize TLB events
* @remote_access: whether to synthesize remote access events
* @mem: whether to synthesize memory events
* @callchain_sz: maximum callchain size
* @last_branch_sz: branch context size
* @period: 'instructions' events period
@ -126,6 +127,7 @@ struct itrace_synth_opts {
bool llc;
bool tlb;
bool remote_access;
bool mem;
unsigned int callchain_sz;
unsigned int last_branch_sz;
unsigned long long period;