From 592693a1f881630f744b69b8bc315caa99272d64 Mon Sep 17 00:00:00 2001 From: Joel Stanley Date: Wed, 16 Sep 2020 22:27:31 +0930 Subject: [PATCH 01/13] soc: aspeed: Improve kconfig MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Reword the kconfig text to be consistent and reflect that most drivers are available for all supported ASPEED chips (2400, 2500 and 2600). Rearrange the symbols the SoC drivers depend on so the menu doesn't appear unless you are building for ASPEED for compile testing. The SYSCON_MFD and REGMAP options are usually selected by drivers that need them, so do this. Reviewed-by: Cédric Le Goater Reviewed-by: Andrew Jeffery Link: https://lore.kernel.org/r/20200916125731.784527-1-joel@jms.id.au Signed-off-by: Joel Stanley --- drivers/soc/Makefile | 2 +- drivers/soc/aspeed/Kconfig | 36 ++++++++++++++++++++---------------- 2 files changed, 21 insertions(+), 17 deletions(-) diff --git a/drivers/soc/Makefile b/drivers/soc/Makefile index 36452bed86ef..8fa43a2d17e7 100644 --- a/drivers/soc/Makefile +++ b/drivers/soc/Makefile @@ -4,7 +4,7 @@ # obj-$(CONFIG_ARCH_ACTIONS) += actions/ -obj-$(CONFIG_SOC_ASPEED) += aspeed/ +obj-y += aspeed/ obj-$(CONFIG_ARCH_AT91) += atmel/ obj-y += bcm/ obj-$(CONFIG_ARCH_DOVE) += dove/ diff --git a/drivers/soc/aspeed/Kconfig b/drivers/soc/aspeed/Kconfig index c95fa30f1a76..9ce252445605 100644 --- a/drivers/soc/aspeed/Kconfig +++ b/drivers/soc/aspeed/Kconfig @@ -1,32 +1,36 @@ # SPDX-License-Identifier: GPL-2.0-only -menu "Aspeed SoC drivers" -config SOC_ASPEED - def_bool y - depends on ARCH_ASPEED || COMPILE_TEST +if ARCH_ASPEED || COMPILE_TEST + +menu "ASPEED SoC drivers" config ASPEED_LPC_CTRL - depends on SOC_ASPEED && REGMAP && MFD_SYSCON - tristate "Aspeed ast2400/2500 HOST LPC to BMC bridge control" + tristate "ASPEED LPC firmware cycle control" + select REGMAP + select MFD_SYSCON help - Control Aspeed ast2400/2500 HOST LPC to BMC mappings through - ioctl()s, the driver also provides a read/write interface to a BMC ram - region where the host LPC read/write region can be buffered. + Control LPC firmware cycle mappings through ioctl()s. The driver + also provides a read/write interface to a BMC ram region where the + host LPC read/write region can be buffered. config ASPEED_LPC_SNOOP - tristate "Aspeed ast2500 HOST LPC snoop support" - depends on SOC_ASPEED && REGMAP && MFD_SYSCON + tristate "ASPEED LPC snoop support" + select REGMAP + select MFD_SYSCON help Provides a driver to control the LPC snoop interface which allows the BMC to listen on and save the data written by the host to an arbitrary LPC I/O port. config ASPEED_P2A_CTRL - depends on SOC_ASPEED && REGMAP && MFD_SYSCON - tristate "Aspeed ast2400/2500 HOST P2A VGA MMIO to BMC bridge control" + tristate "ASPEED P2A (VGA MMIO to BMC) bridge control" + select REGMAP + select MFD_SYSCON help - Control Aspeed ast2400/2500 HOST P2A VGA MMIO to BMC mappings through - ioctl()s, the driver also provides an interface for userspace mappings to - a pre-defined region. + Control ASPEED P2A VGA MMIO to BMC mappings through ioctl()s. The + driver also provides an interface for userspace mappings to a + pre-defined region. endmenu + +endif From 7c1f6281549bda39ab32f65eb93bfcf2aa75fe94 Mon Sep 17 00:00:00 2001 From: Joel Stanley Date: Mon, 21 Sep 2020 18:46:42 +0930 Subject: [PATCH 02/13] dt-bindings: aspeed: Add silicon id node to SCU Different ASPEED families have various unique hardware silicon identifiers within the SoC. Reviewed-by: Andrew Jeffery Link: https://lore.kernel.org/r/20200921091644.133107-2-joel@jms.id.au Signed-off-by: Joel Stanley --- .../devicetree/bindings/mfd/aspeed-scu.txt | 26 +++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/Documentation/devicetree/bindings/mfd/aspeed-scu.txt b/Documentation/devicetree/bindings/mfd/aspeed-scu.txt index 4d92c0bb6687..857ee33f7329 100644 --- a/Documentation/devicetree/bindings/mfd/aspeed-scu.txt +++ b/Documentation/devicetree/bindings/mfd/aspeed-scu.txt @@ -20,3 +20,29 @@ syscon: syscon@1e6e2000 { #clock-cells = <1>; #reset-cells = <1>; }; + +Silicon ID +----------------- + +Families have unique hardware silicon identifiers within the SoC. + +Required properties: + + - compatible: "aspeed,silicon-id" or: + "aspeed,ast2400-silicon-id" or + "aspeed,ast2500-silicon-id" or + "aspeed,ast2600-silicon-id" + + - reg: offset and length of the silicon id information + optionally, a second offset and length describes the unique chip id + + The reg should be the unique silicon id register, and + not backwards compatible one in eg. the 2600. + +Example: + + +silicon-id@7c { + compatible = "aspeed,ast2500-silicon-id", "aspeed,silicon-id"; + reg = <0x7c 0x4 0x150 0x8>; +}; From e0218dca5787c851b403fcbc33cdfec795446fca Mon Sep 17 00:00:00 2001 From: Joel Stanley Date: Mon, 21 Sep 2020 18:46:43 +0930 Subject: [PATCH 03/13] soc: aspeed: Add soc info driver This adds a SOC_BUS info driver for the ASPEED platform. The full ID table is preserved in this commit message in case someone finds a need to change the implemntation in the future. { "AST1100-A0", 0x00000200 }, { "AST1100-A1", 0x00000201 }, { "AST1100-A2", 0x00000202 }, { "AST1100-A3", 0x00000202 }, { "AST2050-A0", 0x00000200 }, { "AST2050-A1", 0x00000201 }, { "AST2050-A2", 0x00000202 }, { "AST2050-A3", 0x00000202 }, { "AST2100-A0", 0x00000300 }, { "AST2100-A1", 0x00000301 }, { "AST2100-A2", 0x00000302 }, { "AST2100-A3", 0x00000302 }, { "AST2150-A0", 0x00000202 }, { "AST2150-A1", 0x00000202 }, { "AST2200-A0", 0x00000102 }, { "AST2200-A1", 0x00000102 }, { "AST2300-A0", 0x01000003 }, { "AST2300-A1", 0x01010303 }, { "AST1300-A1", 0x01010003 }, { "AST1050-A1", 0x01010203 }, { "AST2400-A0", 0x02000303 }, { "AST2400-A1", 0x02010303 }, { "AST1400-A1", 0x02010103 }, { "AST1250-A1", 0x02010303 }, { "AST2500-A0", 0x04000303 }, { "AST2510-A0", 0x04000103 }, { "AST2520-A0", 0x04000203 }, { "AST2530-A0", 0x04000403 }, { "AST2500-A1", 0x04010303 }, { "AST2510-A1", 0x04010103 }, { "AST2520-A1", 0x04010203 }, { "AST2530-A1", 0x04010403 }, { "AST2500-A2", 0x04030303 }, { "AST2510-A2", 0x04030103 }, { "AST2520-A2", 0x04030203 }, { "AST2530-A2", 0x04030403 }, { "AST2600-A0", 0x05000303 }, { "AST2600-A1", 0x05010303 }, { "AST2600-A2", 0x05020303 }, { "AST2620-A1", 0x05010203 }, { "AST2620-A2", 0x05020203 }, Reviewed-by: Andrew Jeffery Link: https://lore.kernel.org/r/20200921091644.133107-3-joel@jms.id.au Signed-off-by: Joel Stanley --- drivers/soc/aspeed/Kconfig | 7 ++ drivers/soc/aspeed/Makefile | 1 + drivers/soc/aspeed/aspeed-socinfo.c | 133 ++++++++++++++++++++++++++++ 3 files changed, 141 insertions(+) create mode 100644 drivers/soc/aspeed/aspeed-socinfo.c diff --git a/drivers/soc/aspeed/Kconfig b/drivers/soc/aspeed/Kconfig index 9ce252445605..7ece0675b1fa 100644 --- a/drivers/soc/aspeed/Kconfig +++ b/drivers/soc/aspeed/Kconfig @@ -31,6 +31,13 @@ config ASPEED_P2A_CTRL driver also provides an interface for userspace mappings to a pre-defined region. +config ASPEED_SOCINFO + bool "ASPEED SoC Information driver" + default ARCH_ASPEED + select SOC_BUS + help + Say yes to support decoding of ASPEED BMC information. + endmenu endif diff --git a/drivers/soc/aspeed/Makefile b/drivers/soc/aspeed/Makefile index b64be47f2b1f..fcab7192e1a4 100644 --- a/drivers/soc/aspeed/Makefile +++ b/drivers/soc/aspeed/Makefile @@ -2,3 +2,4 @@ obj-$(CONFIG_ASPEED_LPC_CTRL) += aspeed-lpc-ctrl.o obj-$(CONFIG_ASPEED_LPC_SNOOP) += aspeed-lpc-snoop.o obj-$(CONFIG_ASPEED_P2A_CTRL) += aspeed-p2a-ctrl.o +obj-$(CONFIG_ASPEED_SOCINFO) += aspeed-socinfo.o diff --git a/drivers/soc/aspeed/aspeed-socinfo.c b/drivers/soc/aspeed/aspeed-socinfo.c new file mode 100644 index 000000000000..26db42ef6aae --- /dev/null +++ b/drivers/soc/aspeed/aspeed-socinfo.c @@ -0,0 +1,133 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* Copyright 2019 IBM Corp. */ + +#include +#include +#include +#include +#include +#include +#include + +static struct { + const char *name; + const u32 id; +} const rev_table[] = { + /* AST2400 */ + { "AST2400", 0x02000303 }, + { "AST1400", 0x02010103 }, + { "AST1250", 0x02010303 }, + /* AST2500 */ + { "AST2500", 0x04000303 }, + { "AST2510", 0x04000103 }, + { "AST2520", 0x04000203 }, + { "AST2530", 0x04000403 }, + /* AST2600 */ + { "AST2600", 0x05000303 }, + { "AST2620", 0x05010203 }, +}; + +static const char *siliconid_to_name(u32 siliconid) +{ + unsigned int id = siliconid & 0xff00ffff; + unsigned int i; + + for (i = 0 ; i < ARRAY_SIZE(rev_table) ; ++i) { + if (rev_table[i].id == id) + return rev_table[i].name; + } + + return "Unknown"; +} + +static const char *siliconid_to_rev(u32 siliconid) +{ + unsigned int rev = (siliconid >> 16) & 0xff; + + switch (rev) { + case 0: + return "A0"; + case 1: + return "A1"; + case 3: + return "A2"; + }; + + return "??"; +} + +static int __init aspeed_socinfo_init(void) +{ + struct soc_device_attribute *attrs; + struct soc_device *soc_dev; + struct device_node *np; + void __iomem *reg; + bool has_chipid = false; + u32 siliconid; + u32 chipid[2]; + const char *machine = NULL; + + np = of_find_compatible_node(NULL, NULL, "aspeed,silicon-id"); + if (!of_device_is_available(np)) { + of_node_put(np); + return -ENODEV; + } + + reg = of_iomap(np, 0); + if (!reg) + return -ENODEV; + siliconid = readl(reg); + iounmap(reg); + + /* This is optional, the ast2400 does not have it */ + reg = of_iomap(np, 1); + if (reg) { + has_chipid = true; + chipid[0] = readl(reg); + chipid[1] = readl(reg + 4); + iounmap(reg); + } + of_node_put(np); + + attrs = kzalloc(sizeof(*attrs), GFP_KERNEL); + if (!attrs) + return -ENODEV; + + /* + * Machine: Romulus BMC + * Family: AST2500 + * Revision: A1 + * SoC ID: raw silicon revision id + * Serial Number: 64-bit chipid + */ + + np = of_find_node_by_path("/"); + of_property_read_string(np, "model", &machine); + if (machine) + attrs->machine = kstrdup(machine, GFP_KERNEL); + of_node_put(np); + + attrs->family = siliconid_to_name(siliconid); + attrs->revision = siliconid_to_rev(siliconid); + attrs->soc_id = kasprintf(GFP_KERNEL, "%08x", siliconid); + + if (has_chipid) + attrs->serial_number = kasprintf(GFP_KERNEL, "%08x%08x", + chipid[1], chipid[0]); + + soc_dev = soc_device_register(attrs); + if (IS_ERR(soc_dev)) { + kfree(attrs->soc_id); + kfree(attrs->serial_number); + kfree(attrs); + return PTR_ERR(soc_dev); + } + + pr_info("ASPEED %s rev %s (%s)\n", + attrs->family, + attrs->revision, + attrs->soc_id); + + return 0; +} +early_initcall(aspeed_socinfo_init); From fe100b382c1c052b63c14091fd8bb3fe932453ae Mon Sep 17 00:00:00 2001 From: Joel Stanley Date: Mon, 21 Sep 2020 18:46:44 +0930 Subject: [PATCH 04/13] ARM: dts: aspeed: Add silicon id node This register describes the silicon id and chip unique id. It varies between CPU revisions, but is always part of the SCU. Reviewed-by: Andrew Jeffery Link: https://lore.kernel.org/r/20200921091644.133107-4-joel@jms.id.au Signed-off-by: Joel Stanley --- arch/arm/boot/dts/aspeed-g4.dtsi | 5 +++++ arch/arm/boot/dts/aspeed-g5.dtsi | 5 +++++ arch/arm/boot/dts/aspeed-g6.dtsi | 5 +++++ 3 files changed, 15 insertions(+) diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi index 82f0213e3a3c..b3dafbc8caca 100644 --- a/arch/arm/boot/dts/aspeed-g4.dtsi +++ b/arch/arm/boot/dts/aspeed-g4.dtsi @@ -192,6 +192,11 @@ status = "disabled"; }; + silicon-id@7c { + compatible = "aspeed,ast2400-silicon-id", "aspeed,silicon-id"; + reg = <0x7c 0x4>; + }; + pinctrl: pinctrl@80 { reg = <0x80 0x18>, <0xa0 0x10>; compatible = "aspeed,ast2400-pinctrl"; diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi index 9c91afb2b404..c6862182313a 100644 --- a/arch/arm/boot/dts/aspeed-g5.dtsi +++ b/arch/arm/boot/dts/aspeed-g5.dtsi @@ -239,6 +239,11 @@ status = "disabled"; }; + silicon-id@7c { + compatible = "aspeed,ast2500-silicon-id", "aspeed,silicon-id"; + reg = <0x7c 0x4 0x150 0x8>; + }; + pinctrl: pinctrl@80 { compatible = "aspeed,ast2500-pinctrl"; reg = <0x80 0x18>, <0xa0 0x10>; diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi index b58220a49cbd..1ce3a1f06f7f 100644 --- a/arch/arm/boot/dts/aspeed-g6.dtsi +++ b/arch/arm/boot/dts/aspeed-g6.dtsi @@ -311,6 +311,11 @@ compatible = "aspeed,ast2600-pinctrl"; }; + silicon-id@14 { + compatible = "aspeed,ast2600-silicon-id", "aspeed,silicon-id"; + reg = <0x14 0x4 0x5b0 0x8>; + }; + smp-memram@180 { compatible = "aspeed,ast2600-smpmem"; reg = <0x180 0x40>; From e8589796a6d1255f0f6cbbe9706f1f70362ba0c8 Mon Sep 17 00:00:00 2001 From: Brad Bishop Date: Wed, 25 Sep 2019 08:56:01 -0400 Subject: [PATCH 05/13] dt-bindings: aspeed-lpc: Add AST2600 compatible strings The AST2600 datasheet indicates the same register set behind the LPC controller address space. Signed-off-by: Brad Bishop Reviewed-by: Andrew Jeffery Link: https://lore.kernel.org/r/20190925125610.12096-2-bradleyb@fuzziesquirrel.com Signed-off-by: Joel Stanley --- Documentation/devicetree/bindings/mfd/aspeed-lpc.txt | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt b/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt index a92acf1dd491..d0a38ba8b9ce 100644 --- a/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt +++ b/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt @@ -46,6 +46,7 @@ Required properties - compatible: One of: "aspeed,ast2400-lpc", "simple-mfd" "aspeed,ast2500-lpc", "simple-mfd" + "aspeed,ast2600-lpc", "simple-mfd" - reg: contains the physical address and length values of the Aspeed LPC memory region. @@ -64,6 +65,7 @@ BMC Node - compatible: One of: "aspeed,ast2400-lpc-bmc" "aspeed,ast2500-lpc-bmc" + "aspeed,ast2600-lpc-bmc" - reg: contains the physical address and length values of the H8S/2168-compatible LPC controller memory region @@ -74,6 +76,7 @@ Host Node - compatible: One of: "aspeed,ast2400-lpc-host", "simple-mfd", "syscon" "aspeed,ast2500-lpc-host", "simple-mfd", "syscon" + "aspeed,ast2600-lpc-host", "simple-mfd", "syscon" - reg: contains the address and length values of the host-related register space for the Aspeed LPC controller @@ -128,6 +131,7 @@ Required properties: - compatible: One of: "aspeed,ast2400-lpc-ctrl"; "aspeed,ast2500-lpc-ctrl"; + "aspeed,ast2600-lpc-ctrl"; - reg: contains offset/length values of the host interface controller memory regions @@ -168,6 +172,7 @@ Required properties: - compatible: One of: "aspeed,ast2400-lhc"; "aspeed,ast2500-lhc"; + "aspeed,ast2600-lhc"; - reg: contains offset/length values of the LHC memory regions. In the AST2400 and AST2500 there are two regions. @@ -187,7 +192,8 @@ state of the LPC bus. Some systems may chose to modify this configuration. Required properties: - - compatible: "aspeed,ast2500-lpc-reset" or + - compatible: "aspeed,ast2600-lpc-reset" or + "aspeed,ast2500-lpc-reset" "aspeed,ast2400-lpc-reset" - reg: offset and length of the IP in the LHC memory region - #reset-controller indicates the number of reset cells expected From 44ddc4de87a54b32ead77d3ec67f0bf93d8c0055 Mon Sep 17 00:00:00 2001 From: Brad Bishop Date: Wed, 25 Sep 2019 08:56:03 -0400 Subject: [PATCH 06/13] soc: aspeed: lpc: Add AST2600 compatible strings The AST2600 has the same lpc-ctrl and lpc-snoop devices as the AST2500. Signed-off-by: Brad Bishop Acked-by: Andrew Jeffery Link: https://lore.kernel.org/r/20190925125610.12096-4-bradleyb@fuzziesquirrel.com Signed-off-by: Joel Stanley --- drivers/soc/aspeed/aspeed-lpc-ctrl.c | 1 + drivers/soc/aspeed/aspeed-lpc-snoop.c | 2 ++ 2 files changed, 3 insertions(+) diff --git a/drivers/soc/aspeed/aspeed-lpc-ctrl.c b/drivers/soc/aspeed/aspeed-lpc-ctrl.c index 01ed21e8bfee..12e4421dee37 100644 --- a/drivers/soc/aspeed/aspeed-lpc-ctrl.c +++ b/drivers/soc/aspeed/aspeed-lpc-ctrl.c @@ -291,6 +291,7 @@ static int aspeed_lpc_ctrl_remove(struct platform_device *pdev) static const struct of_device_id aspeed_lpc_ctrl_match[] = { { .compatible = "aspeed,ast2400-lpc-ctrl" }, { .compatible = "aspeed,ast2500-lpc-ctrl" }, + { .compatible = "aspeed,ast2600-lpc-ctrl" }, { }, }; diff --git a/drivers/soc/aspeed/aspeed-lpc-snoop.c b/drivers/soc/aspeed/aspeed-lpc-snoop.c index f3d8d53ab84d..682ba0eb4eba 100644 --- a/drivers/soc/aspeed/aspeed-lpc-snoop.c +++ b/drivers/soc/aspeed/aspeed-lpc-snoop.c @@ -325,6 +325,8 @@ static const struct of_device_id aspeed_lpc_snoop_match[] = { .data = &ast2400_model_data }, { .compatible = "aspeed,ast2500-lpc-snoop", .data = &ast2500_model_data }, + { .compatible = "aspeed,ast2600-lpc-snoop", + .data = &ast2500_model_data }, { }, }; From 6bf4ddbe2b4805f0628922446a7e85e34013cd10 Mon Sep 17 00:00:00 2001 From: Andrew Jeffery Date: Thu, 17 Oct 2019 10:09:50 +1030 Subject: [PATCH 07/13] soc: aspeed-lpc-ctrl: Fail probe of lpc-ctrl if reserved memory is not aligned Alignment is a hardware constraint of the LPC2AHB bridge, and misaligned reserved memory will present as corrupted data. Signed-off-by: Andrew Jeffery Reviewed-by: Joel Stanley Link: https://lore.kernel.org/r/20191016233950.10100-1-andrew@aj.id.au Signed-off-by: Joel Stanley --- drivers/soc/aspeed/aspeed-lpc-ctrl.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/drivers/soc/aspeed/aspeed-lpc-ctrl.c b/drivers/soc/aspeed/aspeed-lpc-ctrl.c index 12e4421dee37..d8f3dff97cd4 100644 --- a/drivers/soc/aspeed/aspeed-lpc-ctrl.c +++ b/drivers/soc/aspeed/aspeed-lpc-ctrl.c @@ -4,6 +4,7 @@ */ #include +#include #include #include #include @@ -241,6 +242,18 @@ static int aspeed_lpc_ctrl_probe(struct platform_device *pdev) lpc_ctrl->mem_size = resource_size(&resm); lpc_ctrl->mem_base = resm.start; + + if (!is_power_of_2(lpc_ctrl->mem_size)) { + dev_err(dev, "Reserved memory size must be a power of 2, got %u\n", + (unsigned int)lpc_ctrl->mem_size); + return -EINVAL; + } + + if (!IS_ALIGNED(lpc_ctrl->mem_base, lpc_ctrl->mem_size)) { + dev_err(dev, "Reserved memory must be naturally aligned for size %u\n", + (unsigned int)lpc_ctrl->mem_size); + return -EINVAL; + } } lpc_ctrl->regmap = syscon_node_to_regmap( From 5042d3f278de45e215291d2adcf1024cc3c7f73a Mon Sep 17 00:00:00 2001 From: Joel Stanley Date: Thu, 12 Mar 2020 22:44:13 +1030 Subject: [PATCH 08/13] soc: aspeed-lpc-ctrl: LPC to AHB mapping on ast2600 The ast2600 disables the mapping of AHB memory regions by default, only allowing the LPC window to point to SPI NOR. In order to point the window to any AHB address, an ast2600 specific bit must be toggled. Reviewed-by: Andrew Jeffery Link: https://lore.kernel.org/r/20200312121413.294384-1-joel@jms.id.au Signed-off-by: Joel Stanley --- drivers/soc/aspeed/aspeed-lpc-ctrl.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/soc/aspeed/aspeed-lpc-ctrl.c b/drivers/soc/aspeed/aspeed-lpc-ctrl.c index d8f3dff97cd4..ee2def4ffda3 100644 --- a/drivers/soc/aspeed/aspeed-lpc-ctrl.c +++ b/drivers/soc/aspeed/aspeed-lpc-ctrl.c @@ -22,6 +22,9 @@ #define HICR5_ENL2H BIT(8) #define HICR5_ENFWH BIT(10) +#define HICR6 0x4 +#define SW_FWH2AHB BIT(17) + #define HICR7 0x8 #define HICR8 0xc @@ -33,6 +36,7 @@ struct aspeed_lpc_ctrl { resource_size_t mem_size; u32 pnor_size; u32 pnor_base; + bool fwh2ahb; }; static struct aspeed_lpc_ctrl *file_aspeed_lpc_ctrl(struct file *file) @@ -177,6 +181,16 @@ static long aspeed_lpc_ctrl_ioctl(struct file *file, unsigned int cmd, if (rc) return rc; + /* + * Switch to FWH2AHB mode, AST2600 only. + * + * The other bits in this register are interrupt status bits + * that are cleared by writing 1. As we don't want to clear + * them, set only the bit of interest. + */ + if (lpc_ctrl->fwh2ahb) + regmap_write(lpc_ctrl->regmap, HICR6, SW_FWH2AHB); + /* * Enable LPC FHW cycles. This is required for the host to * access the regions specified. @@ -274,6 +288,9 @@ static int aspeed_lpc_ctrl_probe(struct platform_device *pdev) return rc; } + if (of_device_is_compatible(dev->of_node, "aspeed,ast2600-lpc-ctrl")) + lpc_ctrl->fwh2ahb = true; + lpc_ctrl->miscdev.minor = MISC_DYNAMIC_MINOR; lpc_ctrl->miscdev.name = DEVICE_NAME; lpc_ctrl->miscdev.fops = &aspeed_lpc_ctrl_fops; From 4d1d81dbc9d51ac383f3979da5eba13870183c4d Mon Sep 17 00:00:00 2001 From: Joel Stanley Date: Fri, 25 Sep 2020 14:52:44 +0930 Subject: [PATCH 09/13] soc: aspeed-lpc-ctrl: Fix whitespace Some misaligned indentation I noticed when applying another patch. Signed-off-by: Joel Stanley --- drivers/soc/aspeed/aspeed-lpc-ctrl.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/soc/aspeed/aspeed-lpc-ctrl.c b/drivers/soc/aspeed/aspeed-lpc-ctrl.c index ee2def4ffda3..53373c164cd5 100644 --- a/drivers/soc/aspeed/aspeed-lpc-ctrl.c +++ b/drivers/soc/aspeed/aspeed-lpc-ctrl.c @@ -34,8 +34,8 @@ struct aspeed_lpc_ctrl { struct clk *clk; phys_addr_t mem_base; resource_size_t mem_size; - u32 pnor_size; - u32 pnor_base; + u32 pnor_size; + u32 pnor_base; bool fwh2ahb; }; From cd460be0460fd4edeef194a26d90c7ac02a8dadd Mon Sep 17 00:00:00 2001 From: Joel Stanley Date: Fri, 25 Sep 2020 14:53:25 +0930 Subject: [PATCH 10/13] soc: aspeed-lpc-ctrl: Fix driver name Clarify the string now that it supports the AST2600 too. Signed-off-by: Joel Stanley --- drivers/soc/aspeed/aspeed-lpc-ctrl.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/soc/aspeed/aspeed-lpc-ctrl.c b/drivers/soc/aspeed/aspeed-lpc-ctrl.c index 53373c164cd5..439bcd6b8c4a 100644 --- a/drivers/soc/aspeed/aspeed-lpc-ctrl.c +++ b/drivers/soc/aspeed/aspeed-lpc-ctrl.c @@ -339,4 +339,4 @@ module_platform_driver(aspeed_lpc_ctrl_driver); MODULE_DEVICE_TABLE(of, aspeed_lpc_ctrl_match); MODULE_LICENSE("GPL"); MODULE_AUTHOR("Cyril Bur "); -MODULE_DESCRIPTION("Control for aspeed 2400/2500 LPC HOST to BMC mappings"); +MODULE_DESCRIPTION("Control for ASPEED LPC HOST to BMC mappings"); From 959b981dc7bc144e0e256f8fe34b6ce23e839525 Mon Sep 17 00:00:00 2001 From: Tom Rix Date: Sun, 1 Nov 2020 07:06:22 -0800 Subject: [PATCH 11/13] soc: aspeed: remove unneeded semicolon A semicolon is not needed after a switch statement. Signed-off-by: Tom Rix Link: https://lore.kernel.org/r/20201101150622.2288203-1-trix@redhat.com Signed-off-by: Joel Stanley --- drivers/soc/aspeed/aspeed-socinfo.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/soc/aspeed/aspeed-socinfo.c b/drivers/soc/aspeed/aspeed-socinfo.c index 26db42ef6aae..20a1d4aeb051 100644 --- a/drivers/soc/aspeed/aspeed-socinfo.c +++ b/drivers/soc/aspeed/aspeed-socinfo.c @@ -51,7 +51,7 @@ static const char *siliconid_to_rev(u32 siliconid) return "A1"; case 3: return "A2"; - }; + } return "??"; } From 0f0c9c702241d839dbb1d355b77e5712a5a5793f Mon Sep 17 00:00:00 2001 From: Dan Carpenter Date: Fri, 13 Nov 2020 13:08:50 +0300 Subject: [PATCH 12/13] soc: aspeed: Fix a reference leak in aspeed_socinfo_init() This needs to call of_node_put(np) before returning if of_iomap() fails. Fixes: e0218dca5787 ("soc: aspeed: Add soc info driver") Signed-off-by: Dan Carpenter Reviewed-by: Andrew Jeffery Link: https://lore.kernel.org/r/20201113100850.GA168908@mwanda Signed-off-by: Joel Stanley --- drivers/soc/aspeed/aspeed-socinfo.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/soc/aspeed/aspeed-socinfo.c b/drivers/soc/aspeed/aspeed-socinfo.c index 20a1d4aeb051..773930e0cb10 100644 --- a/drivers/soc/aspeed/aspeed-socinfo.c +++ b/drivers/soc/aspeed/aspeed-socinfo.c @@ -74,8 +74,10 @@ static int __init aspeed_socinfo_init(void) } reg = of_iomap(np, 0); - if (!reg) + if (!reg) { + of_node_put(np); return -ENODEV; + } siliconid = readl(reg); iounmap(reg); From 4da595ddc06909d9ba8fcedcce0c4e1e0a4c3244 Mon Sep 17 00:00:00 2001 From: Joel Stanley Date: Thu, 19 Nov 2020 22:47:04 +1030 Subject: [PATCH 13/13] soc: aspeed: Enable drivers with ARCH_ASPEED Default the drivers to on as most configurations will use them. Signed-off-by: Joel Stanley --- drivers/soc/aspeed/Kconfig | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/soc/aspeed/Kconfig b/drivers/soc/aspeed/Kconfig index 7ece0675b1fa..243ca196e6ad 100644 --- a/drivers/soc/aspeed/Kconfig +++ b/drivers/soc/aspeed/Kconfig @@ -8,6 +8,7 @@ config ASPEED_LPC_CTRL tristate "ASPEED LPC firmware cycle control" select REGMAP select MFD_SYSCON + default ARCH_ASPEED help Control LPC firmware cycle mappings through ioctl()s. The driver also provides a read/write interface to a BMC ram region where the @@ -17,6 +18,7 @@ config ASPEED_LPC_SNOOP tristate "ASPEED LPC snoop support" select REGMAP select MFD_SYSCON + default ARCH_ASPEED help Provides a driver to control the LPC snoop interface which allows the BMC to listen on and save the data written by @@ -26,6 +28,7 @@ config ASPEED_P2A_CTRL tristate "ASPEED P2A (VGA MMIO to BMC) bridge control" select REGMAP select MFD_SYSCON + default ARCH_ASPEED help Control ASPEED P2A VGA MMIO to BMC mappings through ioctl()s. The driver also provides an interface for userspace mappings to a @@ -35,6 +38,7 @@ config ASPEED_SOCINFO bool "ASPEED SoC Information driver" default ARCH_ASPEED select SOC_BUS + default ARCH_ASPEED help Say yes to support decoding of ASPEED BMC information.