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i2c-ismt: support I2C_SMBUS_I2C_BLOCK_DATA transaction type
This patch adds the support of the I2C_SMBUS_I2C_BLOCK_DATA transaction type for the iSMT SMBus Controller. Signed-off-by: Robert Valiquette <robert.valiquette@intel.com> Acked-by: Seth Heasley <seth.heasley@intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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@ -344,6 +344,7 @@ static int ismt_process_desc(const struct ismt_desc *desc,
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data->word = dma_buffer[0] | (dma_buffer[1] << 8);
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break;
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case I2C_SMBUS_BLOCK_DATA:
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case I2C_SMBUS_I2C_BLOCK_DATA:
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memcpy(&data->block[1], dma_buffer, desc->rxbytes);
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data->block[0] = desc->rxbytes;
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break;
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@ -509,6 +510,41 @@ static int ismt_access(struct i2c_adapter *adap, u16 addr,
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}
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break;
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case I2C_SMBUS_I2C_BLOCK_DATA:
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/* Make sure the length is valid */
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if (data->block[0] < 1)
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data->block[0] = 1;
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if (data->block[0] > I2C_SMBUS_BLOCK_MAX)
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data->block[0] = I2C_SMBUS_BLOCK_MAX;
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if (read_write == I2C_SMBUS_WRITE) {
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/* i2c Block Write */
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dev_dbg(dev, "I2C_SMBUS_I2C_BLOCK_DATA: WRITE\n");
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dma_size = data->block[0] + 1;
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dma_direction = DMA_TO_DEVICE;
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desc->wr_len_cmd = dma_size;
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desc->control |= ISMT_DESC_I2C;
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priv->dma_buffer[0] = command;
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memcpy(&priv->dma_buffer[1], &data->block[1], dma_size);
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} else {
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/* i2c Block Read */
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dev_dbg(dev, "I2C_SMBUS_I2C_BLOCK_DATA: READ\n");
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dma_size = data->block[0];
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dma_direction = DMA_FROM_DEVICE;
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desc->rd_len = dma_size;
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desc->wr_len_cmd = command;
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desc->control |= (ISMT_DESC_I2C | ISMT_DESC_CWRL);
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/*
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* Per the "Table 15-15. I2C Commands",
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* in the External Design Specification (EDS),
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* (Document Number: 508084, Revision: 2.0),
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* the _rw bit must be 0
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*/
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desc->tgtaddr_rw = ISMT_DESC_ADDR_RW(addr, 0);
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}
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break;
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default:
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dev_err(dev, "Unsupported transaction %d\n",
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size);
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@ -582,6 +618,7 @@ static u32 ismt_func(struct i2c_adapter *adap)
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I2C_FUNC_SMBUS_WORD_DATA |
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I2C_FUNC_SMBUS_PROC_CALL |
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I2C_FUNC_SMBUS_BLOCK_DATA |
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I2C_FUNC_SMBUS_I2C_BLOCK |
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I2C_FUNC_SMBUS_PEC;
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}
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