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staging: imx_drm: imx_ldb: fix 18 bit format
Since 18 bit is supported as datawidth in device tree it should be supported in driver. Beside the LDB channel the IPU channel has also to be configured to use BGR666. Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de> Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -177,6 +177,7 @@ static void imx_ldb_encoder_prepare(struct drm_encoder *encoder)
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struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
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struct imx_ldb *ldb = imx_ldb_ch->ldb;
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struct drm_display_mode *mode = &encoder->crtc->mode;
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u32 pixel_fmt;
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unsigned long serial_clk;
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unsigned long di_clk = mode->clock * 1000;
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int mux = imx_drm_encoder_get_mux_id(imx_ldb_ch->imx_drm_encoder,
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@ -192,8 +193,23 @@ static void imx_ldb_encoder_prepare(struct drm_encoder *encoder)
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imx_ldb_set_clock(ldb, mux, imx_ldb_ch->chno, serial_clk, di_clk);
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}
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switch (imx_ldb_ch->chno) {
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case 0:
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pixel_fmt = (ldb->ldb_ctrl & LDB_DATA_WIDTH_CH0_24) ?
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V4L2_PIX_FMT_RGB24 : V4L2_PIX_FMT_BGR666;
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break;
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case 1:
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pixel_fmt = (ldb->ldb_ctrl & LDB_DATA_WIDTH_CH1_24) ?
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V4L2_PIX_FMT_RGB24 : V4L2_PIX_FMT_BGR666;
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break;
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default:
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dev_err(ldb->dev, "unable to config di%d panel format\n",
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imx_ldb_ch->chno);
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pixel_fmt = V4L2_PIX_FMT_RGB24;
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}
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imx_drm_crtc_panel_format(encoder->crtc, DRM_MODE_ENCODER_LVDS,
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V4L2_PIX_FMT_RGB24);
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pixel_fmt);
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}
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static void imx_ldb_encoder_commit(struct drm_encoder *encoder)
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