2018-05-24 03:17:36 +08:00
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// SPDX-License-Identifier: GPL-2.0
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//
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// Regulator Driver for Freescale MC13783 PMIC
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//
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// Copyright 2010 Yong Shen <yong.shen@linaro.org>
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// Copyright (C) 2008 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
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// Copyright 2009 Alberto Panizzo <maramaopercheseimorto@gmail.com>
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2009-08-19 07:43:50 +08:00
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2009-11-10 16:18:07 +08:00
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#include <linux/mfd/mc13783.h>
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2009-08-19 07:43:50 +08:00
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#include <linux/regulator/machine.h>
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#include <linux/regulator/driver.h>
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#include <linux/platform_device.h>
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#include <linux/kernel.h>
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include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-24 16:04:11 +08:00
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#include <linux/slab.h>
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2009-08-19 07:43:50 +08:00
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#include <linux/init.h>
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#include <linux/err.h>
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2011-07-18 04:28:23 +08:00
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#include <linux/module.h>
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2010-12-14 14:00:54 +08:00
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#include "mc13xxx.h"
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2009-08-19 07:43:50 +08:00
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2012-08-28 19:09:10 +08:00
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#define MC13783_REG_SWITCHERS0 24
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/* Enable does not exist for SW1A */
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#define MC13783_REG_SWITCHERS0_SW1AEN 0
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#define MC13783_REG_SWITCHERS0_SW1AVSEL 0
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#define MC13783_REG_SWITCHERS0_SW1AVSEL_M (63 << 0)
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#define MC13783_REG_SWITCHERS1 25
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/* Enable does not exist for SW1B */
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#define MC13783_REG_SWITCHERS1_SW1BEN 0
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#define MC13783_REG_SWITCHERS1_SW1BVSEL 0
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#define MC13783_REG_SWITCHERS1_SW1BVSEL_M (63 << 0)
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#define MC13783_REG_SWITCHERS2 26
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/* Enable does not exist for SW2A */
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#define MC13783_REG_SWITCHERS2_SW2AEN 0
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#define MC13783_REG_SWITCHERS2_SW2AVSEL 0
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#define MC13783_REG_SWITCHERS2_SW2AVSEL_M (63 << 0)
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#define MC13783_REG_SWITCHERS3 27
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/* Enable does not exist for SW2B */
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#define MC13783_REG_SWITCHERS3_SW2BEN 0
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#define MC13783_REG_SWITCHERS3_SW2BVSEL 0
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#define MC13783_REG_SWITCHERS3_SW2BVSEL_M (63 << 0)
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2009-11-10 16:18:07 +08:00
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#define MC13783_REG_SWITCHERS5 29
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#define MC13783_REG_SWITCHERS5_SW3EN (1 << 20)
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2009-12-15 01:26:38 +08:00
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#define MC13783_REG_SWITCHERS5_SW3VSEL 18
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#define MC13783_REG_SWITCHERS5_SW3VSEL_M (3 << 18)
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#define MC13783_REG_REGULATORSETTING0 30
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#define MC13783_REG_REGULATORSETTING0_VIOLOVSEL 2
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#define MC13783_REG_REGULATORSETTING0_VDIGVSEL 4
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#define MC13783_REG_REGULATORSETTING0_VGENVSEL 6
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#define MC13783_REG_REGULATORSETTING0_VRFDIGVSEL 9
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#define MC13783_REG_REGULATORSETTING0_VRFREFVSEL 11
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#define MC13783_REG_REGULATORSETTING0_VRFCPVSEL 13
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#define MC13783_REG_REGULATORSETTING0_VSIMVSEL 14
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#define MC13783_REG_REGULATORSETTING0_VESIMVSEL 15
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#define MC13783_REG_REGULATORSETTING0_VCAMVSEL 16
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#define MC13783_REG_REGULATORSETTING0_VIOLOVSEL_M (3 << 2)
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#define MC13783_REG_REGULATORSETTING0_VDIGVSEL_M (3 << 4)
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#define MC13783_REG_REGULATORSETTING0_VGENVSEL_M (7 << 6)
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#define MC13783_REG_REGULATORSETTING0_VRFDIGVSEL_M (3 << 9)
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#define MC13783_REG_REGULATORSETTING0_VRFREFVSEL_M (3 << 11)
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#define MC13783_REG_REGULATORSETTING0_VRFCPVSEL_M (1 << 13)
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#define MC13783_REG_REGULATORSETTING0_VSIMVSEL_M (1 << 14)
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#define MC13783_REG_REGULATORSETTING0_VESIMVSEL_M (1 << 15)
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#define MC13783_REG_REGULATORSETTING0_VCAMVSEL_M (7 << 16)
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#define MC13783_REG_REGULATORSETTING1 31
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#define MC13783_REG_REGULATORSETTING1_VVIBVSEL 0
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#define MC13783_REG_REGULATORSETTING1_VRF1VSEL 2
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#define MC13783_REG_REGULATORSETTING1_VRF2VSEL 4
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#define MC13783_REG_REGULATORSETTING1_VMMC1VSEL 6
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#define MC13783_REG_REGULATORSETTING1_VMMC2VSEL 9
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#define MC13783_REG_REGULATORSETTING1_VVIBVSEL_M (3 << 0)
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#define MC13783_REG_REGULATORSETTING1_VRF1VSEL_M (3 << 2)
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#define MC13783_REG_REGULATORSETTING1_VRF2VSEL_M (3 << 4)
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#define MC13783_REG_REGULATORSETTING1_VMMC1VSEL_M (7 << 6)
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#define MC13783_REG_REGULATORSETTING1_VMMC2VSEL_M (7 << 9)
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2009-11-10 16:18:07 +08:00
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#define MC13783_REG_REGULATORMODE0 32
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#define MC13783_REG_REGULATORMODE0_VAUDIOEN (1 << 0)
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#define MC13783_REG_REGULATORMODE0_VIOHIEN (1 << 3)
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#define MC13783_REG_REGULATORMODE0_VIOLOEN (1 << 6)
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#define MC13783_REG_REGULATORMODE0_VDIGEN (1 << 9)
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#define MC13783_REG_REGULATORMODE0_VGENEN (1 << 12)
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#define MC13783_REG_REGULATORMODE0_VRFDIGEN (1 << 15)
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#define MC13783_REG_REGULATORMODE0_VRFREFEN (1 << 18)
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#define MC13783_REG_REGULATORMODE0_VRFCPEN (1 << 21)
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#define MC13783_REG_REGULATORMODE1 33
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#define MC13783_REG_REGULATORMODE1_VSIMEN (1 << 0)
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#define MC13783_REG_REGULATORMODE1_VESIMEN (1 << 3)
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#define MC13783_REG_REGULATORMODE1_VCAMEN (1 << 6)
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#define MC13783_REG_REGULATORMODE1_VRFBGEN (1 << 9)
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#define MC13783_REG_REGULATORMODE1_VVIBEN (1 << 11)
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#define MC13783_REG_REGULATORMODE1_VRF1EN (1 << 12)
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#define MC13783_REG_REGULATORMODE1_VRF2EN (1 << 15)
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#define MC13783_REG_REGULATORMODE1_VMMC1EN (1 << 18)
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#define MC13783_REG_REGULATORMODE1_VMMC2EN (1 << 21)
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#define MC13783_REG_POWERMISC 34
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#define MC13783_REG_POWERMISC_GPO1EN (1 << 6)
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#define MC13783_REG_POWERMISC_GPO2EN (1 << 8)
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#define MC13783_REG_POWERMISC_GPO3EN (1 << 10)
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#define MC13783_REG_POWERMISC_GPO4EN (1 << 12)
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2010-01-19 19:48:54 +08:00
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#define MC13783_REG_POWERMISC_PWGT1SPIEN (1 << 15)
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#define MC13783_REG_POWERMISC_PWGT2SPIEN (1 << 16)
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#define MC13783_REG_POWERMISC_PWGTSPI_M (3 << 15)
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2009-11-10 16:18:07 +08:00
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2009-12-15 01:26:38 +08:00
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/* Voltage Values */
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2012-08-28 19:09:10 +08:00
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static const int mc13783_sw1x_val[] = {
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900000, 925000, 950000, 975000,
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1000000, 1025000, 1050000, 1075000,
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1100000, 1125000, 1150000, 1175000,
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1200000, 1225000, 1250000, 1275000,
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1300000, 1325000, 1350000, 1375000,
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1400000, 1425000, 1450000, 1475000,
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1500000, 1525000, 1550000, 1575000,
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1600000, 1625000, 1650000, 1675000,
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1700000, 1700000, 1700000, 1700000,
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1800000, 1800000, 1800000, 1800000,
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1850000, 1850000, 1850000, 1850000,
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2000000, 2000000, 2000000, 2000000,
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2100000, 2100000, 2100000, 2100000,
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2200000, 2200000, 2200000, 2200000,
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2200000, 2200000, 2200000, 2200000,
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2200000, 2200000, 2200000, 2200000,
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};
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static const int mc13783_sw2x_val[] = {
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900000, 925000, 950000, 975000,
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1000000, 1025000, 1050000, 1075000,
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1100000, 1125000, 1150000, 1175000,
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1200000, 1225000, 1250000, 1275000,
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1300000, 1325000, 1350000, 1375000,
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1400000, 1425000, 1450000, 1475000,
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1500000, 1525000, 1550000, 1575000,
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1600000, 1625000, 1650000, 1675000,
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1700000, 1700000, 1700000, 1700000,
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1800000, 1800000, 1800000, 1800000,
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1900000, 1900000, 1900000, 1900000,
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2000000, 2000000, 2000000, 2000000,
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2100000, 2100000, 2100000, 2100000,
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2200000, 2200000, 2200000, 2200000,
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2200000, 2200000, 2200000, 2200000,
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2200000, 2200000, 2200000, 2200000,
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};
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2012-06-08 15:41:48 +08:00
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static const unsigned int mc13783_sw3_val[] = {
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2009-12-15 01:26:38 +08:00
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5000000, 5000000, 5000000, 5500000,
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};
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2012-06-08 15:41:48 +08:00
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static const unsigned int mc13783_vaudio_val[] = {
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2009-12-15 01:26:38 +08:00
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2775000,
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};
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2012-06-08 15:41:48 +08:00
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static const unsigned int mc13783_viohi_val[] = {
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2009-12-15 01:26:38 +08:00
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2775000,
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};
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2012-06-08 15:41:48 +08:00
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static const unsigned int mc13783_violo_val[] = {
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2009-12-15 01:26:38 +08:00
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1200000, 1300000, 1500000, 1800000,
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};
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2012-06-08 15:41:48 +08:00
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static const unsigned int mc13783_vdig_val[] = {
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2009-12-15 01:26:38 +08:00
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1200000, 1300000, 1500000, 1800000,
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};
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2012-06-08 15:41:48 +08:00
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static const unsigned int mc13783_vgen_val[] = {
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2009-12-15 01:26:38 +08:00
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1200000, 1300000, 1500000, 1800000,
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1100000, 2000000, 2775000, 2400000,
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};
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2012-06-08 15:41:48 +08:00
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static const unsigned int mc13783_vrfdig_val[] = {
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2009-12-15 01:26:38 +08:00
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1200000, 1500000, 1800000, 1875000,
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};
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2012-06-08 15:41:48 +08:00
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static const unsigned int mc13783_vrfref_val[] = {
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2009-12-15 01:26:38 +08:00
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2475000, 2600000, 2700000, 2775000,
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};
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2012-06-08 15:41:48 +08:00
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static const unsigned int mc13783_vrfcp_val[] = {
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2009-12-15 01:26:38 +08:00
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2700000, 2775000,
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};
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2012-06-08 15:41:48 +08:00
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static const unsigned int mc13783_vsim_val[] = {
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2009-12-15 01:26:38 +08:00
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1800000, 2900000, 3000000,
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};
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2012-06-08 15:41:48 +08:00
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static const unsigned int mc13783_vesim_val[] = {
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2009-12-15 01:26:38 +08:00
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1800000, 2900000,
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};
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2012-06-08 15:41:48 +08:00
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static const unsigned int mc13783_vcam_val[] = {
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2009-12-15 01:26:38 +08:00
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1500000, 1800000, 2500000, 2550000,
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2600000, 2750000, 2800000, 3000000,
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};
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2012-06-08 15:41:48 +08:00
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static const unsigned int mc13783_vrfbg_val[] = {
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2009-12-15 01:26:38 +08:00
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1250000,
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};
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2012-06-08 15:41:48 +08:00
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static const unsigned int mc13783_vvib_val[] = {
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2009-12-15 01:26:38 +08:00
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1300000, 1800000, 2000000, 3000000,
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};
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2012-06-08 15:41:48 +08:00
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static const unsigned int mc13783_vmmc_val[] = {
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2009-12-15 01:26:38 +08:00
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1600000, 1800000, 2000000, 2600000,
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2700000, 2800000, 2900000, 3000000,
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};
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2012-06-08 15:41:48 +08:00
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static const unsigned int mc13783_vrf_val[] = {
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2009-12-15 01:26:38 +08:00
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1500000, 1875000, 2700000, 2775000,
|
2009-08-19 07:43:50 +08:00
|
|
|
};
|
|
|
|
|
|
2012-06-08 15:41:48 +08:00
|
|
|
static const unsigned int mc13783_gpo_val[] = {
|
2010-01-19 19:48:54 +08:00
|
|
|
3100000,
|
|
|
|
|
};
|
|
|
|
|
|
2012-06-08 15:41:48 +08:00
|
|
|
static const unsigned int mc13783_pwgtdrv_val[] = {
|
2010-01-19 19:48:54 +08:00
|
|
|
5500000,
|
|
|
|
|
};
|
|
|
|
|
|
2019-03-01 22:20:53 +08:00
|
|
|
static const struct regulator_ops mc13783_gpo_regulator_ops;
|
2009-12-15 01:26:38 +08:00
|
|
|
|
2019-01-25 23:37:04 +08:00
|
|
|
#define MC13783_DEFINE(prefix, name, node, reg, vsel_reg, voltages) \
|
|
|
|
|
MC13xxx_DEFINE(MC13783_REG_, name, node, reg, vsel_reg, voltages, \
|
2010-12-14 14:00:54 +08:00
|
|
|
mc13xxx_regulator_ops)
|
2009-08-19 07:43:50 +08:00
|
|
|
|
2019-01-25 23:37:04 +08:00
|
|
|
#define MC13783_FIXED_DEFINE(prefix, name, node, reg, voltages) \
|
|
|
|
|
MC13xxx_FIXED_DEFINE(MC13783_REG_, name, node, reg, voltages, \
|
2010-12-14 14:00:54 +08:00
|
|
|
mc13xxx_fixed_regulator_ops)
|
2009-12-15 01:26:38 +08:00
|
|
|
|
2019-01-25 23:37:04 +08:00
|
|
|
#define MC13783_GPO_DEFINE(prefix, name, node, reg, voltages) \
|
|
|
|
|
MC13xxx_GPO_DEFINE(MC13783_REG_, name, node, reg, voltages, \
|
2010-12-14 14:00:54 +08:00
|
|
|
mc13783_gpo_regulator_ops)
|
2009-11-10 16:18:07 +08:00
|
|
|
|
2019-01-25 23:37:04 +08:00
|
|
|
#define MC13783_DEFINE_SW(_name, _node, _reg, _vsel_reg, _voltages) \
|
|
|
|
|
MC13783_DEFINE(REG, _name, _node, _reg, _vsel_reg, _voltages)
|
|
|
|
|
#define MC13783_DEFINE_REGU(_name, _node, _reg, _vsel_reg, _voltages) \
|
|
|
|
|
MC13783_DEFINE(REG, _name, _node, _reg, _vsel_reg, _voltages)
|
2009-11-10 16:18:07 +08:00
|
|
|
|
2010-12-14 14:00:54 +08:00
|
|
|
static struct mc13xxx_regulator mc13783_regulators[] = {
|
2019-01-25 23:37:04 +08:00
|
|
|
MC13783_DEFINE_SW(SW1A, sw1a, SWITCHERS0, SWITCHERS0, mc13783_sw1x_val),
|
|
|
|
|
MC13783_DEFINE_SW(SW1B, sw1b, SWITCHERS1, SWITCHERS1, mc13783_sw1x_val),
|
|
|
|
|
MC13783_DEFINE_SW(SW2A, sw2a, SWITCHERS2, SWITCHERS2, mc13783_sw2x_val),
|
|
|
|
|
MC13783_DEFINE_SW(SW2B, sw2b, SWITCHERS3, SWITCHERS3, mc13783_sw2x_val),
|
|
|
|
|
MC13783_DEFINE_SW(SW3, sw3, SWITCHERS5, SWITCHERS5, mc13783_sw3_val),
|
|
|
|
|
|
|
|
|
|
MC13783_FIXED_DEFINE(REG, VAUDIO, vaudio, REGULATORMODE0, mc13783_vaudio_val),
|
|
|
|
|
MC13783_FIXED_DEFINE(REG, VIOHI, viohi, REGULATORMODE0, mc13783_viohi_val),
|
|
|
|
|
MC13783_DEFINE_REGU(VIOLO, violo, REGULATORMODE0, REGULATORSETTING0,
|
2009-12-15 01:26:38 +08:00
|
|
|
mc13783_violo_val),
|
2019-01-25 23:37:04 +08:00
|
|
|
MC13783_DEFINE_REGU(VDIG, vdig, REGULATORMODE0, REGULATORSETTING0,
|
2009-12-15 01:26:38 +08:00
|
|
|
mc13783_vdig_val),
|
2019-01-25 23:37:04 +08:00
|
|
|
MC13783_DEFINE_REGU(VGEN, vgen, REGULATORMODE0, REGULATORSETTING0,
|
2009-12-15 01:26:38 +08:00
|
|
|
mc13783_vgen_val),
|
2019-01-25 23:37:04 +08:00
|
|
|
MC13783_DEFINE_REGU(VRFDIG, vrfdig, REGULATORMODE0, REGULATORSETTING0,
|
2009-12-15 01:26:38 +08:00
|
|
|
mc13783_vrfdig_val),
|
2019-01-25 23:37:04 +08:00
|
|
|
MC13783_DEFINE_REGU(VRFREF, vrfref, REGULATORMODE0, REGULATORSETTING0,
|
2009-12-15 01:26:38 +08:00
|
|
|
mc13783_vrfref_val),
|
2019-01-25 23:37:04 +08:00
|
|
|
MC13783_DEFINE_REGU(VRFCP, vrfcp, REGULATORMODE0, REGULATORSETTING0,
|
2009-12-15 01:26:38 +08:00
|
|
|
mc13783_vrfcp_val),
|
2019-01-25 23:37:04 +08:00
|
|
|
MC13783_DEFINE_REGU(VSIM, vsim, REGULATORMODE1, REGULATORSETTING0,
|
2009-12-15 01:26:38 +08:00
|
|
|
mc13783_vsim_val),
|
2019-01-25 23:37:04 +08:00
|
|
|
MC13783_DEFINE_REGU(VESIM, vesim, REGULATORMODE1, REGULATORSETTING0,
|
2009-12-15 01:26:38 +08:00
|
|
|
mc13783_vesim_val),
|
2019-01-25 23:37:04 +08:00
|
|
|
MC13783_DEFINE_REGU(VCAM, vcam, REGULATORMODE1, REGULATORSETTING0,
|
2009-12-15 01:26:38 +08:00
|
|
|
mc13783_vcam_val),
|
2019-01-25 23:37:04 +08:00
|
|
|
MC13783_FIXED_DEFINE(REG, VRFBG, vrfbg, REGULATORMODE1, mc13783_vrfbg_val),
|
|
|
|
|
MC13783_DEFINE_REGU(VVIB, vvib, REGULATORMODE1, REGULATORSETTING1,
|
2009-12-15 01:26:38 +08:00
|
|
|
mc13783_vvib_val),
|
2019-01-25 23:37:04 +08:00
|
|
|
MC13783_DEFINE_REGU(VRF1, vrf1, REGULATORMODE1, REGULATORSETTING1,
|
2009-12-15 01:26:38 +08:00
|
|
|
mc13783_vrf_val),
|
2019-01-25 23:37:04 +08:00
|
|
|
MC13783_DEFINE_REGU(VRF2, vrf2, REGULATORMODE1, REGULATORSETTING1,
|
2009-12-15 01:26:38 +08:00
|
|
|
mc13783_vrf_val),
|
2019-01-25 23:37:04 +08:00
|
|
|
MC13783_DEFINE_REGU(VMMC1, vmmc1, REGULATORMODE1, REGULATORSETTING1,
|
2009-12-15 01:26:38 +08:00
|
|
|
mc13783_vmmc_val),
|
2019-01-25 23:37:04 +08:00
|
|
|
MC13783_DEFINE_REGU(VMMC2, vmmc2, REGULATORMODE1, REGULATORSETTING1,
|
2009-12-15 01:26:38 +08:00
|
|
|
mc13783_vmmc_val),
|
2019-01-25 23:37:04 +08:00
|
|
|
MC13783_GPO_DEFINE(REG, GPO1, gpo1, POWERMISC, mc13783_gpo_val),
|
|
|
|
|
MC13783_GPO_DEFINE(REG, GPO2, gpo1, POWERMISC, mc13783_gpo_val),
|
|
|
|
|
MC13783_GPO_DEFINE(REG, GPO3, gpo1, POWERMISC, mc13783_gpo_val),
|
|
|
|
|
MC13783_GPO_DEFINE(REG, GPO4, gpo1, POWERMISC, mc13783_gpo_val),
|
|
|
|
|
MC13783_GPO_DEFINE(REG, PWGT1SPI, pwgt1spi, POWERMISC, mc13783_pwgtdrv_val),
|
|
|
|
|
MC13783_GPO_DEFINE(REG, PWGT2SPI, pwgt2spi, POWERMISC, mc13783_pwgtdrv_val),
|
2009-08-19 07:43:50 +08:00
|
|
|
};
|
|
|
|
|
|
2010-12-14 14:00:54 +08:00
|
|
|
static int mc13783_powermisc_rmw(struct mc13xxx_regulator_priv *priv, u32 mask,
|
|
|
|
|
u32 val)
|
2010-01-19 19:48:54 +08:00
|
|
|
{
|
2010-12-14 14:00:54 +08:00
|
|
|
struct mc13xxx *mc13783 = priv->mc13xxx;
|
2010-01-19 19:48:54 +08:00
|
|
|
int ret;
|
|
|
|
|
u32 valread;
|
|
|
|
|
|
|
|
|
|
BUG_ON(val & ~mask);
|
|
|
|
|
|
2012-07-19 11:16:06 +08:00
|
|
|
mc13xxx_lock(priv->mc13xxx);
|
2010-12-14 14:00:54 +08:00
|
|
|
ret = mc13xxx_reg_read(mc13783, MC13783_REG_POWERMISC, &valread);
|
2010-01-19 19:48:54 +08:00
|
|
|
if (ret)
|
2012-07-19 11:16:06 +08:00
|
|
|
goto out;
|
2010-01-19 19:48:54 +08:00
|
|
|
|
|
|
|
|
/* Update the stored state for Power Gates. */
|
|
|
|
|
priv->powermisc_pwgt_state =
|
|
|
|
|
(priv->powermisc_pwgt_state & ~mask) | val;
|
|
|
|
|
priv->powermisc_pwgt_state &= MC13783_REG_POWERMISC_PWGTSPI_M;
|
|
|
|
|
|
|
|
|
|
/* Construct the new register value */
|
|
|
|
|
valread = (valread & ~mask) | val;
|
|
|
|
|
/* Overwrite the PWGTxEN with the stored version */
|
|
|
|
|
valread = (valread & ~MC13783_REG_POWERMISC_PWGTSPI_M) |
|
|
|
|
|
priv->powermisc_pwgt_state;
|
|
|
|
|
|
2012-07-19 11:16:06 +08:00
|
|
|
ret = mc13xxx_reg_write(mc13783, MC13783_REG_POWERMISC, valread);
|
|
|
|
|
out:
|
|
|
|
|
mc13xxx_unlock(priv->mc13xxx);
|
|
|
|
|
return ret;
|
2010-01-19 19:48:54 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int mc13783_gpo_regulator_enable(struct regulator_dev *rdev)
|
|
|
|
|
{
|
2010-12-14 14:00:54 +08:00
|
|
|
struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev);
|
|
|
|
|
struct mc13xxx_regulator *mc13xxx_regulators = priv->mc13xxx_regulators;
|
2010-01-19 19:48:54 +08:00
|
|
|
int id = rdev_get_id(rdev);
|
2010-12-14 14:00:54 +08:00
|
|
|
u32 en_val = mc13xxx_regulators[id].enable_bit;
|
2010-01-19 19:48:54 +08:00
|
|
|
|
|
|
|
|
dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id);
|
|
|
|
|
|
|
|
|
|
/* Power Gate enable value is 0 */
|
2010-12-14 14:00:53 +08:00
|
|
|
if (id == MC13783_REG_PWGT1SPI ||
|
|
|
|
|
id == MC13783_REG_PWGT2SPI)
|
2010-01-19 19:48:54 +08:00
|
|
|
en_val = 0;
|
|
|
|
|
|
2012-07-19 11:16:06 +08:00
|
|
|
return mc13783_powermisc_rmw(priv, mc13xxx_regulators[id].enable_bit,
|
2010-01-19 19:48:54 +08:00
|
|
|
en_val);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int mc13783_gpo_regulator_disable(struct regulator_dev *rdev)
|
|
|
|
|
{
|
2010-12-14 14:00:54 +08:00
|
|
|
struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev);
|
|
|
|
|
struct mc13xxx_regulator *mc13xxx_regulators = priv->mc13xxx_regulators;
|
2010-01-19 19:48:54 +08:00
|
|
|
int id = rdev_get_id(rdev);
|
|
|
|
|
u32 dis_val = 0;
|
|
|
|
|
|
|
|
|
|
dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id);
|
|
|
|
|
|
|
|
|
|
/* Power Gate disable value is 1 */
|
2010-12-14 14:00:53 +08:00
|
|
|
if (id == MC13783_REG_PWGT1SPI ||
|
|
|
|
|
id == MC13783_REG_PWGT2SPI)
|
2010-12-14 14:00:54 +08:00
|
|
|
dis_val = mc13xxx_regulators[id].enable_bit;
|
2010-01-19 19:48:54 +08:00
|
|
|
|
2012-07-19 11:16:06 +08:00
|
|
|
return mc13783_powermisc_rmw(priv, mc13xxx_regulators[id].enable_bit,
|
2010-01-19 19:48:54 +08:00
|
|
|
dis_val);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int mc13783_gpo_regulator_is_enabled(struct regulator_dev *rdev)
|
|
|
|
|
{
|
2010-12-14 14:00:54 +08:00
|
|
|
struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev);
|
|
|
|
|
struct mc13xxx_regulator *mc13xxx_regulators = priv->mc13xxx_regulators;
|
2010-01-19 19:48:54 +08:00
|
|
|
int ret, id = rdev_get_id(rdev);
|
|
|
|
|
unsigned int val;
|
|
|
|
|
|
2010-12-14 14:00:54 +08:00
|
|
|
mc13xxx_lock(priv->mc13xxx);
|
|
|
|
|
ret = mc13xxx_reg_read(priv->mc13xxx, mc13xxx_regulators[id].reg, &val);
|
|
|
|
|
mc13xxx_unlock(priv->mc13xxx);
|
2010-01-19 19:48:54 +08:00
|
|
|
|
|
|
|
|
if (ret)
|
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
|
|
/* Power Gates state is stored in powermisc_pwgt_state
|
|
|
|
|
* where the meaning of bits is negated */
|
|
|
|
|
val = (val & ~MC13783_REG_POWERMISC_PWGTSPI_M) |
|
|
|
|
|
(priv->powermisc_pwgt_state ^ MC13783_REG_POWERMISC_PWGTSPI_M);
|
|
|
|
|
|
2010-12-14 14:00:54 +08:00
|
|
|
return (val & mc13xxx_regulators[id].enable_bit) != 0;
|
2010-01-19 19:48:54 +08:00
|
|
|
}
|
|
|
|
|
|
2019-03-01 22:20:53 +08:00
|
|
|
static const struct regulator_ops mc13783_gpo_regulator_ops = {
|
2010-01-19 19:48:54 +08:00
|
|
|
.enable = mc13783_gpo_regulator_enable,
|
|
|
|
|
.disable = mc13783_gpo_regulator_disable,
|
|
|
|
|
.is_enabled = mc13783_gpo_regulator_is_enabled,
|
2012-06-08 15:41:48 +08:00
|
|
|
.list_voltage = regulator_list_voltage_table,
|
2010-12-14 14:00:54 +08:00
|
|
|
.set_voltage = mc13xxx_fixed_regulator_set_voltage,
|
2010-01-19 19:48:54 +08:00
|
|
|
};
|
|
|
|
|
|
2012-11-20 02:22:22 +08:00
|
|
|
static int mc13783_regulator_probe(struct platform_device *pdev)
|
2009-08-19 07:43:50 +08:00
|
|
|
{
|
2010-12-14 14:00:54 +08:00
|
|
|
struct mc13xxx_regulator_priv *priv;
|
|
|
|
|
struct mc13xxx *mc13783 = dev_get_drvdata(pdev->dev.parent);
|
2011-09-19 17:33:17 +08:00
|
|
|
struct mc13xxx_regulator_platform_data *pdata =
|
2011-04-08 07:55:01 +08:00
|
|
|
dev_get_platdata(&pdev->dev);
|
2013-04-27 14:29:25 +08:00
|
|
|
struct mc13xxx_regulator_init_data *mc13xxx_data;
|
2012-04-10 13:51:06 +08:00
|
|
|
struct regulator_config config = { };
|
2013-09-04 14:30:59 +08:00
|
|
|
int i, num_regulators;
|
2009-08-19 07:43:50 +08:00
|
|
|
|
2013-04-27 14:29:25 +08:00
|
|
|
num_regulators = mc13xxx_get_num_regulators_dt(pdev);
|
2009-08-19 07:43:50 +08:00
|
|
|
|
2013-04-27 14:29:25 +08:00
|
|
|
if (num_regulators <= 0 && pdata)
|
|
|
|
|
num_regulators = pdata->num_regulators;
|
|
|
|
|
if (num_regulators <= 0)
|
2012-02-29 16:01:40 +08:00
|
|
|
return -EINVAL;
|
|
|
|
|
|
treewide: Use struct_size() for devm_kmalloc() and friends
Replaces open-coded struct size calculations with struct_size() for
devm_*, f2fs_*, and sock_* allocations. Automatically generated (and
manually adjusted) from the following Coccinelle script:
// Direct reference to struct field.
@@
identifier alloc =~ "devm_kmalloc|devm_kzalloc|sock_kmalloc|f2fs_kmalloc|f2fs_kzalloc";
expression HANDLE;
expression GFP;
identifier VAR, ELEMENT;
expression COUNT;
@@
- alloc(HANDLE, sizeof(*VAR) + COUNT * sizeof(*VAR->ELEMENT), GFP)
+ alloc(HANDLE, struct_size(VAR, ELEMENT, COUNT), GFP)
// mr = kzalloc(sizeof(*mr) + m * sizeof(mr->map[0]), GFP_KERNEL);
@@
identifier alloc =~ "devm_kmalloc|devm_kzalloc|sock_kmalloc|f2fs_kmalloc|f2fs_kzalloc";
expression HANDLE;
expression GFP;
identifier VAR, ELEMENT;
expression COUNT;
@@
- alloc(HANDLE, sizeof(*VAR) + COUNT * sizeof(VAR->ELEMENT[0]), GFP)
+ alloc(HANDLE, struct_size(VAR, ELEMENT, COUNT), GFP)
// Same pattern, but can't trivially locate the trailing element name,
// or variable name.
@@
identifier alloc =~ "devm_kmalloc|devm_kzalloc|sock_kmalloc|f2fs_kmalloc|f2fs_kzalloc";
expression HANDLE;
expression GFP;
expression SOMETHING, COUNT, ELEMENT;
@@
- alloc(HANDLE, sizeof(SOMETHING) + COUNT * sizeof(ELEMENT), GFP)
+ alloc(HANDLE, CHECKME_struct_size(&SOMETHING, ELEMENT, COUNT), GFP)
Signed-off-by: Kees Cook <keescook@chromium.org>
2018-05-09 07:08:53 +08:00
|
|
|
priv = devm_kzalloc(&pdev->dev,
|
|
|
|
|
struct_size(priv, regulators, num_regulators),
|
|
|
|
|
GFP_KERNEL);
|
2009-08-19 07:43:50 +08:00
|
|
|
if (!priv)
|
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
2013-04-27 14:29:25 +08:00
|
|
|
priv->num_regulators = num_regulators;
|
2010-12-14 14:00:54 +08:00
|
|
|
priv->mc13xxx_regulators = mc13783_regulators;
|
|
|
|
|
priv->mc13xxx = mc13783;
|
2013-04-27 14:29:25 +08:00
|
|
|
platform_set_drvdata(pdev, priv);
|
2009-08-19 07:43:50 +08:00
|
|
|
|
2013-04-27 14:29:25 +08:00
|
|
|
mc13xxx_data = mc13xxx_parse_regulators_dt(pdev, mc13783_regulators,
|
|
|
|
|
ARRAY_SIZE(mc13783_regulators));
|
2012-04-10 13:51:06 +08:00
|
|
|
|
2013-04-27 14:29:25 +08:00
|
|
|
for (i = 0; i < priv->num_regulators; i++) {
|
|
|
|
|
struct regulator_init_data *init_data;
|
|
|
|
|
struct regulator_desc *desc;
|
|
|
|
|
struct device_node *node = NULL;
|
|
|
|
|
int id;
|
|
|
|
|
|
|
|
|
|
if (mc13xxx_data) {
|
|
|
|
|
id = mc13xxx_data[i].id;
|
|
|
|
|
init_data = mc13xxx_data[i].init_data;
|
|
|
|
|
node = mc13xxx_data[i].node;
|
|
|
|
|
} else {
|
|
|
|
|
id = pdata->regulators[i].id;
|
|
|
|
|
init_data = pdata->regulators[i].init_data;
|
|
|
|
|
}
|
|
|
|
|
desc = &mc13783_regulators[id].desc;
|
2012-04-10 13:51:06 +08:00
|
|
|
|
|
|
|
|
config.dev = &pdev->dev;
|
2013-04-27 14:29:25 +08:00
|
|
|
config.init_data = init_data;
|
2012-04-10 13:51:06 +08:00
|
|
|
config.driver_data = priv;
|
2013-04-27 14:29:25 +08:00
|
|
|
config.of_node = node;
|
2009-08-19 07:43:50 +08:00
|
|
|
|
2013-09-04 14:30:59 +08:00
|
|
|
priv->regulators[i] = devm_regulator_register(&pdev->dev, desc,
|
|
|
|
|
&config);
|
2009-08-19 07:43:50 +08:00
|
|
|
if (IS_ERR(priv->regulators[i])) {
|
|
|
|
|
dev_err(&pdev->dev, "failed to register regulator %s\n",
|
|
|
|
|
mc13783_regulators[i].desc.name);
|
2013-09-04 14:30:59 +08:00
|
|
|
return PTR_ERR(priv->regulators[i]);
|
2009-08-19 07:43:50 +08:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static struct platform_driver mc13783_regulator_driver = {
|
|
|
|
|
.driver = {
|
|
|
|
|
.name = "mc13783-regulator",
|
|
|
|
|
},
|
2009-12-15 01:53:35 +08:00
|
|
|
.probe = mc13783_regulator_probe,
|
2009-08-19 07:43:50 +08:00
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static int __init mc13783_regulator_init(void)
|
|
|
|
|
{
|
2009-12-15 01:53:35 +08:00
|
|
|
return platform_driver_register(&mc13783_regulator_driver);
|
2009-08-19 07:43:50 +08:00
|
|
|
}
|
|
|
|
|
subsys_initcall(mc13783_regulator_init);
|
|
|
|
|
|
|
|
|
|
static void __exit mc13783_regulator_exit(void)
|
|
|
|
|
{
|
|
|
|
|
platform_driver_unregister(&mc13783_regulator_driver);
|
|
|
|
|
}
|
|
|
|
|
module_exit(mc13783_regulator_exit);
|
|
|
|
|
|
2009-11-10 16:18:07 +08:00
|
|
|
MODULE_LICENSE("GPL v2");
|
2010-05-06 11:33:36 +08:00
|
|
|
MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");
|
2009-08-19 07:43:50 +08:00
|
|
|
MODULE_DESCRIPTION("Regulator Driver for Freescale MC13783 PMIC");
|
|
|
|
|
MODULE_ALIAS("platform:mc13783-regulator");
|
