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linux-next/drivers/mfd/intel-lpss-pci.c

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mfd: Add support for Intel Sunrisepoint LPSS devices The new coming Intel platforms such as Skylake will contain Sunrisepoint PCH. The main difference to the previous platforms is that the LPSS devices are compound devices where usually main (SPI, HSUART, or I2C) and DMA IPs are present. This patch brings the driver for such devices found on Sunrisepoint PCH. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2015-07-27 23:04:03 +08:00
/*
* Intel LPSS PCI support.
*
* Copyright (C) 2015, Intel Corporation
*
* Authors: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
* Mika Westerberg <mika.westerberg@linux.intel.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/ioport.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/pm.h>
#include <linux/pm_runtime.h>
mfd: intel-lpss: Pass SDA hold time to I2C host controller driver Intel Skylake the LPSS I2C pad circuit has internal delays that require programming non-zero SDA hold time for the I2C host controller. If this is not done communication to slave devices may fail with arbitration lost errors like the one seen below taken from Lenovo Yoga 900: i2c_hid i2c-SYNA2B29:00: Fetching the HID descriptor i2c_hid i2c-SYNA2B29:00: __i2c_hid_command: cmd=20 00 i2c_designware i2c_designware.1: i2c_dw_handle_tx_abort: lost arbitration To fix this we follow what the Windows driver is doing and pass the default SDA hold time of 230 ns to all Intel Skylake host controllers. This still allows the platform to override these values by passing special ACPI methods SSCN and FMCN. Reported-by: Kevin Fenzi <kevin@scrye.com> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2015-11-30 23:11:42 +08:00
#include <linux/property.h>
mfd: Add support for Intel Sunrisepoint LPSS devices The new coming Intel platforms such as Skylake will contain Sunrisepoint PCH. The main difference to the previous platforms is that the LPSS devices are compound devices where usually main (SPI, HSUART, or I2C) and DMA IPs are present. This patch brings the driver for such devices found on Sunrisepoint PCH. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2015-07-27 23:04:03 +08:00
#include "intel-lpss.h"
static int intel_lpss_pci_probe(struct pci_dev *pdev,
const struct pci_device_id *id)
{
struct intel_lpss_platform_info *info;
int ret;
ret = pcim_enable_device(pdev);
if (ret)
return ret;
info = devm_kmemdup(&pdev->dev, (void *)id->driver_data, sizeof(*info),
GFP_KERNEL);
if (!info)
return -ENOMEM;
info->mem = &pdev->resource[0];
info->irq = pdev->irq;
/* Probably it is enough to set this for iDMA capable devices only */
pci_set_master(pdev);
ret = intel_lpss_probe(&pdev->dev, info);
if (ret)
return ret;
pm_runtime_put(&pdev->dev);
pm_runtime_allow(&pdev->dev);
return 0;
}
static void intel_lpss_pci_remove(struct pci_dev *pdev)
{
pm_runtime_forbid(&pdev->dev);
pm_runtime_get_sync(&pdev->dev);
intel_lpss_remove(&pdev->dev);
}
static INTEL_LPSS_PM_OPS(intel_lpss_pci_pm_ops);
static const struct intel_lpss_platform_info spt_info = {
.clk_rate = 120000000,
};
mfd: intel-lpss: Pass SDA hold time to I2C host controller driver Intel Skylake the LPSS I2C pad circuit has internal delays that require programming non-zero SDA hold time for the I2C host controller. If this is not done communication to slave devices may fail with arbitration lost errors like the one seen below taken from Lenovo Yoga 900: i2c_hid i2c-SYNA2B29:00: Fetching the HID descriptor i2c_hid i2c-SYNA2B29:00: __i2c_hid_command: cmd=20 00 i2c_designware i2c_designware.1: i2c_dw_handle_tx_abort: lost arbitration To fix this we follow what the Windows driver is doing and pass the default SDA hold time of 230 ns to all Intel Skylake host controllers. This still allows the platform to override these values by passing special ACPI methods SSCN and FMCN. Reported-by: Kevin Fenzi <kevin@scrye.com> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2015-11-30 23:11:42 +08:00
static struct property_entry spt_i2c_properties[] = {
PROPERTY_ENTRY_U32("i2c-sda-hold-time-ns", 230),
{ },
};
static const struct intel_lpss_platform_info spt_i2c_info = {
.clk_rate = 120000000,
device property: don't bother the drivers with struct property_set Since device_add_property_set() now always takes a copy of the property_set, and also since the fwnode type is always hard coded to be FWNODE_PDATA, there is no need for the drivers to deliver the entire struct property_set. The function can just create the instance of it on its own and bind the properties from the drivers to it on the spot. This renames device_add_property_set() to device_add_properties(). The function now takes struct property_entry as its parameter instead of struct property_set. Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Acked-by: Thierry Reding <treding@nvidia.com> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2016-03-29 19:52:23 +08:00
.properties = spt_i2c_properties,
mfd: intel-lpss: Pass SDA hold time to I2C host controller driver Intel Skylake the LPSS I2C pad circuit has internal delays that require programming non-zero SDA hold time for the I2C host controller. If this is not done communication to slave devices may fail with arbitration lost errors like the one seen below taken from Lenovo Yoga 900: i2c_hid i2c-SYNA2B29:00: Fetching the HID descriptor i2c_hid i2c-SYNA2B29:00: __i2c_hid_command: cmd=20 00 i2c_designware i2c_designware.1: i2c_dw_handle_tx_abort: lost arbitration To fix this we follow what the Windows driver is doing and pass the default SDA hold time of 230 ns to all Intel Skylake host controllers. This still allows the platform to override these values by passing special ACPI methods SSCN and FMCN. Reported-by: Kevin Fenzi <kevin@scrye.com> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2015-11-30 23:11:42 +08:00
};
mfd: intel-lpss: Pass HSUART configuration via properties The HS-UART host controller driver needs to know certain properties like width of the register set if it cannot get that information from ACPI or DT. In order to support non-ACPI systems we pass this information to the driver via device properties. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2015-11-30 23:11:43 +08:00
static struct property_entry uart_properties[] = {
PROPERTY_ENTRY_U32("reg-io-width", 4),
PROPERTY_ENTRY_U32("reg-shift", 2),
PROPERTY_ENTRY_BOOL("snps,uart-16550-compatible"),
{ },
};
mfd: Add support for Intel Sunrisepoint LPSS devices The new coming Intel platforms such as Skylake will contain Sunrisepoint PCH. The main difference to the previous platforms is that the LPSS devices are compound devices where usually main (SPI, HSUART, or I2C) and DMA IPs are present. This patch brings the driver for such devices found on Sunrisepoint PCH. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2015-07-27 23:04:03 +08:00
static const struct intel_lpss_platform_info spt_uart_info = {
.clk_rate = 120000000,
.clk_con_id = "baudclk",
device property: don't bother the drivers with struct property_set Since device_add_property_set() now always takes a copy of the property_set, and also since the fwnode type is always hard coded to be FWNODE_PDATA, there is no need for the drivers to deliver the entire struct property_set. The function can just create the instance of it on its own and bind the properties from the drivers to it on the spot. This renames device_add_property_set() to device_add_properties(). The function now takes struct property_entry as its parameter instead of struct property_set. Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Acked-by: Thierry Reding <treding@nvidia.com> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2016-03-29 19:52:23 +08:00
.properties = uart_properties,
mfd: Add support for Intel Sunrisepoint LPSS devices The new coming Intel platforms such as Skylake will contain Sunrisepoint PCH. The main difference to the previous platforms is that the LPSS devices are compound devices where usually main (SPI, HSUART, or I2C) and DMA IPs are present. This patch brings the driver for such devices found on Sunrisepoint PCH. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2015-07-27 23:04:03 +08:00
};
mfd: lpss: Add Intel Broxton PCI IDs Intel Broxton has the same LPSS block than Intel Sunrisepoint so add Broxton PCI IDs to the list. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2015-10-21 17:41:48 +08:00
static const struct intel_lpss_platform_info bxt_info = {
.clk_rate = 100000000,
};
static const struct intel_lpss_platform_info bxt_uart_info = {
.clk_rate = 100000000,
.clk_con_id = "baudclk",
device property: don't bother the drivers with struct property_set Since device_add_property_set() now always takes a copy of the property_set, and also since the fwnode type is always hard coded to be FWNODE_PDATA, there is no need for the drivers to deliver the entire struct property_set. The function can just create the instance of it on its own and bind the properties from the drivers to it on the spot. This renames device_add_property_set() to device_add_properties(). The function now takes struct property_entry as its parameter instead of struct property_set. Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Acked-by: Thierry Reding <treding@nvidia.com> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2016-03-29 19:52:23 +08:00
.properties = uart_properties,
mfd: lpss: Add Intel Broxton PCI IDs Intel Broxton has the same LPSS block than Intel Sunrisepoint so add Broxton PCI IDs to the list. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2015-10-21 17:41:48 +08:00
};
mfd: intel-lpss: Pass I2C configuration via properties on BXT I2C host controller need to be configured properly in order to meet I2C timings specified in the I2C protocol specification. Some Intel Broxton based machines do not have this information in the ACPI namespace (or the boot firmware does not support ACPI at all) so we use build-in device properties instead. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2016-01-26 20:17:49 +08:00
static struct property_entry bxt_i2c_properties[] = {
PROPERTY_ENTRY_U32("i2c-sda-hold-time-ns", 42),
PROPERTY_ENTRY_U32("i2c-sda-falling-time-ns", 171),
PROPERTY_ENTRY_U32("i2c-scl-falling-time-ns", 208),
{ },
};
mfd: lpss: Add Intel Broxton PCI IDs Intel Broxton has the same LPSS block than Intel Sunrisepoint so add Broxton PCI IDs to the list. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2015-10-21 17:41:48 +08:00
static const struct intel_lpss_platform_info bxt_i2c_info = {
.clk_rate = 133000000,
device property: don't bother the drivers with struct property_set Since device_add_property_set() now always takes a copy of the property_set, and also since the fwnode type is always hard coded to be FWNODE_PDATA, there is no need for the drivers to deliver the entire struct property_set. The function can just create the instance of it on its own and bind the properties from the drivers to it on the spot. This renames device_add_property_set() to device_add_properties(). The function now takes struct property_entry as its parameter instead of struct property_set. Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Acked-by: Thierry Reding <treding@nvidia.com> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2016-03-29 19:52:23 +08:00
.properties = bxt_i2c_properties,
mfd: lpss: Add Intel Broxton PCI IDs Intel Broxton has the same LPSS block than Intel Sunrisepoint so add Broxton PCI IDs to the list. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2015-10-21 17:41:48 +08:00
};
mfd: lpss: Add Intel Kaby Lake PCH-H PCI IDs Intel Kaby Lake PCH-H has the same LPSS than Intel Sunrisepoint. Add the new IDs to the list of supported devices. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2016-07-04 23:24:54 +08:00
static const struct intel_lpss_platform_info kbl_info = {
.clk_rate = 120000000,
};
static const struct intel_lpss_platform_info kbl_uart_info = {
.clk_rate = 120000000,
.clk_con_id = "baudclk",
};
static const struct intel_lpss_platform_info kbl_i2c_info = {
.clk_rate = 133000000,
};
mfd: Add support for Intel Sunrisepoint LPSS devices The new coming Intel platforms such as Skylake will contain Sunrisepoint PCH. The main difference to the previous platforms is that the LPSS devices are compound devices where usually main (SPI, HSUART, or I2C) and DMA IPs are present. This patch brings the driver for such devices found on Sunrisepoint PCH. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2015-07-27 23:04:03 +08:00
static const struct pci_device_id intel_lpss_pci_ids[] = {
mfd: lpss: Add PCI IDs for Intel Broxton B-Step platform Add PCI IDs for Intel Broxton B-Step platform, which have same LPSS devices with A-Step. Signed-off-by: Huiquan Zhong <huiquan.zhong@intel.com> Signed-off-by: Qipeng Zha <qipeng.zha@intel.com> cked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2016-01-15 00:12:31 +08:00
/* BXT A-Step */
mfd: lpss: Add Intel Broxton PCI IDs Intel Broxton has the same LPSS block than Intel Sunrisepoint so add Broxton PCI IDs to the list. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2015-10-21 17:41:48 +08:00
{ PCI_VDEVICE(INTEL, 0x0aac), (kernel_ulong_t)&bxt_i2c_info },
{ PCI_VDEVICE(INTEL, 0x0aae), (kernel_ulong_t)&bxt_i2c_info },
{ PCI_VDEVICE(INTEL, 0x0ab0), (kernel_ulong_t)&bxt_i2c_info },
{ PCI_VDEVICE(INTEL, 0x0ab2), (kernel_ulong_t)&bxt_i2c_info },
{ PCI_VDEVICE(INTEL, 0x0ab4), (kernel_ulong_t)&bxt_i2c_info },
{ PCI_VDEVICE(INTEL, 0x0ab6), (kernel_ulong_t)&bxt_i2c_info },
{ PCI_VDEVICE(INTEL, 0x0ab8), (kernel_ulong_t)&bxt_i2c_info },
{ PCI_VDEVICE(INTEL, 0x0aba), (kernel_ulong_t)&bxt_i2c_info },
{ PCI_VDEVICE(INTEL, 0x0abc), (kernel_ulong_t)&bxt_uart_info },
{ PCI_VDEVICE(INTEL, 0x0abe), (kernel_ulong_t)&bxt_uart_info },
{ PCI_VDEVICE(INTEL, 0x0ac0), (kernel_ulong_t)&bxt_uart_info },
{ PCI_VDEVICE(INTEL, 0x0ac2), (kernel_ulong_t)&bxt_info },
{ PCI_VDEVICE(INTEL, 0x0ac4), (kernel_ulong_t)&bxt_info },
{ PCI_VDEVICE(INTEL, 0x0ac6), (kernel_ulong_t)&bxt_info },
{ PCI_VDEVICE(INTEL, 0x0aee), (kernel_ulong_t)&bxt_uart_info },
mfd: lpss: Add PCI IDs for Intel Broxton B-Step platform Add PCI IDs for Intel Broxton B-Step platform, which have same LPSS devices with A-Step. Signed-off-by: Huiquan Zhong <huiquan.zhong@intel.com> Signed-off-by: Qipeng Zha <qipeng.zha@intel.com> cked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2016-01-15 00:12:31 +08:00
/* BXT B-Step */
{ PCI_VDEVICE(INTEL, 0x1aac), (kernel_ulong_t)&bxt_i2c_info },
{ PCI_VDEVICE(INTEL, 0x1aae), (kernel_ulong_t)&bxt_i2c_info },
{ PCI_VDEVICE(INTEL, 0x1ab0), (kernel_ulong_t)&bxt_i2c_info },
{ PCI_VDEVICE(INTEL, 0x1ab2), (kernel_ulong_t)&bxt_i2c_info },
{ PCI_VDEVICE(INTEL, 0x1ab4), (kernel_ulong_t)&bxt_i2c_info },
{ PCI_VDEVICE(INTEL, 0x1ab6), (kernel_ulong_t)&bxt_i2c_info },
{ PCI_VDEVICE(INTEL, 0x1ab8), (kernel_ulong_t)&bxt_i2c_info },
{ PCI_VDEVICE(INTEL, 0x1aba), (kernel_ulong_t)&bxt_i2c_info },
{ PCI_VDEVICE(INTEL, 0x1abc), (kernel_ulong_t)&bxt_uart_info },
{ PCI_VDEVICE(INTEL, 0x1abe), (kernel_ulong_t)&bxt_uart_info },
{ PCI_VDEVICE(INTEL, 0x1ac0), (kernel_ulong_t)&bxt_uart_info },
{ PCI_VDEVICE(INTEL, 0x1ac2), (kernel_ulong_t)&bxt_info },
{ PCI_VDEVICE(INTEL, 0x1ac4), (kernel_ulong_t)&bxt_info },
{ PCI_VDEVICE(INTEL, 0x1ac6), (kernel_ulong_t)&bxt_info },
{ PCI_VDEVICE(INTEL, 0x1aee), (kernel_ulong_t)&bxt_uart_info },
mfd: lpss: Add Intel Broxton PCI IDs Intel Broxton has the same LPSS block than Intel Sunrisepoint so add Broxton PCI IDs to the list. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2015-10-21 17:41:48 +08:00
/* APL */
{ PCI_VDEVICE(INTEL, 0x5aac), (kernel_ulong_t)&bxt_i2c_info },
{ PCI_VDEVICE(INTEL, 0x5aae), (kernel_ulong_t)&bxt_i2c_info },
{ PCI_VDEVICE(INTEL, 0x5ab0), (kernel_ulong_t)&bxt_i2c_info },
{ PCI_VDEVICE(INTEL, 0x5ab2), (kernel_ulong_t)&bxt_i2c_info },
{ PCI_VDEVICE(INTEL, 0x5ab4), (kernel_ulong_t)&bxt_i2c_info },
{ PCI_VDEVICE(INTEL, 0x5ab6), (kernel_ulong_t)&bxt_i2c_info },
{ PCI_VDEVICE(INTEL, 0x5ab8), (kernel_ulong_t)&bxt_i2c_info },
{ PCI_VDEVICE(INTEL, 0x5aba), (kernel_ulong_t)&bxt_i2c_info },
{ PCI_VDEVICE(INTEL, 0x5abc), (kernel_ulong_t)&bxt_uart_info },
{ PCI_VDEVICE(INTEL, 0x5abe), (kernel_ulong_t)&bxt_uart_info },
{ PCI_VDEVICE(INTEL, 0x5ac0), (kernel_ulong_t)&bxt_uart_info },
{ PCI_VDEVICE(INTEL, 0x5ac2), (kernel_ulong_t)&bxt_info },
{ PCI_VDEVICE(INTEL, 0x5ac4), (kernel_ulong_t)&bxt_info },
{ PCI_VDEVICE(INTEL, 0x5ac6), (kernel_ulong_t)&bxt_info },
{ PCI_VDEVICE(INTEL, 0x5aee), (kernel_ulong_t)&bxt_uart_info },
mfd: Add support for Intel Sunrisepoint LPSS devices The new coming Intel platforms such as Skylake will contain Sunrisepoint PCH. The main difference to the previous platforms is that the LPSS devices are compound devices where usually main (SPI, HSUART, or I2C) and DMA IPs are present. This patch brings the driver for such devices found on Sunrisepoint PCH. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2015-07-27 23:04:03 +08:00
/* SPT-LP */
{ PCI_VDEVICE(INTEL, 0x9d27), (kernel_ulong_t)&spt_uart_info },
{ PCI_VDEVICE(INTEL, 0x9d28), (kernel_ulong_t)&spt_uart_info },
{ PCI_VDEVICE(INTEL, 0x9d29), (kernel_ulong_t)&spt_info },
{ PCI_VDEVICE(INTEL, 0x9d2a), (kernel_ulong_t)&spt_info },
mfd: intel-lpss: Pass SDA hold time to I2C host controller driver Intel Skylake the LPSS I2C pad circuit has internal delays that require programming non-zero SDA hold time for the I2C host controller. If this is not done communication to slave devices may fail with arbitration lost errors like the one seen below taken from Lenovo Yoga 900: i2c_hid i2c-SYNA2B29:00: Fetching the HID descriptor i2c_hid i2c-SYNA2B29:00: __i2c_hid_command: cmd=20 00 i2c_designware i2c_designware.1: i2c_dw_handle_tx_abort: lost arbitration To fix this we follow what the Windows driver is doing and pass the default SDA hold time of 230 ns to all Intel Skylake host controllers. This still allows the platform to override these values by passing special ACPI methods SSCN and FMCN. Reported-by: Kevin Fenzi <kevin@scrye.com> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2015-11-30 23:11:42 +08:00
{ PCI_VDEVICE(INTEL, 0x9d60), (kernel_ulong_t)&spt_i2c_info },
{ PCI_VDEVICE(INTEL, 0x9d61), (kernel_ulong_t)&spt_i2c_info },
{ PCI_VDEVICE(INTEL, 0x9d62), (kernel_ulong_t)&spt_i2c_info },
{ PCI_VDEVICE(INTEL, 0x9d63), (kernel_ulong_t)&spt_i2c_info },
{ PCI_VDEVICE(INTEL, 0x9d64), (kernel_ulong_t)&spt_i2c_info },
{ PCI_VDEVICE(INTEL, 0x9d65), (kernel_ulong_t)&spt_i2c_info },
mfd: Add support for Intel Sunrisepoint LPSS devices The new coming Intel platforms such as Skylake will contain Sunrisepoint PCH. The main difference to the previous platforms is that the LPSS devices are compound devices where usually main (SPI, HSUART, or I2C) and DMA IPs are present. This patch brings the driver for such devices found on Sunrisepoint PCH. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2015-07-27 23:04:03 +08:00
{ PCI_VDEVICE(INTEL, 0x9d66), (kernel_ulong_t)&spt_uart_info },
/* SPT-H */
{ PCI_VDEVICE(INTEL, 0xa127), (kernel_ulong_t)&spt_uart_info },
{ PCI_VDEVICE(INTEL, 0xa128), (kernel_ulong_t)&spt_uart_info },
{ PCI_VDEVICE(INTEL, 0xa129), (kernel_ulong_t)&spt_info },
{ PCI_VDEVICE(INTEL, 0xa12a), (kernel_ulong_t)&spt_info },
mfd: intel-lpss: Pass SDA hold time to I2C host controller driver Intel Skylake the LPSS I2C pad circuit has internal delays that require programming non-zero SDA hold time for the I2C host controller. If this is not done communication to slave devices may fail with arbitration lost errors like the one seen below taken from Lenovo Yoga 900: i2c_hid i2c-SYNA2B29:00: Fetching the HID descriptor i2c_hid i2c-SYNA2B29:00: __i2c_hid_command: cmd=20 00 i2c_designware i2c_designware.1: i2c_dw_handle_tx_abort: lost arbitration To fix this we follow what the Windows driver is doing and pass the default SDA hold time of 230 ns to all Intel Skylake host controllers. This still allows the platform to override these values by passing special ACPI methods SSCN and FMCN. Reported-by: Kevin Fenzi <kevin@scrye.com> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2015-11-30 23:11:42 +08:00
{ PCI_VDEVICE(INTEL, 0xa160), (kernel_ulong_t)&spt_i2c_info },
{ PCI_VDEVICE(INTEL, 0xa161), (kernel_ulong_t)&spt_i2c_info },
mfd: Add support for Intel Sunrisepoint LPSS devices The new coming Intel platforms such as Skylake will contain Sunrisepoint PCH. The main difference to the previous platforms is that the LPSS devices are compound devices where usually main (SPI, HSUART, or I2C) and DMA IPs are present. This patch brings the driver for such devices found on Sunrisepoint PCH. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2015-07-27 23:04:03 +08:00
{ PCI_VDEVICE(INTEL, 0xa166), (kernel_ulong_t)&spt_uart_info },
mfd: lpss: Add Intel Kaby Lake PCH-H PCI IDs Intel Kaby Lake PCH-H has the same LPSS than Intel Sunrisepoint. Add the new IDs to the list of supported devices. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2016-07-04 23:24:54 +08:00
/* KBL-H */
{ PCI_VDEVICE(INTEL, 0xa2a7), (kernel_ulong_t)&kbl_uart_info },
{ PCI_VDEVICE(INTEL, 0xa2a8), (kernel_ulong_t)&kbl_uart_info },
{ PCI_VDEVICE(INTEL, 0xa2a9), (kernel_ulong_t)&kbl_info },
{ PCI_VDEVICE(INTEL, 0xa2aa), (kernel_ulong_t)&kbl_info },
{ PCI_VDEVICE(INTEL, 0xa2e0), (kernel_ulong_t)&kbl_i2c_info },
{ PCI_VDEVICE(INTEL, 0xa2e1), (kernel_ulong_t)&kbl_i2c_info },
{ PCI_VDEVICE(INTEL, 0xa2e2), (kernel_ulong_t)&kbl_i2c_info },
{ PCI_VDEVICE(INTEL, 0xa2e3), (kernel_ulong_t)&kbl_i2c_info },
{ PCI_VDEVICE(INTEL, 0xa2e6), (kernel_ulong_t)&kbl_uart_info },
mfd: Add support for Intel Sunrisepoint LPSS devices The new coming Intel platforms such as Skylake will contain Sunrisepoint PCH. The main difference to the previous platforms is that the LPSS devices are compound devices where usually main (SPI, HSUART, or I2C) and DMA IPs are present. This patch brings the driver for such devices found on Sunrisepoint PCH. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2015-07-27 23:04:03 +08:00
{ }
};
MODULE_DEVICE_TABLE(pci, intel_lpss_pci_ids);
static struct pci_driver intel_lpss_pci_driver = {
.name = "intel-lpss",
.id_table = intel_lpss_pci_ids,
.probe = intel_lpss_pci_probe,
.remove = intel_lpss_pci_remove,
.driver = {
.pm = &intel_lpss_pci_pm_ops,
},
};
module_pci_driver(intel_lpss_pci_driver);
MODULE_AUTHOR("Andy Shevchenko <andriy.shevchenko@linux.intel.com>");
MODULE_AUTHOR("Mika Westerberg <mika.westerberg@linux.intel.com>");
MODULE_DESCRIPTION("Intel LPSS PCI driver");
MODULE_LICENSE("GPL v2");
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