2006-10-04 05:01:26 +08:00
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/* linux/include/asm-arm/arch-s3c2410/regs-adc.h
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2005-04-17 06:20:36 +08:00
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*
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* Copyright (c) 2004 Shannon Holland <holland@loser.net>
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*
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* This program is free software; yosu can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* S3C2410 ADC registers
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*/
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#ifndef __ASM_ARCH_REGS_ADC_H
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#define __ASM_ARCH_REGS_ADC_H "regs-adc.h"
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#define S3C2410_ADCREG(x) (x)
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#define S3C2410_ADCCON S3C2410_ADCREG(0x00)
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#define S3C2410_ADCTSC S3C2410_ADCREG(0x04)
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#define S3C2410_ADCDLY S3C2410_ADCREG(0x08)
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#define S3C2410_ADCDAT0 S3C2410_ADCREG(0x0C)
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#define S3C2410_ADCDAT1 S3C2410_ADCREG(0x10)
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/* ADCCON Register Bits */
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#define S3C2410_ADCCON_ECFLG (1<<15)
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#define S3C2410_ADCCON_PRSCEN (1<<14)
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#define S3C2410_ADCCON_PRSCVL(x) (((x)&0xFF)<<6)
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#define S3C2410_ADCCON_PRSCVLMASK (0xFF<<6)
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#define S3C2410_ADCCON_SELMUX(x) (((x)&0x7)<<3)
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#define S3C2410_ADCCON_MUXMASK (0x7<<3)
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#define S3C2410_ADCCON_STDBM (1<<2)
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#define S3C2410_ADCCON_READ_START (1<<1)
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#define S3C2410_ADCCON_ENABLE_START (1<<0)
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#define S3C2410_ADCCON_STARTMASK (0x3<<0)
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/* ADCTSC Register Bits */
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#define S3C2410_ADCTSC_YM_SEN (1<<7)
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#define S3C2410_ADCTSC_YP_SEN (1<<6)
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#define S3C2410_ADCTSC_XM_SEN (1<<5)
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#define S3C2410_ADCTSC_XP_SEN (1<<4)
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#define S3C2410_ADCTSC_PULL_UP_DISABLE (1<<3)
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#define S3C2410_ADCTSC_AUTO_PST (1<<2)
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#define S3C2410_ADCTSC_XY_PST (0x3<<0)
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/* ADCDAT0 Bits */
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#define S3C2410_ADCDAT0_UPDOWN (1<<15)
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#define S3C2410_ADCDAT0_AUTO_PST (1<<14)
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#define S3C2410_ADCDAT0_XY_PST (0x3<<12)
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#define S3C2410_ADCDAT0_XPDATA_MASK (0x03FF)
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/* ADCDAT1 Bits */
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#define S3C2410_ADCDAT1_UPDOWN (1<<15)
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#define S3C2410_ADCDAT1_AUTO_PST (1<<14)
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#define S3C2410_ADCDAT1_XY_PST (0x3<<12)
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#define S3C2410_ADCDAT1_YPDATA_MASK (0x03FF)
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#endif /* __ASM_ARCH_REGS_ADC_H */
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