2005-04-17 06:20:36 +08:00
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/*
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* linux/drivers/ide/legacy/qd65xx.c Version 0.07 Sep 30, 2001
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*
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* Copyright (C) 1996-2001 Linus Torvalds & author (see below)
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*/
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/*
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* Version 0.03 Cleaned auto-tune, added probe
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* Version 0.04 Added second channel tuning
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* Version 0.05 Enhanced tuning ; added qd6500 support
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* Version 0.06 Added dos driver's list
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* Version 0.07 Second channel bug fix
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*
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* QDI QD6500/QD6580 EIDE controller fast support
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*
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* Please set local bus speed using kernel parameter idebus
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* for example, "idebus=33" stands for 33Mhz VLbus
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* To activate controller support, use "ide0=qd65xx"
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2007-03-04 00:48:55 +08:00
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* To enable tuning, use "hda=autotune hdb=autotune"
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* To enable 2nd channel tuning (qd6580 only), use "hdc=autotune hdd=autotune"
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2005-04-17 06:20:36 +08:00
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*/
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/*
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* Rewritten from the work of Colten Edwards <pje120@cs.usask.ca> by
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* Samuel Thibault <samuel.thibault@fnac.net>
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*/
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/delay.h>
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#include <linux/timer.h>
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#include <linux/mm.h>
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#include <linux/ioport.h>
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#include <linux/blkdev.h>
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#include <linux/hdreg.h>
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#include <linux/ide.h>
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#include <linux/init.h>
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#include <asm/system.h>
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#include <asm/io.h>
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#include "qd65xx.h"
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/*
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* I/O ports are 0x30-0x31 (and 0x32-0x33 for qd6580)
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* or 0xb0-0xb1 (and 0xb2-0xb3 for qd6580)
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* -- qd6500 is a single IDE interface
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* -- qd6580 is a dual IDE interface
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*
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* More research on qd6580 being done by willmore@cig.mot.com (David)
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* More Information given by Petr Soucek (petr@ryston.cz)
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* http://www.ryston.cz/petr/vlb
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*/
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/*
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* base: Timer1
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*
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*
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* base+0x01: Config (R/O)
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*
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* bit 0: ide baseport: 1 = 0x1f0 ; 0 = 0x170 (only useful for qd6500)
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* bit 1: qd65xx baseport: 1 = 0xb0 ; 0 = 0x30
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* bit 2: ID3: bus speed: 1 = <=33MHz ; 0 = >33MHz
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* bit 3: qd6500: 1 = disabled, 0 = enabled
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* qd6580: 1
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* upper nibble:
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* qd6500: 1100
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* qd6580: either 1010 or 0101
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*
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*
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* base+0x02: Timer2 (qd6580 only)
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*
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*
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* base+0x03: Control (qd6580 only)
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*
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* bits 0-3 must always be set 1
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* bit 4 must be set 1, but is set 0 by dos driver while measuring vlb clock
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* bit 0 : 1 = Only primary port enabled : channel 0 for hda, channel 1 for hdb
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* 0 = Primary and Secondary ports enabled : channel 0 for hda & hdb
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* channel 1 for hdc & hdd
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* bit 1 : 1 = only disks on primary port
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* 0 = disks & ATAPI devices on primary port
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* bit 2-4 : always 0
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* bit 5 : status, but of what ?
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* bit 6 : always set 1 by dos driver
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* bit 7 : set 1 for non-ATAPI devices on primary port
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* (maybe read-ahead and post-write buffer ?)
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*/
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static int timings[4]={-1,-1,-1,-1}; /* stores current timing for each timer */
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static void qd_write_reg (u8 content, unsigned long reg)
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{
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unsigned long flags;
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spin_lock_irqsave(&ide_lock, flags);
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outb(content,reg);
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spin_unlock_irqrestore(&ide_lock, flags);
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}
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static u8 __init qd_read_reg (unsigned long reg)
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{
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unsigned long flags;
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u8 read;
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spin_lock_irqsave(&ide_lock, flags);
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read = inb(reg);
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spin_unlock_irqrestore(&ide_lock, flags);
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return read;
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}
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/*
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* qd_select:
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*
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* This routine is invoked from ide.c to prepare for access to a given drive.
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*/
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static void qd_select (ide_drive_t *drive)
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{
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u8 index = (( (QD_TIMREG(drive)) & 0x80 ) >> 7) |
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(QD_TIMREG(drive) & 0x02);
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if (timings[index] != QD_TIMING(drive))
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qd_write_reg(timings[index] = QD_TIMING(drive), QD_TIMREG(drive));
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}
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/*
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* qd6500_compute_timing
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*
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* computes the timing value where
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* lower nibble represents active time, in count of VLB clocks
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* upper nibble represents recovery time, in count of VLB clocks
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*/
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static u8 qd6500_compute_timing (ide_hwif_t *hwif, int active_time, int recovery_time)
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{
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u8 active_cycle,recovery_cycle;
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if (system_bus_clock()<=33) {
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active_cycle = 9 - IDE_IN(active_time * system_bus_clock() / 1000 + 1, 2, 9);
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recovery_cycle = 15 - IDE_IN(recovery_time * system_bus_clock() / 1000 + 1, 0, 15);
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} else {
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active_cycle = 8 - IDE_IN(active_time * system_bus_clock() / 1000 + 1, 1, 8);
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recovery_cycle = 18 - IDE_IN(recovery_time * system_bus_clock() / 1000 + 1, 3, 18);
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}
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return((recovery_cycle<<4) | 0x08 | active_cycle);
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}
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/*
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* qd6580_compute_timing
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*
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* idem for qd6580
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*/
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static u8 qd6580_compute_timing (int active_time, int recovery_time)
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{
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u8 active_cycle = 17 - IDE_IN(active_time * system_bus_clock() / 1000 + 1, 2, 17);
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u8 recovery_cycle = 15 - IDE_IN(recovery_time * system_bus_clock() / 1000 + 1, 2, 15);
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return((recovery_cycle<<4) | active_cycle);
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}
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/*
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* qd_find_disk_type
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*
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* tries to find timing from dos driver's table
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*/
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static int qd_find_disk_type (ide_drive_t *drive,
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int *active_time, int *recovery_time)
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{
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struct qd65xx_timing_s *p;
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char model[40];
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if (!*drive->id->model) return 0;
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strncpy(model,drive->id->model,40);
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ide_fixstring(model,40,1); /* byte-swap */
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for (p = qd65xx_timing ; p->offset != -1 ; p++) {
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if (!strncmp(p->model, model+p->offset, 4)) {
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printk(KERN_DEBUG "%s: listed !\n", drive->name);
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*active_time = p->active;
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*recovery_time = p->recovery;
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return 1;
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}
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}
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return 0;
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}
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/*
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* qd_timing_ok:
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*
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* check whether timings don't conflict
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*/
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static int qd_timing_ok (ide_drive_t drives[])
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{
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return (IDE_IMPLY(drives[0].present && drives[1].present,
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IDE_IMPLY(QD_TIMREG(drives) == QD_TIMREG(drives+1),
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QD_TIMING(drives) == QD_TIMING(drives+1))));
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/* if same timing register, must be same timing */
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}
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/*
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* qd_set_timing:
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*
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* records the timing, and enables selectproc as needed
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*/
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static void qd_set_timing (ide_drive_t *drive, u8 timing)
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{
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ide_hwif_t *hwif = HWIF(drive);
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drive->drive_data &= 0xff00;
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drive->drive_data |= timing;
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if (qd_timing_ok(hwif->drives)) {
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qd_select(drive); /* selects once */
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hwif->selectproc = NULL;
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} else
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hwif->selectproc = &qd_select;
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printk(KERN_DEBUG "%s: %#x\n", drive->name, timing);
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}
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/*
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* qd6500_tune_drive
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*/
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static void qd6500_tune_drive (ide_drive_t *drive, u8 pio)
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{
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int active_time = 175;
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int recovery_time = 415; /* worst case values from the dos driver */
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if (drive->id && !qd_find_disk_type(drive, &active_time, &recovery_time)
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&& drive->id->tPIO && (drive->id->field_valid & 0x02)
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&& drive->id->eide_pio >= 240) {
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printk(KERN_INFO "%s: PIO mode%d\n", drive->name,
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drive->id->tPIO);
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active_time = 110;
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recovery_time = drive->id->eide_pio - 120;
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}
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qd_set_timing(drive, qd6500_compute_timing(HWIF(drive), active_time, recovery_time));
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}
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/*
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* qd6580_tune_drive
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*/
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static void qd6580_tune_drive (ide_drive_t *drive, u8 pio)
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{
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ide_pio_data_t d;
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int base = HWIF(drive)->select_data;
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int active_time = 175;
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int recovery_time = 415; /* worst case values from the dos driver */
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if (drive->id && !qd_find_disk_type(drive, &active_time, &recovery_time)) {
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pio = ide_get_best_pio_mode(drive, pio, 255, &d);
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pio = min_t(u8, pio, 4);
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switch (pio) {
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case 0: break;
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case 3:
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if (d.cycle_time >= 110) {
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active_time = 86;
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recovery_time = d.cycle_time - 102;
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} else
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printk(KERN_WARNING "%s: Strange recovery time !\n",drive->name);
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break;
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case 4:
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if (d.cycle_time >= 69) {
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active_time = 70;
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recovery_time = d.cycle_time - 61;
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} else
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printk(KERN_WARNING "%s: Strange recovery time !\n",drive->name);
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break;
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default:
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if (d.cycle_time >= 180) {
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active_time = 110;
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recovery_time = d.cycle_time - 120;
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} else {
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active_time = ide_pio_timings[pio].active_time;
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recovery_time = d.cycle_time
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-active_time;
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}
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}
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printk(KERN_INFO "%s: PIO mode%d\n", drive->name,pio);
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}
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if (!HWIF(drive)->channel && drive->media != ide_disk) {
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qd_write_reg(0x5f, QD_CONTROL_PORT);
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printk(KERN_WARNING "%s: ATAPI: disabled read-ahead FIFO "
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"and post-write buffer on %s.\n",
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drive->name, HWIF(drive)->name);
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}
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qd_set_timing(drive, qd6580_compute_timing(active_time, recovery_time));
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}
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/*
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* qd_testreg
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*
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* tests if the given port is a register
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*/
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static int __init qd_testreg(int port)
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{
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u8 savereg;
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u8 readreg;
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unsigned long flags;
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spin_lock_irqsave(&ide_lock, flags);
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savereg = inb_p(port);
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outb_p(QD_TESTVAL, port); /* safe value */
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readreg = inb_p(port);
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outb(savereg, port);
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spin_unlock_irqrestore(&ide_lock, flags);
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if (savereg == QD_TESTVAL) {
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printk(KERN_ERR "Outch ! the probe for qd65xx isn't reliable !\n");
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printk(KERN_ERR "Please contact maintainers to tell about your hardware\n");
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printk(KERN_ERR "Assuming qd65xx is not present.\n");
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return 1;
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}
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return (readreg != QD_TESTVAL);
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}
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/*
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* qd_setup:
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*
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* called to setup an ata channel : adjusts attributes & links for tuning
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*/
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static void __init qd_setup(ide_hwif_t *hwif, int base, int config,
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unsigned int data0, unsigned int data1,
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void (*tuneproc) (ide_drive_t *, u8 pio))
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{
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hwif->chipset = ide_qd65xx;
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hwif->channel = hwif->index;
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hwif->select_data = base;
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hwif->config_data = config;
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hwif->drives[0].drive_data = data0;
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hwif->drives[1].drive_data = data1;
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hwif->drives[0].io_32bit =
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hwif->drives[1].io_32bit = 1;
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hwif->tuneproc = tuneproc;
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probe_hwif_init(hwif);
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}
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/*
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* qd_unsetup:
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*
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* called to unsetup an ata channel : back to default values, unlinks tuning
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*/
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/*
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static void __exit qd_unsetup(ide_hwif_t *hwif)
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{
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u8 config = hwif->config_data;
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int base = hwif->select_data;
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void *tuneproc = (void *) hwif->tuneproc;
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|
|
|
|
|
|
|
if (hwif->chipset != ide_qd65xx)
|
|
|
|
return;
|
|
|
|
|
|
|
|
printk(KERN_NOTICE "%s: back to defaults\n", hwif->name);
|
|
|
|
|
|
|
|
hwif->selectproc = NULL;
|
|
|
|
hwif->tuneproc = NULL;
|
|
|
|
|
|
|
|
if (tuneproc == (void *) qd6500_tune_drive) {
|
|
|
|
// will do it for both
|
|
|
|
qd_write_reg(QD6500_DEF_DATA, QD_TIMREG(&hwif->drives[0]));
|
|
|
|
} else if (tuneproc == (void *) qd6580_tune_drive) {
|
|
|
|
if (QD_CONTROL(hwif) & QD_CONTR_SEC_DISABLED) {
|
|
|
|
qd_write_reg(QD6580_DEF_DATA, QD_TIMREG(&hwif->drives[0]));
|
|
|
|
qd_write_reg(QD6580_DEF_DATA2, QD_TIMREG(&hwif->drives[1]));
|
|
|
|
} else {
|
|
|
|
qd_write_reg(hwif->channel ? QD6580_DEF_DATA2 : QD6580_DEF_DATA, QD_TIMREG(&hwif->drives[0]));
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
printk(KERN_WARNING "Unknown qd65xx tuning fonction !\n");
|
|
|
|
printk(KERN_WARNING "keeping settings !\n");
|
|
|
|
}
|
|
|
|
}
|
|
|
|
*/
|
|
|
|
|
|
|
|
/*
|
|
|
|
* qd_probe:
|
|
|
|
*
|
|
|
|
* looks at the specified baseport, and if qd found, registers & initialises it
|
|
|
|
* return 1 if another qd may be probed
|
|
|
|
*/
|
|
|
|
|
|
|
|
static int __init qd_probe(int base)
|
|
|
|
{
|
|
|
|
ide_hwif_t *hwif;
|
|
|
|
u8 config;
|
|
|
|
u8 unit;
|
|
|
|
|
|
|
|
config = qd_read_reg(QD_CONFIG_PORT);
|
|
|
|
|
|
|
|
if (! ((config & QD_CONFIG_BASEPORT) >> 1 == (base == 0xb0)) )
|
|
|
|
return 1;
|
|
|
|
|
|
|
|
unit = ! (config & QD_CONFIG_IDE_BASEPORT);
|
|
|
|
|
|
|
|
if ((config & 0xf0) == QD_CONFIG_QD6500) {
|
|
|
|
|
|
|
|
if (qd_testreg(base)) return 1; /* bad register */
|
|
|
|
|
|
|
|
/* qd6500 found */
|
|
|
|
|
|
|
|
hwif = &ide_hwifs[unit];
|
|
|
|
printk(KERN_NOTICE "%s: qd6500 at %#x\n", hwif->name, base);
|
|
|
|
printk(KERN_DEBUG "qd6500: config=%#x, ID3=%u\n",
|
|
|
|
config, QD_ID3);
|
|
|
|
|
|
|
|
if (config & QD_CONFIG_DISABLED) {
|
|
|
|
printk(KERN_WARNING "qd6500 is disabled !\n");
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
qd_setup(hwif, base, config, QD6500_DEF_DATA, QD6500_DEF_DATA,
|
|
|
|
&qd6500_tune_drive);
|
|
|
|
|
|
|
|
create_proc_ide_interfaces();
|
|
|
|
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (((config & 0xf0) == QD_CONFIG_QD6580_A) ||
|
|
|
|
((config & 0xf0) == QD_CONFIG_QD6580_B)) {
|
|
|
|
|
|
|
|
u8 control;
|
|
|
|
|
|
|
|
if (qd_testreg(base) || qd_testreg(base+0x02)) return 1;
|
|
|
|
/* bad registers */
|
|
|
|
|
|
|
|
/* qd6580 found */
|
|
|
|
|
|
|
|
control = qd_read_reg(QD_CONTROL_PORT);
|
|
|
|
|
|
|
|
printk(KERN_NOTICE "qd6580 at %#x\n", base);
|
|
|
|
printk(KERN_DEBUG "qd6580: config=%#x, control=%#x, ID3=%u\n",
|
|
|
|
config, control, QD_ID3);
|
|
|
|
|
|
|
|
if (control & QD_CONTR_SEC_DISABLED) {
|
|
|
|
/* secondary disabled */
|
|
|
|
|
|
|
|
hwif = &ide_hwifs[unit];
|
|
|
|
printk(KERN_INFO "%s: qd6580: single IDE board\n",
|
|
|
|
hwif->name);
|
|
|
|
qd_setup(hwif, base, config | (control << 8),
|
|
|
|
QD6580_DEF_DATA, QD6580_DEF_DATA2,
|
|
|
|
&qd6580_tune_drive);
|
|
|
|
qd_write_reg(QD_DEF_CONTR,QD_CONTROL_PORT);
|
|
|
|
|
|
|
|
create_proc_ide_interfaces();
|
|
|
|
|
|
|
|
return 1;
|
|
|
|
} else {
|
|
|
|
ide_hwif_t *mate;
|
|
|
|
|
|
|
|
hwif = &ide_hwifs[0];
|
|
|
|
mate = &ide_hwifs[1];
|
|
|
|
/* secondary enabled */
|
|
|
|
printk(KERN_INFO "%s&%s: qd6580: dual IDE board\n",
|
|
|
|
hwif->name, mate->name);
|
|
|
|
|
|
|
|
qd_setup(hwif, base, config | (control << 8),
|
|
|
|
QD6580_DEF_DATA, QD6580_DEF_DATA,
|
|
|
|
&qd6580_tune_drive);
|
|
|
|
qd_setup(mate, base, config | (control << 8),
|
|
|
|
QD6580_DEF_DATA2, QD6580_DEF_DATA2,
|
|
|
|
&qd6580_tune_drive);
|
|
|
|
qd_write_reg(QD_DEF_CONTR,QD_CONTROL_PORT);
|
|
|
|
|
|
|
|
create_proc_ide_interfaces();
|
|
|
|
|
|
|
|
return 0; /* no other qd65xx possible */
|
|
|
|
}
|
|
|
|
}
|
|
|
|
/* no qd65xx found */
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
2007-03-04 00:48:55 +08:00
|
|
|
int probe_qd65xx = 0;
|
|
|
|
|
|
|
|
module_param_named(probe, probe_qd65xx, bool, 0);
|
|
|
|
MODULE_PARM_DESC(probe, "probe for QD65xx chipsets");
|
|
|
|
|
2005-04-17 06:20:36 +08:00
|
|
|
/* Can be called directly from ide.c. */
|
|
|
|
int __init qd65xx_init(void)
|
|
|
|
{
|
2007-03-04 00:48:55 +08:00
|
|
|
if (probe_qd65xx == 0)
|
|
|
|
return -ENODEV;
|
|
|
|
|
2005-04-17 06:20:36 +08:00
|
|
|
if (qd_probe(0x30))
|
|
|
|
qd_probe(0xb0);
|
|
|
|
if (ide_hwifs[0].chipset != ide_qd65xx &&
|
|
|
|
ide_hwifs[1].chipset != ide_qd65xx)
|
|
|
|
return -ENODEV;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef MODULE
|
|
|
|
module_init(qd65xx_init);
|
|
|
|
#endif
|
|
|
|
|
|
|
|
MODULE_AUTHOR("Samuel Thibault");
|
|
|
|
MODULE_DESCRIPTION("support of qd65xx vlb ide chipset");
|
|
|
|
MODULE_LICENSE("GPL");
|