2005-04-17 06:20:36 +08:00
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/*
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* mmconfig.c - Low-level direct PCI config space access via MMCONFIG
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*
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* This is an 64bit optimized version that always keeps the full mmconfig
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* space mapped. This allows lockless config space operation.
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*/
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#include <linux/pci.h>
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#include <linux/init.h>
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2005-06-24 08:35:56 +08:00
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#include <linux/acpi.h>
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2005-04-17 06:20:36 +08:00
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#include "pci.h"
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#define MMCONFIG_APER_SIZE (256*1024*1024)
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/* Static virtual mapping of the MMCONFIG aperture */
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2005-06-24 08:35:56 +08:00
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static char *pci_mmcfg_virt;
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2005-04-17 06:20:36 +08:00
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static inline char *pci_dev_base(unsigned int bus, unsigned int devfn)
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{
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return pci_mmcfg_virt + ((bus << 20) | (devfn << 12));
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}
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static int pci_mmcfg_read(unsigned int seg, unsigned int bus,
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unsigned int devfn, int reg, int len, u32 *value)
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{
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char *addr = pci_dev_base(bus, devfn);
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if (unlikely(!value || (bus > 255) || (devfn > 255) || (reg > 4095)))
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return -EINVAL;
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switch (len) {
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case 1:
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*value = readb(addr + reg);
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break;
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case 2:
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*value = readw(addr + reg);
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break;
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case 4:
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*value = readl(addr + reg);
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break;
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}
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return 0;
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}
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static int pci_mmcfg_write(unsigned int seg, unsigned int bus,
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unsigned int devfn, int reg, int len, u32 value)
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{
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char *addr = pci_dev_base(bus,devfn);
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if (unlikely((bus > 255) || (devfn > 255) || (reg > 4095)))
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return -EINVAL;
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switch (len) {
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case 1:
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writeb(value, addr + reg);
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break;
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case 2:
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writew(value, addr + reg);
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break;
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case 4:
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writel(value, addr + reg);
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break;
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}
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return 0;
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}
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static struct pci_raw_ops pci_mmcfg = {
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.read = pci_mmcfg_read,
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.write = pci_mmcfg_write,
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};
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static int __init pci_mmcfg_init(void)
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{
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if ((pci_probe & PCI_PROBE_MMCONF) == 0)
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return 0;
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2005-06-24 08:35:56 +08:00
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acpi_table_parse(ACPI_MCFG, acpi_parse_mcfg);
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if ((pci_mmcfg_config_num == 0) ||
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(pci_mmcfg_config == NULL) ||
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(pci_mmcfg_config[0].base_address == 0))
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2005-04-17 06:20:36 +08:00
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return 0;
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/* Kludge for now. Don't use mmconfig on AMD systems because
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those have some busses where mmconfig doesn't work,
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and we don't parse ACPI MCFG well enough to handle that.
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Remove when proper handling is added. */
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if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
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return 0;
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/* RED-PEN i386 doesn't do _nocache right now */
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2005-06-24 08:35:56 +08:00
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pci_mmcfg_virt = ioremap_nocache(pci_mmcfg_config[0].base_address, MMCONFIG_APER_SIZE);
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2005-04-17 06:20:36 +08:00
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if (!pci_mmcfg_virt) {
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printk("PCI: Cannot map mmconfig aperture\n");
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return 0;
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}
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2005-06-24 08:35:56 +08:00
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printk(KERN_INFO "PCI: Using MMCONFIG at %x\n", pci_mmcfg_config[0].base_address);
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2005-04-17 06:20:36 +08:00
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raw_pci_ops = &pci_mmcfg;
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pci_probe = (pci_probe & ~PCI_PROBE_MASK) | PCI_PROBE_MMCONF;
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return 0;
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}
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arch_initcall(pci_mmcfg_init);
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