2013-09-09 08:02:56 +08:00
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/*
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* Copyright (C) 2015 Red Hat, Inc.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sublicense, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial
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* portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
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* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
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* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
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* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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#ifndef VIRTIO_DRV_H
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#define VIRTIO_DRV_H
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#include <linux/virtio.h>
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#include <linux/virtio_ids.h>
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#include <linux/virtio_config.h>
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#include <linux/virtio_gpu.h>
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2016-05-31 14:50:47 +08:00
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#include <drm/drm_atomic.h>
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2016-11-29 02:51:09 +08:00
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#include <drm/drm_encoder.h>
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2018-09-19 15:09:53 +08:00
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#include <drm/drm_fb_helper.h>
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2019-06-30 14:19:16 +08:00
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#include <drm/drm_gem.h>
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#include <drm/drm_ioctl.h>
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2019-01-18 05:03:34 +08:00
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#include <drm/drm_probe_helper.h>
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2017-04-24 12:50:34 +08:00
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#include <drm/ttm/ttm_bo_api.h>
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#include <drm/ttm/ttm_bo_driver.h>
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#include <drm/ttm/ttm_module.h>
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2019-06-30 14:19:16 +08:00
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#include <drm/ttm/ttm_placement.h>
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2013-09-09 08:02:56 +08:00
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#define DRIVER_NAME "virtio_gpu"
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#define DRIVER_DESC "virtio GPU"
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#define DRIVER_DATE "0"
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#define DRIVER_MAJOR 0
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2018-11-13 00:51:57 +08:00
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#define DRIVER_MINOR 1
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#define DRIVER_PATCHLEVEL 0
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2013-09-09 08:02:56 +08:00
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2019-03-18 19:33:29 +08:00
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struct virtio_gpu_object_params {
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2019-03-18 19:33:30 +08:00
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uint32_t format;
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uint32_t width;
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uint32_t height;
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2019-03-18 19:33:29 +08:00
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unsigned long size;
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2019-03-18 19:33:32 +08:00
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bool dumb;
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2019-03-18 19:33:31 +08:00
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/* 3d */
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2019-03-18 19:33:32 +08:00
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bool virgl;
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2019-03-18 19:33:31 +08:00
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uint32_t target;
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uint32_t bind;
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uint32_t depth;
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uint32_t array_size;
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uint32_t last_level;
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uint32_t nr_samples;
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uint32_t flags;
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2019-03-18 19:33:29 +08:00
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};
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2013-09-09 08:02:56 +08:00
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struct virtio_gpu_object {
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struct drm_gem_object gem_base;
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uint32_t hw_res_handle;
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struct sg_table *pages;
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2018-08-29 20:20:26 +08:00
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uint32_t mapped;
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2013-09-09 08:02:56 +08:00
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void *vmap;
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bool dumb;
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struct ttm_place placement_code;
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struct ttm_placement placement;
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struct ttm_buffer_object tbo;
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struct ttm_bo_kmap_obj kmap;
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2018-10-19 14:18:42 +08:00
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bool created;
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2013-09-09 08:02:56 +08:00
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};
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#define gem_to_virtio_gpu_obj(gobj) \
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container_of((gobj), struct virtio_gpu_object, gem_base)
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struct virtio_gpu_vbuffer;
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struct virtio_gpu_device;
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typedef void (*virtio_gpu_resp_cb)(struct virtio_gpu_device *vgdev,
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struct virtio_gpu_vbuffer *vbuf);
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struct virtio_gpu_fence_driver {
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atomic64_t last_seq;
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uint64_t sync_seq;
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2016-09-01 00:26:53 +08:00
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uint64_t context;
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2013-09-09 08:02:56 +08:00
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struct list_head fences;
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spinlock_t lock;
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};
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struct virtio_gpu_fence {
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2016-10-25 20:00:45 +08:00
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struct dma_fence f;
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2013-09-09 08:02:56 +08:00
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struct virtio_gpu_fence_driver *drv;
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struct list_head node;
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};
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#define to_virtio_fence(x) \
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container_of(x, struct virtio_gpu_fence, f)
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struct virtio_gpu_vbuffer {
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char *buf;
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int size;
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void *data_buf;
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uint32_t data_size;
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char *resp_buf;
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int resp_size;
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virtio_gpu_resp_cb resp_cb;
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struct list_head list;
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};
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struct virtio_gpu_output {
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int index;
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struct drm_crtc crtc;
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struct drm_connector conn;
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struct drm_encoder enc;
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struct virtio_gpu_display_one info;
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struct virtio_gpu_update_cursor cursor;
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2018-10-30 14:32:06 +08:00
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struct edid *edid;
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2013-09-09 08:02:56 +08:00
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int cur_x;
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int cur_y;
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2018-08-13 23:28:55 +08:00
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bool enabled;
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2013-09-09 08:02:56 +08:00
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};
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#define drm_crtc_to_virtio_gpu_output(x) \
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container_of(x, struct virtio_gpu_output, crtc)
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#define drm_connector_to_virtio_gpu_output(x) \
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container_of(x, struct virtio_gpu_output, conn)
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#define drm_encoder_to_virtio_gpu_output(x) \
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container_of(x, struct virtio_gpu_output, enc)
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struct virtio_gpu_framebuffer {
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struct drm_framebuffer base;
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2018-11-13 00:51:54 +08:00
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struct virtio_gpu_fence *fence;
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2013-09-09 08:02:56 +08:00
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};
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#define to_virtio_gpu_framebuffer(x) \
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container_of(x, struct virtio_gpu_framebuffer, base)
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struct virtio_gpu_mman {
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struct ttm_bo_device bdev;
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};
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struct virtio_gpu_queue {
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struct virtqueue *vq;
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spinlock_t qlock;
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wait_queue_head_t ack_queue;
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struct work_struct dequeue_work;
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};
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2014-10-28 19:48:00 +08:00
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struct virtio_gpu_drv_capset {
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uint32_t id;
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uint32_t max_version;
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uint32_t max_size;
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};
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struct virtio_gpu_drv_cap_cache {
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struct list_head head;
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void *caps_cache;
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uint32_t id;
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uint32_t version;
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uint32_t size;
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atomic_t is_valid;
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};
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2013-09-09 08:02:56 +08:00
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struct virtio_gpu_device {
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struct device *dev;
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struct drm_device *ddev;
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struct virtio_device *vdev;
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struct virtio_gpu_mman mman;
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struct virtio_gpu_output outputs[VIRTIO_GPU_MAX_SCANOUTS];
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uint32_t num_scanouts;
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struct virtio_gpu_queue ctrlq;
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struct virtio_gpu_queue cursorq;
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2017-03-01 22:09:08 +08:00
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struct kmem_cache *vbufs;
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2013-09-09 08:02:56 +08:00
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bool vqs_ready;
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2018-09-27 00:00:28 +08:00
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struct ida resource_ida;
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2013-09-09 08:02:56 +08:00
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wait_queue_head_t resp_wq;
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/* current display info */
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spinlock_t display_info_lock;
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2015-06-16 12:25:34 +08:00
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bool display_info_pending;
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2013-09-09 08:02:56 +08:00
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struct virtio_gpu_fence_driver fence_drv;
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2018-09-27 00:00:28 +08:00
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struct ida ctx_id_ida;
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2013-09-09 08:02:56 +08:00
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2014-10-28 19:48:00 +08:00
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bool has_virgl_3d;
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2018-10-30 14:32:06 +08:00
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bool has_edid;
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2014-10-28 19:48:00 +08:00
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2013-09-09 08:02:56 +08:00
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struct work_struct config_changed_work;
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2014-10-28 19:48:00 +08:00
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struct virtio_gpu_drv_capset *capsets;
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uint32_t num_capsets;
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struct list_head cap_cache;
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2013-09-09 08:02:56 +08:00
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};
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struct virtio_gpu_fpriv {
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uint32_t ctx_id;
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};
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/* virtio_ioctl.c */
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#define DRM_VIRTIO_NUM_IOCTLS 10
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extern struct drm_ioctl_desc virtio_gpu_ioctls[DRM_VIRTIO_NUM_IOCTLS];
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2019-03-18 19:33:32 +08:00
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int virtio_gpu_object_list_validate(struct ww_acquire_ctx *ticket,
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struct list_head *head);
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void virtio_gpu_unref_list(struct list_head *head);
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2013-09-09 08:02:56 +08:00
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/* virtio_kms.c */
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2019-01-08 22:59:30 +08:00
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int virtio_gpu_init(struct drm_device *dev);
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void virtio_gpu_deinit(struct drm_device *dev);
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2014-10-28 19:48:00 +08:00
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int virtio_gpu_driver_open(struct drm_device *dev, struct drm_file *file);
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void virtio_gpu_driver_postclose(struct drm_device *dev, struct drm_file *file);
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2013-09-09 08:02:56 +08:00
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/* virtio_gem.c */
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void virtio_gpu_gem_free_object(struct drm_gem_object *gem_obj);
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int virtio_gpu_gem_init(struct virtio_gpu_device *vgdev);
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void virtio_gpu_gem_fini(struct virtio_gpu_device *vgdev);
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int virtio_gpu_gem_create(struct drm_file *file,
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struct drm_device *dev,
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2019-03-18 19:33:29 +08:00
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struct virtio_gpu_object_params *params,
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2013-09-09 08:02:56 +08:00
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struct drm_gem_object **obj_p,
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uint32_t *handle_p);
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2014-10-28 19:48:00 +08:00
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int virtio_gpu_gem_object_open(struct drm_gem_object *obj,
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struct drm_file *file);
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void virtio_gpu_gem_object_close(struct drm_gem_object *obj,
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struct drm_file *file);
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2019-03-18 19:33:29 +08:00
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struct virtio_gpu_object*
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virtio_gpu_alloc_object(struct drm_device *dev,
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2019-03-18 19:33:32 +08:00
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struct virtio_gpu_object_params *params,
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struct virtio_gpu_fence *fence);
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2013-09-09 08:02:56 +08:00
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int virtio_gpu_mode_dumb_create(struct drm_file *file_priv,
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struct drm_device *dev,
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struct drm_mode_create_dumb *args);
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int virtio_gpu_mode_dumb_mmap(struct drm_file *file_priv,
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struct drm_device *dev,
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uint32_t handle, uint64_t *offset_p);
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/* virtio vg */
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int virtio_gpu_alloc_vbufs(struct virtio_gpu_device *vgdev);
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void virtio_gpu_free_vbufs(struct virtio_gpu_device *vgdev);
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void virtio_gpu_cmd_create_resource(struct virtio_gpu_device *vgdev,
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2018-10-19 14:18:42 +08:00
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struct virtio_gpu_object *bo,
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2019-03-18 19:33:32 +08:00
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struct virtio_gpu_object_params *params,
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struct virtio_gpu_fence *fence);
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2013-09-09 08:02:56 +08:00
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void virtio_gpu_cmd_unref_resource(struct virtio_gpu_device *vgdev,
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uint32_t resource_id);
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void virtio_gpu_cmd_transfer_to_host_2d(struct virtio_gpu_device *vgdev,
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2018-09-20 14:29:23 +08:00
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struct virtio_gpu_object *bo,
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uint64_t offset,
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2013-09-09 08:02:56 +08:00
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__le32 width, __le32 height,
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__le32 x, __le32 y,
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2018-11-28 23:10:20 +08:00
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struct virtio_gpu_fence *fence);
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2013-09-09 08:02:56 +08:00
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void virtio_gpu_cmd_resource_flush(struct virtio_gpu_device *vgdev,
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uint32_t resource_id,
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uint32_t x, uint32_t y,
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uint32_t width, uint32_t height);
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void virtio_gpu_cmd_set_scanout(struct virtio_gpu_device *vgdev,
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uint32_t scanout_id, uint32_t resource_id,
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uint32_t width, uint32_t height,
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uint32_t x, uint32_t y);
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int virtio_gpu_object_attach(struct virtio_gpu_device *vgdev,
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struct virtio_gpu_object *obj,
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2018-11-28 23:10:20 +08:00
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struct virtio_gpu_fence *fence);
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2018-08-29 20:20:25 +08:00
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void virtio_gpu_object_detach(struct virtio_gpu_device *vgdev,
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struct virtio_gpu_object *obj);
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2013-09-09 08:02:56 +08:00
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int virtio_gpu_attach_status_page(struct virtio_gpu_device *vgdev);
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int virtio_gpu_detach_status_page(struct virtio_gpu_device *vgdev);
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void virtio_gpu_cursor_ping(struct virtio_gpu_device *vgdev,
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struct virtio_gpu_output *output);
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int virtio_gpu_cmd_get_display_info(struct virtio_gpu_device *vgdev);
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2014-10-28 19:48:00 +08:00
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int virtio_gpu_cmd_get_capset_info(struct virtio_gpu_device *vgdev, int idx);
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int virtio_gpu_cmd_get_capset(struct virtio_gpu_device *vgdev,
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int idx, int version,
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struct virtio_gpu_drv_cap_cache **cache_p);
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2018-10-30 14:32:06 +08:00
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int virtio_gpu_cmd_get_edids(struct virtio_gpu_device *vgdev);
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2014-10-28 19:48:00 +08:00
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void virtio_gpu_cmd_context_create(struct virtio_gpu_device *vgdev, uint32_t id,
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uint32_t nlen, const char *name);
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void virtio_gpu_cmd_context_destroy(struct virtio_gpu_device *vgdev,
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uint32_t id);
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void virtio_gpu_cmd_context_attach_resource(struct virtio_gpu_device *vgdev,
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uint32_t ctx_id,
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uint32_t resource_id);
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void virtio_gpu_cmd_context_detach_resource(struct virtio_gpu_device *vgdev,
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uint32_t ctx_id,
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uint32_t resource_id);
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void virtio_gpu_cmd_submit(struct virtio_gpu_device *vgdev,
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void *data, uint32_t data_size,
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2018-11-28 23:10:20 +08:00
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uint32_t ctx_id, struct virtio_gpu_fence *fence);
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2014-10-28 19:48:00 +08:00
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void virtio_gpu_cmd_transfer_from_host_3d(struct virtio_gpu_device *vgdev,
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uint32_t resource_id, uint32_t ctx_id,
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uint64_t offset, uint32_t level,
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struct virtio_gpu_box *box,
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2018-11-28 23:10:20 +08:00
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struct virtio_gpu_fence *fence);
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2014-10-28 19:48:00 +08:00
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void virtio_gpu_cmd_transfer_to_host_3d(struct virtio_gpu_device *vgdev,
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2018-09-20 14:29:23 +08:00
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struct virtio_gpu_object *bo,
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uint32_t ctx_id,
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2014-10-28 19:48:00 +08:00
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uint64_t offset, uint32_t level,
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struct virtio_gpu_box *box,
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2018-11-28 23:10:20 +08:00
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struct virtio_gpu_fence *fence);
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2014-10-28 19:48:00 +08:00
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void
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virtio_gpu_cmd_resource_create_3d(struct virtio_gpu_device *vgdev,
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2018-10-19 14:18:42 +08:00
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struct virtio_gpu_object *bo,
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2019-03-18 19:33:32 +08:00
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struct virtio_gpu_object_params *params,
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struct virtio_gpu_fence *fence);
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2013-09-09 08:02:56 +08:00
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void virtio_gpu_ctrl_ack(struct virtqueue *vq);
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void virtio_gpu_cursor_ack(struct virtqueue *vq);
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2014-10-28 19:48:00 +08:00
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void virtio_gpu_fence_ack(struct virtqueue *vq);
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2013-09-09 08:02:56 +08:00
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void virtio_gpu_dequeue_ctrl_func(struct work_struct *work);
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void virtio_gpu_dequeue_cursor_func(struct work_struct *work);
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2014-10-28 19:48:00 +08:00
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void virtio_gpu_dequeue_fence_func(struct work_struct *work);
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2013-09-09 08:02:56 +08:00
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/* virtio_gpu_display.c */
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int virtio_gpu_framebuffer_init(struct drm_device *dev,
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struct virtio_gpu_framebuffer *vgfb,
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2015-11-12 01:11:29 +08:00
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const struct drm_mode_fb_cmd2 *mode_cmd,
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2013-09-09 08:02:56 +08:00
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struct drm_gem_object *obj);
|
2019-01-08 22:59:30 +08:00
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void virtio_gpu_modeset_init(struct virtio_gpu_device *vgdev);
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2013-09-09 08:02:56 +08:00
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void virtio_gpu_modeset_fini(struct virtio_gpu_device *vgdev);
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/* virtio_gpu_plane.c */
|
2017-04-03 15:08:44 +08:00
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uint32_t virtio_gpu_translate_format(uint32_t drm_fourcc);
|
2013-09-09 08:02:56 +08:00
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struct drm_plane *virtio_gpu_plane_init(struct virtio_gpu_device *vgdev,
|
2016-05-26 17:42:52 +08:00
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enum drm_plane_type type,
|
2013-09-09 08:02:56 +08:00
|
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int index);
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/* virtio_gpu_ttm.c */
|
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int virtio_gpu_ttm_init(struct virtio_gpu_device *vgdev);
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void virtio_gpu_ttm_fini(struct virtio_gpu_device *vgdev);
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int virtio_gpu_mmap(struct file *filp, struct vm_area_struct *vma);
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|
|
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|
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/* virtio_gpu_fence.c */
|
2019-03-18 19:33:32 +08:00
|
|
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bool virtio_fence_signaled(struct dma_fence *f);
|
2018-11-13 00:51:54 +08:00
|
|
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struct virtio_gpu_fence *virtio_gpu_fence_alloc(
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|
|
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struct virtio_gpu_device *vgdev);
|
2019-05-06 17:10:34 +08:00
|
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void virtio_gpu_fence_emit(struct virtio_gpu_device *vgdev,
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2013-09-09 08:02:56 +08:00
|
|
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struct virtio_gpu_ctrl_hdr *cmd_hdr,
|
2018-11-28 23:10:20 +08:00
|
|
|
struct virtio_gpu_fence *fence);
|
2013-09-09 08:02:56 +08:00
|
|
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void virtio_gpu_fence_event_process(struct virtio_gpu_device *vdev,
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|
|
|
u64 last_seq);
|
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|
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|
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/* virtio_gpu_object */
|
|
|
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int virtio_gpu_object_create(struct virtio_gpu_device *vgdev,
|
2019-03-18 19:33:29 +08:00
|
|
|
struct virtio_gpu_object_params *params,
|
2019-03-18 19:33:32 +08:00
|
|
|
struct virtio_gpu_object **bo_ptr,
|
|
|
|
struct virtio_gpu_fence *fence);
|
2018-09-26 00:16:04 +08:00
|
|
|
void virtio_gpu_object_kunmap(struct virtio_gpu_object *bo);
|
2018-09-26 00:16:05 +08:00
|
|
|
int virtio_gpu_object_kmap(struct virtio_gpu_object *bo);
|
2013-09-09 08:02:56 +08:00
|
|
|
int virtio_gpu_object_get_sg_table(struct virtio_gpu_device *qdev,
|
|
|
|
struct virtio_gpu_object *bo);
|
|
|
|
void virtio_gpu_object_free_sg_table(struct virtio_gpu_object *bo);
|
|
|
|
|
2015-01-23 11:04:11 +08:00
|
|
|
/* virtgpu_prime.c */
|
2019-02-27 22:44:41 +08:00
|
|
|
struct sg_table *virtgpu_gem_prime_get_sg_table(struct drm_gem_object *obj);
|
2019-04-24 08:52:20 +08:00
|
|
|
struct drm_gem_object *virtgpu_gem_prime_import_sg_table(
|
|
|
|
struct drm_device *dev, struct dma_buf_attachment *attach,
|
|
|
|
struct sg_table *sgt);
|
2015-01-23 11:04:11 +08:00
|
|
|
void *virtgpu_gem_prime_vmap(struct drm_gem_object *obj);
|
|
|
|
void virtgpu_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
|
|
|
|
int virtgpu_gem_prime_mmap(struct drm_gem_object *obj,
|
2018-02-23 07:59:47 +08:00
|
|
|
struct vm_area_struct *vma);
|
2015-01-23 11:04:11 +08:00
|
|
|
|
2013-09-09 08:02:56 +08:00
|
|
|
static inline struct virtio_gpu_object*
|
|
|
|
virtio_gpu_object_ref(struct virtio_gpu_object *bo)
|
|
|
|
{
|
2018-07-31 14:21:26 +08:00
|
|
|
ttm_bo_get(&bo->tbo);
|
2013-09-09 08:02:56 +08:00
|
|
|
return bo;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void virtio_gpu_object_unref(struct virtio_gpu_object **bo)
|
|
|
|
{
|
|
|
|
struct ttm_buffer_object *tbo;
|
|
|
|
|
|
|
|
if ((*bo) == NULL)
|
|
|
|
return;
|
|
|
|
tbo = &((*bo)->tbo);
|
2018-07-31 14:21:27 +08:00
|
|
|
ttm_bo_put(tbo);
|
|
|
|
*bo = NULL;
|
2013-09-09 08:02:56 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
static inline u64 virtio_gpu_object_mmap_offset(struct virtio_gpu_object *bo)
|
|
|
|
{
|
2019-08-05 22:01:10 +08:00
|
|
|
return drm_vma_node_offset_addr(&bo->tbo.base.vma_node);
|
2013-09-09 08:02:56 +08:00
|
|
|
}
|
|
|
|
|
2019-08-29 18:32:48 +08:00
|
|
|
static inline int virtio_gpu_object_reserve(struct virtio_gpu_object *bo)
|
2013-09-09 08:02:56 +08:00
|
|
|
{
|
|
|
|
int r;
|
|
|
|
|
2019-08-29 18:32:49 +08:00
|
|
|
r = dma_resv_lock_interruptible(bo->gem_base.resv, NULL);
|
2013-09-09 08:02:56 +08:00
|
|
|
if (unlikely(r != 0)) {
|
2019-08-29 18:32:49 +08:00
|
|
|
if (r != -EINTR) {
|
2013-09-09 08:02:56 +08:00
|
|
|
struct virtio_gpu_device *qdev =
|
|
|
|
bo->gem_base.dev->dev_private;
|
|
|
|
dev_err(qdev->dev, "%p reserve failed\n", bo);
|
|
|
|
}
|
|
|
|
return r;
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void virtio_gpu_object_unreserve(struct virtio_gpu_object *bo)
|
|
|
|
{
|
2019-08-29 18:32:49 +08:00
|
|
|
dma_resv_unlock(bo->gem_base.resv);
|
2013-09-09 08:02:56 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/* virgl debufs */
|
|
|
|
int virtio_gpu_debugfs_init(struct drm_minor *minor);
|
|
|
|
|
|
|
|
#endif
|