2013-06-20 13:21:13 +08:00
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/*
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* The file intends to implement the platform dependent EEH operations on
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* powernv platform. Actually, the powernv was created in order to fully
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* hypervisor support.
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*
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* Copyright Benjamin Herrenschmidt & Gavin Shan, IBM Corporation 2013.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <linux/atomic.h>
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#include <linux/delay.h>
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#include <linux/export.h>
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#include <linux/init.h>
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#include <linux/list.h>
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#include <linux/msi.h>
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#include <linux/of.h>
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#include <linux/pci.h>
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#include <linux/proc_fs.h>
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#include <linux/rbtree.h>
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#include <linux/sched.h>
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#include <linux/seq_file.h>
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#include <linux/spinlock.h>
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#include <asm/eeh.h>
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#include <asm/eeh_event.h>
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#include <asm/firmware.h>
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#include <asm/io.h>
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#include <asm/iommu.h>
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#include <asm/machdep.h>
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#include <asm/msi_bitmap.h>
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#include <asm/opal.h>
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#include <asm/ppc-pci.h>
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#include "powernv.h"
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#include "pci.h"
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/**
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* powernv_eeh_init - EEH platform dependent initialization
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*
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* EEH platform dependent initialization on powernv
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*/
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static int powernv_eeh_init(void)
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{
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2014-07-17 12:41:39 +08:00
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struct pci_controller *hose;
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struct pnv_phb *phb;
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2013-06-20 13:21:13 +08:00
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/* We require OPALv3 */
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if (!firmware_has_feature(FW_FEATURE_OPALv3)) {
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2014-07-17 12:41:41 +08:00
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pr_warn("%s: OPALv3 is required !\n",
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__func__);
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2013-06-20 13:21:13 +08:00
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return -EINVAL;
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}
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2014-07-17 12:41:38 +08:00
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/* Set probe mode */
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eeh_add_flag(EEH_PROBE_MODE_DEV);
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2013-06-20 13:21:13 +08:00
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2014-07-17 12:41:39 +08:00
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/*
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* P7IOC blocks PCI config access to frozen PE, but PHB3
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* doesn't do that. So we have to selectively enable I/O
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* prior to collecting error log.
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*/
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list_for_each_entry(hose, &hose_list, list_node) {
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phb = hose->private_data;
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if (phb->model == PNV_PHB_MODEL_P7IOC)
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eeh_add_flag(EEH_ENABLE_IO_FOR_LOG);
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break;
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}
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2013-06-20 13:21:13 +08:00
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return 0;
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}
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/**
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* powernv_eeh_post_init - EEH platform dependent post initialization
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*
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* EEH platform dependent post initialization on powernv. When
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* the function is called, the EEH PEs and devices should have
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* been built. If the I/O cache staff has been built, EEH is
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* ready to supply service.
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*/
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static int powernv_eeh_post_init(void)
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{
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struct pci_controller *hose;
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struct pnv_phb *phb;
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int ret = 0;
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list_for_each_entry(hose, &hose_list, list_node) {
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phb = hose->private_data;
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if (phb->eeh_ops && phb->eeh_ops->post_init) {
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ret = phb->eeh_ops->post_init(hose);
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if (ret)
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break;
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}
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}
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return ret;
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}
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/**
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* powernv_eeh_dev_probe - Do probe on PCI device
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* @dev: PCI device
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* @flag: unused
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*
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* When EEH module is installed during system boot, all PCI devices
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* are checked one by one to see if it supports EEH. The function
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* is introduced for the purpose. By default, EEH has been enabled
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* on all PCI devices. That's to say, we only need do necessary
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* initialization on the corresponding eeh device and create PE
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* accordingly.
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*
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* It's notable that's unsafe to retrieve the EEH device through
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* the corresponding PCI device. During the PCI device hotplug, which
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* was possiblly triggered by EEH core, the binding between EEH device
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* and the PCI device isn't built yet.
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*/
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static int powernv_eeh_dev_probe(struct pci_dev *dev, void *flag)
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{
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struct pci_controller *hose = pci_bus_to_host(dev->bus);
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struct pnv_phb *phb = hose->private_data;
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struct device_node *dn = pci_device_to_OF_node(dev);
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struct eeh_dev *edev = of_node_to_eeh_dev(dn);
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2014-06-26 14:58:47 +08:00
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int ret;
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2013-06-20 13:21:13 +08:00
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/*
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* When probing the root bridge, which doesn't have any
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* subordinate PCI devices. We don't have OF node for
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* the root bridge. So it's not reasonable to continue
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* the probing.
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*/
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powerpc/eeh: Use partial hotplug for EEH unaware drivers
When EEH error happens to one specific PE, some devices with drivers
supporting EEH won't except hotplug on the device. However, there
might have other deivces without driver, or with driver without EEH
support. For the case, we need do partial hotplug in order to make
sure that the PE becomes absolutely quite during reset. Otherise,
the PE reset might fail and leads to failure of error recovery.
The current code doesn't handle that 'mixed' case properly, it either
uses the error callbacks to the drivers, or tries hotplug, but doesn't
handle a PE (EEH domain) composed of a combination of the two.
The patch intends to support so-called "partial" hotplug for EEH:
Before we do reset, we stop and remove those PCI devices without
EEH sensitive driver. The corresponding EEH devices are not detached
from its PE, but with special flag. After the reset is done, those
EEH devices with the special flag will be scanned one by one.
Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-07-24 10:24:58 +08:00
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if (!dn || !edev || edev->pe)
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2013-06-20 13:21:13 +08:00
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return 0;
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/* Skip for PCI-ISA bridge */
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if ((dev->class >> 8) == PCI_CLASS_BRIDGE_ISA)
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return 0;
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/* Initialize eeh device */
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2013-07-24 10:25:01 +08:00
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edev->class_code = dev->class;
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edev->mode &= 0xFFFFFF00;
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2013-07-24 10:24:59 +08:00
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if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE)
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edev->mode |= EEH_DEV_BRIDGE;
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2014-04-24 16:00:16 +08:00
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edev->pcix_cap = pci_find_capability(dev, PCI_CAP_ID_PCIX);
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2013-07-24 10:24:59 +08:00
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if (pci_is_pcie(dev)) {
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edev->pcie_cap = pci_pcie_cap(dev);
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if (pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT)
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edev->mode |= EEH_DEV_ROOT_PORT;
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else if (pci_pcie_type(dev) == PCI_EXP_TYPE_DOWNSTREAM)
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edev->mode |= EEH_DEV_DS_PORT;
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2014-04-24 16:00:16 +08:00
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edev->aer_cap = pci_find_ext_capability(dev,
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PCI_EXT_CAP_ID_ERR);
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2013-07-24 10:24:59 +08:00
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}
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2013-06-20 13:21:13 +08:00
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edev->config_addr = ((dev->bus->number << 8) | dev->devfn);
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edev->pe_config_addr = phb->bdfn_to_pe(phb, dev->bus, dev->devfn & 0xff);
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/* Create PE */
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2014-06-26 14:58:47 +08:00
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ret = eeh_add_to_parent_pe(edev);
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if (ret) {
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pr_warn("%s: Can't add PCI dev %s to parent PE (%d)\n",
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__func__, pci_name(dev), ret);
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return ret;
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}
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2014-10-01 15:07:53 +08:00
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/*
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* If the PE contains any one of following adapters, the
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* PCI config space can't be accessed when dumping EEH log.
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* Otherwise, we will run into fenced PHB caused by shortage
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* of outbound credits in the adapter. The PCI config access
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* should be blocked until PE reset. MMIO access is dropped
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* by hardware certainly. In order to drop PCI config requests,
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* one more flag (EEH_PE_CFG_RESTRICTED) is introduced, which
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* will be checked in the backend for PE state retrival. If
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* the PE becomes frozen for the first time and the flag has
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* been set for the PE, we will set EEH_PE_CFG_BLOCKED for
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* that PE to block its config space.
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*
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* Broadcom Austin 4-ports NICs (14e4:1657)
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*/
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if (dev->vendor == PCI_VENDOR_ID_BROADCOM &&
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dev->device == 0x1657)
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edev->pe->state |= EEH_PE_CFG_RESTRICTED;
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2014-06-26 14:58:47 +08:00
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/*
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* Cache the PE primary bus, which can't be fetched when
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* full hotplug is in progress. In that case, all child
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* PCI devices of the PE are expected to be removed prior
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* to PE reset.
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*/
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if (!edev->pe->bus)
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edev->pe->bus = dev->bus;
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2013-06-20 13:21:13 +08:00
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/*
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* Enable EEH explicitly so that we will do EEH check
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* while accessing I/O stuff
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*/
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2014-07-17 12:41:38 +08:00
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eeh_add_flag(EEH_ENABLED);
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2013-06-20 13:21:13 +08:00
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/* Save memory bars */
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eeh_save_bars(edev);
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return 0;
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}
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/**
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* powernv_eeh_set_option - Initialize EEH or MMIO/DMA reenable
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* @pe: EEH PE
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* @option: operation to be issued
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*
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* The function is used to control the EEH functionality globally.
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* Currently, following options are support according to PAPR:
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* Enable EEH, Disable EEH, Enable MMIO and Enable DMA
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*/
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static int powernv_eeh_set_option(struct eeh_pe *pe, int option)
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{
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struct pci_controller *hose = pe->phb;
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struct pnv_phb *phb = hose->private_data;
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int ret = -EEXIST;
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/*
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* What we need do is pass it down for hardware
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* implementation to handle it.
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*/
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if (phb->eeh_ops && phb->eeh_ops->set_option)
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ret = phb->eeh_ops->set_option(pe, option);
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return ret;
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}
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/**
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* powernv_eeh_get_pe_addr - Retrieve PE address
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* @pe: EEH PE
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*
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* Retrieve the PE address according to the given tranditional
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* PCI BDF (Bus/Device/Function) address.
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*/
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static int powernv_eeh_get_pe_addr(struct eeh_pe *pe)
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{
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return pe->addr;
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}
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/**
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* powernv_eeh_get_state - Retrieve PE state
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* @pe: EEH PE
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* @delay: delay while PE state is temporarily unavailable
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*
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* Retrieve the state of the specified PE. For IODA-compitable
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* platform, it should be retrieved from IODA table. Therefore,
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* we prefer passing down to hardware implementation to handle
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* it.
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*/
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static int powernv_eeh_get_state(struct eeh_pe *pe, int *delay)
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{
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struct pci_controller *hose = pe->phb;
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struct pnv_phb *phb = hose->private_data;
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int ret = EEH_STATE_NOT_SUPPORT;
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if (phb->eeh_ops && phb->eeh_ops->get_state) {
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ret = phb->eeh_ops->get_state(pe);
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/*
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* If the PE state is temporarily unavailable,
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* to inform the EEH core delay for default
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* period (1 second)
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*/
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if (delay) {
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*delay = 0;
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if (ret & EEH_STATE_UNAVAILABLE)
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*delay = 1000;
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}
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}
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return ret;
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}
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/**
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* powernv_eeh_reset - Reset the specified PE
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* @pe: EEH PE
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* @option: reset option
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*
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* Reset the specified PE
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*/
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static int powernv_eeh_reset(struct eeh_pe *pe, int option)
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{
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struct pci_controller *hose = pe->phb;
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struct pnv_phb *phb = hose->private_data;
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int ret = -EEXIST;
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if (phb->eeh_ops && phb->eeh_ops->reset)
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ret = phb->eeh_ops->reset(pe, option);
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return ret;
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}
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/**
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* powernv_eeh_wait_state - Wait for PE state
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* @pe: EEH PE
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* @max_wait: maximal period in microsecond
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*
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* Wait for the state of associated PE. It might take some time
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* to retrieve the PE's state.
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*/
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static int powernv_eeh_wait_state(struct eeh_pe *pe, int max_wait)
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{
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int ret;
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int mwait;
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while (1) {
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ret = powernv_eeh_get_state(pe, &mwait);
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/*
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* If the PE's state is temporarily unavailable,
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* we have to wait for the specified time. Otherwise,
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* the PE's state will be returned immediately.
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*/
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if (ret != EEH_STATE_UNAVAILABLE)
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return ret;
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max_wait -= mwait;
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if (max_wait <= 0) {
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2014-07-17 12:41:41 +08:00
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pr_warn("%s: Timeout getting PE#%x's state (%d)\n",
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__func__, pe->addr, max_wait);
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2013-06-20 13:21:13 +08:00
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return EEH_STATE_NOT_SUPPORT;
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}
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msleep(mwait);
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}
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return EEH_STATE_NOT_SUPPORT;
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}
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/**
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* powernv_eeh_get_log - Retrieve error log
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* @pe: EEH PE
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|
|
|
* @severity: temporary or permanent error log
|
|
|
|
* @drv_log: driver log to be combined with retrieved error log
|
|
|
|
* @len: length of driver log
|
|
|
|
*
|
|
|
|
* Retrieve the temporary or permanent error from the PE.
|
|
|
|
*/
|
|
|
|
static int powernv_eeh_get_log(struct eeh_pe *pe, int severity,
|
2014-07-17 12:41:43 +08:00
|
|
|
char *drv_log, unsigned long len)
|
2013-06-20 13:21:13 +08:00
|
|
|
{
|
|
|
|
struct pci_controller *hose = pe->phb;
|
|
|
|
struct pnv_phb *phb = hose->private_data;
|
|
|
|
int ret = -EEXIST;
|
|
|
|
|
|
|
|
if (phb->eeh_ops && phb->eeh_ops->get_log)
|
|
|
|
ret = phb->eeh_ops->get_log(pe, severity, drv_log, len);
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* powernv_eeh_configure_bridge - Configure PCI bridges in the indicated PE
|
|
|
|
* @pe: EEH PE
|
|
|
|
*
|
|
|
|
* The function will be called to reconfigure the bridges included
|
|
|
|
* in the specified PE so that the mulfunctional PE would be recovered
|
|
|
|
* again.
|
|
|
|
*/
|
|
|
|
static int powernv_eeh_configure_bridge(struct eeh_pe *pe)
|
|
|
|
{
|
|
|
|
struct pci_controller *hose = pe->phb;
|
|
|
|
struct pnv_phb *phb = hose->private_data;
|
|
|
|
int ret = 0;
|
|
|
|
|
|
|
|
if (phb->eeh_ops && phb->eeh_ops->configure_bridge)
|
|
|
|
ret = phb->eeh_ops->configure_bridge(pe);
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2014-09-30 10:38:56 +08:00
|
|
|
/**
|
|
|
|
* powernv_pe_err_inject - Inject specified error to the indicated PE
|
|
|
|
* @pe: the indicated PE
|
|
|
|
* @type: error type
|
|
|
|
* @func: specific error type
|
|
|
|
* @addr: address
|
|
|
|
* @mask: address mask
|
|
|
|
*
|
|
|
|
* The routine is called to inject specified error, which is
|
|
|
|
* determined by @type and @func, to the indicated PE for
|
|
|
|
* testing purpose.
|
|
|
|
*/
|
|
|
|
static int powernv_eeh_err_inject(struct eeh_pe *pe, int type, int func,
|
|
|
|
unsigned long addr, unsigned long mask)
|
|
|
|
{
|
|
|
|
struct pci_controller *hose = pe->phb;
|
|
|
|
struct pnv_phb *phb = hose->private_data;
|
|
|
|
int ret = -EEXIST;
|
|
|
|
|
|
|
|
if (phb->eeh_ops && phb->eeh_ops->err_inject)
|
|
|
|
ret = phb->eeh_ops->err_inject(pe, type, func, addr, mask);
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2014-10-01 15:07:51 +08:00
|
|
|
static inline bool powernv_eeh_cfg_blocked(struct device_node *dn)
|
|
|
|
{
|
|
|
|
struct eeh_dev *edev = of_node_to_eeh_dev(dn);
|
|
|
|
|
|
|
|
if (!edev || !edev->pe)
|
|
|
|
return false;
|
|
|
|
|
|
|
|
if (edev->pe->state & EEH_PE_CFG_BLOCKED)
|
|
|
|
return true;
|
|
|
|
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int powernv_eeh_read_config(struct device_node *dn,
|
|
|
|
int where, int size, u32 *val)
|
|
|
|
{
|
|
|
|
if (powernv_eeh_cfg_blocked(dn)) {
|
|
|
|
*val = 0xFFFFFFFF;
|
|
|
|
return PCIBIOS_SET_FAILED;
|
|
|
|
}
|
|
|
|
|
|
|
|
return pnv_pci_cfg_read(dn, where, size, val);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int powernv_eeh_write_config(struct device_node *dn,
|
|
|
|
int where, int size, u32 val)
|
|
|
|
{
|
|
|
|
if (powernv_eeh_cfg_blocked(dn))
|
|
|
|
return PCIBIOS_SET_FAILED;
|
|
|
|
|
|
|
|
return pnv_pci_cfg_write(dn, where, size, val);
|
|
|
|
}
|
|
|
|
|
2013-06-20 13:21:13 +08:00
|
|
|
/**
|
|
|
|
* powernv_eeh_next_error - Retrieve next EEH error to handle
|
|
|
|
* @pe: Affected PE
|
|
|
|
*
|
|
|
|
* Using OPAL API, to retrieve next EEH error for EEH core to handle
|
|
|
|
*/
|
|
|
|
static int powernv_eeh_next_error(struct eeh_pe **pe)
|
|
|
|
{
|
|
|
|
struct pci_controller *hose;
|
|
|
|
struct pnv_phb *phb = NULL;
|
|
|
|
|
|
|
|
list_for_each_entry(hose, &hose_list, list_node) {
|
|
|
|
phb = hose->private_data;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (phb && phb->eeh_ops->next_error)
|
|
|
|
return phb->eeh_ops->next_error(pe);
|
|
|
|
|
|
|
|
return -EEXIST;
|
|
|
|
}
|
|
|
|
|
2014-01-03 17:47:13 +08:00
|
|
|
static int powernv_eeh_restore_config(struct device_node *dn)
|
|
|
|
{
|
|
|
|
struct eeh_dev *edev = of_node_to_eeh_dev(dn);
|
|
|
|
struct pnv_phb *phb;
|
|
|
|
s64 ret;
|
|
|
|
|
|
|
|
if (!edev)
|
|
|
|
return -EEXIST;
|
|
|
|
|
|
|
|
phb = edev->phb->private_data;
|
|
|
|
ret = opal_pci_reinit(phb->opal_id,
|
|
|
|
OPAL_REINIT_PCI_DEV, edev->config_addr);
|
|
|
|
if (ret) {
|
|
|
|
pr_warn("%s: Can't reinit PCI dev 0x%x (%lld)\n",
|
|
|
|
__func__, edev->config_addr, ret);
|
|
|
|
return -EIO;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2013-06-20 13:21:13 +08:00
|
|
|
static struct eeh_ops powernv_eeh_ops = {
|
|
|
|
.name = "powernv",
|
|
|
|
.init = powernv_eeh_init,
|
|
|
|
.post_init = powernv_eeh_post_init,
|
|
|
|
.of_probe = NULL,
|
|
|
|
.dev_probe = powernv_eeh_dev_probe,
|
|
|
|
.set_option = powernv_eeh_set_option,
|
|
|
|
.get_pe_addr = powernv_eeh_get_pe_addr,
|
|
|
|
.get_state = powernv_eeh_get_state,
|
|
|
|
.reset = powernv_eeh_reset,
|
|
|
|
.wait_state = powernv_eeh_wait_state,
|
|
|
|
.get_log = powernv_eeh_get_log,
|
|
|
|
.configure_bridge = powernv_eeh_configure_bridge,
|
2014-09-30 10:38:56 +08:00
|
|
|
.err_inject = powernv_eeh_err_inject,
|
2014-10-01 15:07:51 +08:00
|
|
|
.read_config = powernv_eeh_read_config,
|
|
|
|
.write_config = powernv_eeh_write_config,
|
2014-01-03 17:47:12 +08:00
|
|
|
.next_error = powernv_eeh_next_error,
|
2014-01-03 17:47:13 +08:00
|
|
|
.restore_config = powernv_eeh_restore_config
|
2013-06-20 13:21:13 +08:00
|
|
|
};
|
|
|
|
|
|
|
|
/**
|
|
|
|
* eeh_powernv_init - Register platform dependent EEH operations
|
|
|
|
*
|
|
|
|
* EEH initialization on powernv platform. This function should be
|
|
|
|
* called before any EEH related functions.
|
|
|
|
*/
|
|
|
|
static int __init eeh_powernv_init(void)
|
|
|
|
{
|
|
|
|
int ret = -EINVAL;
|
|
|
|
|
2014-07-17 12:41:43 +08:00
|
|
|
eeh_set_pe_aux_size(PNV_PCI_DIAG_BUF_SIZE);
|
2013-06-20 13:21:13 +08:00
|
|
|
ret = eeh_ops_register(&powernv_eeh_ops);
|
|
|
|
if (!ret)
|
|
|
|
pr_info("EEH: PowerNV platform initialized\n");
|
|
|
|
else
|
|
|
|
pr_info("EEH: Failed to initialize PowerNV platform (%d)\n", ret);
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
2014-07-15 20:22:24 +08:00
|
|
|
machine_early_initcall(powernv, eeh_powernv_init);
|