License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.
By default all files without license information are under the default
license of the kernel, which is GPL version 2.
Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier. The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.
This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.
How this work was done:
Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
- file had no licensing information it it.
- file was a */uapi/* one with no licensing information in it,
- file was a */uapi/* one with existing licensing information,
Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.
The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne. Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.
The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed. Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.
Criteria used to select files for SPDX license identifier tagging was:
- Files considered eligible had to be source code files.
- Make and config files were included as candidates if they contained >5
lines of source
- File already had some variant of a license header in it (even if <5
lines).
All documentation files were explicitly excluded.
The following heuristics were used to determine which SPDX license
identifiers to apply.
- when both scanners couldn't find any license traces, file was
considered to have no license information in it, and the top level
COPYING file license applied.
For non */uapi/* files that summary was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 11139
and resulted in the first patch in this series.
If that file was a */uapi/* path one, it was "GPL-2.0 WITH
Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 WITH Linux-syscall-note 930
and resulted in the second patch in this series.
- if a file had some form of licensing information in it, and was one
of the */uapi/* ones, it was denoted with the Linux-syscall-note if
any GPL family license was found in the file or had no licensing in
it (per prior point). Results summary:
SPDX license identifier # files
---------------------------------------------------|------
GPL-2.0 WITH Linux-syscall-note 270
GPL-2.0+ WITH Linux-syscall-note 169
((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21
((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17
LGPL-2.1+ WITH Linux-syscall-note 15
GPL-1.0+ WITH Linux-syscall-note 14
((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5
LGPL-2.0+ WITH Linux-syscall-note 4
LGPL-2.1 WITH Linux-syscall-note 3
((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3
((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1
and that resulted in the third patch in this series.
- when the two scanners agreed on the detected license(s), that became
the concluded license(s).
- when there was disagreement between the two scanners (one detected a
license but the other didn't, or they both detected different
licenses) a manual inspection of the file occurred.
- In most cases a manual inspection of the information in the file
resulted in a clear resolution of the license that should apply (and
which scanner probably needed to revisit its heuristics).
- When it was not immediately clear, the license identifier was
confirmed with lawyers working with the Linux Foundation.
- If there was any question as to the appropriate license identifier,
the file was flagged for further research and to be revisited later
in time.
In total, over 70 hours of logged manual review was done on the
spreadsheet to determine the SPDX license identifiers to apply to the
source files by Kate, Philippe, Thomas and, in some cases, confirmation
by lawyers working with the Linux Foundation.
Kate also obtained a third independent scan of the 4.13 code base from
FOSSology, and compared selected files where the other two scanners
disagreed against that SPDX file, to see if there was new insights. The
Windriver scanner is based on an older version of FOSSology in part, so
they are related.
Thomas did random spot checks in about 500 files from the spreadsheets
for the uapi headers and agreed with SPDX license identifier in the
files he inspected. For the non-uapi files Thomas did random spot checks
in about 15000 files.
In initial set of patches against 4.14-rc6, 3 files were found to have
copy/paste license identifier errors, and have been fixed to reflect the
correct identifier.
Additionally Philippe spent 10 hours this week doing a detailed manual
inspection and review of the 12,461 patched files from the initial patch
version early this week with:
- a full scancode scan run, collecting the matched texts, detected
license ids and scores
- reviewing anything where there was a license detected (about 500+
files) to ensure that the applied SPDX license was correct
- reviewing anything where there was no detection but the patch license
was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied
SPDX license was correct
This produced a worksheet with 20 files needing minor correction. This
worksheet was then exported into 3 different .csv files for the
different types of files to be modified.
These .csv files were then reviewed by Greg. Thomas wrote a script to
parse the csv files and add the proper SPDX tag to the file, in the
format that the file expected. This script was further refined by Greg
based on the output to detect more types of files automatically and to
distinguish between header and source .c files (which need different
comment types.) Finally Greg ran the script using the .csv files to
generate the patches.
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-01 22:07:57 +08:00
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/* SPDX-License-Identifier: GPL-2.0 */
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2008-10-23 13:26:29 +08:00
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#ifndef _ASM_X86_IO_H
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#define _ASM_X86_IO_H
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2008-03-19 08:00:15 +08:00
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2010-02-05 22:37:09 +08:00
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/*
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* This file contains the definitions for the x86 IO instructions
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* inb/inw/inl/outb/outw/outl and the "string versions" of the same
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* (insb/insw/insl/outsb/outsw/outsl). You can also use "pausing"
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* versions of the single-IO instructions (inb_p/inw_p/..).
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*
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* This file is not meant to be obfuscating: it's just complicated
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* to (a) handle it all in a way that makes gcc able to optimize it
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* as well as possible and (b) trying to avoid writing the same thing
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* over and over again with slight variations and possibly making a
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* mistake somewhere.
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*/
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/*
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* Thanks to James van Artsdalen for a better timing-fix than
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* the two short jumps: using outb's to a nonexistent port seems
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* to guarantee better timings even on fast machines.
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*
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* On the other hand, I'd like to be sure of a non-existent port:
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* I feel a bit unsafe about using 0x80 (should be safe, though)
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*
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* Linus
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*/
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/*
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* Bit simplified and optimized by Jan Hubicka
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* Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999.
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*
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* isa_memset_io, isa_memcpy_fromio, isa_memcpy_toio added,
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* isa_read[wl] and isa_write[wl] fixed
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* - Arnaldo Carvalho de Melo <acme@conectiva.com.br>
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*/
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2008-03-19 08:00:24 +08:00
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#define ARCH_HAS_IOREMAP_WC
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2015-06-05 00:55:15 +08:00
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#define ARCH_HAS_IOREMAP_WT
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2008-03-19 08:00:24 +08:00
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2010-02-05 22:37:09 +08:00
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#include <linux/string.h>
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2008-05-28 00:47:13 +08:00
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#include <linux/compiler.h>
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2009-02-07 05:29:44 +08:00
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#include <asm/page.h>
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2014-04-08 06:39:49 +08:00
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#include <asm/early_ioremap.h>
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2015-06-02 17:01:38 +08:00
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#include <asm/pgtable_types.h>
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2008-05-28 00:47:13 +08:00
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#define build_mmio_read(name, size, type, reg, barrier) \
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static inline type name(const volatile void __iomem *addr) \
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2008-08-14 03:07:07 +08:00
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{ type ret; asm volatile("mov" size " %1,%0":reg (ret) \
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2008-05-28 00:47:13 +08:00
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:"m" (*(volatile type __force *)addr) barrier); return ret; }
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#define build_mmio_write(name, size, type, reg, barrier) \
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static inline void name(type val, volatile void __iomem *addr) \
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{ asm volatile("mov" size " %0,%1": :reg (val), \
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"m" (*(volatile type __force *)addr) barrier); }
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2008-08-14 03:07:07 +08:00
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build_mmio_read(readb, "b", unsigned char, "=q", :"memory")
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build_mmio_read(readw, "w", unsigned short, "=r", :"memory")
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build_mmio_read(readl, "l", unsigned int, "=r", :"memory")
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2008-05-28 00:47:13 +08:00
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2008-08-14 03:07:07 +08:00
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build_mmio_read(__readb, "b", unsigned char, "=q", )
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build_mmio_read(__readw, "w", unsigned short, "=r", )
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build_mmio_read(__readl, "l", unsigned int, "=r", )
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2008-05-28 00:47:13 +08:00
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build_mmio_write(writeb, "b", unsigned char, "q", :"memory")
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build_mmio_write(writew, "w", unsigned short, "r", :"memory")
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build_mmio_write(writel, "l", unsigned int, "r", :"memory")
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build_mmio_write(__writeb, "b", unsigned char, "q", )
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build_mmio_write(__writew, "w", unsigned short, "r", )
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build_mmio_write(__writel, "l", unsigned int, "r", )
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2017-07-01 01:09:30 +08:00
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#define readb readb
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#define readw readw
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#define readl readl
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2008-05-28 00:47:13 +08:00
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#define readb_relaxed(a) __readb(a)
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#define readw_relaxed(a) __readw(a)
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#define readl_relaxed(a) __readl(a)
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#define __raw_readb __readb
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#define __raw_readw __readw
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#define __raw_readl __readl
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2017-07-01 01:09:30 +08:00
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#define writeb writeb
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#define writew writew
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#define writel writel
|
2013-09-04 18:34:08 +08:00
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#define writeb_relaxed(v, a) __writeb(v, a)
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#define writew_relaxed(v, a) __writew(v, a)
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#define writel_relaxed(v, a) __writel(v, a)
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2008-05-28 00:47:13 +08:00
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#define __raw_writeb __writeb
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#define __raw_writew __writew
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#define __raw_writel __writel
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#define mmiowb() barrier()
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#ifdef CONFIG_X86_64
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2008-11-30 17:20:20 +08:00
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2018-05-15 19:52:11 +08:00
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build_mmio_read(readq, "q", u64, "=r", :"memory")
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build_mmio_read(__readq, "q", u64, "=r", )
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build_mmio_write(writeq, "q", u64, "r", :"memory")
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build_mmio_write(__writeq, "q", u64, "r", )
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2008-05-28 00:47:13 +08:00
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2017-07-01 01:09:34 +08:00
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#define readq_relaxed(a) __readq(a)
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#define writeq_relaxed(v, a) __writeq(v, a)
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2008-11-30 17:20:20 +08:00
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2017-07-01 01:09:34 +08:00
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#define __raw_readq __readq
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#define __raw_writeq __writeq
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2008-11-30 17:20:20 +08:00
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2008-11-30 16:33:55 +08:00
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/* Let people know that we have them */
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2008-11-30 17:20:20 +08:00
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#define readq readq
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#define writeq writeq
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2008-11-30 16:16:04 +08:00
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2011-05-25 08:13:09 +08:00
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#endif
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2017-11-16 06:29:51 +08:00
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#define ARCH_HAS_VALID_PHYS_ADDR_RANGE
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extern int valid_phys_addr_range(phys_addr_t addr, size_t size);
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extern int valid_mmap_phys_addr_range(unsigned long pfn, size_t size);
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2009-02-07 05:29:44 +08:00
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/**
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* virt_to_phys - map virtual addresses to physical
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* @address: address to remap
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*
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* The returned physical address is the physical (CPU) mapping for
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* the memory address given. It is only valid to use this function on
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* addresses directly mapped or allocated via kmalloc.
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*
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* This function does not give bus mappings for DMA transfers. In
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* almost all conceivable cases a device driver should not be using
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* this function
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*/
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static inline phys_addr_t virt_to_phys(volatile void *address)
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{
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return __pa(address);
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}
|
2017-07-01 01:09:30 +08:00
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#define virt_to_phys virt_to_phys
|
2009-02-07 05:29:44 +08:00
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/**
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* phys_to_virt - map physical address to virtual
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* @address: address to remap
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*
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* The returned virtual address is a current CPU mapping for
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* the memory address given. It is only valid to use this function on
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* addresses that have a kernel mapping
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*
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* This function does not handle bus mappings for DMA transfers. In
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* almost all conceivable cases a device driver should not be using
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* this function
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*/
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static inline void *phys_to_virt(phys_addr_t address)
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{
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return __va(address);
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}
|
2017-07-01 01:09:30 +08:00
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#define phys_to_virt phys_to_virt
|
2009-02-07 05:29:44 +08:00
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/*
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* Change "struct page" to physical address.
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*/
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#define page_to_phys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT)
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/*
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* ISA I/O bus memory addresses are 1:1 with the physical address.
|
2009-02-18 05:01:51 +08:00
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* However, we truncate the address to unsigned int to avoid undesirable
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* promitions in legacy drivers.
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2009-02-07 05:29:44 +08:00
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*/
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2009-02-18 05:01:51 +08:00
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static inline unsigned int isa_virt_to_bus(volatile void *address)
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{
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return (unsigned int)virt_to_phys(address);
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}
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#define isa_page_to_bus(page) ((unsigned int)page_to_phys(page))
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#define isa_bus_to_virt phys_to_virt
|
2009-02-07 05:29:44 +08:00
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/*
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* However PCI ones are not necessarily 1:1 and therefore these interfaces
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* are forbidden in portable PCI drivers.
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*
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* Allow them on x86 for legacy drivers, though.
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*/
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#define virt_to_bus virt_to_phys
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#define bus_to_virt phys_to_virt
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|
2017-01-28 07:17:52 +08:00
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/*
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* The default ioremap() behavior is non-cached; if you need something
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* else, you probably want one of the following.
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*/
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extern void __iomem *ioremap_nocache(resource_size_t offset, unsigned long size);
|
2017-07-01 01:09:30 +08:00
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#define ioremap_nocache ioremap_nocache
|
2017-01-28 07:17:52 +08:00
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extern void __iomem *ioremap_uc(resource_size_t offset, unsigned long size);
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#define ioremap_uc ioremap_uc
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extern void __iomem *ioremap_cache(resource_size_t offset, unsigned long size);
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2017-07-01 01:09:30 +08:00
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#define ioremap_cache ioremap_cache
|
2017-01-28 07:17:52 +08:00
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extern void __iomem *ioremap_prot(resource_size_t offset, unsigned long size, unsigned long prot_val);
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2017-07-01 01:09:30 +08:00
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#define ioremap_prot ioremap_prot
|
2017-01-28 07:17:52 +08:00
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2009-02-07 05:29:52 +08:00
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/**
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* ioremap - map bus memory into CPU space
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* @offset: bus address of the memory
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* @size: size of the resource to map
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*
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* ioremap performs a platform specific sequence of operations to
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* make bus memory CPU accessible via the readb/readw/readl/writeb/
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* writew/writel functions and the other mmio helpers. The returned
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* address is not guaranteed to be usable directly as a virtual
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* address.
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*
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* If the area you are trying to map is a PCI BAR you should have a
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* look at pci_iomap().
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*/
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static inline void __iomem *ioremap(resource_size_t offset, unsigned long size)
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{
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return ioremap_nocache(offset, size);
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}
|
2017-07-01 01:09:30 +08:00
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#define ioremap ioremap
|
2009-02-07 05:29:52 +08:00
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extern void iounmap(volatile void __iomem *addr);
|
2017-07-01 01:09:30 +08:00
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#define iounmap iounmap
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2009-02-07 05:29:52 +08:00
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2010-09-17 00:44:02 +08:00
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extern void set_iounmap_nonlazy(void);
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2008-07-22 00:54:29 +08:00
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2010-02-05 22:37:09 +08:00
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#ifdef __KERNEL__
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#include <asm-generic/iomap.h>
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/*
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* ISA space is 'always mapped' on a typical x86 system, no need to
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* explicitly ioremap() it. The fact that the ISA IO space is mapped
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* to PAGE_OFFSET is pure coincidence - it does not mean ISA values
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* are physical addresses. The following constant pointer can be
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* used as the IO-area pointer (it can be iounmapped as well, so the
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* analogy with PCI is quite large):
|
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|
*/
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|
#define __ISA_IO_base ((char __iomem *)(PAGE_OFFSET))
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|
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|
#endif /* __KERNEL__ */
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|
extern void native_io_delay(void);
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|
extern int io_delay_type;
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|
extern void io_delay_init(void);
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|
|
#if defined(CONFIG_PARAVIRT)
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|
|
#include <asm/paravirt.h>
|
2007-10-11 17:20:03 +08:00
|
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|
#else
|
2010-02-05 22:37:09 +08:00
|
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|
|
static inline void slow_down_io(void)
|
|
|
|
{
|
|
|
|
native_io_delay();
|
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|
|
#ifdef REALLY_SLOW_IO
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|
native_io_delay();
|
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|
native_io_delay();
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|
|
native_io_delay();
|
2007-10-11 17:20:03 +08:00
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|
#endif
|
2010-02-05 22:37:09 +08:00
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|
}
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|
#endif
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|
2017-10-20 22:30:55 +08:00
|
|
|
#ifdef CONFIG_AMD_MEM_ENCRYPT
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|
|
#include <linux/jump_label.h>
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|
|
|
extern struct static_key_false sev_enable_key;
|
|
|
|
static inline bool sev_key_active(void)
|
|
|
|
{
|
|
|
|
return static_branch_unlikely(&sev_enable_key);
|
|
|
|
}
|
|
|
|
|
|
|
|
#else /* !CONFIG_AMD_MEM_ENCRYPT */
|
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|
|
|
|
static inline bool sev_key_active(void) { return false; }
|
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|
|
|
|
|
|
#endif /* CONFIG_AMD_MEM_ENCRYPT */
|
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|
|
2010-02-05 22:37:09 +08:00
|
|
|
#define BUILDIO(bwl, bw, type) \
|
|
|
|
static inline void out##bwl(unsigned type value, int port) \
|
|
|
|
{ \
|
|
|
|
asm volatile("out" #bwl " %" #bw "0, %w1" \
|
|
|
|
: : "a"(value), "Nd"(port)); \
|
|
|
|
} \
|
|
|
|
\
|
|
|
|
static inline unsigned type in##bwl(int port) \
|
|
|
|
{ \
|
|
|
|
unsigned type value; \
|
|
|
|
asm volatile("in" #bwl " %w1, %" #bw "0" \
|
|
|
|
: "=a"(value) : "Nd"(port)); \
|
|
|
|
return value; \
|
|
|
|
} \
|
|
|
|
\
|
|
|
|
static inline void out##bwl##_p(unsigned type value, int port) \
|
|
|
|
{ \
|
|
|
|
out##bwl(value, port); \
|
|
|
|
slow_down_io(); \
|
|
|
|
} \
|
|
|
|
\
|
|
|
|
static inline unsigned type in##bwl##_p(int port) \
|
|
|
|
{ \
|
|
|
|
unsigned type value = in##bwl(port); \
|
|
|
|
slow_down_io(); \
|
|
|
|
return value; \
|
|
|
|
} \
|
|
|
|
\
|
|
|
|
static inline void outs##bwl(int port, const void *addr, unsigned long count) \
|
|
|
|
{ \
|
2017-10-20 22:30:55 +08:00
|
|
|
if (sev_key_active()) { \
|
|
|
|
unsigned type *value = (unsigned type *)addr; \
|
|
|
|
while (count) { \
|
|
|
|
out##bwl(*value, port); \
|
|
|
|
value++; \
|
|
|
|
count--; \
|
|
|
|
} \
|
|
|
|
} else { \
|
|
|
|
asm volatile("rep; outs" #bwl \
|
|
|
|
: "+S"(addr), "+c"(count) \
|
|
|
|
: "d"(port) : "memory"); \
|
|
|
|
} \
|
2010-02-05 22:37:09 +08:00
|
|
|
} \
|
|
|
|
\
|
|
|
|
static inline void ins##bwl(int port, void *addr, unsigned long count) \
|
|
|
|
{ \
|
2017-10-20 22:30:55 +08:00
|
|
|
if (sev_key_active()) { \
|
|
|
|
unsigned type *value = (unsigned type *)addr; \
|
|
|
|
while (count) { \
|
|
|
|
*value = in##bwl(port); \
|
|
|
|
value++; \
|
|
|
|
count--; \
|
|
|
|
} \
|
|
|
|
} else { \
|
|
|
|
asm volatile("rep; ins" #bwl \
|
|
|
|
: "+D"(addr), "+c"(count) \
|
|
|
|
: "d"(port) : "memory"); \
|
|
|
|
} \
|
2010-02-05 22:37:09 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
BUILDIO(b, b, char)
|
|
|
|
BUILDIO(w, w, short)
|
|
|
|
BUILDIO(l, , int)
|
2008-03-19 08:00:15 +08:00
|
|
|
|
2017-07-01 01:09:30 +08:00
|
|
|
#define inb inb
|
|
|
|
#define inw inw
|
|
|
|
#define inl inl
|
|
|
|
#define inb_p inb_p
|
|
|
|
#define inw_p inw_p
|
|
|
|
#define inl_p inl_p
|
|
|
|
#define insb insb
|
|
|
|
#define insw insw
|
|
|
|
#define insl insl
|
|
|
|
|
|
|
|
#define outb outb
|
|
|
|
#define outw outw
|
|
|
|
#define outl outl
|
|
|
|
#define outb_p outb_p
|
|
|
|
#define outw_p outw_p
|
|
|
|
#define outl_p outl_p
|
|
|
|
#define outsb outsb
|
|
|
|
#define outsw outsw
|
|
|
|
#define outsl outsl
|
|
|
|
|
2014-07-28 23:20:33 +08:00
|
|
|
extern void *xlate_dev_mem_ptr(phys_addr_t phys);
|
|
|
|
extern void unxlate_dev_mem_ptr(phys_addr_t phys, void *addr);
|
2008-03-19 08:00:15 +08:00
|
|
|
|
2017-07-01 01:09:30 +08:00
|
|
|
#define xlate_dev_mem_ptr xlate_dev_mem_ptr
|
|
|
|
#define unxlate_dev_mem_ptr unxlate_dev_mem_ptr
|
|
|
|
|
2008-03-19 08:00:16 +08:00
|
|
|
extern int ioremap_change_attr(unsigned long vaddr, unsigned long size,
|
2014-11-03 21:01:58 +08:00
|
|
|
enum page_cache_mode pcm);
|
2009-01-10 08:13:13 +08:00
|
|
|
extern void __iomem *ioremap_wc(resource_size_t offset, unsigned long size);
|
2017-07-01 01:09:30 +08:00
|
|
|
#define ioremap_wc ioremap_wc
|
2015-06-05 00:55:15 +08:00
|
|
|
extern void __iomem *ioremap_wt(resource_size_t offset, unsigned long size);
|
2017-07-01 01:09:30 +08:00
|
|
|
#define ioremap_wt ioremap_wt
|
2008-03-19 08:00:16 +08:00
|
|
|
|
2010-10-14 07:02:24 +08:00
|
|
|
extern bool is_early_ioremap_ptep(pte_t *ptep);
|
2008-06-25 12:19:03 +08:00
|
|
|
|
2009-02-10 04:05:46 +08:00
|
|
|
#ifdef CONFIG_XEN
|
2011-08-04 16:00:38 +08:00
|
|
|
#include <xen/xen.h>
|
2009-02-10 04:05:46 +08:00
|
|
|
struct bio_vec;
|
|
|
|
|
|
|
|
extern bool xen_biovec_phys_mergeable(const struct bio_vec *vec1,
|
|
|
|
const struct bio_vec *vec2);
|
|
|
|
|
|
|
|
#define BIOVEC_PHYS_MERGEABLE(vec1, vec2) \
|
|
|
|
(__BIOVEC_PHYS_MERGEABLE(vec1, vec2) && \
|
|
|
|
(!xen_domain() || xen_biovec_phys_mergeable(vec1, vec2)))
|
|
|
|
#endif /* CONFIG_XEN */
|
|
|
|
|
2009-01-29 07:42:23 +08:00
|
|
|
#define IO_SPACE_LIMIT 0xffff
|
2008-06-25 12:19:03 +08:00
|
|
|
|
2017-07-01 01:09:31 +08:00
|
|
|
#include <asm-generic/io.h>
|
|
|
|
#undef PCI_IOBASE
|
|
|
|
|
2013-05-14 07:58:40 +08:00
|
|
|
#ifdef CONFIG_MTRR
|
2015-05-26 16:28:13 +08:00
|
|
|
extern int __must_check arch_phys_wc_index(int handle);
|
|
|
|
#define arch_phys_wc_index arch_phys_wc_index
|
|
|
|
|
2013-05-14 07:58:40 +08:00
|
|
|
extern int __must_check arch_phys_wc_add(unsigned long base,
|
|
|
|
unsigned long size);
|
|
|
|
extern void arch_phys_wc_del(int handle);
|
|
|
|
#define arch_phys_wc_add arch_phys_wc_add
|
|
|
|
#endif
|
|
|
|
|
2016-10-24 13:27:59 +08:00
|
|
|
#ifdef CONFIG_X86_PAT
|
|
|
|
extern int arch_io_reserve_memtype_wc(resource_size_t start, resource_size_t size);
|
|
|
|
extern void arch_io_free_memtype_wc(resource_size_t start, resource_size_t size);
|
|
|
|
#define arch_io_reserve_memtype_wc arch_io_reserve_memtype_wc
|
|
|
|
#endif
|
|
|
|
|
2017-07-18 05:10:16 +08:00
|
|
|
extern bool arch_memremap_can_ram_remap(resource_size_t offset,
|
|
|
|
unsigned long size,
|
|
|
|
unsigned long flags);
|
|
|
|
#define arch_memremap_can_ram_remap arch_memremap_can_ram_remap
|
|
|
|
|
2017-07-18 05:10:30 +08:00
|
|
|
extern bool phys_mem_access_encrypted(unsigned long phys_addr,
|
|
|
|
unsigned long size);
|
|
|
|
|
2008-10-23 13:26:29 +08:00
|
|
|
#endif /* _ASM_X86_IO_H */
|