2011-10-05 21:22:34 +08:00
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/*
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* Handles the M-Systems DiskOnChip G3 chip
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*
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* Copyright (C) 2011 Robert Jarzmik
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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*/
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#ifndef _MTD_DOCG3_H
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#define _MTD_DOCG3_H
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/*
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* Flash memory areas :
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* - 0x0000 .. 0x07ff : IPL
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* - 0x0800 .. 0x0fff : Data area
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* - 0x1000 .. 0x17ff : Registers
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* - 0x1800 .. 0x1fff : Unknown
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*/
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#define DOC_IOSPACE_IPL 0x0000
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#define DOC_IOSPACE_DATA 0x0800
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#define DOC_IOSPACE_SIZE 0x2000
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/*
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* DOC G3 layout and adressing scheme
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* A page address for the block "b", plane "P" and page "p":
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* address = [bbbb bPpp pppp]
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*/
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#define DOC_ADDR_PAGE_MASK 0x3f
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#define DOC_ADDR_BLOCK_SHIFT 6
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#define DOC_LAYOUT_NBPLANES 2
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#define DOC_LAYOUT_PAGES_PER_BLOCK 64
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#define DOC_LAYOUT_PAGE_SIZE 512
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#define DOC_LAYOUT_OOB_SIZE 16
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#define DOC_LAYOUT_WEAR_SIZE 8
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#define DOC_LAYOUT_PAGE_OOB_SIZE \
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(DOC_LAYOUT_PAGE_SIZE + DOC_LAYOUT_OOB_SIZE)
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#define DOC_LAYOUT_WEAR_OFFSET (DOC_LAYOUT_PAGE_OOB_SIZE * 2)
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#define DOC_LAYOUT_BLOCK_SIZE \
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(DOC_LAYOUT_PAGES_PER_BLOCK * DOC_LAYOUT_PAGE_SIZE)
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2011-11-19 23:02:55 +08:00
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/*
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* ECC related constants
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*/
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#define DOC_ECC_BCH_M 14
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#define DOC_ECC_BCH_T 4
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#define DOC_ECC_BCH_PRIMPOLY 0x4443
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2011-10-05 21:22:34 +08:00
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#define DOC_ECC_BCH_SIZE 7
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#define DOC_ECC_BCH_COVERED_BYTES \
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(DOC_LAYOUT_PAGE_SIZE + DOC_LAYOUT_OOB_PAGEINFO_SZ + \
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2011-11-19 23:02:55 +08:00
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DOC_LAYOUT_OOB_HAMMING_SZ)
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#define DOC_ECC_BCH_TOTAL_BYTES \
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(DOC_ECC_BCH_COVERED_BYTES + DOC_LAYOUT_OOB_BCH_SZ)
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2011-10-05 21:22:34 +08:00
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/*
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* Blocks distribution
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*/
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#define DOC_LAYOUT_BLOCK_BBT 0
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#define DOC_LAYOUT_BLOCK_OTP 0
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#define DOC_LAYOUT_BLOCK_FIRST_DATA 6
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#define DOC_LAYOUT_PAGE_BBT 4
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/*
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* Extra page OOB (16 bytes wide) layout
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*/
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#define DOC_LAYOUT_OOB_PAGEINFO_OFS 0
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#define DOC_LAYOUT_OOB_HAMMING_OFS 7
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#define DOC_LAYOUT_OOB_BCH_OFS 8
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#define DOC_LAYOUT_OOB_UNUSED_OFS 15
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#define DOC_LAYOUT_OOB_PAGEINFO_SZ 7
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#define DOC_LAYOUT_OOB_HAMMING_SZ 1
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#define DOC_LAYOUT_OOB_BCH_SZ 7
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#define DOC_LAYOUT_OOB_UNUSED_SZ 1
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#define DOC_CHIPID_G3 0x200
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#define DOC_ERASE_MARK 0xaa
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2011-11-19 23:02:48 +08:00
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#define DOC_MAX_NBFLOORS 4
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2011-10-05 21:22:34 +08:00
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/*
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* Flash registers
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*/
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#define DOC_CHIPID 0x1000
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#define DOC_TEST 0x1004
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#define DOC_BUSLOCK 0x1006
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#define DOC_ENDIANCONTROL 0x1008
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#define DOC_DEVICESELECT 0x100a
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#define DOC_ASICMODE 0x100c
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#define DOC_CONFIGURATION 0x100e
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#define DOC_INTERRUPTCONTROL 0x1010
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#define DOC_READADDRESS 0x101a
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#define DOC_DATAEND 0x101e
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#define DOC_INTERRUPTSTATUS 0x1020
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#define DOC_FLASHSEQUENCE 0x1032
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#define DOC_FLASHCOMMAND 0x1034
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#define DOC_FLASHADDRESS 0x1036
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#define DOC_FLASHCONTROL 0x1038
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#define DOC_NOP 0x103e
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#define DOC_ECCCONF0 0x1040
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#define DOC_ECCCONF1 0x1042
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#define DOC_ECCPRESET 0x1044
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#define DOC_HAMMINGPARITY 0x1046
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2011-12-03 03:00:12 +08:00
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#define DOC_BCH_HW_ECC(idx) (0x1048 + idx)
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2011-10-05 21:22:34 +08:00
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#define DOC_PROTECTION 0x1056
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2011-11-19 23:02:58 +08:00
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#define DOC_DPS0_KEY 0x105c
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#define DOC_DPS1_KEY 0x105e
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2011-10-05 21:22:34 +08:00
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#define DOC_DPS0_ADDRLOW 0x1060
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#define DOC_DPS0_ADDRHIGH 0x1062
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#define DOC_DPS1_ADDRLOW 0x1064
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#define DOC_DPS1_ADDRHIGH 0x1066
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#define DOC_DPS0_STATUS 0x106c
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#define DOC_DPS1_STATUS 0x106e
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#define DOC_ASICMODECONFIRM 0x1072
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#define DOC_CHIPID_INV 0x1074
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2011-11-19 23:02:56 +08:00
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#define DOC_POWERMODE 0x107c
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2011-10-05 21:22:34 +08:00
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/*
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* Flash sequences
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* A sequence is preset before one or more commands are input to the chip.
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*/
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#define DOC_SEQ_RESET 0x00
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#define DOC_SEQ_PAGE_SIZE_532 0x03
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mtd: docg3: add fast mode
Docg3 chips can work in 3 modes : normal MLC mode, fast
mode and reliable mode. Normally, as docg3 is a MLC chip, it
should be configured to work in normal mode.
In both normal mode, each page is distinct. This
means that writing to page 12 of blocks 14,15 writes only to
that page, and reading from page 12 of blocks 14,15 reads
only from that page.
In reliable and fast modes, pages are coupled by pairs, and
are clones one of each other. This means that the available
capacity of the chip is halved. Pages are coupled in each
block, and page of index 2*n contains the same data as page
2*n+1 of the same block.
In fast mode, the reads occur a bit faster, but are a bit
less reliable that in normal mode.
When reading from page 2*n, the chip reads bytes from both
page 2*n and page 2*n+1, makes a logical and for each byte,
and returns the result. As programming a page means
"clearing bits", even if a bit was not cleared on one page
because the flash is worn out, the other page has the bit
cleared, and the result of the "AND" gives a correct result.
When writing to page 2*n, the chip writes data to both page
2*n and page 2*n+1.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Reviewed-by: Ivan Djelic <ivan.djelic@parrot.com>
Reviewed-by: Mike Dunn <mikedunn@newsguy.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2011-11-19 23:02:57 +08:00
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#define DOC_SEQ_SET_FASTMODE 0x05
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#define DOC_SEQ_SET_RELIABLEMODE 0x09
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2011-10-05 21:22:34 +08:00
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#define DOC_SEQ_READ 0x12
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#define DOC_SEQ_SET_PLANE1 0x0e
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#define DOC_SEQ_SET_PLANE2 0x10
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#define DOC_SEQ_PAGE_SETUP 0x1d
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2011-11-19 23:02:50 +08:00
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#define DOC_SEQ_ERASE 0x27
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#define DOC_SEQ_PLANES_STATUS 0x31
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2011-10-05 21:22:34 +08:00
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/*
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* Flash commands
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*/
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#define DOC_CMD_READ_PLANE1 0x00
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#define DOC_CMD_SET_ADDR_READ 0x05
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#define DOC_CMD_READ_ALL_PLANES 0x30
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#define DOC_CMD_READ_PLANE2 0x50
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#define DOC_CMD_READ_FLASH 0xe0
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#define DOC_CMD_PAGE_SIZE_532 0x3c
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#define DOC_CMD_PROG_BLOCK_ADDR 0x60
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#define DOC_CMD_PROG_CYCLE1 0x80
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#define DOC_CMD_PROG_CYCLE2 0x10
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2011-11-19 23:02:50 +08:00
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#define DOC_CMD_PROG_CYCLE3 0x11
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2011-10-05 21:22:34 +08:00
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#define DOC_CMD_ERASECYCLE2 0xd0
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2011-11-19 23:02:50 +08:00
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#define DOC_CMD_READ_STATUS 0x70
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#define DOC_CMD_PLANES_STATUS 0x71
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2011-10-05 21:22:34 +08:00
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#define DOC_CMD_RELIABLE_MODE 0x22
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#define DOC_CMD_FAST_MODE 0xa2
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#define DOC_CMD_RESET 0xff
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/*
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* Flash register : DOC_FLASHCONTROL
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*/
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#define DOC_CTRL_VIOLATION 0x20
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#define DOC_CTRL_CE 0x10
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#define DOC_CTRL_UNKNOWN_BITS 0x08
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#define DOC_CTRL_PROTECTION_ERROR 0x04
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#define DOC_CTRL_SEQUENCE_ERROR 0x02
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#define DOC_CTRL_FLASHREADY 0x01
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/*
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* Flash register : DOC_ASICMODE
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*/
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#define DOC_ASICMODE_RESET 0x00
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#define DOC_ASICMODE_NORMAL 0x01
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#define DOC_ASICMODE_POWERDOWN 0x02
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#define DOC_ASICMODE_MDWREN 0x04
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#define DOC_ASICMODE_BDETCT_RESET 0x08
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#define DOC_ASICMODE_RSTIN_RESET 0x10
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#define DOC_ASICMODE_RAM_WE 0x20
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/*
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* Flash register : DOC_ECCCONF0
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*/
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2011-12-03 03:00:12 +08:00
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#define DOC_ECCCONF0_WRITE_MODE 0x0000
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2011-10-05 21:22:34 +08:00
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#define DOC_ECCCONF0_READ_MODE 0x8000
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#define DOC_ECCCONF0_AUTO_ECC_ENABLE 0x4000
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#define DOC_ECCCONF0_HAMMING_ENABLE 0x1000
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#define DOC_ECCCONF0_BCH_ENABLE 0x0800
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#define DOC_ECCCONF0_DATA_BYTES_MASK 0x07ff
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/*
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* Flash register : DOC_ECCCONF1
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*/
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#define DOC_ECCCONF1_BCH_SYNDROM_ERR 0x80
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#define DOC_ECCCONF1_UNKOWN1 0x40
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2011-11-19 23:02:50 +08:00
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#define DOC_ECCCONF1_PAGE_IS_WRITTEN 0x20
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2011-10-05 21:22:34 +08:00
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#define DOC_ECCCONF1_UNKOWN3 0x10
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#define DOC_ECCCONF1_HAMMING_BITS_MASK 0x0f
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/*
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* Flash register : DOC_PROTECTION
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*/
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#define DOC_PROTECT_FOUNDRY_OTP_LOCK 0x01
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#define DOC_PROTECT_CUSTOMER_OTP_LOCK 0x02
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#define DOC_PROTECT_LOCK_INPUT 0x04
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#define DOC_PROTECT_STICKY_LOCK 0x08
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#define DOC_PROTECT_PROTECTION_ENABLED 0x10
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#define DOC_PROTECT_IPL_DOWNLOAD_LOCK 0x20
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#define DOC_PROTECT_PROTECTION_ERROR 0x80
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/*
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* Flash register : DOC_DPS0_STATUS and DOC_DPS1_STATUS
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*/
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#define DOC_DPS_OTP_PROTECTED 0x01
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#define DOC_DPS_READ_PROTECTED 0x02
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#define DOC_DPS_WRITE_PROTECTED 0x04
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#define DOC_DPS_HW_LOCK_ENABLED 0x08
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#define DOC_DPS_KEY_OK 0x80
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/*
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* Flash register : DOC_CONFIGURATION
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*/
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#define DOC_CONF_IF_CFG 0x80
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#define DOC_CONF_MAX_ID_MASK 0x30
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#define DOC_CONF_VCCQ_3V 0x01
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/*
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* Flash register : DOC_READADDRESS
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*/
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#define DOC_READADDR_INC 0x8000
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#define DOC_READADDR_ONE_BYTE 0x4000
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#define DOC_READADDR_ADDR_MASK 0x1fff
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2011-11-19 23:02:56 +08:00
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/*
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* Flash register : DOC_POWERMODE
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*/
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#define DOC_POWERDOWN_READY 0x80
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2011-11-19 23:02:50 +08:00
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/*
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* Status of erase and write operation
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*/
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#define DOC_PLANES_STATUS_FAIL 0x01
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#define DOC_PLANES_STATUS_PLANE0_KO 0x02
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#define DOC_PLANES_STATUS_PLANE1_KO 0x04
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2011-11-19 23:02:58 +08:00
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/*
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* DPS key management
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*
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* Each floor of docg3 has 2 protection areas: DPS0 and DPS1. These areas span
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* across block boundaries, and define whether these blocks can be read or
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* written.
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* The definition is dynamically stored in page 0 of blocks (2,3) for DPS0, and
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* page 0 of blocks (4,5) for DPS1.
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*/
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#define DOC_LAYOUT_DPS_KEY_LENGTH 8
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2011-10-05 21:22:34 +08:00
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/**
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* struct docg3 - DiskOnChip driver private data
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* @dev: the device currently under control
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* @base: mapped IO space
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* @device_id: number of the cascaded DoCG3 device (0, 1, 2 or 3)
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* @if_cfg: if true, reads are on 16bits, else reads are on 8bits
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mtd: docg3: add fast mode
Docg3 chips can work in 3 modes : normal MLC mode, fast
mode and reliable mode. Normally, as docg3 is a MLC chip, it
should be configured to work in normal mode.
In both normal mode, each page is distinct. This
means that writing to page 12 of blocks 14,15 writes only to
that page, and reading from page 12 of blocks 14,15 reads
only from that page.
In reliable and fast modes, pages are coupled by pairs, and
are clones one of each other. This means that the available
capacity of the chip is halved. Pages are coupled in each
block, and page of index 2*n contains the same data as page
2*n+1 of the same block.
In fast mode, the reads occur a bit faster, but are a bit
less reliable that in normal mode.
When reading from page 2*n, the chip reads bytes from both
page 2*n and page 2*n+1, makes a logical and for each byte,
and returns the result. As programming a page means
"clearing bits", even if a bit was not cleared on one page
because the flash is worn out, the other page has the bit
cleared, and the result of the "AND" gives a correct result.
When writing to page 2*n, the chip writes data to both page
2*n and page 2*n+1.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Reviewed-by: Ivan Djelic <ivan.djelic@parrot.com>
Reviewed-by: Mike Dunn <mikedunn@newsguy.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2011-11-19 23:02:57 +08:00
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* @reliable: if 0, docg3 in normal mode, if 1 docg3 in fast mode, if 2 in
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* reliable mode
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* Fast mode implies more errors than normal mode.
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* Reliable mode implies that page 2*n and 2*n+1 are clones.
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2011-10-05 21:22:34 +08:00
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* @bbt: bad block table cache
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2011-11-19 23:02:51 +08:00
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* @oob_write_ofs: offset of the MTD where this OOB should belong (ie. in next
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* page_write)
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* @oob_autoecc: if 1, use only bytes 0-7, 15, and fill the others with HW ECC
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* if 0, use all the 16 bytes.
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* @oob_write_buf: prepared OOB for next page_write
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2011-10-05 21:22:34 +08:00
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* @debugfs_root: debugfs root node
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*/
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struct docg3 {
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struct device *dev;
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void __iomem *base;
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unsigned int device_id:4;
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unsigned int if_cfg:1;
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mtd: docg3: add fast mode
Docg3 chips can work in 3 modes : normal MLC mode, fast
mode and reliable mode. Normally, as docg3 is a MLC chip, it
should be configured to work in normal mode.
In both normal mode, each page is distinct. This
means that writing to page 12 of blocks 14,15 writes only to
that page, and reading from page 12 of blocks 14,15 reads
only from that page.
In reliable and fast modes, pages are coupled by pairs, and
are clones one of each other. This means that the available
capacity of the chip is halved. Pages are coupled in each
block, and page of index 2*n contains the same data as page
2*n+1 of the same block.
In fast mode, the reads occur a bit faster, but are a bit
less reliable that in normal mode.
When reading from page 2*n, the chip reads bytes from both
page 2*n and page 2*n+1, makes a logical and for each byte,
and returns the result. As programming a page means
"clearing bits", even if a bit was not cleared on one page
because the flash is worn out, the other page has the bit
cleared, and the result of the "AND" gives a correct result.
When writing to page 2*n, the chip writes data to both page
2*n and page 2*n+1.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Reviewed-by: Ivan Djelic <ivan.djelic@parrot.com>
Reviewed-by: Mike Dunn <mikedunn@newsguy.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2011-11-19 23:02:57 +08:00
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unsigned int reliable:2;
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2011-10-05 21:22:34 +08:00
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int max_block;
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u8 *bbt;
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2011-11-19 23:02:51 +08:00
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loff_t oob_write_ofs;
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int oob_autoecc;
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u8 oob_write_buf[DOC_LAYOUT_OOB_SIZE];
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2011-10-05 21:22:34 +08:00
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struct dentry *debugfs_root;
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};
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#define doc_err(fmt, arg...) dev_err(docg3->dev, (fmt), ## arg)
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#define doc_info(fmt, arg...) dev_info(docg3->dev, (fmt), ## arg)
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#define doc_dbg(fmt, arg...) dev_dbg(docg3->dev, (fmt), ## arg)
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#define doc_vdbg(fmt, arg...) dev_vdbg(docg3->dev, (fmt), ## arg)
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#define DEBUGFS_RO_ATTR(name, show_fct) \
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static int name##_open(struct inode *inode, struct file *file) \
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{ return single_open(file, show_fct, inode->i_private); } \
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static const struct file_operations name##_fops = { \
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.owner = THIS_MODULE, \
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.open = name##_open, \
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.llseek = seq_lseek, \
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.read = seq_read, \
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.release = single_release \
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};
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#endif
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/*
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* Trace events part
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*/
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#undef TRACE_SYSTEM
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#define TRACE_SYSTEM docg3
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#if !defined(_MTD_DOCG3_TRACE) || defined(TRACE_HEADER_MULTI_READ)
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#define _MTD_DOCG3_TRACE
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#include <linux/tracepoint.h>
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TRACE_EVENT(docg3_io,
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TP_PROTO(int op, int width, u16 reg, int val),
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TP_ARGS(op, width, reg, val),
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TP_STRUCT__entry(
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__field(int, op)
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__field(unsigned char, width)
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__field(u16, reg)
|
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__field(int, val)),
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TP_fast_assign(
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__entry->op = op;
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__entry->width = width;
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|
__entry->reg = reg;
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__entry->val = val;),
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TP_printk("docg3: %s%02d reg=%04x, val=%04x",
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__entry->op ? "write" : "read", __entry->width,
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__entry->reg, __entry->val)
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);
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#endif
|
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/* This part must be outside protection */
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|
|
#undef TRACE_INCLUDE_PATH
|
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|
|
#undef TRACE_INCLUDE_FILE
|
|
|
|
#define TRACE_INCLUDE_PATH .
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|
|
#define TRACE_INCLUDE_FILE docg3
|
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|
|
#include <trace/define_trace.h>
|