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linux-next/drivers/gpio/gpio-tnetv107x.c

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Davinci: tnetv107x initial gpio support This patch adds support for the tnetv107x gpio controller. Key differences between davinci and tnetv107x controllers: - register map - davinci's controller is organized into banks of 32 gpios, tnetv107x has a single space with arrays of registers for in, out, direction, etc. - davinci's controller has separate set/clear registers for output, tnetv107x has a single direct mapped register. This patch does not yet add gpio irq support on this controller. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-05-19 00:51:20 +08:00
/*
* Texas Instruments TNETV107X GPIO Controller
*
* Copyright (C) 2010 Texas Instruments
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation version 2.
*
* This program is distributed "as is" WITHOUT ANY WARRANTY of any
* kind, whether express or implied; without even the implied warranty
* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/gpio.h>
ARM: davinci: gpio: use gpiolib API instead of inline functions Remove NEED_MACH_GPIO_H config select option for ARCH_DAVINCI to start using gpiolib interface for davinci platforms. This makes it easier to use the gpio driver on other platforms as it breaks dependency on mach-davinci. Latencies for gpio_get/set APIs will increase. On measurement, latency was found to have increased by 18 microsecond with gpiolib API as compared to inline APIs. Measurement was done on DA850 EVM for gpio_get_value() API by taking the printk timing across the call with interrupts disabled. inline gpio API with interrupt disabled [ 29.734337] before gpio_get [ 29.736847] after gpio_get Time difference 0.00251 gpio library with interrupt disabled [ 272.876763] before gpio_get [ 272.879291] after gpio_get Time difference 0.002528 Latency increased by (0.002528 - 0.00251) = 18 microsecond. While at it, remove GPIO_TYPE_DAVINCI enum definition as gpio-davinci.c is converted to Linux device driver model. Signed-off-by: Philip Avinash <avinashphilip@ti.com> Signed-off-by: Lad, Prabhakar <prabhakar.csengg@gmail.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> [nsekhar@ti.com: minor edits to commit message] Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2013-08-18 13:19:03 +08:00
#include <linux/platform_data/gpio-davinci.h>
Davinci: tnetv107x initial gpio support This patch adds support for the tnetv107x gpio controller. Key differences between davinci and tnetv107x controllers: - register map - davinci's controller is organized into banks of 32 gpios, tnetv107x has a single space with arrays of registers for in, out, direction, etc. - davinci's controller has separate set/clear registers for output, tnetv107x has a single direct mapped register. This patch does not yet add gpio irq support on this controller. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-05-19 00:51:20 +08:00
#include <mach/common.h>
#include <mach/tnetv107x.h>
struct tnetv107x_gpio_regs {
u32 idver;
u32 data_in[3];
u32 data_out[3];
u32 direction[3];
u32 enable[3];
};
#define gpio_reg_index(gpio) ((gpio) >> 5)
#define gpio_reg_bit(gpio) BIT((gpio) & 0x1f)
#define gpio_reg_rmw(reg, mask, val) \
__raw_writel((__raw_readl(reg) & ~(mask)) | (val), (reg))
#define gpio_reg_set_bit(reg, gpio) \
gpio_reg_rmw((reg) + gpio_reg_index(gpio), 0, gpio_reg_bit(gpio))
#define gpio_reg_clear_bit(reg, gpio) \
gpio_reg_rmw((reg) + gpio_reg_index(gpio), gpio_reg_bit(gpio), 0)
#define gpio_reg_get_bit(reg, gpio) \
(__raw_readl((reg) + gpio_reg_index(gpio)) & gpio_reg_bit(gpio))
#define chip2controller(chip) \
container_of(chip, struct davinci_gpio_controller, chip)
#define TNETV107X_GPIO_CTLRS DIV_ROUND_UP(TNETV107X_N_GPIO, 32)
static struct davinci_gpio_controller chips[TNETV107X_GPIO_CTLRS];
static int tnetv107x_gpio_request(struct gpio_chip *chip, unsigned offset)
{
struct davinci_gpio_controller *ctlr = chip2controller(chip);
struct tnetv107x_gpio_regs __iomem *regs = ctlr->regs;
unsigned gpio = chip->base + offset;
unsigned long flags;
spin_lock_irqsave(&ctlr->lock, flags);
davinci: tnetv107x: fix register indexing for GPIOs numbers > 31 This patch fix a bug in the register indexing for GPIOs numbers > 31 to get the relevant hardware registers of tnetv107x to control the GPIOs. In the structure tnetv107x_gpio_regs: struct tnetv107x_gpio_regs { u32 idver; u32 data_in[3]; u32 data_out[3]; u32 direction[3]; u32 enable[3]; }; The GPIO hardware register addresses of tnetv107x are stored. The chip implements 3 registers of each entity to serve 96 GPIOs, each register provides a subset of 32 GPIOs. The driver provides these macros: gpio_reg_set_bit, gpio_reg_get_bit and gpio_reg_clear_bit. The bug implied the use of macros to access the relevant hardware register e.g. the driver code used the macro like this: 'gpio_reg_clear_bit(&reg->data_out, gpio)' But it has to be used like this: 'gpio_reg_clear_bit(reg->data_out, gpio)'. The different results are shown here: - &reg->data_out + 1 (it will add the full array size of data_out i.e. 12 bytes) - reg->data_out + 1 (it will increment only the size of data_out i.e. only 4 bytes) Acked-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Hirosh Dabui <hirosh.dabui@snom.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
2011-01-26 06:05:26 +08:00
gpio_reg_set_bit(regs->enable, gpio);
Davinci: tnetv107x initial gpio support This patch adds support for the tnetv107x gpio controller. Key differences between davinci and tnetv107x controllers: - register map - davinci's controller is organized into banks of 32 gpios, tnetv107x has a single space with arrays of registers for in, out, direction, etc. - davinci's controller has separate set/clear registers for output, tnetv107x has a single direct mapped register. This patch does not yet add gpio irq support on this controller. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-05-19 00:51:20 +08:00
spin_unlock_irqrestore(&ctlr->lock, flags);
return 0;
}
static void tnetv107x_gpio_free(struct gpio_chip *chip, unsigned offset)
{
struct davinci_gpio_controller *ctlr = chip2controller(chip);
struct tnetv107x_gpio_regs __iomem *regs = ctlr->regs;
unsigned gpio = chip->base + offset;
unsigned long flags;
spin_lock_irqsave(&ctlr->lock, flags);
davinci: tnetv107x: fix register indexing for GPIOs numbers > 31 This patch fix a bug in the register indexing for GPIOs numbers > 31 to get the relevant hardware registers of tnetv107x to control the GPIOs. In the structure tnetv107x_gpio_regs: struct tnetv107x_gpio_regs { u32 idver; u32 data_in[3]; u32 data_out[3]; u32 direction[3]; u32 enable[3]; }; The GPIO hardware register addresses of tnetv107x are stored. The chip implements 3 registers of each entity to serve 96 GPIOs, each register provides a subset of 32 GPIOs. The driver provides these macros: gpio_reg_set_bit, gpio_reg_get_bit and gpio_reg_clear_bit. The bug implied the use of macros to access the relevant hardware register e.g. the driver code used the macro like this: 'gpio_reg_clear_bit(&reg->data_out, gpio)' But it has to be used like this: 'gpio_reg_clear_bit(reg->data_out, gpio)'. The different results are shown here: - &reg->data_out + 1 (it will add the full array size of data_out i.e. 12 bytes) - reg->data_out + 1 (it will increment only the size of data_out i.e. only 4 bytes) Acked-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Hirosh Dabui <hirosh.dabui@snom.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
2011-01-26 06:05:26 +08:00
gpio_reg_clear_bit(regs->enable, gpio);
Davinci: tnetv107x initial gpio support This patch adds support for the tnetv107x gpio controller. Key differences between davinci and tnetv107x controllers: - register map - davinci's controller is organized into banks of 32 gpios, tnetv107x has a single space with arrays of registers for in, out, direction, etc. - davinci's controller has separate set/clear registers for output, tnetv107x has a single direct mapped register. This patch does not yet add gpio irq support on this controller. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-05-19 00:51:20 +08:00
spin_unlock_irqrestore(&ctlr->lock, flags);
}
static int tnetv107x_gpio_dir_in(struct gpio_chip *chip, unsigned offset)
{
struct davinci_gpio_controller *ctlr = chip2controller(chip);
struct tnetv107x_gpio_regs __iomem *regs = ctlr->regs;
unsigned gpio = chip->base + offset;
unsigned long flags;
spin_lock_irqsave(&ctlr->lock, flags);
davinci: tnetv107x: fix register indexing for GPIOs numbers > 31 This patch fix a bug in the register indexing for GPIOs numbers > 31 to get the relevant hardware registers of tnetv107x to control the GPIOs. In the structure tnetv107x_gpio_regs: struct tnetv107x_gpio_regs { u32 idver; u32 data_in[3]; u32 data_out[3]; u32 direction[3]; u32 enable[3]; }; The GPIO hardware register addresses of tnetv107x are stored. The chip implements 3 registers of each entity to serve 96 GPIOs, each register provides a subset of 32 GPIOs. The driver provides these macros: gpio_reg_set_bit, gpio_reg_get_bit and gpio_reg_clear_bit. The bug implied the use of macros to access the relevant hardware register e.g. the driver code used the macro like this: 'gpio_reg_clear_bit(&reg->data_out, gpio)' But it has to be used like this: 'gpio_reg_clear_bit(reg->data_out, gpio)'. The different results are shown here: - &reg->data_out + 1 (it will add the full array size of data_out i.e. 12 bytes) - reg->data_out + 1 (it will increment only the size of data_out i.e. only 4 bytes) Acked-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Hirosh Dabui <hirosh.dabui@snom.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
2011-01-26 06:05:26 +08:00
gpio_reg_set_bit(regs->direction, gpio);
Davinci: tnetv107x initial gpio support This patch adds support for the tnetv107x gpio controller. Key differences between davinci and tnetv107x controllers: - register map - davinci's controller is organized into banks of 32 gpios, tnetv107x has a single space with arrays of registers for in, out, direction, etc. - davinci's controller has separate set/clear registers for output, tnetv107x has a single direct mapped register. This patch does not yet add gpio irq support on this controller. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-05-19 00:51:20 +08:00
spin_unlock_irqrestore(&ctlr->lock, flags);
return 0;
}
static int tnetv107x_gpio_dir_out(struct gpio_chip *chip,
unsigned offset, int value)
{
struct davinci_gpio_controller *ctlr = chip2controller(chip);
struct tnetv107x_gpio_regs __iomem *regs = ctlr->regs;
unsigned gpio = chip->base + offset;
unsigned long flags;
spin_lock_irqsave(&ctlr->lock, flags);
if (value)
davinci: tnetv107x: fix register indexing for GPIOs numbers > 31 This patch fix a bug in the register indexing for GPIOs numbers > 31 to get the relevant hardware registers of tnetv107x to control the GPIOs. In the structure tnetv107x_gpio_regs: struct tnetv107x_gpio_regs { u32 idver; u32 data_in[3]; u32 data_out[3]; u32 direction[3]; u32 enable[3]; }; The GPIO hardware register addresses of tnetv107x are stored. The chip implements 3 registers of each entity to serve 96 GPIOs, each register provides a subset of 32 GPIOs. The driver provides these macros: gpio_reg_set_bit, gpio_reg_get_bit and gpio_reg_clear_bit. The bug implied the use of macros to access the relevant hardware register e.g. the driver code used the macro like this: 'gpio_reg_clear_bit(&reg->data_out, gpio)' But it has to be used like this: 'gpio_reg_clear_bit(reg->data_out, gpio)'. The different results are shown here: - &reg->data_out + 1 (it will add the full array size of data_out i.e. 12 bytes) - reg->data_out + 1 (it will increment only the size of data_out i.e. only 4 bytes) Acked-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Hirosh Dabui <hirosh.dabui@snom.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
2011-01-26 06:05:26 +08:00
gpio_reg_set_bit(regs->data_out, gpio);
Davinci: tnetv107x initial gpio support This patch adds support for the tnetv107x gpio controller. Key differences between davinci and tnetv107x controllers: - register map - davinci's controller is organized into banks of 32 gpios, tnetv107x has a single space with arrays of registers for in, out, direction, etc. - davinci's controller has separate set/clear registers for output, tnetv107x has a single direct mapped register. This patch does not yet add gpio irq support on this controller. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-05-19 00:51:20 +08:00
else
davinci: tnetv107x: fix register indexing for GPIOs numbers > 31 This patch fix a bug in the register indexing for GPIOs numbers > 31 to get the relevant hardware registers of tnetv107x to control the GPIOs. In the structure tnetv107x_gpio_regs: struct tnetv107x_gpio_regs { u32 idver; u32 data_in[3]; u32 data_out[3]; u32 direction[3]; u32 enable[3]; }; The GPIO hardware register addresses of tnetv107x are stored. The chip implements 3 registers of each entity to serve 96 GPIOs, each register provides a subset of 32 GPIOs. The driver provides these macros: gpio_reg_set_bit, gpio_reg_get_bit and gpio_reg_clear_bit. The bug implied the use of macros to access the relevant hardware register e.g. the driver code used the macro like this: 'gpio_reg_clear_bit(&reg->data_out, gpio)' But it has to be used like this: 'gpio_reg_clear_bit(reg->data_out, gpio)'. The different results are shown here: - &reg->data_out + 1 (it will add the full array size of data_out i.e. 12 bytes) - reg->data_out + 1 (it will increment only the size of data_out i.e. only 4 bytes) Acked-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Hirosh Dabui <hirosh.dabui@snom.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
2011-01-26 06:05:26 +08:00
gpio_reg_clear_bit(regs->data_out, gpio);
Davinci: tnetv107x initial gpio support This patch adds support for the tnetv107x gpio controller. Key differences between davinci and tnetv107x controllers: - register map - davinci's controller is organized into banks of 32 gpios, tnetv107x has a single space with arrays of registers for in, out, direction, etc. - davinci's controller has separate set/clear registers for output, tnetv107x has a single direct mapped register. This patch does not yet add gpio irq support on this controller. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-05-19 00:51:20 +08:00
davinci: tnetv107x: fix register indexing for GPIOs numbers > 31 This patch fix a bug in the register indexing for GPIOs numbers > 31 to get the relevant hardware registers of tnetv107x to control the GPIOs. In the structure tnetv107x_gpio_regs: struct tnetv107x_gpio_regs { u32 idver; u32 data_in[3]; u32 data_out[3]; u32 direction[3]; u32 enable[3]; }; The GPIO hardware register addresses of tnetv107x are stored. The chip implements 3 registers of each entity to serve 96 GPIOs, each register provides a subset of 32 GPIOs. The driver provides these macros: gpio_reg_set_bit, gpio_reg_get_bit and gpio_reg_clear_bit. The bug implied the use of macros to access the relevant hardware register e.g. the driver code used the macro like this: 'gpio_reg_clear_bit(&reg->data_out, gpio)' But it has to be used like this: 'gpio_reg_clear_bit(reg->data_out, gpio)'. The different results are shown here: - &reg->data_out + 1 (it will add the full array size of data_out i.e. 12 bytes) - reg->data_out + 1 (it will increment only the size of data_out i.e. only 4 bytes) Acked-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Hirosh Dabui <hirosh.dabui@snom.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
2011-01-26 06:05:26 +08:00
gpio_reg_clear_bit(regs->direction, gpio);
Davinci: tnetv107x initial gpio support This patch adds support for the tnetv107x gpio controller. Key differences between davinci and tnetv107x controllers: - register map - davinci's controller is organized into banks of 32 gpios, tnetv107x has a single space with arrays of registers for in, out, direction, etc. - davinci's controller has separate set/clear registers for output, tnetv107x has a single direct mapped register. This patch does not yet add gpio irq support on this controller. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-05-19 00:51:20 +08:00
spin_unlock_irqrestore(&ctlr->lock, flags);
return 0;
}
static int tnetv107x_gpio_get(struct gpio_chip *chip, unsigned offset)
{
struct davinci_gpio_controller *ctlr = chip2controller(chip);
struct tnetv107x_gpio_regs __iomem *regs = ctlr->regs;
unsigned gpio = chip->base + offset;
int ret;
davinci: tnetv107x: fix register indexing for GPIOs numbers > 31 This patch fix a bug in the register indexing for GPIOs numbers > 31 to get the relevant hardware registers of tnetv107x to control the GPIOs. In the structure tnetv107x_gpio_regs: struct tnetv107x_gpio_regs { u32 idver; u32 data_in[3]; u32 data_out[3]; u32 direction[3]; u32 enable[3]; }; The GPIO hardware register addresses of tnetv107x are stored. The chip implements 3 registers of each entity to serve 96 GPIOs, each register provides a subset of 32 GPIOs. The driver provides these macros: gpio_reg_set_bit, gpio_reg_get_bit and gpio_reg_clear_bit. The bug implied the use of macros to access the relevant hardware register e.g. the driver code used the macro like this: 'gpio_reg_clear_bit(&reg->data_out, gpio)' But it has to be used like this: 'gpio_reg_clear_bit(reg->data_out, gpio)'. The different results are shown here: - &reg->data_out + 1 (it will add the full array size of data_out i.e. 12 bytes) - reg->data_out + 1 (it will increment only the size of data_out i.e. only 4 bytes) Acked-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Hirosh Dabui <hirosh.dabui@snom.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
2011-01-26 06:05:26 +08:00
ret = gpio_reg_get_bit(regs->data_in, gpio);
Davinci: tnetv107x initial gpio support This patch adds support for the tnetv107x gpio controller. Key differences between davinci and tnetv107x controllers: - register map - davinci's controller is organized into banks of 32 gpios, tnetv107x has a single space with arrays of registers for in, out, direction, etc. - davinci's controller has separate set/clear registers for output, tnetv107x has a single direct mapped register. This patch does not yet add gpio irq support on this controller. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-05-19 00:51:20 +08:00
return ret ? 1 : 0;
}
static void tnetv107x_gpio_set(struct gpio_chip *chip,
unsigned offset, int value)
{
struct davinci_gpio_controller *ctlr = chip2controller(chip);
struct tnetv107x_gpio_regs __iomem *regs = ctlr->regs;
unsigned gpio = chip->base + offset;
unsigned long flags;
spin_lock_irqsave(&ctlr->lock, flags);
if (value)
davinci: tnetv107x: fix register indexing for GPIOs numbers > 31 This patch fix a bug in the register indexing for GPIOs numbers > 31 to get the relevant hardware registers of tnetv107x to control the GPIOs. In the structure tnetv107x_gpio_regs: struct tnetv107x_gpio_regs { u32 idver; u32 data_in[3]; u32 data_out[3]; u32 direction[3]; u32 enable[3]; }; The GPIO hardware register addresses of tnetv107x are stored. The chip implements 3 registers of each entity to serve 96 GPIOs, each register provides a subset of 32 GPIOs. The driver provides these macros: gpio_reg_set_bit, gpio_reg_get_bit and gpio_reg_clear_bit. The bug implied the use of macros to access the relevant hardware register e.g. the driver code used the macro like this: 'gpio_reg_clear_bit(&reg->data_out, gpio)' But it has to be used like this: 'gpio_reg_clear_bit(reg->data_out, gpio)'. The different results are shown here: - &reg->data_out + 1 (it will add the full array size of data_out i.e. 12 bytes) - reg->data_out + 1 (it will increment only the size of data_out i.e. only 4 bytes) Acked-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Hirosh Dabui <hirosh.dabui@snom.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
2011-01-26 06:05:26 +08:00
gpio_reg_set_bit(regs->data_out, gpio);
Davinci: tnetv107x initial gpio support This patch adds support for the tnetv107x gpio controller. Key differences between davinci and tnetv107x controllers: - register map - davinci's controller is organized into banks of 32 gpios, tnetv107x has a single space with arrays of registers for in, out, direction, etc. - davinci's controller has separate set/clear registers for output, tnetv107x has a single direct mapped register. This patch does not yet add gpio irq support on this controller. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-05-19 00:51:20 +08:00
else
davinci: tnetv107x: fix register indexing for GPIOs numbers > 31 This patch fix a bug in the register indexing for GPIOs numbers > 31 to get the relevant hardware registers of tnetv107x to control the GPIOs. In the structure tnetv107x_gpio_regs: struct tnetv107x_gpio_regs { u32 idver; u32 data_in[3]; u32 data_out[3]; u32 direction[3]; u32 enable[3]; }; The GPIO hardware register addresses of tnetv107x are stored. The chip implements 3 registers of each entity to serve 96 GPIOs, each register provides a subset of 32 GPIOs. The driver provides these macros: gpio_reg_set_bit, gpio_reg_get_bit and gpio_reg_clear_bit. The bug implied the use of macros to access the relevant hardware register e.g. the driver code used the macro like this: 'gpio_reg_clear_bit(&reg->data_out, gpio)' But it has to be used like this: 'gpio_reg_clear_bit(reg->data_out, gpio)'. The different results are shown here: - &reg->data_out + 1 (it will add the full array size of data_out i.e. 12 bytes) - reg->data_out + 1 (it will increment only the size of data_out i.e. only 4 bytes) Acked-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Hirosh Dabui <hirosh.dabui@snom.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
2011-01-26 06:05:26 +08:00
gpio_reg_clear_bit(regs->data_out, gpio);
Davinci: tnetv107x initial gpio support This patch adds support for the tnetv107x gpio controller. Key differences between davinci and tnetv107x controllers: - register map - davinci's controller is organized into banks of 32 gpios, tnetv107x has a single space with arrays of registers for in, out, direction, etc. - davinci's controller has separate set/clear registers for output, tnetv107x has a single direct mapped register. This patch does not yet add gpio irq support on this controller. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-05-19 00:51:20 +08:00
spin_unlock_irqrestore(&ctlr->lock, flags);
}
static int __init tnetv107x_gpio_setup(void)
{
int i, base;
unsigned ngpio;
struct davinci_soc_info *soc_info = &davinci_soc_info;
struct tnetv107x_gpio_regs *regs;
struct davinci_gpio_controller *ctlr;
if (soc_info->gpio_type != GPIO_TYPE_TNETV107X)
return 0;
ngpio = soc_info->gpio_num;
if (ngpio == 0) {
pr_err("GPIO setup: how many GPIOs?\n");
return -EINVAL;
}
if (WARN_ON(TNETV107X_N_GPIO < ngpio))
ngpio = TNETV107X_N_GPIO;
regs = ioremap(soc_info->gpio_base, SZ_4K);
if (WARN_ON(!regs))
return -EINVAL;
for (i = 0, base = 0; base < ngpio; i++, base += 32) {
ctlr = &chips[i];
ctlr->chip.label = "tnetv107x";
ctlr->chip.can_sleep = 0;
ctlr->chip.base = base;
ctlr->chip.ngpio = ngpio - base;
if (ctlr->chip.ngpio > 32)
ctlr->chip.ngpio = 32;
ctlr->chip.request = tnetv107x_gpio_request;
ctlr->chip.free = tnetv107x_gpio_free;
ctlr->chip.direction_input = tnetv107x_gpio_dir_in;
ctlr->chip.get = tnetv107x_gpio_get;
ctlr->chip.direction_output = tnetv107x_gpio_dir_out;
ctlr->chip.set = tnetv107x_gpio_set;
spin_lock_init(&ctlr->lock);
ctlr->regs = regs;
ctlr->set_data = &regs->data_out[i];
ctlr->clr_data = &regs->data_out[i];
ctlr->in_data = &regs->data_in[i];
gpiochip_add(&ctlr->chip);
}
soc_info->gpio_ctlrs = chips;
soc_info->gpio_ctlrs_num = DIV_ROUND_UP(ngpio, 32);
return 0;
}
pure_initcall(tnetv107x_gpio_setup);
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