2006-03-30 07:23:28 +08:00
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/*
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2006-07-01 19:35:49 +08:00
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* Copyright (c) 2006 QLogic, Inc. All rights reserved.
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2006-03-30 07:23:28 +08:00
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* Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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/*
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* This file contains support for diagnostic functions. It is accessed by
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* opening the ipath_diag device, normally minor number 129. Diagnostic use
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* of the InfiniPath chip may render the chip or board unusable until the
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* driver is unloaded, or in some cases, until the system is rebooted.
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*
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* Accesses to the chip through this interface are not similar to going
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* through the /sys/bus/pci resource mmap interface.
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*/
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2006-08-26 02:24:36 +08:00
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#include <linux/io.h>
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2006-03-30 07:23:28 +08:00
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#include <linux/pci.h>
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2006-09-23 23:44:16 +08:00
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#include <linux/vmalloc.h>
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2006-03-30 07:23:28 +08:00
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#include <asm/uaccess.h>
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#include "ipath_kernel.h"
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2006-07-01 19:36:17 +08:00
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#include "ipath_common.h"
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2006-03-30 07:23:28 +08:00
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int ipath_diag_inuse;
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static int diag_set_link;
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static int ipath_diag_open(struct inode *in, struct file *fp);
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static int ipath_diag_release(struct inode *in, struct file *fp);
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static ssize_t ipath_diag_read(struct file *fp, char __user *data,
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size_t count, loff_t *off);
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static ssize_t ipath_diag_write(struct file *fp, const char __user *data,
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size_t count, loff_t *off);
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static struct file_operations diag_file_ops = {
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.owner = THIS_MODULE,
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.write = ipath_diag_write,
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.read = ipath_diag_read,
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.open = ipath_diag_open,
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.release = ipath_diag_release
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};
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2006-07-01 19:35:52 +08:00
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int ipath_diag_add(struct ipath_devdata *dd)
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2006-03-30 07:23:28 +08:00
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{
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2006-07-01 19:35:52 +08:00
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char name[16];
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snprintf(name, sizeof(name), "ipath_diag%d", dd->ipath_unit);
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return ipath_cdev_init(IPATH_DIAG_MINOR_BASE + dd->ipath_unit, name,
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&diag_file_ops, &dd->diag_cdev,
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&dd->diag_class_dev);
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2006-03-30 07:23:28 +08:00
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}
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2006-07-01 19:35:52 +08:00
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void ipath_diag_remove(struct ipath_devdata *dd)
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2006-03-30 07:23:28 +08:00
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{
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2006-07-01 19:35:52 +08:00
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ipath_cdev_cleanup(&dd->diag_cdev, &dd->diag_class_dev);
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2006-03-30 07:23:28 +08:00
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}
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/**
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* ipath_read_umem64 - read a 64-bit quantity from the chip into user space
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* @dd: the infinipath device
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* @uaddr: the location to store the data in user memory
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* @caddr: the source chip address (full pointer, not offset)
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* @count: number of bytes to copy (multiple of 32 bits)
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*
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* This function also localizes all chip memory accesses.
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* The copy should be written such that we read full cacheline packets
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* from the chip. This is usually used for a single qword
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*
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* NOTE: This assumes the chip address is 64-bit aligned.
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*/
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static int ipath_read_umem64(struct ipath_devdata *dd, void __user *uaddr,
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const void __iomem *caddr, size_t count)
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{
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const u64 __iomem *reg_addr = caddr;
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const u64 __iomem *reg_end = reg_addr + (count / sizeof(u64));
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int ret;
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/* not very efficient, but it works for now */
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2006-07-01 19:35:52 +08:00
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if (reg_addr < dd->ipath_kregbase || reg_end > dd->ipath_kregend) {
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2006-03-30 07:23:28 +08:00
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ret = -EINVAL;
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goto bail;
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}
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while (reg_addr < reg_end) {
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u64 data = readq(reg_addr);
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if (copy_to_user(uaddr, &data, sizeof(u64))) {
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ret = -EFAULT;
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goto bail;
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}
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reg_addr++;
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2006-07-01 19:36:14 +08:00
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uaddr += sizeof(u64);
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2006-03-30 07:23:28 +08:00
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}
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ret = 0;
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bail:
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return ret;
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}
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/**
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* ipath_write_umem64 - write a 64-bit quantity to the chip from user space
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* @dd: the infinipath device
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* @caddr: the destination chip address (full pointer, not offset)
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* @uaddr: the source of the data in user memory
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* @count: the number of bytes to copy (multiple of 32 bits)
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*
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* This is usually used for a single qword
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* NOTE: This assumes the chip address is 64-bit aligned.
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*/
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static int ipath_write_umem64(struct ipath_devdata *dd, void __iomem *caddr,
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const void __user *uaddr, size_t count)
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{
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u64 __iomem *reg_addr = caddr;
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const u64 __iomem *reg_end = reg_addr + (count / sizeof(u64));
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int ret;
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/* not very efficient, but it works for now */
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2006-07-01 19:35:52 +08:00
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if (reg_addr < dd->ipath_kregbase || reg_end > dd->ipath_kregend) {
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2006-03-30 07:23:28 +08:00
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ret = -EINVAL;
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goto bail;
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}
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while (reg_addr < reg_end) {
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u64 data;
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if (copy_from_user(&data, uaddr, sizeof(data))) {
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ret = -EFAULT;
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goto bail;
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}
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writeq(data, reg_addr);
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reg_addr++;
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2006-07-01 19:36:14 +08:00
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uaddr += sizeof(u64);
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2006-03-30 07:23:28 +08:00
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}
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ret = 0;
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bail:
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return ret;
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}
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/**
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* ipath_read_umem32 - read a 32-bit quantity from the chip into user space
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* @dd: the infinipath device
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* @uaddr: the location to store the data in user memory
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* @caddr: the source chip address (full pointer, not offset)
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* @count: number of bytes to copy
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*
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* read 32 bit values, not 64 bit; for memories that only
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* support 32 bit reads; usually a single dword.
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*/
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static int ipath_read_umem32(struct ipath_devdata *dd, void __user *uaddr,
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const void __iomem *caddr, size_t count)
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{
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const u32 __iomem *reg_addr = caddr;
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const u32 __iomem *reg_end = reg_addr + (count / sizeof(u32));
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int ret;
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if (reg_addr < (u32 __iomem *) dd->ipath_kregbase ||
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reg_end > (u32 __iomem *) dd->ipath_kregend) {
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ret = -EINVAL;
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goto bail;
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}
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/* not very efficient, but it works for now */
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while (reg_addr < reg_end) {
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u32 data = readl(reg_addr);
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if (copy_to_user(uaddr, &data, sizeof(data))) {
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ret = -EFAULT;
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goto bail;
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}
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reg_addr++;
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2006-07-01 19:36:14 +08:00
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uaddr += sizeof(u32);
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2006-03-30 07:23:28 +08:00
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}
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ret = 0;
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bail:
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return ret;
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}
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/**
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* ipath_write_umem32 - write a 32-bit quantity to the chip from user space
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* @dd: the infinipath device
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* @caddr: the destination chip address (full pointer, not offset)
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* @uaddr: the source of the data in user memory
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* @count: number of bytes to copy
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*
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* write 32 bit values, not 64 bit; for memories that only
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* support 32 bit write; usually a single dword.
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*/
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static int ipath_write_umem32(struct ipath_devdata *dd, void __iomem *caddr,
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const void __user *uaddr, size_t count)
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{
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u32 __iomem *reg_addr = caddr;
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const u32 __iomem *reg_end = reg_addr + (count / sizeof(u32));
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int ret;
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if (reg_addr < (u32 __iomem *) dd->ipath_kregbase ||
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reg_end > (u32 __iomem *) dd->ipath_kregend) {
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ret = -EINVAL;
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goto bail;
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}
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while (reg_addr < reg_end) {
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u32 data;
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if (copy_from_user(&data, uaddr, sizeof(data))) {
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ret = -EFAULT;
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goto bail;
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}
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writel(data, reg_addr);
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reg_addr++;
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2006-07-01 19:36:14 +08:00
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uaddr += sizeof(u32);
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2006-03-30 07:23:28 +08:00
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}
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ret = 0;
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bail:
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return ret;
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}
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static int ipath_diag_open(struct inode *in, struct file *fp)
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{
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2006-07-01 19:35:52 +08:00
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int unit = iminor(in) - IPATH_DIAG_MINOR_BASE;
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2006-03-30 07:23:28 +08:00
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struct ipath_devdata *dd;
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int ret;
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mutex_lock(&ipath_mutex);
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if (ipath_diag_inuse) {
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ret = -EBUSY;
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goto bail;
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}
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2006-07-01 19:35:52 +08:00
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dd = ipath_lookup(unit);
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if (dd == NULL || !(dd->ipath_flags & IPATH_PRESENT) ||
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!dd->ipath_kregbase) {
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ret = -ENODEV;
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2006-03-30 07:23:28 +08:00
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goto bail;
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}
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2006-07-01 19:35:52 +08:00
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fp->private_data = dd;
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ipath_diag_inuse = 1;
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diag_set_link = 0;
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ret = 0;
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2006-03-30 07:23:28 +08:00
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/* Only expose a way to reset the device if we
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make it into diag mode. */
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2006-07-01 19:35:52 +08:00
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ipath_expose_reset(&dd->pcidev->dev);
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2006-03-30 07:23:28 +08:00
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2006-07-01 19:35:52 +08:00
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bail:
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2006-04-25 05:22:57 +08:00
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mutex_unlock(&ipath_mutex);
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2006-03-30 07:23:28 +08:00
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return ret;
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}
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2006-08-26 02:24:36 +08:00
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static ssize_t ipath_diagpkt_write(struct file *fp,
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const char __user *data,
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size_t count, loff_t *off);
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static struct file_operations diagpkt_file_ops = {
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.owner = THIS_MODULE,
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.write = ipath_diagpkt_write,
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};
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static struct cdev *diagpkt_cdev;
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static struct class_device *diagpkt_class_dev;
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int __init ipath_diagpkt_add(void)
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{
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return ipath_cdev_init(IPATH_DIAGPKT_MINOR,
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"ipath_diagpkt", &diagpkt_file_ops,
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&diagpkt_cdev, &diagpkt_class_dev);
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}
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void __exit ipath_diagpkt_remove(void)
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{
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ipath_cdev_cleanup(&diagpkt_cdev, &diagpkt_class_dev);
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}
|
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/**
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* ipath_diagpkt_write - write an IB packet
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* @fp: the diag data device file pointer
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* @data: ipath_diag_pkt structure saying where to get the packet
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* @count: size of data to write
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* @off: unused by this code
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*/
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static ssize_t ipath_diagpkt_write(struct file *fp,
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|
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const char __user *data,
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|
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size_t count, loff_t *off)
|
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|
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{
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u32 __iomem *piobuf;
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|
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u32 plen, clen, pbufn;
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struct ipath_diag_pkt dp;
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u32 *tmpbuf = NULL;
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struct ipath_devdata *dd;
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ssize_t ret = 0;
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u64 val;
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if (count < sizeof(dp)) {
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ret = -EINVAL;
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goto bail;
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}
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if (copy_from_user(&dp, data, sizeof(dp))) {
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ret = -EFAULT;
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goto bail;
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}
|
|
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/* send count must be an exact number of dwords */
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if (dp.len & 3) {
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ret = -EINVAL;
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goto bail;
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}
|
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clen = dp.len >> 2;
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|
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dd = ipath_lookup(dp.unit);
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|
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if (!dd || !(dd->ipath_flags & IPATH_PRESENT) ||
|
|
|
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!dd->ipath_kregbase) {
|
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|
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ipath_cdbg(VERBOSE, "illegal unit %u for diag data send\n",
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|
|
dp.unit);
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ret = -ENODEV;
|
|
|
|
goto bail;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (ipath_diag_inuse && !diag_set_link &&
|
|
|
|
!(dd->ipath_flags & IPATH_LINKACTIVE)) {
|
|
|
|
diag_set_link = 1;
|
|
|
|
ipath_cdbg(VERBOSE, "Trying to set to set link active for "
|
|
|
|
"diag pkt\n");
|
|
|
|
ipath_set_linkstate(dd, IPATH_IB_LINKARM);
|
|
|
|
ipath_set_linkstate(dd, IPATH_IB_LINKACTIVE);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!(dd->ipath_flags & IPATH_INITTED)) {
|
|
|
|
/* no hardware, freeze, etc. */
|
|
|
|
ipath_cdbg(VERBOSE, "unit %u not usable\n", dd->ipath_unit);
|
|
|
|
ret = -ENODEV;
|
|
|
|
goto bail;
|
|
|
|
}
|
|
|
|
val = dd->ipath_lastibcstat & IPATH_IBSTATE_MASK;
|
|
|
|
if (val != IPATH_IBSTATE_INIT && val != IPATH_IBSTATE_ARM &&
|
|
|
|
val != IPATH_IBSTATE_ACTIVE) {
|
|
|
|
ipath_cdbg(VERBOSE, "unit %u not ready (state %llx)\n",
|
|
|
|
dd->ipath_unit, (unsigned long long) val);
|
|
|
|
ret = -EINVAL;
|
|
|
|
goto bail;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* need total length before first word written */
|
|
|
|
/* +1 word is for the qword padding */
|
|
|
|
plen = sizeof(u32) + dp.len;
|
|
|
|
|
|
|
|
if ((plen + 4) > dd->ipath_ibmaxlen) {
|
|
|
|
ipath_dbg("Pkt len 0x%x > ibmaxlen %x\n",
|
|
|
|
plen - 4, dd->ipath_ibmaxlen);
|
|
|
|
ret = -EINVAL;
|
|
|
|
goto bail; /* before writing pbc */
|
|
|
|
}
|
|
|
|
tmpbuf = vmalloc(plen);
|
|
|
|
if (!tmpbuf) {
|
|
|
|
dev_info(&dd->pcidev->dev, "Unable to allocate tmp buffer, "
|
|
|
|
"failing\n");
|
|
|
|
ret = -ENOMEM;
|
|
|
|
goto bail;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (copy_from_user(tmpbuf,
|
|
|
|
(const void __user *) (unsigned long) dp.data,
|
|
|
|
dp.len)) {
|
|
|
|
ret = -EFAULT;
|
|
|
|
goto bail;
|
|
|
|
}
|
|
|
|
|
|
|
|
piobuf = ipath_getpiobuf(dd, &pbufn);
|
|
|
|
if (!piobuf) {
|
|
|
|
ipath_cdbg(VERBOSE, "No PIO buffers avail unit for %u\n",
|
|
|
|
dd->ipath_unit);
|
|
|
|
ret = -EBUSY;
|
|
|
|
goto bail;
|
|
|
|
}
|
|
|
|
|
|
|
|
plen >>= 2; /* in dwords */
|
|
|
|
|
|
|
|
if (ipath_debug & __IPATH_PKTDBG)
|
|
|
|
ipath_cdbg(VERBOSE, "unit %u 0x%x+1w pio%d\n",
|
|
|
|
dd->ipath_unit, plen - 1, pbufn);
|
|
|
|
|
|
|
|
/* we have to flush after the PBC for correctness on some cpus
|
|
|
|
* or WC buffer can be written out of order */
|
|
|
|
writeq(plen, piobuf);
|
|
|
|
ipath_flush_wc();
|
|
|
|
/* copy all by the trigger word, then flush, so it's written
|
|
|
|
* to chip before trigger word, then write trigger word, then
|
|
|
|
* flush again, so packet is sent. */
|
|
|
|
__iowrite32_copy(piobuf + 2, tmpbuf, clen - 1);
|
|
|
|
ipath_flush_wc();
|
|
|
|
__raw_writel(tmpbuf[clen - 1], piobuf + clen + 1);
|
|
|
|
ipath_flush_wc();
|
|
|
|
|
|
|
|
ret = sizeof(dp);
|
|
|
|
|
|
|
|
bail:
|
|
|
|
vfree(tmpbuf);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2006-07-01 19:35:52 +08:00
|
|
|
static int ipath_diag_release(struct inode *in, struct file *fp)
|
2006-03-30 07:23:28 +08:00
|
|
|
{
|
|
|
|
mutex_lock(&ipath_mutex);
|
|
|
|
ipath_diag_inuse = 0;
|
2006-07-01 19:35:52 +08:00
|
|
|
fp->private_data = NULL;
|
2006-03-30 07:23:28 +08:00
|
|
|
mutex_unlock(&ipath_mutex);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static ssize_t ipath_diag_read(struct file *fp, char __user *data,
|
|
|
|
size_t count, loff_t *off)
|
|
|
|
{
|
2006-07-01 19:35:52 +08:00
|
|
|
struct ipath_devdata *dd = fp->private_data;
|
2006-03-30 07:23:28 +08:00
|
|
|
void __iomem *kreg_base;
|
|
|
|
ssize_t ret;
|
|
|
|
|
|
|
|
kreg_base = dd->ipath_kregbase;
|
|
|
|
|
|
|
|
if (count == 0)
|
|
|
|
ret = 0;
|
|
|
|
else if ((count % 4) || (*off % 4))
|
|
|
|
/* address or length is not 32-bit aligned, hence invalid */
|
|
|
|
ret = -EINVAL;
|
|
|
|
else if ((count % 8) || (*off % 8))
|
|
|
|
/* address or length not 64-bit aligned; do 32-bit reads */
|
|
|
|
ret = ipath_read_umem32(dd, data, kreg_base + *off, count);
|
|
|
|
else
|
|
|
|
ret = ipath_read_umem64(dd, data, kreg_base + *off, count);
|
|
|
|
|
|
|
|
if (ret >= 0) {
|
|
|
|
*off += count;
|
|
|
|
ret = count;
|
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static ssize_t ipath_diag_write(struct file *fp, const char __user *data,
|
|
|
|
size_t count, loff_t *off)
|
|
|
|
{
|
2006-07-01 19:35:52 +08:00
|
|
|
struct ipath_devdata *dd = fp->private_data;
|
2006-03-30 07:23:28 +08:00
|
|
|
void __iomem *kreg_base;
|
|
|
|
ssize_t ret;
|
|
|
|
|
|
|
|
kreg_base = dd->ipath_kregbase;
|
|
|
|
|
|
|
|
if (count == 0)
|
|
|
|
ret = 0;
|
|
|
|
else if ((count % 4) || (*off % 4))
|
|
|
|
/* address or length is not 32-bit aligned, hence invalid */
|
|
|
|
ret = -EINVAL;
|
|
|
|
else if ((count % 8) || (*off % 8))
|
|
|
|
/* address or length not 64-bit aligned; do 32-bit writes */
|
|
|
|
ret = ipath_write_umem32(dd, kreg_base + *off, data, count);
|
|
|
|
else
|
|
|
|
ret = ipath_write_umem64(dd, kreg_base + *off, data, count);
|
|
|
|
|
|
|
|
if (ret >= 0) {
|
|
|
|
*off += count;
|
|
|
|
ret = count;
|
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|