2008-07-05 16:02:56 +08:00
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/*
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* Copyright (C) 1999 ARM Limited
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* Copyright (C) 2000 Deep Blue Solutions Ltd
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* Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved.
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* Copyright 2008 Juergen Beisert, kernel@pengutronix.de
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2009-03-03 07:49:23 +08:00
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* Copyright 2009 Ilya Yanok, Emcraft Systems Ltd, yanok@emcraft.com
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2008-07-05 16:02:56 +08:00
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/kernel.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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2009-03-03 07:49:23 +08:00
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#include <linux/err.h>
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#include <linux/delay.h>
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2013-05-10 10:19:01 +08:00
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#include <linux/of.h>
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#include <linux/of_address.h>
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2008-07-05 16:02:56 +08:00
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2012-03-29 01:30:01 +08:00
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#include <asm/system_misc.h>
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2008-07-05 16:02:56 +08:00
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#include <asm/proc-fns.h>
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2010-10-27 20:40:55 +08:00
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#include <asm/mach-types.h>
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2008-07-05 16:02:56 +08:00
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2012-09-13 21:01:00 +08:00
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#include "common.h"
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2012-09-14 14:14:45 +08:00
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#include "hardware.h"
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2012-09-13 21:01:00 +08:00
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2009-06-04 18:19:02 +08:00
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static void __iomem *wdog_base;
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2013-05-10 09:13:44 +08:00
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static struct clk *wdog_clk;
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2008-07-05 16:02:56 +08:00
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/*
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* Reset the system. It is called by machine_restart().
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*/
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2013-07-09 07:01:40 +08:00
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void mxc_restart(enum reboot_mode mode, const char *cmd)
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2008-07-05 16:02:56 +08:00
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{
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2009-06-04 18:19:02 +08:00
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unsigned int wcr_enable;
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2013-05-10 09:13:44 +08:00
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if (wdog_clk)
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clk_enable(wdog_clk);
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2008-07-05 16:02:56 +08:00
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2013-05-10 09:13:44 +08:00
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if (cpu_is_mx1())
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wcr_enable = (1 << 0);
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else
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2009-06-04 18:19:02 +08:00
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wcr_enable = (1 << 2);
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2008-07-05 16:02:56 +08:00
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/* Assert SRS signal */
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2009-06-04 18:19:02 +08:00
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__raw_writew(wcr_enable, wdog_base);
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2009-03-03 07:49:23 +08:00
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/* wait for reset to assert... */
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mdelay(500);
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2013-05-10 09:13:44 +08:00
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pr_err("%s: Watchdog reset failed to assert reset\n", __func__);
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2009-03-03 07:49:23 +08:00
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/* delay to allow the serial port to show the message */
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mdelay(50);
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/* we'll take a jump through zero as a poor second */
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2011-11-01 21:16:26 +08:00
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soft_restart(0);
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2008-07-05 16:02:56 +08:00
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}
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2009-06-04 18:19:02 +08:00
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2013-05-10 09:13:44 +08:00
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void __init mxc_arch_reset_init(void __iomem *base)
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2009-06-04 18:19:02 +08:00
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{
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wdog_base = base;
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2013-05-10 09:13:44 +08:00
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wdog_clk = clk_get_sys("imx2-wdt.0", NULL);
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if (IS_ERR(wdog_clk)) {
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pr_warn("%s: failed to get wdog clock\n", __func__);
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wdog_clk = NULL;
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return;
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}
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clk_prepare(wdog_clk);
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2009-06-04 18:19:02 +08:00
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}
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2013-05-10 10:19:01 +08:00
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void __init mxc_arch_reset_init_dt(void)
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{
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struct device_node *np;
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np = of_find_compatible_node(NULL, NULL, "fsl,imx21-wdt");
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wdog_base = of_iomap(np, 0);
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WARN_ON(!wdog_base);
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wdog_clk = of_clk_get(np, 0);
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if (IS_ERR(wdog_clk)) {
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pr_warn("%s: failed to get wdog clock\n", __func__);
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wdog_clk = NULL;
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return;
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}
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clk_prepare(wdog_clk);
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}
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