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79 lines
2.5 KiB
Plaintext
79 lines
2.5 KiB
Plaintext
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PDC interrupt controller
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Qualcomm Technologies Inc. SoCs based on the RPM Hardened architecture have a
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Power Domain Controller (PDC) that is on always-on domain. In addition to
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providing power control for the power domains, the hardware also has an
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interrupt controller that can be used to help detect edge low interrupts as
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well detect interrupts when the GIC is non-operational.
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GIC is parent interrupt controller at the highest level. Platform interrupt
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controller PDC is next in hierarchy, followed by others. Drivers requiring
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wakeup capabilities of their device interrupts routed through the PDC, must
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specify PDC as their interrupt controller and request the PDC port associated
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with the GIC interrupt. See example below.
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Properties:
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- compatible:
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Usage: required
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Value type: <string>
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Definition: Should contain "qcom,<soc>-pdc"
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- "qcom,sdm845-pdc": For SDM845
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- reg:
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Usage: required
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Value type: <prop-encoded-array>
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Definition: Specifies the base physical address for PDC hardware.
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- interrupt-cells:
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Usage: required
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Value type: <u32>
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Definition: Specifies the number of cells needed to encode an interrupt
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source.
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Must be 2.
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The first element of the tuple is the PDC pin for the
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interrupt.
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The second element is the trigger type.
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- interrupt-parent:
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Usage: required
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Value type: <phandle>
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Definition: Specifies the interrupt parent necessary for hierarchical
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domain to operate.
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- interrupt-controller:
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Usage: required
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Value type: <bool>
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Definition: Identifies the node as an interrupt controller.
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- qcom,pdc-ranges:
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Usage: required
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Value type: <u32 array>
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Definition: Specifies the PDC pin offset and the number of PDC ports.
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The tuples indicates the valid mapping of valid PDC ports
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and their hwirq mapping.
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The first element of the tuple is the starting PDC port.
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The second element is the GIC hwirq number for the PDC port.
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The third element is the number of interrupts in sequence.
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Example:
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pdc: interrupt-controller@b220000 {
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compatible = "qcom,sdm845-pdc";
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reg = <0xb220000 0x30000>;
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qcom,pdc-ranges = <0 512 94>, <94 641 15>, <115 662 7>;
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#interrupt-cells = <2>;
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interrupt-parent = <&intc>;
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interrupt-controller;
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};
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DT binding of a device that wants to use the GIC SPI 514 as a wakeup
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interrupt, must do -
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wake-device {
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interrupts-extended = <&pdc 2 IRQ_TYPE_LEVEL_HIGH>;
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};
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In this case interrupt 514 would be mapped to port 2 on the PDC as defined by
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the qcom,pdc-ranges property.
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