2005-11-10 22:26:51 +08:00
|
|
|
/*
|
2006-10-04 05:01:26 +08:00
|
|
|
* arch/arm/mach-omap2/serial.c
|
2005-11-10 22:26:51 +08:00
|
|
|
*
|
|
|
|
* OMAP2 serial support.
|
|
|
|
*
|
2008-10-06 20:49:15 +08:00
|
|
|
* Copyright (C) 2005-2008 Nokia Corporation
|
2005-11-10 22:26:51 +08:00
|
|
|
* Author: Paul Mundt <paul.mundt@nokia.com>
|
|
|
|
*
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-05 02:51:40 +08:00
|
|
|
* Major rework for PM support by Kevin Hilman
|
|
|
|
*
|
2005-11-10 22:26:51 +08:00
|
|
|
* Based off of arch/arm/mach-omap/omap1/serial.c
|
|
|
|
*
|
2009-05-29 05:16:04 +08:00
|
|
|
* Copyright (C) 2009 Texas Instruments
|
|
|
|
* Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com
|
|
|
|
*
|
2005-11-10 22:26:51 +08:00
|
|
|
* This file is subject to the terms and conditions of the GNU General Public
|
|
|
|
* License. See the file "COPYING" in the main directory of this archive
|
|
|
|
* for more details.
|
|
|
|
*/
|
|
|
|
#include <linux/kernel.h>
|
|
|
|
#include <linux/init.h>
|
|
|
|
#include <linux/serial_reg.h>
|
2006-01-08 00:15:52 +08:00
|
|
|
#include <linux/clk.h>
|
2008-09-06 19:10:45 +08:00
|
|
|
#include <linux/io.h>
|
2010-02-18 16:59:06 +08:00
|
|
|
#include <linux/delay.h>
|
2010-09-27 22:49:38 +08:00
|
|
|
#include <linux/platform_device.h>
|
|
|
|
#include <linux/slab.h>
|
|
|
|
#include <linux/serial_8250.h>
|
2010-09-27 22:49:53 +08:00
|
|
|
#include <linux/pm_runtime.h>
|
OMAP2+: PM/serial: hold console semaphore while OMAP UARTs are disabled
The console semaphore must be held while the OMAP UART devices are
disabled, lest a console write cause an ARM abort (and a kernel crash)
when the underlying console device is inaccessible. These crashes
only occur when the console is on one of the OMAP internal serial
ports.
While this problem has been latent in the PM idle loop for some time,
the crash was not triggerable with an unmodified kernel until commit
6f251e9db1093c187addc309b5f2f7fe3efd2995 ("OMAP: UART: omap_device
conversions, remove implicit 8520 assumptions"). After this patch, a
console write often occurs after the console UART has been disabled in
the idle loop, crashing the system. Several users have encountered
this bug:
http://www.mail-archive.com/linux-omap@vger.kernel.org/msg38396.html
http://www.mail-archive.com/linux-omap@vger.kernel.org/msg36602.html
The same commit also introduced new code that disabled the UARTs
during init, in omap_serial_init_port(). The kernel will also crash
in this code when earlyconsole and extra debugging is enabled:
http://www.mail-archive.com/linux-omap@vger.kernel.org/msg36411.html
The minimal fix for the -rc series is to hold the console semaphore
while the OMAP UARTs are disabled. This is a somewhat overbroad fix,
since the console may not be located on an OMAP UART, as is the case
with the GPMC UART on Zoom3. While it is technically possible to
determine which devices the console or earlyconsole is actually
running on, it is not a trivial problem to solve, and the code to do
so is not really appropriate for the -rc series.
The right long-term fix is to ensure that no code outside of the OMAP
serial driver can disable an OMAP UART. As I understand it, code to
implement this is under development by TI.
This patch is a collaboration between Paul Walmsley <paul@pwsan.com>
and Tony Lindgren <tony@atomide.com>. Thanks to Ming Lei
<tom.leiming@gmail.com> and Pramod <pramod.gurav@ti.com> for their
feedback on earlier versions of this patch.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Acked-by: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Ming Lei <tom.leiming@gmail.com>
Cc: Pramod <pramod.gurav@ti.com>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Jean Pihet <jean.pihet@newoldbits.com>
Cc: Govindraj.R <govindraj.raja@ti.com>
2010-11-25 07:49:05 +08:00
|
|
|
#include <linux/console.h>
|
2010-09-27 22:49:38 +08:00
|
|
|
|
|
|
|
#ifdef CONFIG_SERIAL_OMAP
|
|
|
|
#include <plat/omap-serial.h>
|
|
|
|
#endif
|
2005-11-10 22:26:51 +08:00
|
|
|
|
2009-10-21 00:40:47 +08:00
|
|
|
#include <plat/common.h>
|
|
|
|
#include <plat/board.h>
|
|
|
|
#include <plat/clock.h>
|
2010-09-27 22:49:38 +08:00
|
|
|
#include <plat/dma.h>
|
|
|
|
#include <plat/omap_hwmod.h>
|
|
|
|
#include <plat/omap_device.h>
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-05 02:51:40 +08:00
|
|
|
|
2010-12-22 06:30:55 +08:00
|
|
|
#include "prm2xxx_3xxx.h"
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-05 02:51:40 +08:00
|
|
|
#include "pm.h"
|
2010-12-22 06:30:55 +08:00
|
|
|
#include "cm2xxx_3xxx.h"
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-05 02:51:40 +08:00
|
|
|
#include "prm-regbits-34xx.h"
|
2010-10-09 01:40:20 +08:00
|
|
|
#include "control.h"
|
2010-12-23 10:42:35 +08:00
|
|
|
#include "mux.h"
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-05 02:51:40 +08:00
|
|
|
|
2009-12-12 08:16:37 +08:00
|
|
|
#define UART_OMAP_NO_EMPTY_FIFO_READ_IP_REV 0x52
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-05 02:51:40 +08:00
|
|
|
#define UART_OMAP_WER 0x17 /* Wake-up enable register */
|
|
|
|
|
2010-08-02 18:18:12 +08:00
|
|
|
#define UART_ERRATA_FIFO_FULL_ABORT (0x1 << 0)
|
2010-08-02 18:18:12 +08:00
|
|
|
#define UART_ERRATA_i202_MDR1_ACCESS (0x1 << 1)
|
2010-08-02 18:18:12 +08:00
|
|
|
|
2010-02-02 04:34:31 +08:00
|
|
|
/*
|
|
|
|
* NOTE: By default the serial timeout is disabled as it causes lost characters
|
|
|
|
* over the serial ports. This means that the UART clocks will stay on until
|
|
|
|
* disabled via sysfs. This also causes that any deeper omap sleep states are
|
|
|
|
* blocked.
|
|
|
|
*/
|
|
|
|
#define DEFAULT_TIMEOUT 0
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-05 02:51:40 +08:00
|
|
|
|
2010-09-27 22:49:38 +08:00
|
|
|
#define MAX_UART_HWMOD_NAME_LEN 16
|
|
|
|
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-05 02:51:40 +08:00
|
|
|
struct omap_uart_state {
|
|
|
|
int num;
|
|
|
|
int can_sleep;
|
|
|
|
struct timer_list timer;
|
|
|
|
u32 timeout;
|
|
|
|
|
|
|
|
void __iomem *wk_st;
|
|
|
|
void __iomem *wk_en;
|
|
|
|
u32 wk_mask;
|
|
|
|
u32 padconf;
|
2010-09-27 22:49:38 +08:00
|
|
|
u32 dma_enabled;
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-05 02:51:40 +08:00
|
|
|
|
|
|
|
struct clk *ick;
|
|
|
|
struct clk *fck;
|
|
|
|
int clocked;
|
|
|
|
|
2010-09-27 22:49:38 +08:00
|
|
|
int irq;
|
|
|
|
int regshift;
|
|
|
|
int irqflags;
|
|
|
|
void __iomem *membase;
|
|
|
|
resource_size_t mapbase;
|
|
|
|
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-05 02:51:40 +08:00
|
|
|
struct list_head node;
|
2010-09-27 22:49:38 +08:00
|
|
|
struct omap_hwmod *oh;
|
|
|
|
struct platform_device *pdev;
|
2005-11-10 22:26:51 +08:00
|
|
|
|
2010-08-02 18:18:12 +08:00
|
|
|
u32 errata;
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-05 02:51:40 +08:00
|
|
|
#if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_PM)
|
|
|
|
int context_valid;
|
|
|
|
|
|
|
|
/* Registers to be saved/restored for OFF-mode */
|
|
|
|
u16 dll;
|
|
|
|
u16 dlh;
|
|
|
|
u16 ier;
|
|
|
|
u16 sysc;
|
|
|
|
u16 scr;
|
|
|
|
u16 wer;
|
2010-08-02 18:18:11 +08:00
|
|
|
u16 mcr;
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-05 02:51:40 +08:00
|
|
|
#endif
|
|
|
|
};
|
|
|
|
|
|
|
|
static LIST_HEAD(uart_list);
|
2010-09-27 22:49:38 +08:00
|
|
|
static u8 num_uarts;
|
2005-11-10 22:26:51 +08:00
|
|
|
|
2010-09-27 22:50:06 +08:00
|
|
|
static int uart_idle_hwmod(struct omap_device *od)
|
|
|
|
{
|
OMAP2+: hwmod: upgrade per-hwmod mutex to a spinlock
Change the per-hwmod mutex to a spinlock. (The per-hwmod lock
serializes most post-initialization hwmod operations such as enable,
idle, and shutdown.) Spinlocks are needed, because in some cases,
hwmods must be enabled from timer interrupt disabled-context, such as
an ISR. The current use-case that is driving this is the OMAP GPIO
block ISR: it can trigger interrupts even with its clocks disabled,
but these clocks are needed for register accesses in the ISR to succeed.
This patch also effectively reverts commit
848240223c35fcc71c424ad51a8e8aef42d3879c - this patch makes
_omap_hwmod_enable() and _omap_hwmod_init() static, renames them back
to _enable() and _idle(), and changes their callers to call the
spinlocking versions. Previously, since omap_hwmod_{enable,init}()
attempted to take mutexes, these functions could not be called while
the timer interrupt was disabled; but now that the functions use
spinlocks and save and restore the IRQ state, it is appropriate to
call them directly.
Kevin Hilman <khilman@deeprootsystems.com> originally proposed this
patch - thanks Kevin.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Benoît Cousson <b-cousson@ti.com>
2010-12-15 03:42:35 +08:00
|
|
|
omap_hwmod_idle(od->hwmods[0]);
|
2010-09-27 22:50:06 +08:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int uart_enable_hwmod(struct omap_device *od)
|
|
|
|
{
|
OMAP2+: hwmod: upgrade per-hwmod mutex to a spinlock
Change the per-hwmod mutex to a spinlock. (The per-hwmod lock
serializes most post-initialization hwmod operations such as enable,
idle, and shutdown.) Spinlocks are needed, because in some cases,
hwmods must be enabled from timer interrupt disabled-context, such as
an ISR. The current use-case that is driving this is the OMAP GPIO
block ISR: it can trigger interrupts even with its clocks disabled,
but these clocks are needed for register accesses in the ISR to succeed.
This patch also effectively reverts commit
848240223c35fcc71c424ad51a8e8aef42d3879c - this patch makes
_omap_hwmod_enable() and _omap_hwmod_init() static, renames them back
to _enable() and _idle(), and changes their callers to call the
spinlocking versions. Previously, since omap_hwmod_{enable,init}()
attempted to take mutexes, these functions could not be called while
the timer interrupt was disabled; but now that the functions use
spinlocks and save and restore the IRQ state, it is appropriate to
call them directly.
Kevin Hilman <khilman@deeprootsystems.com> originally proposed this
patch - thanks Kevin.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Benoît Cousson <b-cousson@ti.com>
2010-12-15 03:42:35 +08:00
|
|
|
omap_hwmod_enable(od->hwmods[0]);
|
2010-09-27 22:50:06 +08:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2010-09-27 22:49:38 +08:00
|
|
|
static struct omap_device_pm_latency omap_uart_latency[] = {
|
|
|
|
{
|
2010-09-27 22:50:06 +08:00
|
|
|
.deactivate_func = uart_idle_hwmod,
|
|
|
|
.activate_func = uart_enable_hwmod,
|
2010-09-27 22:49:38 +08:00
|
|
|
.flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
2010-01-09 02:29:06 +08:00
|
|
|
static inline unsigned int __serial_read_reg(struct uart_port *up,
|
2010-09-27 22:49:38 +08:00
|
|
|
int offset)
|
2010-01-09 02:29:06 +08:00
|
|
|
{
|
|
|
|
offset <<= up->regshift;
|
|
|
|
return (unsigned int)__raw_readb(up->membase + offset);
|
|
|
|
}
|
|
|
|
|
2010-09-27 22:49:38 +08:00
|
|
|
static inline unsigned int serial_read_reg(struct omap_uart_state *uart,
|
2005-11-10 22:26:51 +08:00
|
|
|
int offset)
|
|
|
|
{
|
2010-09-27 22:49:38 +08:00
|
|
|
offset <<= uart->regshift;
|
|
|
|
return (unsigned int)__raw_readb(uart->membase + offset);
|
2005-11-10 22:26:51 +08:00
|
|
|
}
|
|
|
|
|
2010-02-18 16:59:06 +08:00
|
|
|
static inline void __serial_write_reg(struct uart_port *up, int offset,
|
|
|
|
int value)
|
|
|
|
{
|
|
|
|
offset <<= up->regshift;
|
|
|
|
__raw_writeb(value, up->membase + offset);
|
|
|
|
}
|
|
|
|
|
2010-09-27 22:49:38 +08:00
|
|
|
static inline void serial_write_reg(struct omap_uart_state *uart, int offset,
|
2005-11-10 22:26:51 +08:00
|
|
|
int value)
|
|
|
|
{
|
2010-09-27 22:49:38 +08:00
|
|
|
offset <<= uart->regshift;
|
|
|
|
__raw_writeb(value, uart->membase + offset);
|
2005-11-10 22:26:51 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Internal UARTs need to be initialized for the 8250 autoconfig to work
|
|
|
|
* properly. Note that the TX watermark initialization may not be needed
|
|
|
|
* once the 8250.c watermark handling code is merged.
|
|
|
|
*/
|
2010-09-27 22:49:38 +08:00
|
|
|
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-05 02:51:40 +08:00
|
|
|
static inline void __init omap_uart_reset(struct omap_uart_state *uart)
|
2005-11-10 22:26:51 +08:00
|
|
|
{
|
2010-12-01 06:11:49 +08:00
|
|
|
serial_write_reg(uart, UART_OMAP_MDR1, UART_OMAP_MDR1_DISABLE);
|
2010-09-27 22:49:38 +08:00
|
|
|
serial_write_reg(uart, UART_OMAP_SCR, 0x08);
|
2010-12-01 06:11:49 +08:00
|
|
|
serial_write_reg(uart, UART_OMAP_MDR1, UART_OMAP_MDR1_16X_MODE);
|
2005-11-10 22:26:51 +08:00
|
|
|
}
|
|
|
|
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-05 02:51:40 +08:00
|
|
|
#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3)
|
|
|
|
|
2010-08-02 18:18:12 +08:00
|
|
|
/*
|
|
|
|
* Work Around for Errata i202 (3430 - 1.12, 3630 - 1.6)
|
|
|
|
* The access to uart register after MDR1 Access
|
|
|
|
* causes UART to corrupt data.
|
|
|
|
*
|
|
|
|
* Need a delay =
|
|
|
|
* 5 L4 clock cycles + 5 UART functional clock cycle (@48MHz = ~0.2uS)
|
|
|
|
* give 10 times as much
|
|
|
|
*/
|
|
|
|
static void omap_uart_mdr1_errataset(struct omap_uart_state *uart, u8 mdr1_val,
|
|
|
|
u8 fcr_val)
|
|
|
|
{
|
|
|
|
u8 timeout = 255;
|
|
|
|
|
2010-09-27 22:49:38 +08:00
|
|
|
serial_write_reg(uart, UART_OMAP_MDR1, mdr1_val);
|
2010-08-02 18:18:12 +08:00
|
|
|
udelay(2);
|
2010-09-27 22:49:38 +08:00
|
|
|
serial_write_reg(uart, UART_FCR, fcr_val | UART_FCR_CLEAR_XMIT |
|
2010-08-02 18:18:12 +08:00
|
|
|
UART_FCR_CLEAR_RCVR);
|
|
|
|
/*
|
|
|
|
* Wait for FIFO to empty: when empty, RX_FIFO_E bit is 0 and
|
|
|
|
* TX_FIFO_E bit is 1.
|
|
|
|
*/
|
2010-09-27 22:49:38 +08:00
|
|
|
while (UART_LSR_THRE != (serial_read_reg(uart, UART_LSR) &
|
2010-08-02 18:18:12 +08:00
|
|
|
(UART_LSR_THRE | UART_LSR_DR))) {
|
|
|
|
timeout--;
|
|
|
|
if (!timeout) {
|
|
|
|
/* Should *never* happen. we warn and carry on */
|
2010-09-27 22:49:38 +08:00
|
|
|
dev_crit(&uart->pdev->dev, "Errata i202: timedout %x\n",
|
|
|
|
serial_read_reg(uart, UART_LSR));
|
2010-08-02 18:18:12 +08:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
udelay(1);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-05 02:51:40 +08:00
|
|
|
static void omap_uart_save_context(struct omap_uart_state *uart)
|
2008-10-06 20:49:15 +08:00
|
|
|
{
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-05 02:51:40 +08:00
|
|
|
u16 lcr = 0;
|
|
|
|
|
|
|
|
if (!enable_off_mode)
|
|
|
|
return;
|
|
|
|
|
2010-09-27 22:49:38 +08:00
|
|
|
lcr = serial_read_reg(uart, UART_LCR);
|
2010-12-01 06:11:49 +08:00
|
|
|
serial_write_reg(uart, UART_LCR, UART_LCR_CONF_MODE_B);
|
2010-09-27 22:49:38 +08:00
|
|
|
uart->dll = serial_read_reg(uart, UART_DLL);
|
|
|
|
uart->dlh = serial_read_reg(uart, UART_DLM);
|
|
|
|
serial_write_reg(uart, UART_LCR, lcr);
|
|
|
|
uart->ier = serial_read_reg(uart, UART_IER);
|
|
|
|
uart->sysc = serial_read_reg(uart, UART_OMAP_SYSC);
|
|
|
|
uart->scr = serial_read_reg(uart, UART_OMAP_SCR);
|
|
|
|
uart->wer = serial_read_reg(uart, UART_OMAP_WER);
|
2010-12-01 06:11:49 +08:00
|
|
|
serial_write_reg(uart, UART_LCR, UART_LCR_CONF_MODE_A);
|
2010-09-27 22:49:38 +08:00
|
|
|
uart->mcr = serial_read_reg(uart, UART_MCR);
|
|
|
|
serial_write_reg(uart, UART_LCR, lcr);
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-05 02:51:40 +08:00
|
|
|
|
|
|
|
uart->context_valid = 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void omap_uart_restore_context(struct omap_uart_state *uart)
|
|
|
|
{
|
|
|
|
u16 efr = 0;
|
|
|
|
|
|
|
|
if (!enable_off_mode)
|
|
|
|
return;
|
|
|
|
|
|
|
|
if (!uart->context_valid)
|
|
|
|
return;
|
|
|
|
|
|
|
|
uart->context_valid = 0;
|
|
|
|
|
2010-08-02 18:18:12 +08:00
|
|
|
if (uart->errata & UART_ERRATA_i202_MDR1_ACCESS)
|
2010-12-01 06:11:49 +08:00
|
|
|
omap_uart_mdr1_errataset(uart, UART_OMAP_MDR1_DISABLE, 0xA0);
|
2010-08-02 18:18:12 +08:00
|
|
|
else
|
2010-12-01 06:11:49 +08:00
|
|
|
serial_write_reg(uart, UART_OMAP_MDR1, UART_OMAP_MDR1_DISABLE);
|
|
|
|
|
2010-12-01 06:11:49 +08:00
|
|
|
serial_write_reg(uart, UART_LCR, UART_LCR_CONF_MODE_B);
|
2010-09-27 22:49:38 +08:00
|
|
|
efr = serial_read_reg(uart, UART_EFR);
|
|
|
|
serial_write_reg(uart, UART_EFR, UART_EFR_ECB);
|
|
|
|
serial_write_reg(uart, UART_LCR, 0x0); /* Operational mode */
|
|
|
|
serial_write_reg(uart, UART_IER, 0x0);
|
2010-12-01 06:11:49 +08:00
|
|
|
serial_write_reg(uart, UART_LCR, UART_LCR_CONF_MODE_B);
|
2010-09-27 22:49:38 +08:00
|
|
|
serial_write_reg(uart, UART_DLL, uart->dll);
|
|
|
|
serial_write_reg(uart, UART_DLM, uart->dlh);
|
|
|
|
serial_write_reg(uart, UART_LCR, 0x0); /* Operational mode */
|
|
|
|
serial_write_reg(uart, UART_IER, uart->ier);
|
2010-12-01 06:11:49 +08:00
|
|
|
serial_write_reg(uart, UART_LCR, UART_LCR_CONF_MODE_A);
|
2010-09-27 22:49:38 +08:00
|
|
|
serial_write_reg(uart, UART_MCR, uart->mcr);
|
2010-12-01 06:11:49 +08:00
|
|
|
serial_write_reg(uart, UART_LCR, UART_LCR_CONF_MODE_B);
|
2010-09-27 22:49:38 +08:00
|
|
|
serial_write_reg(uart, UART_EFR, efr);
|
|
|
|
serial_write_reg(uart, UART_LCR, UART_LCR_WLEN8);
|
|
|
|
serial_write_reg(uart, UART_OMAP_SCR, uart->scr);
|
|
|
|
serial_write_reg(uart, UART_OMAP_WER, uart->wer);
|
|
|
|
serial_write_reg(uart, UART_OMAP_SYSC, uart->sysc);
|
2010-12-01 06:11:49 +08:00
|
|
|
|
2010-08-02 18:18:12 +08:00
|
|
|
if (uart->errata & UART_ERRATA_i202_MDR1_ACCESS)
|
2010-12-01 06:11:49 +08:00
|
|
|
omap_uart_mdr1_errataset(uart, UART_OMAP_MDR1_16X_MODE, 0xA1);
|
2010-08-02 18:18:12 +08:00
|
|
|
else
|
2010-09-27 22:49:38 +08:00
|
|
|
/* UART 16x mode */
|
2010-12-01 06:11:49 +08:00
|
|
|
serial_write_reg(uart, UART_OMAP_MDR1,
|
|
|
|
UART_OMAP_MDR1_16X_MODE);
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-05 02:51:40 +08:00
|
|
|
}
|
|
|
|
#else
|
|
|
|
static inline void omap_uart_save_context(struct omap_uart_state *uart) {}
|
|
|
|
static inline void omap_uart_restore_context(struct omap_uart_state *uart) {}
|
|
|
|
#endif /* CONFIG_PM && CONFIG_ARCH_OMAP3 */
|
|
|
|
|
|
|
|
static inline void omap_uart_enable_clocks(struct omap_uart_state *uart)
|
|
|
|
{
|
|
|
|
if (uart->clocked)
|
|
|
|
return;
|
|
|
|
|
2010-09-27 22:49:38 +08:00
|
|
|
omap_device_enable(uart->pdev);
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-05 02:51:40 +08:00
|
|
|
uart->clocked = 1;
|
|
|
|
omap_uart_restore_context(uart);
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef CONFIG_PM
|
|
|
|
|
|
|
|
static inline void omap_uart_disable_clocks(struct omap_uart_state *uart)
|
|
|
|
{
|
|
|
|
if (!uart->clocked)
|
|
|
|
return;
|
|
|
|
|
|
|
|
omap_uart_save_context(uart);
|
|
|
|
uart->clocked = 0;
|
2010-09-27 22:49:38 +08:00
|
|
|
omap_device_idle(uart->pdev);
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-05 02:51:40 +08:00
|
|
|
}
|
|
|
|
|
2009-04-28 03:27:36 +08:00
|
|
|
static void omap_uart_enable_wakeup(struct omap_uart_state *uart)
|
|
|
|
{
|
|
|
|
/* Set wake-enable bit */
|
|
|
|
if (uart->wk_en && uart->wk_mask) {
|
|
|
|
u32 v = __raw_readl(uart->wk_en);
|
|
|
|
v |= uart->wk_mask;
|
|
|
|
__raw_writel(v, uart->wk_en);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Ensure IOPAD wake-enables are set */
|
|
|
|
if (cpu_is_omap34xx() && uart->padconf) {
|
|
|
|
u16 v = omap_ctrl_readw(uart->padconf);
|
|
|
|
v |= OMAP3_PADCONF_WAKEUPENABLE0;
|
|
|
|
omap_ctrl_writew(v, uart->padconf);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void omap_uart_disable_wakeup(struct omap_uart_state *uart)
|
|
|
|
{
|
|
|
|
/* Clear wake-enable bit */
|
|
|
|
if (uart->wk_en && uart->wk_mask) {
|
|
|
|
u32 v = __raw_readl(uart->wk_en);
|
|
|
|
v &= ~uart->wk_mask;
|
|
|
|
__raw_writel(v, uart->wk_en);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Ensure IOPAD wake-enables are cleared */
|
|
|
|
if (cpu_is_omap34xx() && uart->padconf) {
|
|
|
|
u16 v = omap_ctrl_readw(uart->padconf);
|
|
|
|
v &= ~OMAP3_PADCONF_WAKEUPENABLE0;
|
|
|
|
omap_ctrl_writew(v, uart->padconf);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-05 02:51:40 +08:00
|
|
|
static void omap_uart_smart_idle_enable(struct omap_uart_state *uart,
|
2010-09-27 22:49:38 +08:00
|
|
|
int enable)
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-05 02:51:40 +08:00
|
|
|
{
|
2010-09-27 22:49:38 +08:00
|
|
|
u8 idlemode;
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-05 02:51:40 +08:00
|
|
|
|
2010-09-27 22:49:38 +08:00
|
|
|
if (enable) {
|
|
|
|
/**
|
|
|
|
* Errata 2.15: [UART]:Cannot Acknowledge Idle Requests
|
|
|
|
* in Smartidle Mode When Configured for DMA Operations.
|
|
|
|
*/
|
|
|
|
if (uart->dma_enabled)
|
|
|
|
idlemode = HWMOD_IDLEMODE_FORCE;
|
|
|
|
else
|
|
|
|
idlemode = HWMOD_IDLEMODE_SMART;
|
|
|
|
} else {
|
|
|
|
idlemode = HWMOD_IDLEMODE_NO;
|
|
|
|
}
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-05 02:51:40 +08:00
|
|
|
|
2010-09-27 22:49:38 +08:00
|
|
|
omap_hwmod_set_slave_idlemode(uart->oh, idlemode);
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-05 02:51:40 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
static void omap_uart_block_sleep(struct omap_uart_state *uart)
|
|
|
|
{
|
|
|
|
omap_uart_enable_clocks(uart);
|
|
|
|
|
|
|
|
omap_uart_smart_idle_enable(uart, 0);
|
|
|
|
uart->can_sleep = 0;
|
2008-12-09 19:36:50 +08:00
|
|
|
if (uart->timeout)
|
|
|
|
mod_timer(&uart->timer, jiffies + uart->timeout);
|
|
|
|
else
|
|
|
|
del_timer(&uart->timer);
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-05 02:51:40 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
static void omap_uart_allow_sleep(struct omap_uart_state *uart)
|
|
|
|
{
|
2010-09-27 22:49:38 +08:00
|
|
|
if (device_may_wakeup(&uart->pdev->dev))
|
2009-04-28 03:27:36 +08:00
|
|
|
omap_uart_enable_wakeup(uart);
|
|
|
|
else
|
|
|
|
omap_uart_disable_wakeup(uart);
|
|
|
|
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-05 02:51:40 +08:00
|
|
|
if (!uart->clocked)
|
|
|
|
return;
|
|
|
|
|
|
|
|
omap_uart_smart_idle_enable(uart, 1);
|
|
|
|
uart->can_sleep = 1;
|
|
|
|
del_timer(&uart->timer);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void omap_uart_idle_timer(unsigned long data)
|
|
|
|
{
|
|
|
|
struct omap_uart_state *uart = (struct omap_uart_state *)data;
|
|
|
|
|
|
|
|
omap_uart_allow_sleep(uart);
|
|
|
|
}
|
|
|
|
|
|
|
|
void omap_uart_prepare_idle(int num)
|
|
|
|
{
|
|
|
|
struct omap_uart_state *uart;
|
|
|
|
|
|
|
|
list_for_each_entry(uart, &uart_list, node) {
|
|
|
|
if (num == uart->num && uart->can_sleep) {
|
|
|
|
omap_uart_disable_clocks(uart);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
void omap_uart_resume_idle(int num)
|
|
|
|
{
|
|
|
|
struct omap_uart_state *uart;
|
|
|
|
|
|
|
|
list_for_each_entry(uart, &uart_list, node) {
|
2010-11-25 03:09:03 +08:00
|
|
|
if (num == uart->num && uart->can_sleep) {
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-05 02:51:40 +08:00
|
|
|
omap_uart_enable_clocks(uart);
|
|
|
|
|
|
|
|
/* Check for IO pad wakeup */
|
|
|
|
if (cpu_is_omap34xx() && uart->padconf) {
|
|
|
|
u16 p = omap_ctrl_readw(uart->padconf);
|
|
|
|
|
|
|
|
if (p & OMAP3_PADCONF_WAKEUPEVENT0)
|
|
|
|
omap_uart_block_sleep(uart);
|
2008-10-06 20:49:15 +08:00
|
|
|
}
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-05 02:51:40 +08:00
|
|
|
|
|
|
|
/* Check for normal UART wakeup */
|
|
|
|
if (__raw_readl(uart->wk_st) & uart->wk_mask)
|
|
|
|
omap_uart_block_sleep(uart);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
void omap_uart_prepare_suspend(void)
|
|
|
|
{
|
|
|
|
struct omap_uart_state *uart;
|
|
|
|
|
|
|
|
list_for_each_entry(uart, &uart_list, node) {
|
|
|
|
omap_uart_allow_sleep(uart);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
int omap_uart_can_sleep(void)
|
|
|
|
{
|
|
|
|
struct omap_uart_state *uart;
|
|
|
|
int can_sleep = 1;
|
|
|
|
|
|
|
|
list_for_each_entry(uart, &uart_list, node) {
|
|
|
|
if (!uart->clocked)
|
|
|
|
continue;
|
|
|
|
|
|
|
|
if (!uart->can_sleep) {
|
|
|
|
can_sleep = 0;
|
|
|
|
continue;
|
2008-10-06 20:49:15 +08:00
|
|
|
}
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-05 02:51:40 +08:00
|
|
|
|
|
|
|
/* This UART can now safely sleep. */
|
|
|
|
omap_uart_allow_sleep(uart);
|
2008-10-06 20:49:15 +08:00
|
|
|
}
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-05 02:51:40 +08:00
|
|
|
|
|
|
|
return can_sleep;
|
2008-10-06 20:49:15 +08:00
|
|
|
}
|
|
|
|
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-05 02:51:40 +08:00
|
|
|
/**
|
|
|
|
* omap_uart_interrupt()
|
|
|
|
*
|
|
|
|
* This handler is used only to detect that *any* UART interrupt has
|
|
|
|
* occurred. It does _nothing_ to handle the interrupt. Rather,
|
|
|
|
* any UART interrupt will trigger the inactivity timer so the
|
|
|
|
* UART will not idle or sleep for its timeout period.
|
|
|
|
*
|
|
|
|
**/
|
2010-09-27 22:49:38 +08:00
|
|
|
/* static int first_interrupt; */
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-05 02:51:40 +08:00
|
|
|
static irqreturn_t omap_uart_interrupt(int irq, void *dev_id)
|
|
|
|
{
|
|
|
|
struct omap_uart_state *uart = dev_id;
|
|
|
|
|
|
|
|
omap_uart_block_sleep(uart);
|
|
|
|
|
|
|
|
return IRQ_NONE;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void omap_uart_idle_init(struct omap_uart_state *uart)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
uart->can_sleep = 0;
|
2009-04-28 03:27:36 +08:00
|
|
|
uart->timeout = DEFAULT_TIMEOUT;
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-05 02:51:40 +08:00
|
|
|
setup_timer(&uart->timer, omap_uart_idle_timer,
|
|
|
|
(unsigned long) uart);
|
2010-02-02 04:34:31 +08:00
|
|
|
if (uart->timeout)
|
|
|
|
mod_timer(&uart->timer, jiffies + uart->timeout);
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-05 02:51:40 +08:00
|
|
|
omap_uart_smart_idle_enable(uart, 0);
|
|
|
|
|
2011-02-17 00:31:39 +08:00
|
|
|
if (cpu_is_omap34xx() && !cpu_is_ti816x()) {
|
2010-09-27 22:50:41 +08:00
|
|
|
u32 mod = (uart->num > 1) ? OMAP3430_PER_MOD : CORE_MOD;
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-05 02:51:40 +08:00
|
|
|
u32 wk_mask = 0;
|
|
|
|
u32 padconf = 0;
|
|
|
|
|
2010-12-22 12:05:14 +08:00
|
|
|
/* XXX These PRM accesses do not belong here */
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-05 02:51:40 +08:00
|
|
|
uart->wk_en = OMAP34XX_PRM_REGADDR(mod, PM_WKEN1);
|
|
|
|
uart->wk_st = OMAP34XX_PRM_REGADDR(mod, PM_WKST1);
|
|
|
|
switch (uart->num) {
|
|
|
|
case 0:
|
|
|
|
wk_mask = OMAP3430_ST_UART1_MASK;
|
|
|
|
padconf = 0x182;
|
|
|
|
break;
|
|
|
|
case 1:
|
|
|
|
wk_mask = OMAP3430_ST_UART2_MASK;
|
|
|
|
padconf = 0x17a;
|
|
|
|
break;
|
|
|
|
case 2:
|
|
|
|
wk_mask = OMAP3430_ST_UART3_MASK;
|
|
|
|
padconf = 0x19e;
|
|
|
|
break;
|
2010-09-27 22:50:41 +08:00
|
|
|
case 3:
|
|
|
|
wk_mask = OMAP3630_ST_UART4_MASK;
|
|
|
|
padconf = 0x0d2;
|
|
|
|
break;
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-05 02:51:40 +08:00
|
|
|
}
|
|
|
|
uart->wk_mask = wk_mask;
|
|
|
|
uart->padconf = padconf;
|
|
|
|
} else if (cpu_is_omap24xx()) {
|
|
|
|
u32 wk_mask = 0;
|
2010-10-21 07:19:03 +08:00
|
|
|
u32 wk_en = PM_WKEN1, wk_st = PM_WKST1;
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-05 02:51:40 +08:00
|
|
|
|
|
|
|
switch (uart->num) {
|
|
|
|
case 0:
|
|
|
|
wk_mask = OMAP24XX_ST_UART1_MASK;
|
|
|
|
break;
|
|
|
|
case 1:
|
|
|
|
wk_mask = OMAP24XX_ST_UART2_MASK;
|
|
|
|
break;
|
|
|
|
case 2:
|
2010-10-21 07:19:03 +08:00
|
|
|
wk_en = OMAP24XX_PM_WKEN2;
|
|
|
|
wk_st = OMAP24XX_PM_WKST2;
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-05 02:51:40 +08:00
|
|
|
wk_mask = OMAP24XX_ST_UART3_MASK;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
uart->wk_mask = wk_mask;
|
2010-10-21 07:19:03 +08:00
|
|
|
if (cpu_is_omap2430()) {
|
|
|
|
uart->wk_en = OMAP2430_PRM_REGADDR(CORE_MOD, wk_en);
|
|
|
|
uart->wk_st = OMAP2430_PRM_REGADDR(CORE_MOD, wk_st);
|
|
|
|
} else if (cpu_is_omap2420()) {
|
|
|
|
uart->wk_en = OMAP2420_PRM_REGADDR(CORE_MOD, wk_en);
|
|
|
|
uart->wk_st = OMAP2420_PRM_REGADDR(CORE_MOD, wk_st);
|
|
|
|
}
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-05 02:51:40 +08:00
|
|
|
} else {
|
2010-08-02 18:18:11 +08:00
|
|
|
uart->wk_en = NULL;
|
|
|
|
uart->wk_st = NULL;
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-05 02:51:40 +08:00
|
|
|
uart->wk_mask = 0;
|
|
|
|
uart->padconf = 0;
|
|
|
|
}
|
|
|
|
|
2010-09-27 22:49:38 +08:00
|
|
|
uart->irqflags |= IRQF_SHARED;
|
|
|
|
ret = request_threaded_irq(uart->irq, NULL, omap_uart_interrupt,
|
|
|
|
IRQF_SHARED, "serial idle", (void *)uart);
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-05 02:51:40 +08:00
|
|
|
WARN_ON(ret);
|
|
|
|
}
|
|
|
|
|
2009-03-05 22:32:23 +08:00
|
|
|
void omap_uart_enable_irqs(int enable)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
struct omap_uart_state *uart;
|
|
|
|
|
|
|
|
list_for_each_entry(uart, &uart_list, node) {
|
2010-09-27 22:49:53 +08:00
|
|
|
if (enable) {
|
|
|
|
pm_runtime_put_sync(&uart->pdev->dev);
|
2010-09-27 22:49:38 +08:00
|
|
|
ret = request_threaded_irq(uart->irq, NULL,
|
|
|
|
omap_uart_interrupt,
|
|
|
|
IRQF_SHARED,
|
|
|
|
"serial idle",
|
|
|
|
(void *)uart);
|
2010-09-27 22:49:53 +08:00
|
|
|
} else {
|
|
|
|
pm_runtime_get_noresume(&uart->pdev->dev);
|
2010-09-27 22:49:38 +08:00
|
|
|
free_irq(uart->irq, (void *)uart);
|
2010-09-27 22:49:53 +08:00
|
|
|
}
|
2009-03-05 22:32:23 +08:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2009-04-28 03:27:36 +08:00
|
|
|
static ssize_t sleep_timeout_show(struct device *dev,
|
|
|
|
struct device_attribute *attr,
|
2008-12-09 19:36:50 +08:00
|
|
|
char *buf)
|
|
|
|
{
|
2010-09-27 22:49:38 +08:00
|
|
|
struct platform_device *pdev = to_platform_device(dev);
|
|
|
|
struct omap_device *odev = to_omap_device(pdev);
|
|
|
|
struct omap_uart_state *uart = odev->hwmods[0]->dev_attr;
|
2009-04-28 03:27:36 +08:00
|
|
|
|
|
|
|
return sprintf(buf, "%u\n", uart->timeout / HZ);
|
2008-12-09 19:36:50 +08:00
|
|
|
}
|
|
|
|
|
2009-04-28 03:27:36 +08:00
|
|
|
static ssize_t sleep_timeout_store(struct device *dev,
|
|
|
|
struct device_attribute *attr,
|
2008-12-09 19:36:50 +08:00
|
|
|
const char *buf, size_t n)
|
|
|
|
{
|
2010-09-27 22:49:38 +08:00
|
|
|
struct platform_device *pdev = to_platform_device(dev);
|
|
|
|
struct omap_device *odev = to_omap_device(pdev);
|
|
|
|
struct omap_uart_state *uart = odev->hwmods[0]->dev_attr;
|
2008-12-09 19:36:50 +08:00
|
|
|
unsigned int value;
|
|
|
|
|
|
|
|
if (sscanf(buf, "%u", &value) != 1) {
|
2010-03-10 03:22:14 +08:00
|
|
|
dev_err(dev, "sleep_timeout_store: Invalid value\n");
|
2008-12-09 19:36:50 +08:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
2009-04-28 03:27:36 +08:00
|
|
|
|
|
|
|
uart->timeout = value * HZ;
|
|
|
|
if (uart->timeout)
|
|
|
|
mod_timer(&uart->timer, jiffies + uart->timeout);
|
|
|
|
else
|
|
|
|
/* A zero value means disable timeout feature */
|
|
|
|
omap_uart_block_sleep(uart);
|
|
|
|
|
2008-12-09 19:36:50 +08:00
|
|
|
return n;
|
|
|
|
}
|
|
|
|
|
2010-08-02 18:18:12 +08:00
|
|
|
static DEVICE_ATTR(sleep_timeout, 0644, sleep_timeout_show,
|
|
|
|
sleep_timeout_store);
|
2009-04-28 03:27:36 +08:00
|
|
|
#define DEV_CREATE_FILE(dev, attr) WARN_ON(device_create_file(dev, attr))
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-05 02:51:40 +08:00
|
|
|
#else
|
|
|
|
static inline void omap_uart_idle_init(struct omap_uart_state *uart) {}
|
2010-10-11 19:05:18 +08:00
|
|
|
static void omap_uart_block_sleep(struct omap_uart_state *uart)
|
|
|
|
{
|
|
|
|
/* Needed to enable UART clocks when built without CONFIG_PM */
|
|
|
|
omap_uart_enable_clocks(uart);
|
|
|
|
}
|
2009-04-28 03:27:36 +08:00
|
|
|
#define DEV_CREATE_FILE(dev, attr)
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-05 02:51:40 +08:00
|
|
|
#endif /* CONFIG_PM */
|
|
|
|
|
2010-09-27 22:49:38 +08:00
|
|
|
#ifndef CONFIG_SERIAL_OMAP
|
2009-12-12 08:16:37 +08:00
|
|
|
/*
|
|
|
|
* Override the default 8250 read handler: mem_serial_in()
|
|
|
|
* Empty RX fifo read causes an abort on omap3630 and omap4
|
|
|
|
* This function makes sure that an empty rx fifo is not read on these silicons
|
|
|
|
* (OMAP1/2/3430 are not affected)
|
|
|
|
*/
|
|
|
|
static unsigned int serial_in_override(struct uart_port *up, int offset)
|
|
|
|
{
|
|
|
|
if (UART_RX == offset) {
|
|
|
|
unsigned int lsr;
|
2010-01-09 02:29:06 +08:00
|
|
|
lsr = __serial_read_reg(up, UART_LSR);
|
2009-12-12 08:16:37 +08:00
|
|
|
if (!(lsr & UART_LSR_DR))
|
|
|
|
return -EPERM;
|
|
|
|
}
|
2010-01-09 02:29:06 +08:00
|
|
|
|
|
|
|
return __serial_read_reg(up, offset);
|
2009-12-12 08:16:37 +08:00
|
|
|
}
|
|
|
|
|
2010-02-18 16:59:06 +08:00
|
|
|
static void serial_out_override(struct uart_port *up, int offset, int value)
|
|
|
|
{
|
|
|
|
unsigned int status, tmout = 10000;
|
|
|
|
|
|
|
|
status = __serial_read_reg(up, UART_LSR);
|
|
|
|
while (!(status & UART_LSR_THRE)) {
|
|
|
|
/* Wait up to 10ms for the character(s) to be sent. */
|
|
|
|
if (--tmout == 0)
|
|
|
|
break;
|
|
|
|
udelay(1);
|
|
|
|
status = __serial_read_reg(up, UART_LSR);
|
|
|
|
}
|
|
|
|
__serial_write_reg(up, offset, value);
|
|
|
|
}
|
2010-09-27 22:49:38 +08:00
|
|
|
#endif
|
|
|
|
|
2011-02-15 07:40:20 +08:00
|
|
|
static int __init omap_serial_early_init(void)
|
2005-11-10 22:26:51 +08:00
|
|
|
{
|
2010-09-27 22:49:38 +08:00
|
|
|
int i = 0;
|
2005-11-10 22:26:51 +08:00
|
|
|
|
2010-09-27 22:49:38 +08:00
|
|
|
do {
|
|
|
|
char oh_name[MAX_UART_HWMOD_NAME_LEN];
|
|
|
|
struct omap_hwmod *oh;
|
|
|
|
struct omap_uart_state *uart;
|
2010-02-25 17:40:19 +08:00
|
|
|
|
2010-09-27 22:49:38 +08:00
|
|
|
snprintf(oh_name, MAX_UART_HWMOD_NAME_LEN,
|
|
|
|
"uart%d", i + 1);
|
|
|
|
oh = omap_hwmod_lookup(oh_name);
|
|
|
|
if (!oh)
|
|
|
|
break;
|
|
|
|
|
|
|
|
uart = kzalloc(sizeof(struct omap_uart_state), GFP_KERNEL);
|
|
|
|
if (WARN_ON(!uart))
|
2011-02-15 07:40:20 +08:00
|
|
|
return -ENODEV;
|
2005-11-10 22:26:51 +08:00
|
|
|
|
2010-09-27 22:49:38 +08:00
|
|
|
uart->oh = oh;
|
|
|
|
uart->num = i++;
|
|
|
|
list_add_tail(&uart->node, &uart_list);
|
|
|
|
num_uarts++;
|
2005-11-10 22:26:51 +08:00
|
|
|
|
2009-10-17 00:53:00 +08:00
|
|
|
/*
|
2011-03-01 02:58:14 +08:00
|
|
|
* NOTE: omap_hwmod_setup*() has not yet been called,
|
2010-09-27 22:49:38 +08:00
|
|
|
* so no hwmod functions will work yet.
|
2009-10-17 00:53:00 +08:00
|
|
|
*/
|
2008-10-06 20:49:15 +08:00
|
|
|
|
2010-09-27 22:49:38 +08:00
|
|
|
/*
|
|
|
|
* During UART early init, device need to be probed
|
|
|
|
* to determine SoC specific init before omap_device
|
|
|
|
* is ready. Therefore, don't allow idle here
|
|
|
|
*/
|
|
|
|
uart->oh->flags |= HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET;
|
|
|
|
} while (1);
|
2011-02-15 07:40:20 +08:00
|
|
|
|
|
|
|
return 0;
|
2009-09-04 01:14:02 +08:00
|
|
|
}
|
2011-02-15 07:40:20 +08:00
|
|
|
core_initcall(omap_serial_early_init);
|
2009-09-04 01:14:02 +08:00
|
|
|
|
2009-12-12 08:16:35 +08:00
|
|
|
/**
|
|
|
|
* omap_serial_init_port() - initialize single serial port
|
2010-12-23 10:42:35 +08:00
|
|
|
* @bdata: port specific board data pointer
|
2009-12-12 08:16:35 +08:00
|
|
|
*
|
2010-12-23 10:42:35 +08:00
|
|
|
* This function initialies serial driver for given port only.
|
2009-12-12 08:16:35 +08:00
|
|
|
* Platforms can call this function instead of omap_serial_init()
|
|
|
|
* if they don't plan to use all available UARTs as serial ports.
|
|
|
|
*
|
|
|
|
* Don't mix calls to omap_serial_init_port() and omap_serial_init(),
|
|
|
|
* use only one of the two.
|
|
|
|
*/
|
2010-12-23 10:42:35 +08:00
|
|
|
void __init omap_serial_init_port(struct omap_board_data *bdata)
|
2009-09-04 01:14:02 +08:00
|
|
|
{
|
2009-12-12 08:16:35 +08:00
|
|
|
struct omap_uart_state *uart;
|
2010-09-27 22:49:38 +08:00
|
|
|
struct omap_hwmod *oh;
|
|
|
|
struct omap_device *od;
|
|
|
|
void *pdata = NULL;
|
|
|
|
u32 pdata_size = 0;
|
|
|
|
char *name;
|
|
|
|
#ifndef CONFIG_SERIAL_OMAP
|
|
|
|
struct plat_serial8250_port ports[2] = {
|
|
|
|
{},
|
|
|
|
{.flags = 0},
|
|
|
|
};
|
|
|
|
struct plat_serial8250_port *p = &ports[0];
|
|
|
|
#else
|
|
|
|
struct omap_uart_port_info omap_up;
|
|
|
|
#endif
|
2009-05-29 06:44:54 +08:00
|
|
|
|
2010-12-23 10:42:35 +08:00
|
|
|
if (WARN_ON(!bdata))
|
2010-09-27 22:49:38 +08:00
|
|
|
return;
|
2010-12-23 10:42:35 +08:00
|
|
|
if (WARN_ON(bdata->id < 0))
|
|
|
|
return;
|
|
|
|
if (WARN_ON(bdata->id >= num_uarts))
|
2010-02-28 04:13:43 +08:00
|
|
|
return;
|
2009-12-12 08:16:35 +08:00
|
|
|
|
2010-09-27 22:49:38 +08:00
|
|
|
list_for_each_entry(uart, &uart_list, node)
|
2010-12-23 10:42:35 +08:00
|
|
|
if (bdata->id == uart->num)
|
2010-09-27 22:49:38 +08:00
|
|
|
break;
|
2009-12-14 21:59:18 +08:00
|
|
|
|
2010-09-27 22:49:38 +08:00
|
|
|
oh = uart->oh;
|
|
|
|
uart->dma_enabled = 0;
|
|
|
|
#ifndef CONFIG_SERIAL_OMAP
|
|
|
|
name = "serial8250";
|
2009-12-12 08:16:35 +08:00
|
|
|
|
2010-09-27 22:49:38 +08:00
|
|
|
/*
|
|
|
|
* !! 8250 driver does not use standard IORESOURCE* It
|
|
|
|
* has it's own custom pdata that can be taken from
|
|
|
|
* the hwmod resource data. But, this needs to be
|
|
|
|
* done after the build.
|
|
|
|
*
|
|
|
|
* ?? does it have to be done before the register ??
|
|
|
|
* YES, because platform_device_data_add() copies
|
|
|
|
* pdata, it does not use a pointer.
|
|
|
|
*/
|
|
|
|
p->flags = UPF_BOOT_AUTOCONF;
|
|
|
|
p->iotype = UPIO_MEM;
|
|
|
|
p->regshift = 2;
|
|
|
|
p->uartclk = OMAP24XX_BASE_BAUD * 16;
|
|
|
|
p->irq = oh->mpu_irqs[0].irq;
|
|
|
|
p->mapbase = oh->slaves[0]->addr->pa_start;
|
|
|
|
p->membase = omap_hwmod_get_mpu_rt_va(oh);
|
|
|
|
p->irqflags = IRQF_SHARED;
|
|
|
|
p->private_data = uart;
|
2009-12-12 08:16:35 +08:00
|
|
|
|
2010-02-16 02:03:33 +08:00
|
|
|
/*
|
2011-02-17 00:31:39 +08:00
|
|
|
* omap44xx, ti816x: Never read empty UART fifo
|
2010-02-16 02:03:33 +08:00
|
|
|
* omap3xxx: Never read empty UART fifo on UARTs
|
|
|
|
* with IP rev >=0x52
|
|
|
|
*/
|
2010-09-27 22:49:38 +08:00
|
|
|
uart->regshift = p->regshift;
|
|
|
|
uart->membase = p->membase;
|
2011-02-17 00:31:39 +08:00
|
|
|
if (cpu_is_omap44xx() || cpu_is_ti816x())
|
2010-08-02 18:18:12 +08:00
|
|
|
uart->errata |= UART_ERRATA_FIFO_FULL_ABORT;
|
2010-09-27 22:49:38 +08:00
|
|
|
else if ((serial_read_reg(uart, UART_OMAP_MVER) & 0xFF)
|
2010-08-02 18:18:12 +08:00
|
|
|
>= UART_OMAP_NO_EMPTY_FIFO_READ_IP_REV)
|
|
|
|
uart->errata |= UART_ERRATA_FIFO_FULL_ABORT;
|
|
|
|
|
|
|
|
if (uart->errata & UART_ERRATA_FIFO_FULL_ABORT) {
|
2010-09-27 22:49:38 +08:00
|
|
|
p->serial_in = serial_in_override;
|
|
|
|
p->serial_out = serial_out_override;
|
|
|
|
}
|
|
|
|
|
|
|
|
pdata = &ports[0];
|
|
|
|
pdata_size = 2 * sizeof(struct plat_serial8250_port);
|
|
|
|
#else
|
|
|
|
|
|
|
|
name = DRIVER_NAME;
|
|
|
|
|
|
|
|
omap_up.dma_enabled = uart->dma_enabled;
|
|
|
|
omap_up.uartclk = OMAP24XX_BASE_BAUD * 16;
|
|
|
|
omap_up.mapbase = oh->slaves[0]->addr->pa_start;
|
|
|
|
omap_up.membase = omap_hwmod_get_mpu_rt_va(oh);
|
|
|
|
omap_up.irqflags = IRQF_SHARED;
|
|
|
|
omap_up.flags = UPF_BOOT_AUTOCONF | UPF_SHARE_IRQ;
|
|
|
|
|
|
|
|
pdata = &omap_up;
|
|
|
|
pdata_size = sizeof(struct omap_uart_port_info);
|
|
|
|
#endif
|
|
|
|
|
|
|
|
if (WARN_ON(!oh))
|
|
|
|
return;
|
|
|
|
|
|
|
|
od = omap_device_build(name, uart->num, oh, pdata, pdata_size,
|
|
|
|
omap_uart_latency,
|
|
|
|
ARRAY_SIZE(omap_uart_latency), false);
|
|
|
|
WARN(IS_ERR(od), "Could not build omap_device for %s: %s.\n",
|
|
|
|
name, oh->name);
|
|
|
|
|
2010-12-23 10:42:35 +08:00
|
|
|
oh->mux = omap_hwmod_mux_init(bdata->pads, bdata->pads_cnt);
|
|
|
|
|
2010-09-27 22:49:38 +08:00
|
|
|
uart->irq = oh->mpu_irqs[0].irq;
|
|
|
|
uart->regshift = 2;
|
|
|
|
uart->mapbase = oh->slaves[0]->addr->pa_start;
|
|
|
|
uart->membase = omap_hwmod_get_mpu_rt_va(oh);
|
|
|
|
uart->pdev = &od->pdev;
|
|
|
|
|
|
|
|
oh->dev_attr = uart;
|
|
|
|
|
2011-01-26 07:07:35 +08:00
|
|
|
console_lock(); /* in case the earlycon is on the UART */
|
OMAP2+: PM/serial: hold console semaphore while OMAP UARTs are disabled
The console semaphore must be held while the OMAP UART devices are
disabled, lest a console write cause an ARM abort (and a kernel crash)
when the underlying console device is inaccessible. These crashes
only occur when the console is on one of the OMAP internal serial
ports.
While this problem has been latent in the PM idle loop for some time,
the crash was not triggerable with an unmodified kernel until commit
6f251e9db1093c187addc309b5f2f7fe3efd2995 ("OMAP: UART: omap_device
conversions, remove implicit 8520 assumptions"). After this patch, a
console write often occurs after the console UART has been disabled in
the idle loop, crashing the system. Several users have encountered
this bug:
http://www.mail-archive.com/linux-omap@vger.kernel.org/msg38396.html
http://www.mail-archive.com/linux-omap@vger.kernel.org/msg36602.html
The same commit also introduced new code that disabled the UARTs
during init, in omap_serial_init_port(). The kernel will also crash
in this code when earlyconsole and extra debugging is enabled:
http://www.mail-archive.com/linux-omap@vger.kernel.org/msg36411.html
The minimal fix for the -rc series is to hold the console semaphore
while the OMAP UARTs are disabled. This is a somewhat overbroad fix,
since the console may not be located on an OMAP UART, as is the case
with the GPMC UART on Zoom3. While it is technically possible to
determine which devices the console or earlyconsole is actually
running on, it is not a trivial problem to solve, and the code to do
so is not really appropriate for the -rc series.
The right long-term fix is to ensure that no code outside of the OMAP
serial driver can disable an OMAP UART. As I understand it, code to
implement this is under development by TI.
This patch is a collaboration between Paul Walmsley <paul@pwsan.com>
and Tony Lindgren <tony@atomide.com>. Thanks to Ming Lei
<tom.leiming@gmail.com> and Pramod <pramod.gurav@ti.com> for their
feedback on earlier versions of this patch.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Acked-by: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Ming Lei <tom.leiming@gmail.com>
Cc: Pramod <pramod.gurav@ti.com>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Jean Pihet <jean.pihet@newoldbits.com>
Cc: Govindraj.R <govindraj.raja@ti.com>
2010-11-25 07:49:05 +08:00
|
|
|
|
2010-09-27 22:49:38 +08:00
|
|
|
/*
|
|
|
|
* Because of early UART probing, UART did not get idled
|
|
|
|
* on init. Now that omap_device is ready, ensure full idle
|
|
|
|
* before doing omap_device_enable().
|
|
|
|
*/
|
|
|
|
omap_hwmod_idle(uart->oh);
|
|
|
|
|
|
|
|
omap_device_enable(uart->pdev);
|
|
|
|
omap_uart_idle_init(uart);
|
|
|
|
omap_uart_reset(uart);
|
|
|
|
omap_hwmod_enable_wakeup(uart->oh);
|
|
|
|
omap_device_idle(uart->pdev);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Need to block sleep long enough for interrupt driven
|
|
|
|
* driver to start. Console driver is in polling mode
|
|
|
|
* so device needs to be kept enabled while polling driver
|
|
|
|
* is in use.
|
|
|
|
*/
|
|
|
|
if (uart->timeout)
|
|
|
|
uart->timeout = (30 * HZ);
|
|
|
|
omap_uart_block_sleep(uart);
|
|
|
|
uart->timeout = DEFAULT_TIMEOUT;
|
|
|
|
|
2011-01-26 07:07:35 +08:00
|
|
|
console_unlock();
|
OMAP2+: PM/serial: hold console semaphore while OMAP UARTs are disabled
The console semaphore must be held while the OMAP UART devices are
disabled, lest a console write cause an ARM abort (and a kernel crash)
when the underlying console device is inaccessible. These crashes
only occur when the console is on one of the OMAP internal serial
ports.
While this problem has been latent in the PM idle loop for some time,
the crash was not triggerable with an unmodified kernel until commit
6f251e9db1093c187addc309b5f2f7fe3efd2995 ("OMAP: UART: omap_device
conversions, remove implicit 8520 assumptions"). After this patch, a
console write often occurs after the console UART has been disabled in
the idle loop, crashing the system. Several users have encountered
this bug:
http://www.mail-archive.com/linux-omap@vger.kernel.org/msg38396.html
http://www.mail-archive.com/linux-omap@vger.kernel.org/msg36602.html
The same commit also introduced new code that disabled the UARTs
during init, in omap_serial_init_port(). The kernel will also crash
in this code when earlyconsole and extra debugging is enabled:
http://www.mail-archive.com/linux-omap@vger.kernel.org/msg36411.html
The minimal fix for the -rc series is to hold the console semaphore
while the OMAP UARTs are disabled. This is a somewhat overbroad fix,
since the console may not be located on an OMAP UART, as is the case
with the GPMC UART on Zoom3. While it is technically possible to
determine which devices the console or earlyconsole is actually
running on, it is not a trivial problem to solve, and the code to do
so is not really appropriate for the -rc series.
The right long-term fix is to ensure that no code outside of the OMAP
serial driver can disable an OMAP UART. As I understand it, code to
implement this is under development by TI.
This patch is a collaboration between Paul Walmsley <paul@pwsan.com>
and Tony Lindgren <tony@atomide.com>. Thanks to Ming Lei
<tom.leiming@gmail.com> and Pramod <pramod.gurav@ti.com> for their
feedback on earlier versions of this patch.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Acked-by: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Ming Lei <tom.leiming@gmail.com>
Cc: Pramod <pramod.gurav@ti.com>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Jean Pihet <jean.pihet@newoldbits.com>
Cc: Govindraj.R <govindraj.raja@ti.com>
2010-11-25 07:49:05 +08:00
|
|
|
|
2010-09-27 22:49:38 +08:00
|
|
|
if ((cpu_is_omap34xx() && uart->padconf) ||
|
|
|
|
(uart->wk_en && uart->wk_mask)) {
|
|
|
|
device_init_wakeup(&od->pdev.dev, true);
|
|
|
|
DEV_CREATE_FILE(&od->pdev.dev, &dev_attr_sleep_timeout);
|
2010-02-18 16:59:06 +08:00
|
|
|
}
|
2010-08-02 18:18:12 +08:00
|
|
|
|
|
|
|
/* Enable the MDR1 errata for OMAP3 */
|
2011-02-17 00:31:39 +08:00
|
|
|
if (cpu_is_omap34xx() && !cpu_is_ti816x())
|
2010-08-02 18:18:12 +08:00
|
|
|
uart->errata |= UART_ERRATA_i202_MDR1_ACCESS;
|
2009-12-12 08:16:35 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
tree-wide: fix comment/printk typos
"gadget", "through", "command", "maintain", "maintain", "controller", "address",
"between", "initiali[zs]e", "instead", "function", "select", "already",
"equal", "access", "management", "hierarchy", "registration", "interest",
"relative", "memory", "offset", "already",
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2010-11-02 03:38:34 +08:00
|
|
|
* omap_serial_init() - initialize all supported serial ports
|
2009-12-12 08:16:35 +08:00
|
|
|
*
|
|
|
|
* Initializes all available UARTs as serial ports. Platforms
|
|
|
|
* can call this function when they want to have default behaviour
|
|
|
|
* for serial ports (e.g initialize them all as serial ports).
|
|
|
|
*/
|
|
|
|
void __init omap_serial_init(void)
|
|
|
|
{
|
2010-09-27 22:49:38 +08:00
|
|
|
struct omap_uart_state *uart;
|
2010-12-23 10:42:35 +08:00
|
|
|
struct omap_board_data bdata;
|
2009-12-12 08:16:35 +08:00
|
|
|
|
2010-12-23 10:42:35 +08:00
|
|
|
list_for_each_entry(uart, &uart_list, node) {
|
|
|
|
bdata.id = uart->num;
|
|
|
|
bdata.flags = 0;
|
|
|
|
bdata.pads = NULL;
|
|
|
|
bdata.pads_cnt = 0;
|
|
|
|
omap_serial_init_port(&bdata);
|
|
|
|
|
|
|
|
}
|
2005-11-10 22:26:51 +08:00
|
|
|
}
|