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https://github.com/edk2-porting/linux-next.git
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207 lines
5.6 KiB
C
207 lines
5.6 KiB
C
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/*
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* include/linux/mg_disk.c
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*
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* Support for the mGine m[g]flash IO mode.
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* Based on legacy hd.c
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*
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* (c) 2008 mGine Co.,LTD
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* (c) 2008 unsik Kim <donari75@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __MG_DISK_H__
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#define __MG_DISK_H__
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#include <linux/blkdev.h>
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#include <linux/ata.h>
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/* name for block device */
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#define MG_DISK_NAME "mgd"
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/* name for platform device */
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#define MG_DEV_NAME "mg_disk"
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#define MG_DISK_MAJ 0
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#define MG_DISK_MAX_PART 16
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#define MG_SECTOR_SIZE 512
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#define MG_MAX_SECTS 256
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/* Register offsets */
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#define MG_BUFF_OFFSET 0x8000
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#define MG_STORAGE_BUFFER_SIZE 0x200
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#define MG_REG_OFFSET 0xC000
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#define MG_REG_FEATURE (MG_REG_OFFSET + 2) /* write case */
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#define MG_REG_ERROR (MG_REG_OFFSET + 2) /* read case */
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#define MG_REG_SECT_CNT (MG_REG_OFFSET + 4)
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#define MG_REG_SECT_NUM (MG_REG_OFFSET + 6)
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#define MG_REG_CYL_LOW (MG_REG_OFFSET + 8)
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#define MG_REG_CYL_HIGH (MG_REG_OFFSET + 0xA)
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#define MG_REG_DRV_HEAD (MG_REG_OFFSET + 0xC)
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#define MG_REG_COMMAND (MG_REG_OFFSET + 0xE) /* write case */
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#define MG_REG_STATUS (MG_REG_OFFSET + 0xE) /* read case */
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#define MG_REG_DRV_CTRL (MG_REG_OFFSET + 0x10)
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#define MG_REG_BURST_CTRL (MG_REG_OFFSET + 0x12)
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/* "Drive Select/Head Register" bit values */
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#define MG_REG_HEAD_MUST_BE_ON 0xA0 /* These 2 bits are always on */
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#define MG_REG_HEAD_DRIVE_MASTER (0x00 | MG_REG_HEAD_MUST_BE_ON)
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#define MG_REG_HEAD_DRIVE_SLAVE (0x10 | MG_REG_HEAD_MUST_BE_ON)
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#define MG_REG_HEAD_LBA_MODE (0x40 | MG_REG_HEAD_MUST_BE_ON)
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/* "Device Control Register" bit values */
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#define MG_REG_CTRL_INTR_ENABLE 0x0
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#define MG_REG_CTRL_INTR_DISABLE (0x1<<1)
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#define MG_REG_CTRL_RESET (0x1<<2)
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#define MG_REG_CTRL_INTR_POLA_ACTIVE_HIGH 0x0
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#define MG_REG_CTRL_INTR_POLA_ACTIVE_LOW (0x1<<4)
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#define MG_REG_CTRL_DPD_POLA_ACTIVE_LOW 0x0
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#define MG_REG_CTRL_DPD_POLA_ACTIVE_HIGH (0x1<<5)
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#define MG_REG_CTRL_DPD_DISABLE 0x0
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#define MG_REG_CTRL_DPD_ENABLE (0x1<<6)
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/* Status register bit */
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/* error bit in status register */
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#define MG_REG_STATUS_BIT_ERROR 0x01
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/* corrected error in status register */
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#define MG_REG_STATUS_BIT_CORRECTED_ERROR 0x04
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/* data request bit in status register */
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#define MG_REG_STATUS_BIT_DATA_REQ 0x08
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/* DSC - Drive Seek Complete */
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#define MG_REG_STATUS_BIT_SEEK_DONE 0x10
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/* DWF - Drive Write Fault */
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#define MG_REG_STATUS_BIT_WRITE_FAULT 0x20
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#define MG_REG_STATUS_BIT_READY 0x40
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#define MG_REG_STATUS_BIT_BUSY 0x80
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/* handy status */
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#define MG_STAT_READY (MG_REG_STATUS_BIT_READY | MG_REG_STATUS_BIT_SEEK_DONE)
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#define MG_READY_OK(s) (((s) & (MG_STAT_READY | \
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(MG_REG_STATUS_BIT_BUSY | \
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MG_REG_STATUS_BIT_WRITE_FAULT | \
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MG_REG_STATUS_BIT_ERROR))) == MG_STAT_READY)
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/* Error register */
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#define MG_REG_ERR_AMNF 0x01
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#define MG_REG_ERR_ABRT 0x04
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#define MG_REG_ERR_IDNF 0x10
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#define MG_REG_ERR_UNC 0x40
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#define MG_REG_ERR_BBK 0x80
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/* error code for others */
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#define MG_ERR_NONE 0
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#define MG_ERR_TIMEOUT 0x100
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#define MG_ERR_INIT_STAT 0x101
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#define MG_ERR_TRANSLATION 0x102
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#define MG_ERR_CTRL_RST 0x103
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#define MG_ERR_INV_STAT 0x104
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#define MG_ERR_RSTOUT 0x105
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#define MG_MAX_ERRORS 6 /* Max read/write errors */
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/* command */
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#define MG_CMD_RD 0x20
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#define MG_CMD_WR 0x30
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#define MG_CMD_SLEEP 0x99
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#define MG_CMD_WAKEUP 0xC3
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#define MG_CMD_ID 0xEC
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#define MG_CMD_WR_CONF 0x3C
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#define MG_CMD_RD_CONF 0x40
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/* operation mode */
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#define MG_OP_CASCADE (1 << 0)
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#define MG_OP_CASCADE_SYNC_RD (1 << 1)
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#define MG_OP_CASCADE_SYNC_WR (1 << 2)
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#define MG_OP_INTERLEAVE (1 << 3)
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/* synchronous */
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#define MG_BURST_LAT_4 (3 << 4)
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#define MG_BURST_LAT_5 (4 << 4)
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#define MG_BURST_LAT_6 (5 << 4)
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#define MG_BURST_LAT_7 (6 << 4)
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#define MG_BURST_LAT_8 (7 << 4)
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#define MG_BURST_LEN_4 (1 << 1)
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#define MG_BURST_LEN_8 (2 << 1)
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#define MG_BURST_LEN_16 (3 << 1)
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#define MG_BURST_LEN_32 (4 << 1)
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#define MG_BURST_LEN_CONT (0 << 1)
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/* timeout value (unit: ms) */
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#define MG_TMAX_CONF_TO_CMD 1
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#define MG_TMAX_WAIT_RD_DRQ 10
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#define MG_TMAX_WAIT_WR_DRQ 500
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#define MG_TMAX_RST_TO_BUSY 10
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#define MG_TMAX_HDRST_TO_RDY 500
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#define MG_TMAX_SWRST_TO_RDY 500
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#define MG_TMAX_RSTOUT 3000
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/* device attribution */
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/* use mflash as boot device */
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#define MG_BOOT_DEV (1 << 0)
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/* use mflash as storage device */
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#define MG_STORAGE_DEV (1 << 1)
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/* same as MG_STORAGE_DEV, but bootloader already done reset sequence */
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#define MG_STORAGE_DEV_SKIP_RST (1 << 2)
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#define MG_DEV_MASK (MG_BOOT_DEV | MG_STORAGE_DEV | MG_STORAGE_DEV_SKIP_RST)
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/* names of GPIO resource */
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#define MG_RST_PIN "mg_rst"
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/* except MG_BOOT_DEV, reset-out pin should be assigned */
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#define MG_RSTOUT_PIN "mg_rstout"
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/* private driver data */
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struct mg_drv_data {
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/* disk resource */
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u32 use_polling;
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/* device attribution */
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u32 dev_attr;
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/* internally used */
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struct mg_host *host;
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};
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/* main structure for mflash driver */
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struct mg_host {
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struct device *dev;
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struct request_queue *breq;
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spinlock_t lock;
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struct gendisk *gd;
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struct timer_list timer;
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void (*mg_do_intr) (struct mg_host *);
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u16 id[ATA_ID_WORDS];
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u16 cyls;
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u16 heads;
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u16 sectors;
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u32 n_sectors;
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u32 nres_sectors;
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void __iomem *dev_base;
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unsigned int irq;
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unsigned int rst;
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unsigned int rstout;
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u32 major;
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u32 error;
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};
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/*
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* Debugging macro and defines
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*/
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#undef DO_MG_DEBUG
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#ifdef DO_MG_DEBUG
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# define MG_DBG(fmt, args...) \
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printk(KERN_DEBUG "%s:%d "fmt, __func__, __LINE__, ##args)
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#else /* CONFIG_MG_DEBUG */
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# define MG_DBG(fmt, args...) do { } while (0)
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#endif /* CONFIG_MG_DEBUG */
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#endif
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