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101 lines
4.0 KiB
C
101 lines
4.0 KiB
C
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/*
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* Intel MIC Platform Software Stack (MPSS)
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*
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* This file is provided under a dual BSD/GPLv2 license. When using or
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* redistributing this file, you may do so under either license.
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*
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* GPL LICENSE SUMMARY
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*
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* Copyright(c) 2014 Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* BSD LICENSE
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*
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* Copyright(c) 2014 Intel Corporation.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Intel SCIF driver.
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*/
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#ifndef SCIF_RB_H
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#define SCIF_RB_H
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/*
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* This file describes a general purpose, byte based ring buffer. Writers to the
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* ring buffer need to synchronize using a lock. The same is true for readers,
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* although in practice, the ring buffer has a single reader. It is lockless
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* between producer and consumer so it can handle being used across the PCIe
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* bus. The ring buffer ensures that there are no reads across the PCIe bus for
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* performance reasons. Two of these are used to form a single bidirectional
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* queue-pair across PCIe.
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*/
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/*
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* struct scif_rb - SCIF Ring Buffer
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*
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* @rb_base: The base of the memory used for storing RB messages
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* @read_ptr: Pointer to the read offset
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* @write_ptr: Pointer to the write offset
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* @size: Size of the memory in rb_base
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* @current_read_offset: Cached read offset for performance
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* @current_write_offset: Cached write offset for performance
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*/
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struct scif_rb {
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void *rb_base;
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u32 *read_ptr;
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u32 *write_ptr;
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u32 size;
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u32 current_read_offset;
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u32 current_write_offset;
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};
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/* methods used by both */
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void scif_rb_init(struct scif_rb *rb, u32 *read_ptr, u32 *write_ptr,
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void *rb_base, u8 size);
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/* writer only methods */
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/* write a new command, then scif_rb_commit() */
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int scif_rb_write(struct scif_rb *rb, void *msg, u32 size);
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/* after write(), then scif_rb_commit() */
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void scif_rb_commit(struct scif_rb *rb);
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/* query space available for writing to a RB. */
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u32 scif_rb_space(struct scif_rb *rb);
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/* reader only methods */
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/* read a new message from the ring buffer of size bytes */
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u32 scif_rb_get_next(struct scif_rb *rb, void *msg, u32 size);
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/* update the read pointer so that the space can be reused */
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void scif_rb_update_read_ptr(struct scif_rb *rb);
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/* count the number of bytes that can be read */
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u32 scif_rb_count(struct scif_rb *rb, u32 size);
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#endif
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