2005-04-17 06:20:36 +08:00
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/*
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2007-07-12 02:04:50 +08:00
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* linux/drivers/mmc/host/pxa.c - PXA MMCI driver
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2005-04-17 06:20:36 +08:00
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*
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* Copyright (C) 2003 Russell King, All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This hardware is really sick:
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* - No way to clear interrupts.
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* - Have to turn off the clock whenever we touch the device.
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* - Doesn't tell you how many data blocks were transferred.
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* Yuck!
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*
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* 1 and 3 byte data transfers not supported
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* max block length up to 1023
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/ioport.h>
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2005-10-30 02:07:23 +08:00
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#include <linux/platform_device.h>
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2005-04-17 06:20:36 +08:00
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#include <linux/delay.h>
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#include <linux/interrupt.h>
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2015-06-07 05:15:22 +08:00
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#include <linux/dmaengine.h>
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2005-04-17 06:20:36 +08:00
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#include <linux/dma-mapping.h>
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2007-08-20 17:20:03 +08:00
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#include <linux/clk.h>
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#include <linux/err.h>
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2005-04-17 06:20:36 +08:00
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#include <linux/mmc/host.h>
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2015-09-27 03:41:01 +08:00
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#include <linux/mmc/slot-gpio.h>
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2008-11-29 00:04:54 +08:00
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#include <linux/io.h>
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2009-05-21 19:54:18 +08:00
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#include <linux/regulator/consumer.h>
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2009-06-24 05:21:03 +08:00
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#include <linux/gpio.h>
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include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-24 16:04:11 +08:00
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#include <linux/gfp.h>
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2012-07-28 18:07:34 +08:00
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#include <linux/of.h>
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#include <linux/of_gpio.h>
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#include <linux/of_device.h>
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2005-04-17 06:20:36 +08:00
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#include <asm/sizes.h>
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2008-11-29 00:04:54 +08:00
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#include <mach/hardware.h>
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2012-08-24 21:16:48 +08:00
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#include <linux/platform_data/mmc-pxamci.h>
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2005-04-17 06:20:36 +08:00
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#include "pxamci.h"
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#define DRIVER_NAME "pxa2xx-mci"
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#define NR_SG 1
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2007-10-27 00:56:40 +08:00
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#define CLKRT_OFF (~0)
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2005-04-17 06:20:36 +08:00
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2009-08-31 21:52:53 +08:00
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#define mmc_has_26MHz() (cpu_is_pxa300() || cpu_is_pxa310() \
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|| cpu_is_pxa935())
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2005-04-17 06:20:36 +08:00
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struct pxamci_host {
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struct mmc_host *mmc;
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spinlock_t lock;
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struct resource *res;
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void __iomem *base;
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2007-08-20 17:20:03 +08:00
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struct clk *clk;
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unsigned long clkrate;
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2005-04-17 06:20:36 +08:00
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unsigned int clkrt;
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unsigned int cmdat;
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unsigned int imask;
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unsigned int power_mode;
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2018-07-04 04:10:26 +08:00
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unsigned long detect_delay_ms;
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2005-04-17 06:20:36 +08:00
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struct pxamci_platform_data *pdata;
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struct mmc_request *mrq;
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struct mmc_command *cmd;
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struct mmc_data *data;
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2015-06-07 05:15:22 +08:00
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struct dma_chan *dma_chan_rx;
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struct dma_chan *dma_chan_tx;
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dma_cookie_t dma_cookie;
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2005-04-17 06:20:36 +08:00
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unsigned int dma_len;
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unsigned int dma_dir;
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};
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2018-07-01 02:14:05 +08:00
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static int pxamci_init_ocr(struct pxamci_host *host)
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2009-05-21 19:54:18 +08:00
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{
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2018-07-01 02:14:05 +08:00
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struct mmc_host *mmc = host->mmc;
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int ret;
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ret = mmc_regulator_get_supply(mmc);
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if (ret < 0)
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return ret;
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if (IS_ERR(mmc->supply.vmmc)) {
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2009-05-21 19:54:18 +08:00
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/* fall-back to platform data */
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2018-07-01 02:14:05 +08:00
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mmc->ocr_avail = host->pdata ?
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2009-05-21 19:54:18 +08:00
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host->pdata->ocr_mask :
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MMC_VDD_32_33 | MMC_VDD_33_34;
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}
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2018-07-01 02:14:05 +08:00
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return 0;
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2009-05-21 19:54:18 +08:00
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}
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2010-09-29 13:08:27 +08:00
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static inline int pxamci_set_power(struct pxamci_host *host,
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unsigned char power_mode,
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unsigned int vdd)
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2009-05-21 19:54:18 +08:00
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{
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2018-07-01 02:14:05 +08:00
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struct mmc_host *mmc = host->mmc;
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struct regulator *supply = mmc->supply.vmmc;
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2009-06-24 05:21:03 +08:00
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int on;
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2018-07-01 02:14:05 +08:00
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if (!IS_ERR(supply))
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return mmc_regulator_set_ocr(mmc, supply, vdd);
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2010-09-29 13:08:27 +08:00
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2018-07-01 02:14:05 +08:00
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if (host->pdata &&
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2009-06-24 05:21:03 +08:00
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gpio_is_valid(host->pdata->gpio_power)) {
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on = ((1 << vdd) & host->pdata->ocr_mask);
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gpio_set_value(host->pdata->gpio_power,
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!!on ^ host->pdata->gpio_power_invert);
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}
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2018-07-01 02:14:05 +08:00
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if (host->pdata && host->pdata->setpower)
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2013-07-05 23:51:20 +08:00
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return host->pdata->setpower(mmc_dev(host->mmc), vdd);
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2010-09-29 13:08:27 +08:00
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return 0;
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2009-05-21 19:54:18 +08:00
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}
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2005-04-17 06:20:36 +08:00
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static void pxamci_stop_clock(struct pxamci_host *host)
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{
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if (readl(host->base + MMC_STAT) & STAT_CLK_EN) {
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unsigned long timeout = 10000;
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unsigned int v;
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writel(STOP_CLOCK, host->base + MMC_STRPCL);
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do {
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v = readl(host->base + MMC_STAT);
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if (!(v & STAT_CLK_EN))
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break;
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udelay(1);
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} while (timeout--);
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if (v & STAT_CLK_EN)
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dev_err(mmc_dev(host->mmc), "unable to stop clock\n");
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}
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}
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static void pxamci_enable_irq(struct pxamci_host *host, unsigned int mask)
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{
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unsigned long flags;
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spin_lock_irqsave(&host->lock, flags);
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host->imask &= ~mask;
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writel(host->imask, host->base + MMC_I_MASK);
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spin_unlock_irqrestore(&host->lock, flags);
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}
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static void pxamci_disable_irq(struct pxamci_host *host, unsigned int mask)
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{
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unsigned long flags;
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spin_lock_irqsave(&host->lock, flags);
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host->imask |= mask;
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writel(host->imask, host->base + MMC_I_MASK);
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spin_unlock_irqrestore(&host->lock, flags);
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}
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2015-06-07 05:15:22 +08:00
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static void pxamci_dma_irq(void *param);
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2005-04-17 06:20:36 +08:00
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static void pxamci_setup_data(struct pxamci_host *host, struct mmc_data *data)
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{
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2015-06-07 05:15:22 +08:00
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struct dma_async_tx_descriptor *tx;
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enum dma_data_direction direction;
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struct dma_slave_config config;
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struct dma_chan *chan;
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2005-04-17 06:20:36 +08:00
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unsigned int nob = data->blocks;
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2006-04-24 18:27:02 +08:00
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unsigned long long clks;
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2005-04-17 06:20:36 +08:00
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unsigned int timeout;
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2015-06-07 05:15:22 +08:00
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int ret;
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2005-04-17 06:20:36 +08:00
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host->data = data;
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writel(nob, host->base + MMC_NOB);
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2006-05-20 04:48:03 +08:00
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writel(data->blksz, host->base + MMC_BLKLEN);
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2005-04-17 06:20:36 +08:00
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2007-08-20 17:20:03 +08:00
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clks = (unsigned long long)data->timeout_ns * host->clkrate;
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2006-04-24 18:27:02 +08:00
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do_div(clks, 1000000000UL);
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timeout = (unsigned int)clks + (data->timeout_clks << host->clkrt);
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2005-04-17 06:20:36 +08:00
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writel((timeout + 255) / 256, host->base + MMC_RDTO);
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2015-06-07 05:15:22 +08:00
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memset(&config, 0, sizeof(config));
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config.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
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config.dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
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config.src_addr = host->res->start + MMC_RXFIFO;
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config.dst_addr = host->res->start + MMC_TXFIFO;
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config.src_maxburst = 32;
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config.dst_maxburst = 32;
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2005-04-17 06:20:36 +08:00
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if (data->flags & MMC_DATA_READ) {
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host->dma_dir = DMA_FROM_DEVICE;
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2015-06-07 05:15:22 +08:00
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direction = DMA_DEV_TO_MEM;
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chan = host->dma_chan_rx;
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2005-04-17 06:20:36 +08:00
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} else {
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host->dma_dir = DMA_TO_DEVICE;
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2015-06-07 05:15:22 +08:00
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direction = DMA_MEM_TO_DEV;
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chan = host->dma_chan_tx;
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2005-04-17 06:20:36 +08:00
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}
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2015-06-07 05:15:22 +08:00
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config.direction = direction;
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ret = dmaengine_slave_config(chan, &config);
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if (ret < 0) {
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dev_err(mmc_dev(host->mmc), "dma slave config failed\n");
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return;
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}
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2005-04-17 06:20:36 +08:00
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2015-06-07 05:15:22 +08:00
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host->dma_len = dma_map_sg(chan->device->dev, data->sg, data->sg_len,
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2005-04-17 06:20:36 +08:00
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host->dma_dir);
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2015-06-07 05:15:22 +08:00
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tx = dmaengine_prep_slave_sg(chan, data->sg, host->dma_len, direction,
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DMA_PREP_INTERRUPT);
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if (!tx) {
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dev_err(mmc_dev(host->mmc), "prep_slave_sg() failed\n");
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return;
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2005-04-17 06:20:36 +08:00
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}
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2015-06-07 05:15:22 +08:00
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if (!(data->flags & MMC_DATA_READ)) {
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tx->callback = pxamci_dma_irq;
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tx->callback_param = host;
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}
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host->dma_cookie = dmaengine_submit(tx);
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2009-01-23 06:07:03 +08:00
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/*
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* workaround for erratum #91:
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* only start DMA now if we are doing a read,
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* otherwise we wait until CMD/RESP has finished
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* before starting DMA.
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*/
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if (!cpu_is_pxa27x() || data->flags & MMC_DATA_READ)
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2015-06-07 05:15:22 +08:00
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dma_async_issue_pending(chan);
|
2005-04-17 06:20:36 +08:00
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}
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static void pxamci_start_cmd(struct pxamci_host *host, struct mmc_command *cmd, unsigned int cmdat)
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{
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WARN_ON(host->cmd != NULL);
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host->cmd = cmd;
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if (cmd->flags & MMC_RSP_BUSY)
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cmdat |= CMDAT_BUSY;
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2006-02-02 20:23:12 +08:00
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#define RSP_TYPE(x) ((x) & ~(MMC_RSP_BUSY|MMC_RSP_OPCODE))
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switch (RSP_TYPE(mmc_resp_type(cmd))) {
|
2007-01-04 23:04:47 +08:00
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case RSP_TYPE(MMC_RSP_R1): /* r1, r1b, r6, r7 */
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2005-04-17 06:20:36 +08:00
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cmdat |= CMDAT_RESP_SHORT;
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break;
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2006-02-02 20:23:12 +08:00
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case RSP_TYPE(MMC_RSP_R3):
|
2005-04-17 06:20:36 +08:00
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cmdat |= CMDAT_RESP_R3;
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break;
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2006-02-02 20:23:12 +08:00
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case RSP_TYPE(MMC_RSP_R2):
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2005-04-17 06:20:36 +08:00
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cmdat |= CMDAT_RESP_R2;
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break;
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default:
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break;
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}
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|
|
writel(cmd->opcode, host->base + MMC_CMD);
|
|
|
|
writel(cmd->arg >> 16, host->base + MMC_ARGH);
|
|
|
|
writel(cmd->arg & 0xffff, host->base + MMC_ARGL);
|
|
|
|
writel(cmdat, host->base + MMC_CMDAT);
|
|
|
|
writel(host->clkrt, host->base + MMC_CLKRT);
|
|
|
|
|
|
|
|
writel(START_CLOCK, host->base + MMC_STRPCL);
|
|
|
|
|
|
|
|
pxamci_enable_irq(host, END_CMD_RES);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void pxamci_finish_request(struct pxamci_host *host, struct mmc_request *mrq)
|
|
|
|
{
|
|
|
|
host->mrq = NULL;
|
|
|
|
host->cmd = NULL;
|
|
|
|
host->data = NULL;
|
|
|
|
mmc_request_done(host->mmc, mrq);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int pxamci_cmd_done(struct pxamci_host *host, unsigned int stat)
|
|
|
|
{
|
|
|
|
struct mmc_command *cmd = host->cmd;
|
|
|
|
int i;
|
|
|
|
u32 v;
|
|
|
|
|
|
|
|
if (!cmd)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
host->cmd = NULL;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Did I mention this is Sick. We always need to
|
|
|
|
* discard the upper 8 bits of the first 16-bit word.
|
|
|
|
*/
|
|
|
|
v = readl(host->base + MMC_RES) & 0xffff;
|
|
|
|
for (i = 0; i < 4; i++) {
|
|
|
|
u32 w1 = readl(host->base + MMC_RES) & 0xffff;
|
|
|
|
u32 w2 = readl(host->base + MMC_RES) & 0xffff;
|
|
|
|
cmd->resp[i] = v << 24 | w1 << 8 | w2 >> 8;
|
|
|
|
v = w2;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (stat & STAT_TIME_OUT_RESPONSE) {
|
2007-07-23 04:18:46 +08:00
|
|
|
cmd->error = -ETIMEDOUT;
|
2005-04-17 06:20:36 +08:00
|
|
|
} else if (stat & STAT_RES_CRC_ERR && cmd->flags & MMC_RSP_CRC) {
|
|
|
|
/*
|
|
|
|
* workaround for erratum #42:
|
|
|
|
* Intel PXA27x Family Processor Specification Update Rev 001
|
2007-05-14 00:03:08 +08:00
|
|
|
* A bogus CRC error can appear if the msb of a 136 bit
|
|
|
|
* response is a one.
|
2005-04-17 06:20:36 +08:00
|
|
|
*/
|
2009-01-23 05:58:58 +08:00
|
|
|
if (cpu_is_pxa27x() &&
|
|
|
|
(cmd->flags & MMC_RSP_136 && cmd->resp[0] & 0x80000000))
|
2007-05-14 00:03:08 +08:00
|
|
|
pr_debug("ignoring CRC from command %d - *risky*\n", cmd->opcode);
|
2009-01-23 05:58:58 +08:00
|
|
|
else
|
|
|
|
cmd->error = -EILSEQ;
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
pxamci_disable_irq(host, END_CMD_RES);
|
2007-07-23 04:18:46 +08:00
|
|
|
if (host->data && !cmd->error) {
|
2005-04-17 06:20:36 +08:00
|
|
|
pxamci_enable_irq(host, DATA_TRAN_DONE);
|
2009-01-23 06:07:03 +08:00
|
|
|
/*
|
|
|
|
* workaround for erratum #91, if doing write
|
|
|
|
* enable DMA late
|
|
|
|
*/
|
|
|
|
if (cpu_is_pxa27x() && host->data->flags & MMC_DATA_WRITE)
|
2015-06-07 05:15:22 +08:00
|
|
|
dma_async_issue_pending(host->dma_chan_tx);
|
2005-04-17 06:20:36 +08:00
|
|
|
} else {
|
|
|
|
pxamci_finish_request(host, host->mrq);
|
|
|
|
}
|
|
|
|
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int pxamci_data_done(struct pxamci_host *host, unsigned int stat)
|
|
|
|
{
|
|
|
|
struct mmc_data *data = host->data;
|
2015-06-07 05:15:22 +08:00
|
|
|
struct dma_chan *chan;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
|
|
|
if (!data)
|
|
|
|
return 0;
|
|
|
|
|
2015-06-07 05:15:22 +08:00
|
|
|
if (data->flags & MMC_DATA_READ)
|
|
|
|
chan = host->dma_chan_rx;
|
|
|
|
else
|
|
|
|
chan = host->dma_chan_tx;
|
|
|
|
dma_unmap_sg(chan->device->dev,
|
|
|
|
data->sg, data->sg_len, host->dma_dir);
|
2005-04-17 06:20:36 +08:00
|
|
|
|
|
|
|
if (stat & STAT_READ_TIME_OUT)
|
2007-07-23 04:18:46 +08:00
|
|
|
data->error = -ETIMEDOUT;
|
2005-04-17 06:20:36 +08:00
|
|
|
else if (stat & (STAT_CRC_READ_ERROR|STAT_CRC_WRITE_ERROR))
|
2007-07-23 04:18:46 +08:00
|
|
|
data->error = -EILSEQ;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
|
|
|
/*
|
|
|
|
* There appears to be a hardware design bug here. There seems to
|
|
|
|
* be no way to find out how much data was transferred to the card.
|
|
|
|
* This means that if there was an error on any block, we mark all
|
|
|
|
* data blocks as being in error.
|
|
|
|
*/
|
2007-07-23 04:18:46 +08:00
|
|
|
if (!data->error)
|
2006-05-20 04:48:03 +08:00
|
|
|
data->bytes_xfered = data->blocks * data->blksz;
|
2005-04-17 06:20:36 +08:00
|
|
|
else
|
|
|
|
data->bytes_xfered = 0;
|
|
|
|
|
|
|
|
pxamci_disable_irq(host, DATA_TRAN_DONE);
|
|
|
|
|
|
|
|
host->data = NULL;
|
2006-05-03 03:02:39 +08:00
|
|
|
if (host->mrq->stop) {
|
2005-04-17 06:20:36 +08:00
|
|
|
pxamci_stop_clock(host);
|
2007-09-26 01:09:19 +08:00
|
|
|
pxamci_start_cmd(host, host->mrq->stop, host->cmdat);
|
2005-04-17 06:20:36 +08:00
|
|
|
} else {
|
|
|
|
pxamci_finish_request(host, host->mrq);
|
|
|
|
}
|
|
|
|
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
IRQ: Maintain regs pointer globally rather than passing to IRQ handlers
Maintain a per-CPU global "struct pt_regs *" variable which can be used instead
of passing regs around manually through all ~1800 interrupt handlers in the
Linux kernel.
The regs pointer is used in few places, but it potentially costs both stack
space and code to pass it around. On the FRV arch, removing the regs parameter
from all the genirq function results in a 20% speed up of the IRQ exit path
(ie: from leaving timer_interrupt() to leaving do_IRQ()).
Where appropriate, an arch may override the generic storage facility and do
something different with the variable. On FRV, for instance, the address is
maintained in GR28 at all times inside the kernel as part of general exception
handling.
Having looked over the code, it appears that the parameter may be handed down
through up to twenty or so layers of functions. Consider a USB character
device attached to a USB hub, attached to a USB controller that posts its
interrupts through a cascaded auxiliary interrupt controller. A character
device driver may want to pass regs to the sysrq handler through the input
layer which adds another few layers of parameter passing.
I've build this code with allyesconfig for x86_64 and i386. I've runtested the
main part of the code on FRV and i386, though I can't test most of the drivers.
I've also done partial conversion for powerpc and MIPS - these at least compile
with minimal configurations.
This will affect all archs. Mostly the changes should be relatively easy.
Take do_IRQ(), store the regs pointer at the beginning, saving the old one:
struct pt_regs *old_regs = set_irq_regs(regs);
And put the old one back at the end:
set_irq_regs(old_regs);
Don't pass regs through to generic_handle_irq() or __do_IRQ().
In timer_interrupt(), this sort of change will be necessary:
- update_process_times(user_mode(regs));
- profile_tick(CPU_PROFILING, regs);
+ update_process_times(user_mode(get_irq_regs()));
+ profile_tick(CPU_PROFILING);
I'd like to move update_process_times()'s use of get_irq_regs() into itself,
except that i386, alone of the archs, uses something other than user_mode().
Some notes on the interrupt handling in the drivers:
(*) input_dev() is now gone entirely. The regs pointer is no longer stored in
the input_dev struct.
(*) finish_unlinks() in drivers/usb/host/ohci-q.c needs checking. It does
something different depending on whether it's been supplied with a regs
pointer or not.
(*) Various IRQ handler function pointers have been moved to type
irq_handler_t.
Signed-Off-By: David Howells <dhowells@redhat.com>
(cherry picked from 1b16e7ac850969f38b375e511e3fa2f474a33867 commit)
2006-10-05 21:55:46 +08:00
|
|
|
static irqreturn_t pxamci_irq(int irq, void *devid)
|
2005-04-17 06:20:36 +08:00
|
|
|
{
|
|
|
|
struct pxamci_host *host = devid;
|
|
|
|
unsigned int ireg;
|
|
|
|
int handled = 0;
|
|
|
|
|
2007-09-26 00:59:07 +08:00
|
|
|
ireg = readl(host->base + MMC_I_REG) & ~readl(host->base + MMC_I_MASK);
|
2005-04-17 06:20:36 +08:00
|
|
|
|
|
|
|
if (ireg) {
|
|
|
|
unsigned stat = readl(host->base + MMC_STAT);
|
|
|
|
|
2006-05-03 03:18:53 +08:00
|
|
|
pr_debug("PXAMCI: irq %08x stat %08x\n", ireg, stat);
|
2005-04-17 06:20:36 +08:00
|
|
|
|
|
|
|
if (ireg & END_CMD_RES)
|
|
|
|
handled |= pxamci_cmd_done(host, stat);
|
|
|
|
if (ireg & DATA_TRAN_DONE)
|
|
|
|
handled |= pxamci_data_done(host, stat);
|
2007-09-26 01:11:00 +08:00
|
|
|
if (ireg & SDIO_INT) {
|
|
|
|
mmc_signal_sdio_irq(host->mmc);
|
|
|
|
handled = 1;
|
|
|
|
}
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
return IRQ_RETVAL(handled);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void pxamci_request(struct mmc_host *mmc, struct mmc_request *mrq)
|
|
|
|
{
|
|
|
|
struct pxamci_host *host = mmc_priv(mmc);
|
|
|
|
unsigned int cmdat;
|
|
|
|
|
|
|
|
WARN_ON(host->mrq != NULL);
|
|
|
|
|
|
|
|
host->mrq = mrq;
|
|
|
|
|
|
|
|
pxamci_stop_clock(host);
|
|
|
|
|
|
|
|
cmdat = host->cmdat;
|
|
|
|
host->cmdat &= ~CMDAT_INIT;
|
|
|
|
|
|
|
|
if (mrq->data) {
|
|
|
|
pxamci_setup_data(host, mrq->data);
|
|
|
|
|
|
|
|
cmdat &= ~CMDAT_BUSY;
|
|
|
|
cmdat |= CMDAT_DATAEN | CMDAT_DMAEN;
|
|
|
|
if (mrq->data->flags & MMC_DATA_WRITE)
|
|
|
|
cmdat |= CMDAT_WRITE;
|
|
|
|
}
|
|
|
|
|
|
|
|
pxamci_start_cmd(host, mrq->cmd, cmdat);
|
|
|
|
}
|
|
|
|
|
2005-09-07 06:18:56 +08:00
|
|
|
static int pxamci_get_ro(struct mmc_host *mmc)
|
|
|
|
{
|
|
|
|
struct pxamci_host *host = mmc_priv(mmc);
|
|
|
|
|
2015-09-27 03:41:01 +08:00
|
|
|
if (host->pdata && gpio_is_valid(host->pdata->gpio_card_ro))
|
|
|
|
return mmc_gpio_get_ro(mmc);
|
2005-09-07 06:18:56 +08:00
|
|
|
if (host->pdata && host->pdata->get_ro)
|
2008-06-17 22:17:39 +08:00
|
|
|
return !!host->pdata->get_ro(mmc_dev(mmc));
|
|
|
|
/*
|
|
|
|
* Board doesn't support read only detection; let the mmc core
|
|
|
|
* decide what to do.
|
|
|
|
*/
|
|
|
|
return -ENOSYS;
|
2005-09-07 06:18:56 +08:00
|
|
|
}
|
|
|
|
|
2005-04-17 06:20:36 +08:00
|
|
|
static void pxamci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
|
|
|
|
{
|
|
|
|
struct pxamci_host *host = mmc_priv(mmc);
|
|
|
|
|
|
|
|
if (ios->clock) {
|
2007-08-20 17:20:03 +08:00
|
|
|
unsigned long rate = host->clkrate;
|
|
|
|
unsigned int clk = rate / ios->clock;
|
|
|
|
|
2007-10-27 00:56:40 +08:00
|
|
|
if (host->clkrt == CLKRT_OFF)
|
2014-09-02 17:23:55 +08:00
|
|
|
clk_prepare_enable(host->clk);
|
2007-10-27 00:56:40 +08:00
|
|
|
|
2007-12-13 14:24:30 +08:00
|
|
|
if (ios->clock == 26000000) {
|
2009-08-31 21:52:53 +08:00
|
|
|
/* to support 26MHz */
|
2007-12-13 14:24:30 +08:00
|
|
|
host->clkrt = 7;
|
|
|
|
} else {
|
|
|
|
/* to handle (19.5MHz, 26MHz) */
|
|
|
|
if (!clk)
|
|
|
|
clk = 1;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* clk might result in a lower divisor than we
|
|
|
|
* desire. check for that condition and adjust
|
|
|
|
* as appropriate.
|
|
|
|
*/
|
|
|
|
if (rate / clk > ios->clock)
|
|
|
|
clk <<= 1;
|
|
|
|
host->clkrt = fls(clk) - 1;
|
|
|
|
}
|
2005-04-17 06:20:36 +08:00
|
|
|
|
|
|
|
/*
|
|
|
|
* we write clkrt on the next command
|
|
|
|
*/
|
|
|
|
} else {
|
|
|
|
pxamci_stop_clock(host);
|
2007-10-27 00:56:40 +08:00
|
|
|
if (host->clkrt != CLKRT_OFF) {
|
|
|
|
host->clkrt = CLKRT_OFF;
|
2014-09-02 17:23:55 +08:00
|
|
|
clk_disable_unprepare(host->clk);
|
2007-10-27 00:56:40 +08:00
|
|
|
}
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
if (host->power_mode != ios->power_mode) {
|
2010-09-29 13:08:27 +08:00
|
|
|
int ret;
|
|
|
|
|
2005-04-17 06:20:36 +08:00
|
|
|
host->power_mode = ios->power_mode;
|
|
|
|
|
2010-09-29 13:08:27 +08:00
|
|
|
ret = pxamci_set_power(host, ios->power_mode, ios->vdd);
|
|
|
|
if (ret) {
|
|
|
|
dev_err(mmc_dev(mmc), "unable to set power\n");
|
|
|
|
/*
|
|
|
|
* The .set_ios() function in the mmc_host_ops
|
|
|
|
* struct return void, and failing to set the
|
|
|
|
* power should be rare so we print an error and
|
|
|
|
* return here.
|
|
|
|
*/
|
|
|
|
return;
|
|
|
|
}
|
2005-04-17 06:20:36 +08:00
|
|
|
|
|
|
|
if (ios->power_mode == MMC_POWER_ON)
|
|
|
|
host->cmdat |= CMDAT_INIT;
|
|
|
|
}
|
|
|
|
|
2007-09-26 01:09:19 +08:00
|
|
|
if (ios->bus_width == MMC_BUS_WIDTH_4)
|
|
|
|
host->cmdat |= CMDAT_SD_4DAT;
|
|
|
|
else
|
|
|
|
host->cmdat &= ~CMDAT_SD_4DAT;
|
|
|
|
|
2010-09-29 13:08:27 +08:00
|
|
|
dev_dbg(mmc_dev(mmc), "PXAMCI: clkrt = %x cmdat = %x\n",
|
|
|
|
host->clkrt, host->cmdat);
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
|
|
|
|
2007-09-26 01:11:00 +08:00
|
|
|
static void pxamci_enable_sdio_irq(struct mmc_host *host, int enable)
|
|
|
|
{
|
|
|
|
struct pxamci_host *pxa_host = mmc_priv(host);
|
|
|
|
|
|
|
|
if (enable)
|
|
|
|
pxamci_enable_irq(pxa_host, SDIO_INT);
|
|
|
|
else
|
|
|
|
pxamci_disable_irq(pxa_host, SDIO_INT);
|
|
|
|
}
|
|
|
|
|
2006-11-13 09:55:30 +08:00
|
|
|
static const struct mmc_host_ops pxamci_ops = {
|
2007-09-26 01:11:00 +08:00
|
|
|
.request = pxamci_request,
|
2015-09-27 03:41:01 +08:00
|
|
|
.get_cd = mmc_gpio_get_cd,
|
2007-09-26 01:11:00 +08:00
|
|
|
.get_ro = pxamci_get_ro,
|
|
|
|
.set_ios = pxamci_set_ios,
|
|
|
|
.enable_sdio_irq = pxamci_enable_sdio_irq,
|
2005-04-17 06:20:36 +08:00
|
|
|
};
|
|
|
|
|
2015-06-07 05:15:22 +08:00
|
|
|
static void pxamci_dma_irq(void *param)
|
2005-04-17 06:20:36 +08:00
|
|
|
{
|
2015-06-07 05:15:22 +08:00
|
|
|
struct pxamci_host *host = param;
|
|
|
|
struct dma_tx_state state;
|
|
|
|
enum dma_status status;
|
|
|
|
struct dma_chan *chan;
|
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
spin_lock_irqsave(&host->lock, flags);
|
|
|
|
|
|
|
|
if (!host->data)
|
|
|
|
goto out_unlock;
|
2007-10-10 05:07:58 +08:00
|
|
|
|
2015-06-07 05:15:22 +08:00
|
|
|
if (host->data->flags & MMC_DATA_READ)
|
|
|
|
chan = host->dma_chan_rx;
|
|
|
|
else
|
|
|
|
chan = host->dma_chan_tx;
|
|
|
|
|
|
|
|
status = dmaengine_tx_status(chan, host->dma_cookie, &state);
|
|
|
|
|
|
|
|
if (likely(status == DMA_COMPLETE)) {
|
2007-10-10 05:07:58 +08:00
|
|
|
writel(BUF_PART_FULL, host->base + MMC_PRTBUF);
|
|
|
|
} else {
|
2015-06-07 05:15:22 +08:00
|
|
|
pr_err("%s: DMA error on %s channel\n", mmc_hostname(host->mmc),
|
|
|
|
host->data->flags & MMC_DATA_READ ? "rx" : "tx");
|
2007-10-10 05:07:58 +08:00
|
|
|
host->data->error = -EIO;
|
|
|
|
pxamci_data_done(host, 0);
|
|
|
|
}
|
2015-06-07 05:15:22 +08:00
|
|
|
|
|
|
|
out_unlock:
|
|
|
|
spin_unlock_irqrestore(&host->lock, flags);
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
|
|
|
|
IRQ: Maintain regs pointer globally rather than passing to IRQ handlers
Maintain a per-CPU global "struct pt_regs *" variable which can be used instead
of passing regs around manually through all ~1800 interrupt handlers in the
Linux kernel.
The regs pointer is used in few places, but it potentially costs both stack
space and code to pass it around. On the FRV arch, removing the regs parameter
from all the genirq function results in a 20% speed up of the IRQ exit path
(ie: from leaving timer_interrupt() to leaving do_IRQ()).
Where appropriate, an arch may override the generic storage facility and do
something different with the variable. On FRV, for instance, the address is
maintained in GR28 at all times inside the kernel as part of general exception
handling.
Having looked over the code, it appears that the parameter may be handed down
through up to twenty or so layers of functions. Consider a USB character
device attached to a USB hub, attached to a USB controller that posts its
interrupts through a cascaded auxiliary interrupt controller. A character
device driver may want to pass regs to the sysrq handler through the input
layer which adds another few layers of parameter passing.
I've build this code with allyesconfig for x86_64 and i386. I've runtested the
main part of the code on FRV and i386, though I can't test most of the drivers.
I've also done partial conversion for powerpc and MIPS - these at least compile
with minimal configurations.
This will affect all archs. Mostly the changes should be relatively easy.
Take do_IRQ(), store the regs pointer at the beginning, saving the old one:
struct pt_regs *old_regs = set_irq_regs(regs);
And put the old one back at the end:
set_irq_regs(old_regs);
Don't pass regs through to generic_handle_irq() or __do_IRQ().
In timer_interrupt(), this sort of change will be necessary:
- update_process_times(user_mode(regs));
- profile_tick(CPU_PROFILING, regs);
+ update_process_times(user_mode(get_irq_regs()));
+ profile_tick(CPU_PROFILING);
I'd like to move update_process_times()'s use of get_irq_regs() into itself,
except that i386, alone of the archs, uses something other than user_mode().
Some notes on the interrupt handling in the drivers:
(*) input_dev() is now gone entirely. The regs pointer is no longer stored in
the input_dev struct.
(*) finish_unlinks() in drivers/usb/host/ohci-q.c needs checking. It does
something different depending on whether it's been supplied with a regs
pointer or not.
(*) Various IRQ handler function pointers have been moved to type
irq_handler_t.
Signed-Off-By: David Howells <dhowells@redhat.com>
(cherry picked from 1b16e7ac850969f38b375e511e3fa2f474a33867 commit)
2006-10-05 21:55:46 +08:00
|
|
|
static irqreturn_t pxamci_detect_irq(int irq, void *devid)
|
2005-04-17 06:20:36 +08:00
|
|
|
{
|
2005-09-09 05:48:16 +08:00
|
|
|
struct pxamci_host *host = mmc_priv(devid);
|
|
|
|
|
2018-07-04 04:10:26 +08:00
|
|
|
mmc_detect_change(devid, msecs_to_jiffies(host->detect_delay_ms));
|
2005-04-17 06:20:36 +08:00
|
|
|
return IRQ_HANDLED;
|
|
|
|
}
|
|
|
|
|
2012-07-28 18:07:34 +08:00
|
|
|
#ifdef CONFIG_OF
|
|
|
|
static const struct of_device_id pxa_mmc_dt_ids[] = {
|
|
|
|
{ .compatible = "marvell,pxa-mmc" },
|
|
|
|
{ }
|
|
|
|
};
|
|
|
|
|
|
|
|
MODULE_DEVICE_TABLE(of, pxa_mmc_dt_ids);
|
|
|
|
|
2018-07-01 02:14:03 +08:00
|
|
|
static int pxamci_of_init(struct platform_device *pdev,
|
|
|
|
struct mmc_host *mmc)
|
2012-07-28 18:07:34 +08:00
|
|
|
{
|
2018-07-01 02:14:02 +08:00
|
|
|
struct device_node *np = pdev->dev.of_node;
|
2018-07-04 04:10:26 +08:00
|
|
|
struct pxamci_host *host = mmc_priv(mmc);
|
2018-07-01 02:14:02 +08:00
|
|
|
u32 tmp;
|
2018-07-01 02:14:03 +08:00
|
|
|
int ret;
|
2012-07-28 18:07:34 +08:00
|
|
|
|
2018-07-01 02:14:02 +08:00
|
|
|
if (!np)
|
|
|
|
return 0;
|
2012-07-28 18:07:34 +08:00
|
|
|
|
|
|
|
/* pxa-mmc specific */
|
|
|
|
if (of_property_read_u32(np, "pxa-mmc,detect-delay-ms", &tmp) == 0)
|
2018-07-04 04:10:26 +08:00
|
|
|
host->detect_delay_ms = tmp;
|
2012-07-28 18:07:34 +08:00
|
|
|
|
2018-07-01 02:14:03 +08:00
|
|
|
ret = mmc_of_parse(mmc);
|
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
|
|
|
|
2018-07-01 02:14:02 +08:00
|
|
|
return 0;
|
2012-07-28 18:07:34 +08:00
|
|
|
}
|
|
|
|
#else
|
2018-07-01 02:14:03 +08:00
|
|
|
static int pxamci_of_init(struct platform_device *pdev,
|
|
|
|
struct mmc_host *mmc)
|
2012-07-28 18:07:34 +08:00
|
|
|
{
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2005-11-10 06:32:44 +08:00
|
|
|
static int pxamci_probe(struct platform_device *pdev)
|
2005-04-17 06:20:36 +08:00
|
|
|
{
|
|
|
|
struct mmc_host *mmc;
|
|
|
|
struct pxamci_host *host = NULL;
|
2018-07-04 04:10:27 +08:00
|
|
|
struct device *dev = &pdev->dev;
|
2018-06-18 01:02:07 +08:00
|
|
|
struct resource *r;
|
2018-07-04 04:10:26 +08:00
|
|
|
int ret, irq;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
|
|
|
r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
|
|
irq = platform_get_irq(pdev, 0);
|
2016-02-08 22:17:57 +08:00
|
|
|
if (irq < 0)
|
|
|
|
return irq;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2018-07-04 04:10:27 +08:00
|
|
|
mmc = mmc_alloc_host(sizeof(struct pxamci_host), dev);
|
2005-04-17 06:20:36 +08:00
|
|
|
if (!mmc) {
|
|
|
|
ret = -ENOMEM;
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
|
|
|
|
mmc->ops = &pxamci_ops;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* We can do SG-DMA, but we don't because we never know how much
|
|
|
|
* data we successfully wrote to the card.
|
|
|
|
*/
|
2010-09-10 13:33:59 +08:00
|
|
|
mmc->max_segs = NR_SG;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Our hardware DMA can handle a maximum of one page per SG entry.
|
|
|
|
*/
|
|
|
|
mmc->max_seg_size = PAGE_SIZE;
|
|
|
|
|
2006-11-22 00:54:23 +08:00
|
|
|
/*
|
2007-09-25 03:47:18 +08:00
|
|
|
* Block length register is only 10 bits before PXA27x.
|
2006-11-22 00:54:23 +08:00
|
|
|
*/
|
2008-09-11 10:27:30 +08:00
|
|
|
mmc->max_blk_size = cpu_is_pxa25x() ? 1023 : 2048;
|
2006-11-22 00:54:23 +08:00
|
|
|
|
2006-11-22 00:55:45 +08:00
|
|
|
/*
|
|
|
|
* Block count register is 16 bits.
|
|
|
|
*/
|
|
|
|
mmc->max_blk_count = 65535;
|
|
|
|
|
2018-07-01 02:14:03 +08:00
|
|
|
ret = pxamci_of_init(pdev, mmc);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
2005-04-17 06:20:36 +08:00
|
|
|
host = mmc_priv(mmc);
|
|
|
|
host->mmc = mmc;
|
|
|
|
host->pdata = pdev->dev.platform_data;
|
2007-10-27 00:56:40 +08:00
|
|
|
host->clkrt = CLKRT_OFF;
|
2007-08-20 17:20:03 +08:00
|
|
|
|
2018-07-04 04:10:27 +08:00
|
|
|
host->clk = devm_clk_get(dev, NULL);
|
2007-08-20 17:20:03 +08:00
|
|
|
if (IS_ERR(host->clk)) {
|
|
|
|
ret = PTR_ERR(host->clk);
|
|
|
|
host->clk = NULL;
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
|
|
|
|
host->clkrate = clk_get_rate(host->clk);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Calculate minimum clock rate, rounding up.
|
|
|
|
*/
|
|
|
|
mmc->f_min = (host->clkrate + 63) / 64;
|
2009-08-31 21:52:53 +08:00
|
|
|
mmc->f_max = (mmc_has_26MHz()) ? 26000000 : host->clkrate;
|
2007-08-20 17:20:03 +08:00
|
|
|
|
2018-07-01 02:14:05 +08:00
|
|
|
ret = pxamci_init_ocr(host);
|
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
2009-05-21 19:54:18 +08:00
|
|
|
|
2017-09-20 16:56:14 +08:00
|
|
|
mmc->caps = 0;
|
2007-09-26 01:11:00 +08:00
|
|
|
host->cmdat = 0;
|
2008-09-11 10:27:30 +08:00
|
|
|
if (!cpu_is_pxa25x()) {
|
2007-09-26 01:11:00 +08:00
|
|
|
mmc->caps |= MMC_CAP_4_BIT_DATA | MMC_CAP_SDIO_IRQ;
|
|
|
|
host->cmdat |= CMDAT_SDIO_INT_EN;
|
2009-08-31 21:52:53 +08:00
|
|
|
if (mmc_has_26MHz())
|
2007-12-13 14:24:30 +08:00
|
|
|
mmc->caps |= MMC_CAP_MMC_HIGHSPEED |
|
|
|
|
MMC_CAP_SD_HIGHSPEED;
|
2007-09-26 01:11:00 +08:00
|
|
|
}
|
2005-04-17 06:20:36 +08:00
|
|
|
|
|
|
|
spin_lock_init(&host->lock);
|
|
|
|
host->res = r;
|
|
|
|
host->imask = MMC_I_MASK_ALL;
|
|
|
|
|
2018-07-04 04:10:27 +08:00
|
|
|
host->base = devm_ioremap_resource(dev, r);
|
2016-02-08 22:17:57 +08:00
|
|
|
if (IS_ERR(host->base)) {
|
|
|
|
ret = PTR_ERR(host->base);
|
2005-04-17 06:20:36 +08:00
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Ensure that the host controller is shut down, and setup
|
|
|
|
* with our defaults.
|
|
|
|
*/
|
|
|
|
pxamci_stop_clock(host);
|
|
|
|
writel(0, host->base + MMC_SPI);
|
|
|
|
writel(64, host->base + MMC_RESTO);
|
|
|
|
writel(host->imask, host->base + MMC_I_MASK);
|
|
|
|
|
2018-07-04 04:10:27 +08:00
|
|
|
ret = devm_request_irq(dev, irq, pxamci_irq, 0,
|
2016-02-08 22:17:57 +08:00
|
|
|
DRIVER_NAME, host);
|
2005-04-17 06:20:36 +08:00
|
|
|
if (ret)
|
|
|
|
goto out;
|
|
|
|
|
2005-11-10 06:32:44 +08:00
|
|
|
platform_set_drvdata(pdev, mmc);
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2018-07-04 04:10:27 +08:00
|
|
|
host->dma_chan_rx = dma_request_slave_channel(dev, "rx");
|
2015-06-07 05:15:22 +08:00
|
|
|
if (host->dma_chan_rx == NULL) {
|
2018-07-04 04:10:27 +08:00
|
|
|
dev_err(dev, "unable to request rx dma channel\n");
|
2015-06-07 05:15:22 +08:00
|
|
|
ret = -ENODEV;
|
2007-12-14 17:40:25 +08:00
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
|
2018-07-04 04:10:27 +08:00
|
|
|
host->dma_chan_tx = dma_request_slave_channel(dev, "tx");
|
2015-06-07 05:15:22 +08:00
|
|
|
if (host->dma_chan_tx == NULL) {
|
2018-07-04 04:10:27 +08:00
|
|
|
dev_err(dev, "unable to request tx dma channel\n");
|
2015-06-07 05:15:22 +08:00
|
|
|
ret = -ENODEV;
|
2007-12-14 17:40:25 +08:00
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
|
2009-06-24 05:21:03 +08:00
|
|
|
if (host->pdata) {
|
2018-07-04 04:10:26 +08:00
|
|
|
int gpio_cd = host->pdata->gpio_card_detect;
|
|
|
|
int gpio_ro = host->pdata->gpio_card_ro;
|
|
|
|
int gpio_power = host->pdata->gpio_power;
|
|
|
|
|
|
|
|
host->detect_delay_ms = host->pdata->detect_delay_ms;
|
|
|
|
|
|
|
|
if (gpio_is_valid(gpio_power)) {
|
2018-07-04 04:10:27 +08:00
|
|
|
ret = devm_gpio_request(dev, gpio_power,
|
2018-07-04 04:10:26 +08:00
|
|
|
"mmc card power");
|
|
|
|
if (ret) {
|
2018-07-04 04:10:27 +08:00
|
|
|
dev_err(dev,
|
2018-07-04 04:10:26 +08:00
|
|
|
"Failed requesting gpio_power %d\n",
|
|
|
|
gpio_power);
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
gpio_direction_output(gpio_power,
|
|
|
|
host->pdata->gpio_power_invert);
|
2009-06-24 05:21:03 +08:00
|
|
|
}
|
2018-07-04 04:10:26 +08:00
|
|
|
|
|
|
|
if (gpio_is_valid(gpio_ro)) {
|
|
|
|
ret = mmc_gpio_request_ro(mmc, gpio_ro);
|
|
|
|
if (ret) {
|
2018-07-04 04:10:27 +08:00
|
|
|
dev_err(dev,
|
2018-07-04 04:10:26 +08:00
|
|
|
"Failed requesting gpio_ro %d\n",
|
|
|
|
gpio_ro);
|
|
|
|
goto out;
|
|
|
|
} else {
|
|
|
|
mmc->caps2 |= host->pdata->gpio_card_ro_invert ?
|
|
|
|
0 : MMC_CAP2_RO_ACTIVE_HIGH;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (gpio_is_valid(gpio_cd))
|
|
|
|
ret = mmc_gpio_request_cd(mmc, gpio_cd, 0);
|
2016-07-14 23:05:50 +08:00
|
|
|
if (ret) {
|
2018-07-04 04:10:27 +08:00
|
|
|
dev_err(dev, "Failed requesting gpio_cd %d\n",
|
2018-07-04 04:10:26 +08:00
|
|
|
gpio_cd);
|
2016-07-14 23:05:50 +08:00
|
|
|
goto out;
|
|
|
|
}
|
2009-06-24 05:21:03 +08:00
|
|
|
|
2018-07-04 04:10:26 +08:00
|
|
|
if (host->pdata->init)
|
2018-07-04 04:10:27 +08:00
|
|
|
host->pdata->init(dev, pxamci_detect_irq, mmc);
|
2009-06-24 05:21:03 +08:00
|
|
|
|
2018-07-04 04:10:26 +08:00
|
|
|
if (gpio_is_valid(gpio_power) && host->pdata->setpower)
|
2018-07-04 04:10:27 +08:00
|
|
|
dev_warn(dev, "gpio_power and setpower() both defined\n");
|
2018-07-04 04:10:26 +08:00
|
|
|
if (gpio_is_valid(gpio_ro) && host->pdata->get_ro)
|
2018-07-04 04:10:27 +08:00
|
|
|
dev_warn(dev, "gpio_ro and get_ro() both defined\n");
|
2018-07-04 04:10:26 +08:00
|
|
|
}
|
2009-06-24 05:21:03 +08:00
|
|
|
|
2005-04-17 06:20:36 +08:00
|
|
|
mmc_add_host(mmc);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
2015-09-27 03:41:01 +08:00
|
|
|
out:
|
2005-04-17 06:20:36 +08:00
|
|
|
if (host) {
|
2015-06-07 05:15:22 +08:00
|
|
|
if (host->dma_chan_rx)
|
|
|
|
dma_release_channel(host->dma_chan_rx);
|
|
|
|
if (host->dma_chan_tx)
|
|
|
|
dma_release_channel(host->dma_chan_tx);
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
|
|
|
if (mmc)
|
|
|
|
mmc_free_host(mmc);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2005-11-10 06:32:44 +08:00
|
|
|
static int pxamci_remove(struct platform_device *pdev)
|
2005-04-17 06:20:36 +08:00
|
|
|
{
|
2005-11-10 06:32:44 +08:00
|
|
|
struct mmc_host *mmc = platform_get_drvdata(pdev);
|
2005-04-17 06:20:36 +08:00
|
|
|
|
|
|
|
if (mmc) {
|
|
|
|
struct pxamci_host *host = mmc_priv(mmc);
|
|
|
|
|
2009-12-02 01:17:18 +08:00
|
|
|
mmc_remove_host(mmc);
|
|
|
|
|
2005-04-17 06:20:36 +08:00
|
|
|
if (host->pdata && host->pdata->exit)
|
2005-11-10 06:32:44 +08:00
|
|
|
host->pdata->exit(&pdev->dev, mmc);
|
2005-04-17 06:20:36 +08:00
|
|
|
|
|
|
|
pxamci_stop_clock(host);
|
|
|
|
writel(TXFIFO_WR_REQ|RXFIFO_RD_REQ|CLK_IS_OFF|STOP_CMD|
|
|
|
|
END_CMD_RES|PRG_DONE|DATA_TRAN_DONE,
|
|
|
|
host->base + MMC_I_MASK);
|
|
|
|
|
2015-06-07 05:15:22 +08:00
|
|
|
dmaengine_terminate_all(host->dma_chan_rx);
|
|
|
|
dmaengine_terminate_all(host->dma_chan_tx);
|
|
|
|
dma_release_channel(host->dma_chan_rx);
|
|
|
|
dma_release_channel(host->dma_chan_tx);
|
2005-04-17 06:20:36 +08:00
|
|
|
|
|
|
|
mmc_free_host(mmc);
|
|
|
|
}
|
2018-07-01 02:14:01 +08:00
|
|
|
|
2005-04-17 06:20:36 +08:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2005-11-10 06:32:44 +08:00
|
|
|
static struct platform_driver pxamci_driver = {
|
2005-04-17 06:20:36 +08:00
|
|
|
.probe = pxamci_probe,
|
|
|
|
.remove = pxamci_remove,
|
2005-11-10 06:32:44 +08:00
|
|
|
.driver = {
|
|
|
|
.name = DRIVER_NAME,
|
2012-07-28 18:07:34 +08:00
|
|
|
.of_match_table = of_match_ptr(pxa_mmc_dt_ids),
|
2005-11-10 06:32:44 +08:00
|
|
|
},
|
2005-04-17 06:20:36 +08:00
|
|
|
};
|
|
|
|
|
2011-11-26 12:55:43 +08:00
|
|
|
module_platform_driver(pxamci_driver);
|
2005-04-17 06:20:36 +08:00
|
|
|
|
|
|
|
MODULE_DESCRIPTION("PXA Multimedia Card Interface Driver");
|
|
|
|
MODULE_LICENSE("GPL");
|
2008-04-16 05:34:28 +08:00
|
|
|
MODULE_ALIAS("platform:pxa2xx-mci");
|