2016-06-09 21:19:10 +08:00
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/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* KVM/MIPS MMU handling in the KVM module.
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*
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* Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
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* Authors: Sanjay Lal <sanjayl@kymasys.com>
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*/
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2016-07-08 18:53:22 +08:00
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#include <linux/highmem.h>
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2016-06-09 21:19:10 +08:00
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#include <linux/kvm_host.h>
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2016-08-19 22:27:22 +08:00
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#include <linux/uaccess.h>
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2016-06-09 21:19:10 +08:00
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#include <asm/mmu_context.h>
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2016-12-16 23:57:00 +08:00
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#include <asm/pgalloc.h>
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2016-06-09 21:19:10 +08:00
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2017-01-05 18:44:38 +08:00
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/*
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* KVM_MMU_CACHE_MIN_PAGES is the number of GPA page table translation levels
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* for which pages need to be cached.
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*/
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#if defined(__PAGETABLE_PMD_FOLDED)
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#define KVM_MMU_CACHE_MIN_PAGES 1
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#else
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#define KVM_MMU_CACHE_MIN_PAGES 2
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#endif
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static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
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int min, int max)
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{
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void *page;
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BUG_ON(max > KVM_NR_MEM_OBJS);
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if (cache->nobjs >= min)
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return 0;
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while (cache->nobjs < max) {
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page = (void *)__get_free_page(GFP_KERNEL);
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if (!page)
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return -ENOMEM;
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cache->objects[cache->nobjs++] = page;
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}
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return 0;
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}
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2016-12-16 23:57:00 +08:00
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static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
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{
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while (mc->nobjs)
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free_page((unsigned long)mc->objects[--mc->nobjs]);
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}
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static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc)
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{
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void *p;
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BUG_ON(!mc || !mc->nobjs);
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p = mc->objects[--mc->nobjs];
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return p;
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}
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void kvm_mmu_free_memory_caches(struct kvm_vcpu *vcpu)
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{
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mmu_free_memory_cache(&vcpu->arch.mmu_page_cache);
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}
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2015-05-01 20:50:18 +08:00
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/**
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* kvm_pgd_init() - Initialise KVM GPA page directory.
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* @page: Pointer to page directory (PGD) for KVM GPA.
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*
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* Initialise a KVM GPA page directory with pointers to the invalid table, i.e.
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* representing no mappings. This is similar to pgd_init(), however it
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* initialises all the page directory pointers, not just the ones corresponding
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* to the userland address space (since it is for the guest physical address
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* space rather than a virtual address space).
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*/
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static void kvm_pgd_init(void *page)
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{
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unsigned long *p, *end;
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unsigned long entry;
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#ifdef __PAGETABLE_PMD_FOLDED
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entry = (unsigned long)invalid_pte_table;
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#else
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entry = (unsigned long)invalid_pmd_table;
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#endif
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p = (unsigned long *)page;
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end = p + PTRS_PER_PGD;
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do {
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p[0] = entry;
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p[1] = entry;
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p[2] = entry;
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p[3] = entry;
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p[4] = entry;
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p += 8;
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p[-3] = entry;
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p[-2] = entry;
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p[-1] = entry;
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} while (p != end);
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}
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/**
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* kvm_pgd_alloc() - Allocate and initialise a KVM GPA page directory.
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*
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* Allocate a blank KVM GPA page directory (PGD) for representing guest physical
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* to host physical page mappings.
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*
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* Returns: Pointer to new KVM GPA page directory.
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* NULL on allocation failure.
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*/
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pgd_t *kvm_pgd_alloc(void)
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{
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pgd_t *ret;
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ret = (pgd_t *)__get_free_pages(GFP_KERNEL, PGD_ORDER);
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if (ret)
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kvm_pgd_init(ret);
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return ret;
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}
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2016-12-16 23:57:00 +08:00
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/**
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* kvm_mips_walk_pgd() - Walk page table with optional allocation.
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* @pgd: Page directory pointer.
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* @addr: Address to index page table using.
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* @cache: MMU page cache to allocate new page tables from, or NULL.
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*
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* Walk the page tables pointed to by @pgd to find the PTE corresponding to the
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* address @addr. If page tables don't exist for @addr, they will be created
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* from the MMU cache if @cache is not NULL.
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*
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* Returns: Pointer to pte_t corresponding to @addr.
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* NULL if a page table doesn't exist for @addr and !@cache.
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* NULL if a page table allocation failed.
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*/
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static pte_t *kvm_mips_walk_pgd(pgd_t *pgd, struct kvm_mmu_memory_cache *cache,
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unsigned long addr)
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{
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pud_t *pud;
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pmd_t *pmd;
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pgd += pgd_index(addr);
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if (pgd_none(*pgd)) {
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/* Not used on MIPS yet */
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BUG();
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return NULL;
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}
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pud = pud_offset(pgd, addr);
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if (pud_none(*pud)) {
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pmd_t *new_pmd;
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if (!cache)
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return NULL;
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new_pmd = mmu_memory_cache_alloc(cache);
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pmd_init((unsigned long)new_pmd,
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(unsigned long)invalid_pte_table);
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pud_populate(NULL, pud, new_pmd);
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}
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pmd = pmd_offset(pud, addr);
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if (pmd_none(*pmd)) {
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pte_t *new_pte;
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if (!cache)
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return NULL;
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new_pte = mmu_memory_cache_alloc(cache);
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clear_page(new_pte);
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pmd_populate_kernel(NULL, pmd, new_pte);
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}
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return pte_offset(pmd, addr);
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}
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2015-05-01 20:50:18 +08:00
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/* Caller must hold kvm->mm_lock */
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static pte_t *kvm_mips_pte_for_gpa(struct kvm *kvm,
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struct kvm_mmu_memory_cache *cache,
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unsigned long addr)
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2016-06-09 21:19:10 +08:00
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{
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2015-05-01 20:50:18 +08:00
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return kvm_mips_walk_pgd(kvm->arch.gpa_mm.pgd, cache, addr);
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}
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2016-06-09 21:19:10 +08:00
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2015-05-01 20:50:18 +08:00
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/*
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* kvm_mips_flush_gpa_{pte,pmd,pud,pgd,pt}.
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* Flush a range of guest physical address space from the VM's GPA page tables.
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*/
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static bool kvm_mips_flush_gpa_pte(pte_t *pte, unsigned long start_gpa,
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unsigned long end_gpa)
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{
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int i_min = __pte_offset(start_gpa);
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int i_max = __pte_offset(end_gpa);
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bool safe_to_remove = (i_min == 0 && i_max == PTRS_PER_PTE - 1);
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int i;
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for (i = i_min; i <= i_max; ++i) {
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if (!pte_present(pte[i]))
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continue;
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kvm_release_pfn_clean(pte_pfn(pte[i]));
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set_pte(pte + i, __pte(0));
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}
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return safe_to_remove;
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}
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static bool kvm_mips_flush_gpa_pmd(pmd_t *pmd, unsigned long start_gpa,
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unsigned long end_gpa)
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{
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pte_t *pte;
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unsigned long end = ~0ul;
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int i_min = __pmd_offset(start_gpa);
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int i_max = __pmd_offset(end_gpa);
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bool safe_to_remove = (i_min == 0 && i_max == PTRS_PER_PMD - 1);
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int i;
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for (i = i_min; i <= i_max; ++i, start_gpa = 0) {
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if (!pmd_present(pmd[i]))
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continue;
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pte = pte_offset(pmd + i, 0);
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if (i == i_max)
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end = end_gpa;
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if (kvm_mips_flush_gpa_pte(pte, start_gpa, end)) {
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pmd_clear(pmd + i);
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pte_free_kernel(NULL, pte);
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} else {
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safe_to_remove = false;
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}
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}
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return safe_to_remove;
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}
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static bool kvm_mips_flush_gpa_pud(pud_t *pud, unsigned long start_gpa,
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unsigned long end_gpa)
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{
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pmd_t *pmd;
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unsigned long end = ~0ul;
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int i_min = __pud_offset(start_gpa);
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int i_max = __pud_offset(end_gpa);
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bool safe_to_remove = (i_min == 0 && i_max == PTRS_PER_PUD - 1);
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int i;
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for (i = i_min; i <= i_max; ++i, start_gpa = 0) {
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if (!pud_present(pud[i]))
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continue;
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pmd = pmd_offset(pud + i, 0);
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if (i == i_max)
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end = end_gpa;
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if (kvm_mips_flush_gpa_pmd(pmd, start_gpa, end)) {
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pud_clear(pud + i);
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pmd_free(NULL, pmd);
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} else {
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safe_to_remove = false;
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}
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}
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return safe_to_remove;
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}
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static bool kvm_mips_flush_gpa_pgd(pgd_t *pgd, unsigned long start_gpa,
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unsigned long end_gpa)
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{
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pud_t *pud;
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unsigned long end = ~0ul;
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int i_min = pgd_index(start_gpa);
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int i_max = pgd_index(end_gpa);
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bool safe_to_remove = (i_min == 0 && i_max == PTRS_PER_PGD - 1);
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int i;
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for (i = i_min; i <= i_max; ++i, start_gpa = 0) {
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if (!pgd_present(pgd[i]))
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continue;
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pud = pud_offset(pgd + i, 0);
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if (i == i_max)
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end = end_gpa;
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if (kvm_mips_flush_gpa_pud(pud, start_gpa, end)) {
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pgd_clear(pgd + i);
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pud_free(NULL, pud);
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} else {
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safe_to_remove = false;
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}
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}
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return safe_to_remove;
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}
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/**
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* kvm_mips_flush_gpa_pt() - Flush a range of guest physical addresses.
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* @kvm: KVM pointer.
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* @start_gfn: Guest frame number of first page in GPA range to flush.
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* @end_gfn: Guest frame number of last page in GPA range to flush.
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*
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* Flushes a range of GPA mappings from the GPA page tables.
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*
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* The caller must hold the @kvm->mmu_lock spinlock.
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*
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* Returns: Whether its safe to remove the top level page directory because
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* all lower levels have been removed.
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*/
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bool kvm_mips_flush_gpa_pt(struct kvm *kvm, gfn_t start_gfn, gfn_t end_gfn)
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{
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return kvm_mips_flush_gpa_pgd(kvm->arch.gpa_mm.pgd,
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start_gfn << PAGE_SHIFT,
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end_gfn << PAGE_SHIFT);
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}
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/**
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* kvm_mips_map_page() - Map a guest physical page.
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* @vcpu: VCPU pointer.
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* @gpa: Guest physical address of fault.
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2015-05-01 21:56:31 +08:00
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* @write_fault: Whether the fault was due to a write.
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2015-05-01 20:50:18 +08:00
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* @out_entry: New PTE for @gpa (written on success unless NULL).
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* @out_buddy: New PTE for @gpa's buddy (written on success unless
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* NULL).
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*
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* Handle GPA faults by creating a new GPA mapping (or updating an existing
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* one).
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*
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* This takes care of asking KVM for the corresponding PFN, and creating a
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* mapping in the GPA page tables. Derived mappings (GVA page tables and TLBs)
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* must be handled by the caller.
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*
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* Returns: 0 on success, in which case the caller may use the @out_entry
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* and @out_buddy PTEs to update derived mappings and resume guest
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* execution.
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* -EFAULT if there is no memory region at @gpa or a write was
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* attempted to a read-only memory region. This is usually handled
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* as an MMIO access.
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*/
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static int kvm_mips_map_page(struct kvm_vcpu *vcpu, unsigned long gpa,
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2015-05-01 21:56:31 +08:00
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bool write_fault,
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2015-05-01 20:50:18 +08:00
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pte_t *out_entry, pte_t *out_buddy)
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{
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struct kvm *kvm = vcpu->kvm;
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struct kvm_mmu_memory_cache *memcache = &vcpu->arch.mmu_page_cache;
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gfn_t gfn = gpa >> PAGE_SHIFT;
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int srcu_idx, err;
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kvm_pfn_t pfn;
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pte_t *ptep, entry, old_pte;
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unsigned long prot_bits;
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2016-06-09 21:19:10 +08:00
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srcu_idx = srcu_read_lock(&kvm->srcu);
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2015-05-01 20:50:18 +08:00
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/* We need a minimum of cached pages ready for page table creation */
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err = mmu_topup_memory_cache(memcache, KVM_MMU_CACHE_MIN_PAGES,
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|
|
KVM_NR_MEM_OBJS);
|
|
|
|
if (err)
|
|
|
|
goto out;
|
|
|
|
|
2016-06-09 21:19:11 +08:00
|
|
|
pfn = gfn_to_pfn(kvm, gfn);
|
2016-06-09 21:19:10 +08:00
|
|
|
|
2016-08-19 21:30:29 +08:00
|
|
|
if (is_error_noslot_pfn(pfn)) {
|
2016-06-09 21:19:10 +08:00
|
|
|
kvm_err("Couldn't get pfn for gfn %#llx!\n", gfn);
|
|
|
|
err = -EFAULT;
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
|
2015-05-01 20:50:18 +08:00
|
|
|
spin_lock(&kvm->mmu_lock);
|
|
|
|
|
|
|
|
ptep = kvm_mips_pte_for_gpa(kvm, memcache, gpa);
|
|
|
|
|
|
|
|
prot_bits = __READABLE | _PAGE_PRESENT | __WRITEABLE;
|
|
|
|
entry = pfn_pte(pfn, __pgprot(prot_bits));
|
|
|
|
|
|
|
|
old_pte = *ptep;
|
|
|
|
set_pte(ptep, entry);
|
|
|
|
if (pte_present(old_pte))
|
|
|
|
kvm_release_pfn_clean(pte_pfn(old_pte));
|
|
|
|
|
|
|
|
err = 0;
|
|
|
|
if (out_entry)
|
|
|
|
*out_entry = *ptep;
|
|
|
|
if (out_buddy)
|
|
|
|
*out_buddy = *ptep_buddy(ptep);
|
|
|
|
|
|
|
|
spin_unlock(&kvm->mmu_lock);
|
2016-06-09 21:19:10 +08:00
|
|
|
out:
|
|
|
|
srcu_read_unlock(&kvm->srcu, srcu_idx);
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
2017-01-05 18:44:38 +08:00
|
|
|
static pte_t *kvm_trap_emul_pte_for_gva(struct kvm_vcpu *vcpu,
|
|
|
|
unsigned long addr)
|
|
|
|
{
|
|
|
|
struct kvm_mmu_memory_cache *memcache = &vcpu->arch.mmu_page_cache;
|
|
|
|
pgd_t *pgdp;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
/* We need a minimum of cached pages ready for page table creation */
|
|
|
|
ret = mmu_topup_memory_cache(memcache, KVM_MMU_CACHE_MIN_PAGES,
|
|
|
|
KVM_NR_MEM_OBJS);
|
|
|
|
if (ret)
|
|
|
|
return NULL;
|
|
|
|
|
|
|
|
if (KVM_GUEST_KERNEL_MODE(vcpu))
|
|
|
|
pgdp = vcpu->arch.guest_kernel_mm.pgd;
|
|
|
|
else
|
|
|
|
pgdp = vcpu->arch.guest_user_mm.pgd;
|
|
|
|
|
|
|
|
return kvm_mips_walk_pgd(pgdp, memcache, addr);
|
|
|
|
}
|
|
|
|
|
2016-12-16 23:57:00 +08:00
|
|
|
void kvm_trap_emul_invalidate_gva(struct kvm_vcpu *vcpu, unsigned long addr,
|
|
|
|
bool user)
|
|
|
|
{
|
|
|
|
pgd_t *pgdp;
|
|
|
|
pte_t *ptep;
|
|
|
|
|
|
|
|
addr &= PAGE_MASK << 1;
|
|
|
|
|
|
|
|
pgdp = vcpu->arch.guest_kernel_mm.pgd;
|
|
|
|
ptep = kvm_mips_walk_pgd(pgdp, NULL, addr);
|
|
|
|
if (ptep) {
|
|
|
|
ptep[0] = pfn_pte(0, __pgprot(0));
|
|
|
|
ptep[1] = pfn_pte(0, __pgprot(0));
|
|
|
|
}
|
|
|
|
|
|
|
|
if (user) {
|
|
|
|
pgdp = vcpu->arch.guest_user_mm.pgd;
|
|
|
|
ptep = kvm_mips_walk_pgd(pgdp, NULL, addr);
|
|
|
|
if (ptep) {
|
|
|
|
ptep[0] = pfn_pte(0, __pgprot(0));
|
|
|
|
ptep[1] = pfn_pte(0, __pgprot(0));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2016-12-16 23:57:00 +08:00
|
|
|
/*
|
|
|
|
* kvm_mips_flush_gva_{pte,pmd,pud,pgd,pt}.
|
|
|
|
* Flush a range of guest physical address space from the VM's GPA page tables.
|
|
|
|
*/
|
|
|
|
|
|
|
|
static bool kvm_mips_flush_gva_pte(pte_t *pte, unsigned long start_gva,
|
|
|
|
unsigned long end_gva)
|
|
|
|
{
|
|
|
|
int i_min = __pte_offset(start_gva);
|
|
|
|
int i_max = __pte_offset(end_gva);
|
|
|
|
bool safe_to_remove = (i_min == 0 && i_max == PTRS_PER_PTE - 1);
|
|
|
|
int i;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* There's no freeing to do, so there's no point clearing individual
|
|
|
|
* entries unless only part of the last level page table needs flushing.
|
|
|
|
*/
|
|
|
|
if (safe_to_remove)
|
|
|
|
return true;
|
|
|
|
|
|
|
|
for (i = i_min; i <= i_max; ++i) {
|
|
|
|
if (!pte_present(pte[i]))
|
|
|
|
continue;
|
|
|
|
|
|
|
|
set_pte(pte + i, __pte(0));
|
|
|
|
}
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
static bool kvm_mips_flush_gva_pmd(pmd_t *pmd, unsigned long start_gva,
|
|
|
|
unsigned long end_gva)
|
|
|
|
{
|
|
|
|
pte_t *pte;
|
|
|
|
unsigned long end = ~0ul;
|
|
|
|
int i_min = __pmd_offset(start_gva);
|
|
|
|
int i_max = __pmd_offset(end_gva);
|
|
|
|
bool safe_to_remove = (i_min == 0 && i_max == PTRS_PER_PMD - 1);
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = i_min; i <= i_max; ++i, start_gva = 0) {
|
|
|
|
if (!pmd_present(pmd[i]))
|
|
|
|
continue;
|
|
|
|
|
|
|
|
pte = pte_offset(pmd + i, 0);
|
|
|
|
if (i == i_max)
|
|
|
|
end = end_gva;
|
|
|
|
|
|
|
|
if (kvm_mips_flush_gva_pte(pte, start_gva, end)) {
|
|
|
|
pmd_clear(pmd + i);
|
|
|
|
pte_free_kernel(NULL, pte);
|
|
|
|
} else {
|
|
|
|
safe_to_remove = false;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return safe_to_remove;
|
|
|
|
}
|
|
|
|
|
|
|
|
static bool kvm_mips_flush_gva_pud(pud_t *pud, unsigned long start_gva,
|
|
|
|
unsigned long end_gva)
|
|
|
|
{
|
|
|
|
pmd_t *pmd;
|
|
|
|
unsigned long end = ~0ul;
|
|
|
|
int i_min = __pud_offset(start_gva);
|
|
|
|
int i_max = __pud_offset(end_gva);
|
|
|
|
bool safe_to_remove = (i_min == 0 && i_max == PTRS_PER_PUD - 1);
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = i_min; i <= i_max; ++i, start_gva = 0) {
|
|
|
|
if (!pud_present(pud[i]))
|
|
|
|
continue;
|
|
|
|
|
|
|
|
pmd = pmd_offset(pud + i, 0);
|
|
|
|
if (i == i_max)
|
|
|
|
end = end_gva;
|
|
|
|
|
|
|
|
if (kvm_mips_flush_gva_pmd(pmd, start_gva, end)) {
|
|
|
|
pud_clear(pud + i);
|
|
|
|
pmd_free(NULL, pmd);
|
|
|
|
} else {
|
|
|
|
safe_to_remove = false;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return safe_to_remove;
|
|
|
|
}
|
|
|
|
|
|
|
|
static bool kvm_mips_flush_gva_pgd(pgd_t *pgd, unsigned long start_gva,
|
|
|
|
unsigned long end_gva)
|
|
|
|
{
|
|
|
|
pud_t *pud;
|
|
|
|
unsigned long end = ~0ul;
|
|
|
|
int i_min = pgd_index(start_gva);
|
|
|
|
int i_max = pgd_index(end_gva);
|
|
|
|
bool safe_to_remove = (i_min == 0 && i_max == PTRS_PER_PGD - 1);
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = i_min; i <= i_max; ++i, start_gva = 0) {
|
|
|
|
if (!pgd_present(pgd[i]))
|
|
|
|
continue;
|
|
|
|
|
|
|
|
pud = pud_offset(pgd + i, 0);
|
|
|
|
if (i == i_max)
|
|
|
|
end = end_gva;
|
|
|
|
|
|
|
|
if (kvm_mips_flush_gva_pud(pud, start_gva, end)) {
|
|
|
|
pgd_clear(pgd + i);
|
|
|
|
pud_free(NULL, pud);
|
|
|
|
} else {
|
|
|
|
safe_to_remove = false;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return safe_to_remove;
|
|
|
|
}
|
|
|
|
|
|
|
|
void kvm_mips_flush_gva_pt(pgd_t *pgd, enum kvm_mips_flush flags)
|
|
|
|
{
|
|
|
|
if (flags & KMF_GPA) {
|
|
|
|
/* all of guest virtual address space could be affected */
|
|
|
|
if (flags & KMF_KERN)
|
|
|
|
/* useg, kseg0, seg2/3 */
|
|
|
|
kvm_mips_flush_gva_pgd(pgd, 0, 0x7fffffff);
|
|
|
|
else
|
|
|
|
/* useg */
|
|
|
|
kvm_mips_flush_gva_pgd(pgd, 0, 0x3fffffff);
|
|
|
|
} else {
|
|
|
|
/* useg */
|
|
|
|
kvm_mips_flush_gva_pgd(pgd, 0, 0x3fffffff);
|
|
|
|
|
|
|
|
/* kseg2/3 */
|
|
|
|
if (flags & KMF_KERN)
|
|
|
|
kvm_mips_flush_gva_pgd(pgd, 0x60000000, 0x7fffffff);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2016-06-09 21:19:10 +08:00
|
|
|
/* XXXKYMA: Must be called with interrupts disabled */
|
|
|
|
int kvm_mips_handle_kseg0_tlb_fault(unsigned long badvaddr,
|
2015-05-01 21:56:31 +08:00
|
|
|
struct kvm_vcpu *vcpu,
|
|
|
|
bool write_fault)
|
2016-06-09 21:19:10 +08:00
|
|
|
{
|
2015-05-01 20:50:18 +08:00
|
|
|
unsigned long gpa;
|
2016-06-09 21:19:10 +08:00
|
|
|
kvm_pfn_t pfn0, pfn1;
|
2015-05-01 20:50:18 +08:00
|
|
|
unsigned long vaddr;
|
|
|
|
pte_t pte_gpa[2], *ptep_gva;
|
2016-06-09 21:19:10 +08:00
|
|
|
|
|
|
|
if (KVM_GUEST_KSEGX(badvaddr) != KVM_GUEST_KSEG0) {
|
|
|
|
kvm_err("%s: Invalid BadVaddr: %#lx\n", __func__, badvaddr);
|
|
|
|
kvm_mips_dump_host_tlbs();
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
2017-01-05 18:44:38 +08:00
|
|
|
/* Find host PFNs */
|
|
|
|
|
2015-05-01 20:50:18 +08:00
|
|
|
gpa = KVM_GUEST_CPHYSADDR(badvaddr & (PAGE_MASK << 1));
|
2016-06-09 21:19:10 +08:00
|
|
|
vaddr = badvaddr & (PAGE_MASK << 1);
|
|
|
|
|
2015-05-01 21:56:31 +08:00
|
|
|
if (kvm_mips_map_page(vcpu, gpa, write_fault, &pte_gpa[0], NULL) < 0)
|
2016-06-09 21:19:10 +08:00
|
|
|
return -1;
|
|
|
|
|
2015-05-01 21:56:31 +08:00
|
|
|
if (kvm_mips_map_page(vcpu, gpa | PAGE_SIZE, write_fault, &pte_gpa[1],
|
|
|
|
NULL) < 0)
|
2016-06-09 21:19:10 +08:00
|
|
|
return -1;
|
|
|
|
|
2015-05-01 20:50:18 +08:00
|
|
|
pfn0 = pte_pfn(pte_gpa[0]);
|
|
|
|
pfn1 = pte_pfn(pte_gpa[1]);
|
2016-06-09 21:19:10 +08:00
|
|
|
|
2017-01-05 18:44:38 +08:00
|
|
|
/* Find GVA page table entry */
|
|
|
|
|
|
|
|
ptep_gva = kvm_trap_emul_pte_for_gva(vcpu, vaddr);
|
|
|
|
if (!ptep_gva) {
|
|
|
|
kvm_err("No ptep for gva %lx\n", vaddr);
|
|
|
|
return -1;
|
|
|
|
}
|
2016-06-09 21:19:10 +08:00
|
|
|
|
2017-01-05 18:44:38 +08:00
|
|
|
/* Write host PFNs into GVA page table */
|
|
|
|
ptep_gva[0] = pte_mkyoung(pte_mkdirty(pfn_pte(pfn0, PAGE_SHARED)));
|
|
|
|
ptep_gva[1] = pte_mkyoung(pte_mkdirty(pfn_pte(pfn1, PAGE_SHARED)));
|
2016-06-09 21:19:10 +08:00
|
|
|
|
2017-01-05 18:44:38 +08:00
|
|
|
/* Invalidate this entry in the TLB, guest kernel ASID only */
|
|
|
|
kvm_mips_host_tlb_inv(vcpu, vaddr, false, true);
|
|
|
|
return 0;
|
2016-06-09 21:19:10 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
int kvm_mips_handle_mapped_seg_tlb_fault(struct kvm_vcpu *vcpu,
|
2016-10-08 08:15:19 +08:00
|
|
|
struct kvm_mips_tlb *tlb,
|
2015-05-01 21:56:31 +08:00
|
|
|
unsigned long gva,
|
|
|
|
bool write_fault)
|
2016-06-09 21:19:10 +08:00
|
|
|
{
|
2016-10-08 08:15:19 +08:00
|
|
|
kvm_pfn_t pfn;
|
|
|
|
long tlb_lo = 0;
|
2015-05-01 20:50:18 +08:00
|
|
|
pte_t pte_gpa, *ptep_gva;
|
2016-10-08 08:15:19 +08:00
|
|
|
unsigned int idx;
|
|
|
|
bool kernel = KVM_GUEST_KERNEL_MODE(vcpu);
|
2016-08-11 18:58:12 +08:00
|
|
|
|
|
|
|
/*
|
|
|
|
* The commpage address must not be mapped to anything else if the guest
|
|
|
|
* TLB contains entries nearby, or commpage accesses will break.
|
|
|
|
*/
|
2016-10-08 08:15:19 +08:00
|
|
|
idx = TLB_LO_IDX(*tlb, gva);
|
|
|
|
if ((gva ^ KVM_GUEST_COMMPAGE_ADDR) & VPN2_MASK & PAGE_MASK)
|
|
|
|
tlb_lo = tlb->tlb_lo[idx];
|
|
|
|
|
|
|
|
/* Find host PFN */
|
2015-05-01 21:56:31 +08:00
|
|
|
if (kvm_mips_map_page(vcpu, mips3_tlbpfn_to_paddr(tlb_lo), write_fault,
|
|
|
|
&pte_gpa, NULL) < 0)
|
2016-08-11 18:58:12 +08:00
|
|
|
return -1;
|
2015-05-01 20:50:18 +08:00
|
|
|
pfn = pte_pfn(pte_gpa);
|
2016-08-11 18:58:12 +08:00
|
|
|
|
2016-10-08 08:15:19 +08:00
|
|
|
/* Find GVA page table entry */
|
|
|
|
ptep_gva = kvm_trap_emul_pte_for_gva(vcpu, gva);
|
|
|
|
if (!ptep_gva) {
|
|
|
|
kvm_err("No ptep for gva %lx\n", gva);
|
2016-08-11 18:58:12 +08:00
|
|
|
return -1;
|
2016-10-08 08:15:19 +08:00
|
|
|
}
|
2016-08-11 18:58:12 +08:00
|
|
|
|
2016-10-08 08:15:19 +08:00
|
|
|
/* Write PFN into GVA page table, taking attributes from Guest TLB */
|
|
|
|
*ptep_gva = pfn_pte(pfn, (!(tlb_lo & ENTRYLO_V)) ? __pgprot(0) :
|
|
|
|
(tlb_lo & ENTRYLO_D) ? PAGE_SHARED :
|
|
|
|
PAGE_READONLY);
|
|
|
|
if (pte_present(*ptep_gva))
|
|
|
|
*ptep_gva = pte_mkyoung(pte_mkdirty(*ptep_gva));
|
2016-06-09 21:19:10 +08:00
|
|
|
|
2016-10-08 08:15:19 +08:00
|
|
|
/* Invalidate this entry in the TLB, current guest mode ASID only */
|
|
|
|
kvm_mips_host_tlb_inv(vcpu, gva, !kernel, kernel);
|
2016-06-09 21:19:10 +08:00
|
|
|
|
|
|
|
kvm_debug("@ %#lx tlb_lo0: 0x%08lx tlb_lo1: 0x%08lx\n", vcpu->arch.pc,
|
2016-06-09 21:19:17 +08:00
|
|
|
tlb->tlb_lo[0], tlb->tlb_lo[1]);
|
2016-06-09 21:19:10 +08:00
|
|
|
|
2016-10-08 08:15:19 +08:00
|
|
|
return 0;
|
2016-06-09 21:19:10 +08:00
|
|
|
}
|
|
|
|
|
2016-10-08 08:16:21 +08:00
|
|
|
int kvm_mips_handle_commpage_tlb_fault(unsigned long badvaddr,
|
|
|
|
struct kvm_vcpu *vcpu)
|
|
|
|
{
|
|
|
|
kvm_pfn_t pfn;
|
|
|
|
pte_t *ptep;
|
|
|
|
|
|
|
|
ptep = kvm_trap_emul_pte_for_gva(vcpu, badvaddr);
|
|
|
|
if (!ptep) {
|
|
|
|
kvm_err("No ptep for commpage %lx\n", badvaddr);
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
|
|
|
pfn = PFN_DOWN(virt_to_phys(vcpu->arch.kseg0_commpage));
|
|
|
|
/* Also set valid and dirty, so refill handler doesn't have to */
|
|
|
|
*ptep = pte_mkyoung(pte_mkdirty(pfn_pte(pfn, PAGE_SHARED)));
|
|
|
|
|
|
|
|
/* Invalidate this entry in the TLB, guest kernel ASID only */
|
|
|
|
kvm_mips_host_tlb_inv(vcpu, badvaddr, false, true);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2016-06-09 21:19:10 +08:00
|
|
|
/**
|
|
|
|
* kvm_mips_migrate_count() - Migrate timer.
|
|
|
|
* @vcpu: Virtual CPU.
|
|
|
|
*
|
|
|
|
* Migrate CP0_Count hrtimer to the current CPU by cancelling and restarting it
|
|
|
|
* if it was running prior to being cancelled.
|
|
|
|
*
|
|
|
|
* Must be called when the VCPU is migrated to a different CPU to ensure that
|
|
|
|
* timer expiry during guest execution interrupts the guest and causes the
|
|
|
|
* interrupt to be delivered in a timely manner.
|
|
|
|
*/
|
|
|
|
static void kvm_mips_migrate_count(struct kvm_vcpu *vcpu)
|
|
|
|
{
|
|
|
|
if (hrtimer_cancel(&vcpu->arch.comparecount_timer))
|
|
|
|
hrtimer_restart(&vcpu->arch.comparecount_timer);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Restore ASID once we are scheduled back after preemption */
|
|
|
|
void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
|
|
|
|
{
|
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
kvm_debug("%s: vcpu %p, cpu: %d\n", __func__, vcpu, cpu);
|
|
|
|
|
|
|
|
local_irq_save(flags);
|
|
|
|
|
2016-11-29 06:45:04 +08:00
|
|
|
vcpu->cpu = cpu;
|
2016-06-09 21:19:10 +08:00
|
|
|
if (vcpu->arch.last_sched_cpu != cpu) {
|
|
|
|
kvm_debug("[%d->%d]KVM VCPU[%d] switch\n",
|
|
|
|
vcpu->arch.last_sched_cpu, cpu, vcpu->vcpu_id);
|
|
|
|
/*
|
|
|
|
* Migrate the timer interrupt to the current CPU so that it
|
|
|
|
* always interrupts the guest and synchronously triggers a
|
|
|
|
* guest timer interrupt.
|
|
|
|
*/
|
|
|
|
kvm_mips_migrate_count(vcpu);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* restore guest state to registers */
|
2016-11-12 08:00:13 +08:00
|
|
|
kvm_mips_callbacks->vcpu_load(vcpu, cpu);
|
2016-06-09 21:19:10 +08:00
|
|
|
|
|
|
|
local_irq_restore(flags);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* ASID can change if another task is scheduled during preemption */
|
|
|
|
void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
|
|
|
|
{
|
|
|
|
unsigned long flags;
|
|
|
|
int cpu;
|
|
|
|
|
|
|
|
local_irq_save(flags);
|
|
|
|
|
|
|
|
cpu = smp_processor_id();
|
|
|
|
vcpu->arch.last_sched_cpu = cpu;
|
2016-11-29 06:45:04 +08:00
|
|
|
vcpu->cpu = -1;
|
2016-06-09 21:19:10 +08:00
|
|
|
|
|
|
|
/* save guest state in registers */
|
2016-11-12 08:00:13 +08:00
|
|
|
kvm_mips_callbacks->vcpu_put(vcpu, cpu);
|
2016-06-09 21:19:10 +08:00
|
|
|
|
|
|
|
local_irq_restore(flags);
|
|
|
|
}
|
|
|
|
|
2016-11-29 07:04:52 +08:00
|
|
|
/**
|
|
|
|
* kvm_trap_emul_gva_fault() - Safely attempt to handle a GVA access fault.
|
|
|
|
* @vcpu: Virtual CPU.
|
|
|
|
* @gva: Guest virtual address to be accessed.
|
|
|
|
* @write: True if write attempted (must be dirtied and made writable).
|
|
|
|
*
|
|
|
|
* Safely attempt to handle a GVA fault, mapping GVA pages if necessary, and
|
|
|
|
* dirtying the page if @write so that guest instructions can be modified.
|
|
|
|
*
|
|
|
|
* Returns: KVM_MIPS_MAPPED on success.
|
|
|
|
* KVM_MIPS_GVA if bad guest virtual address.
|
|
|
|
* KVM_MIPS_GPA if bad guest physical address.
|
|
|
|
* KVM_MIPS_TLB if guest TLB not present.
|
|
|
|
* KVM_MIPS_TLBINV if guest TLB present but not valid.
|
|
|
|
* KVM_MIPS_TLBMOD if guest TLB read only.
|
|
|
|
*/
|
|
|
|
enum kvm_mips_fault_result kvm_trap_emul_gva_fault(struct kvm_vcpu *vcpu,
|
|
|
|
unsigned long gva,
|
|
|
|
bool write)
|
|
|
|
{
|
|
|
|
struct mips_coproc *cop0 = vcpu->arch.cop0;
|
|
|
|
struct kvm_mips_tlb *tlb;
|
|
|
|
int index;
|
|
|
|
|
|
|
|
if (KVM_GUEST_KSEGX(gva) == KVM_GUEST_KSEG0) {
|
2015-05-01 21:56:31 +08:00
|
|
|
if (kvm_mips_handle_kseg0_tlb_fault(gva, vcpu, write) < 0)
|
2016-11-29 07:04:52 +08:00
|
|
|
return KVM_MIPS_GPA;
|
|
|
|
} else if ((KVM_GUEST_KSEGX(gva) < KVM_GUEST_KSEG0) ||
|
|
|
|
KVM_GUEST_KSEGX(gva) == KVM_GUEST_KSEG23) {
|
|
|
|
/* Address should be in the guest TLB */
|
|
|
|
index = kvm_mips_guest_tlb_lookup(vcpu, (gva & VPN2_MASK) |
|
|
|
|
(kvm_read_c0_guest_entryhi(cop0) & KVM_ENTRYHI_ASID));
|
|
|
|
if (index < 0)
|
|
|
|
return KVM_MIPS_TLB;
|
|
|
|
tlb = &vcpu->arch.guest_tlb[index];
|
|
|
|
|
|
|
|
/* Entry should be valid, and dirty for writes */
|
|
|
|
if (!TLB_IS_VALID(*tlb, gva))
|
|
|
|
return KVM_MIPS_TLBINV;
|
|
|
|
if (write && !TLB_IS_DIRTY(*tlb, gva))
|
|
|
|
return KVM_MIPS_TLBMOD;
|
|
|
|
|
2015-05-01 21:56:31 +08:00
|
|
|
if (kvm_mips_handle_mapped_seg_tlb_fault(vcpu, tlb, gva, write))
|
2016-11-29 07:04:52 +08:00
|
|
|
return KVM_MIPS_GPA;
|
|
|
|
} else {
|
|
|
|
return KVM_MIPS_GVA;
|
|
|
|
}
|
|
|
|
|
|
|
|
return KVM_MIPS_MAPPED;
|
|
|
|
}
|
|
|
|
|
2016-11-29 01:23:14 +08:00
|
|
|
int kvm_get_inst(u32 *opc, struct kvm_vcpu *vcpu, u32 *out)
|
2016-06-09 21:19:10 +08:00
|
|
|
{
|
2016-08-19 22:27:22 +08:00
|
|
|
int err;
|
|
|
|
|
2016-11-29 07:15:53 +08:00
|
|
|
retry:
|
|
|
|
kvm_trap_emul_gva_lockless_begin(vcpu);
|
2016-11-29 01:23:14 +08:00
|
|
|
err = get_user(*out, opc);
|
2016-11-29 07:15:53 +08:00
|
|
|
kvm_trap_emul_gva_lockless_end(vcpu);
|
|
|
|
|
2016-08-19 22:27:22 +08:00
|
|
|
if (unlikely(err)) {
|
2016-11-29 07:15:53 +08:00
|
|
|
/*
|
|
|
|
* Try to handle the fault, maybe we just raced with a GVA
|
|
|
|
* invalidation.
|
|
|
|
*/
|
|
|
|
err = kvm_trap_emul_gva_fault(vcpu, (unsigned long)opc,
|
|
|
|
false);
|
|
|
|
if (unlikely(err)) {
|
|
|
|
kvm_err("%s: illegal address: %p\n",
|
|
|
|
__func__, opc);
|
|
|
|
return -EFAULT;
|
|
|
|
}
|
2016-06-09 21:19:10 +08:00
|
|
|
|
2016-11-29 07:15:53 +08:00
|
|
|
/* Hopefully it'll work now */
|
|
|
|
goto retry;
|
|
|
|
}
|
2016-11-29 01:23:14 +08:00
|
|
|
return 0;
|
2016-06-09 21:19:10 +08:00
|
|
|
}
|