2006-06-26 15:25:03 +08:00
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/*
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2006-10-04 05:01:26 +08:00
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* drivers/char/hw_random/omap-rng.c
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2006-06-26 15:25:03 +08:00
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*
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* RNG driver for TI OMAP CPU family
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*
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* Author: Deepak Saxena <dsaxena@plexity.net>
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*
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* Copyright 2005 (c) MontaVista Software, Inc.
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*
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* Mostly based on original driver:
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*
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* Copyright (C) 2005 Nokia Corporation
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2007-10-20 05:21:04 +08:00
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* Author: Juha Yrjölä <juha.yrjola@nokia.com>
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2006-06-26 15:25:03 +08:00
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*
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* TODO:
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*
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* - Make status updated be interrupt driven so we don't poll
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*
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/random.h>
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2006-08-06 03:14:04 +08:00
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#include <linux/clk.h>
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2006-06-26 15:25:03 +08:00
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#include <linux/err.h>
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2006-08-06 03:14:04 +08:00
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#include <linux/platform_device.h>
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2006-06-26 15:25:03 +08:00
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#include <linux/hw_random.h>
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2007-11-21 12:24:45 +08:00
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#include <linux/delay.h>
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2006-06-26 15:25:03 +08:00
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#include <asm/io.h>
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#define RNG_OUT_REG 0x00 /* Output register */
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#define RNG_STAT_REG 0x04 /* Status register
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[0] = STAT_BUSY */
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#define RNG_ALARM_REG 0x24 /* Alarm register
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[7:0] = ALARM_COUNTER */
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#define RNG_CONFIG_REG 0x28 /* Configuration register
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[11:6] = RESET_COUNT
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[5:3] = RING2_DELAY
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[2:0] = RING1_DELAY */
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#define RNG_REV_REG 0x3c /* Revision register
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[7:0] = REV_NB */
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#define RNG_MASK_REG 0x40 /* Mask and reset register
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[2] = IT_EN
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[1] = SOFTRESET
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[0] = AUTOIDLE */
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#define RNG_SYSSTATUS 0x44 /* System status
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[0] = RESETDONE */
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static void __iomem *rng_base;
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static struct clk *rng_ick;
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2006-08-06 03:14:04 +08:00
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static struct platform_device *rng_dev;
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2006-06-26 15:25:03 +08:00
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static u32 omap_rng_read_reg(int reg)
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{
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return __raw_readl(rng_base + reg);
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}
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static void omap_rng_write_reg(int reg, u32 val)
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{
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__raw_writel(val, rng_base + reg);
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}
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/* REVISIT: Does the status bit really work on 16xx? */
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2007-11-21 12:24:45 +08:00
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static int omap_rng_data_present(struct hwrng *rng, int wait)
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2006-06-26 15:25:03 +08:00
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{
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2007-11-21 12:24:45 +08:00
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int data, i;
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for (i = 0; i < 20; i++) {
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data = omap_rng_read_reg(RNG_STAT_REG) ? 0 : 1;
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if (data || !wait)
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break;
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udelay(10);
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}
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return data;
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2006-06-26 15:25:03 +08:00
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}
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static int omap_rng_data_read(struct hwrng *rng, u32 *data)
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{
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*data = omap_rng_read_reg(RNG_OUT_REG);
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return 4;
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}
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static struct hwrng omap_rng_ops = {
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.name = "omap",
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.data_present = omap_rng_data_present,
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.data_read = omap_rng_data_read,
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};
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2006-08-06 03:14:04 +08:00
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static int __init omap_rng_probe(struct platform_device *pdev)
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2006-06-26 15:25:03 +08:00
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{
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struct resource *res, *mem;
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int ret;
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/*
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* A bit ugly, and it will never actually happen but there can
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* be only one RNG and this catches any bork
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*/
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BUG_ON(rng_dev);
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2006-08-06 03:14:04 +08:00
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if (cpu_is_omap24xx()) {
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2006-06-26 15:25:03 +08:00
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rng_ick = clk_get(NULL, "rng_ick");
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if (IS_ERR(rng_ick)) {
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2006-08-06 03:14:04 +08:00
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dev_err(&pdev->dev, "Could not get rng_ick\n");
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2006-06-26 15:25:03 +08:00
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ret = PTR_ERR(rng_ick);
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return ret;
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2006-08-06 03:14:04 +08:00
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} else
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clk_enable(rng_ick);
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2006-06-26 15:25:03 +08:00
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}
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!res)
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return -ENOENT;
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mem = request_mem_region(res->start, res->end - res->start + 1,
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pdev->name);
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if (mem == NULL)
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return -EBUSY;
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2006-08-06 03:14:04 +08:00
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dev_set_drvdata(&pdev->dev, mem);
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2006-06-26 15:25:03 +08:00
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rng_base = (u32 __iomem *)io_p2v(res->start);
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ret = hwrng_register(&omap_rng_ops);
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if (ret) {
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release_resource(mem);
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rng_base = NULL;
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return ret;
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}
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2006-08-06 03:14:04 +08:00
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dev_info(&pdev->dev, "OMAP Random Number Generator ver. %02x\n",
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2006-06-26 15:25:03 +08:00
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omap_rng_read_reg(RNG_REV_REG));
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omap_rng_write_reg(RNG_MASK_REG, 0x1);
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2006-08-06 03:14:04 +08:00
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rng_dev = pdev;
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2006-06-26 15:25:03 +08:00
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return 0;
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}
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2006-08-06 03:14:04 +08:00
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static int __exit omap_rng_remove(struct platform_device *pdev)
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2006-06-26 15:25:03 +08:00
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{
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2006-08-06 03:14:04 +08:00
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struct resource *mem = dev_get_drvdata(&pdev->dev);
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2006-06-26 15:25:03 +08:00
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hwrng_unregister(&omap_rng_ops);
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omap_rng_write_reg(RNG_MASK_REG, 0x0);
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if (cpu_is_omap24xx()) {
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2006-08-06 03:14:04 +08:00
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clk_disable(rng_ick);
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2006-06-26 15:25:03 +08:00
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clk_put(rng_ick);
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}
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release_resource(mem);
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rng_base = NULL;
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return 0;
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}
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#ifdef CONFIG_PM
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2006-08-06 03:14:04 +08:00
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static int omap_rng_suspend(struct platform_device *pdev, pm_message_t message)
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2006-06-26 15:25:03 +08:00
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{
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omap_rng_write_reg(RNG_MASK_REG, 0x0);
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return 0;
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}
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2006-08-06 03:14:04 +08:00
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static int omap_rng_resume(struct platform_device *pdev)
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2006-06-26 15:25:03 +08:00
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{
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omap_rng_write_reg(RNG_MASK_REG, 0x1);
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2006-08-06 03:14:04 +08:00
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return 0;
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2006-06-26 15:25:03 +08:00
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}
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#else
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#define omap_rng_suspend NULL
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#define omap_rng_resume NULL
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#endif
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2006-08-06 03:14:04 +08:00
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static struct platform_driver omap_rng_driver = {
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.driver = {
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.name = "omap_rng",
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.owner = THIS_MODULE,
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},
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2006-06-26 15:25:03 +08:00
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.probe = omap_rng_probe,
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.remove = __exit_p(omap_rng_remove),
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.suspend = omap_rng_suspend,
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.resume = omap_rng_resume
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};
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static int __init omap_rng_init(void)
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{
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if (!cpu_is_omap16xx() && !cpu_is_omap24xx())
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return -ENODEV;
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2006-08-06 03:14:04 +08:00
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return platform_driver_register(&omap_rng_driver);
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2006-06-26 15:25:03 +08:00
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}
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static void __exit omap_rng_exit(void)
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{
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2006-08-06 03:14:04 +08:00
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platform_driver_unregister(&omap_rng_driver);
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2006-06-26 15:25:03 +08:00
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}
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module_init(omap_rng_init);
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module_exit(omap_rng_exit);
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MODULE_AUTHOR("Deepak Saxena (and others)");
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MODULE_LICENSE("GPL");
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