2009-09-04 01:14:03 +08:00
|
|
|
/*
|
|
|
|
* omap_hwmod implementation for OMAP2/3/4
|
|
|
|
*
|
2010-07-27 06:34:33 +08:00
|
|
|
* Copyright (C) 2009-2010 Nokia Corporation
|
2009-09-04 01:14:03 +08:00
|
|
|
*
|
2010-05-19 10:24:05 +08:00
|
|
|
* Paul Walmsley, Benoît Cousson, Kevin Hilman
|
|
|
|
*
|
|
|
|
* Created in collaboration with (alphabetical order): Thara Gopinath,
|
|
|
|
* Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
|
|
|
|
* Sawant, Santosh Shilimkar, Richard Woodruff
|
2009-09-04 01:14:03 +08:00
|
|
|
*
|
|
|
|
* This program is free software; you can redistribute it and/or modify
|
|
|
|
* it under the terms of the GNU General Public License version 2 as
|
|
|
|
* published by the Free Software Foundation.
|
|
|
|
*
|
2010-09-22 05:02:23 +08:00
|
|
|
* Introduction
|
|
|
|
* ------------
|
|
|
|
* One way to view an OMAP SoC is as a collection of largely unrelated
|
|
|
|
* IP blocks connected by interconnects. The IP blocks include
|
|
|
|
* devices such as ARM processors, audio serial interfaces, UARTs,
|
|
|
|
* etc. Some of these devices, like the DSP, are created by TI;
|
|
|
|
* others, like the SGX, largely originate from external vendors. In
|
|
|
|
* TI's documentation, on-chip devices are referred to as "OMAP
|
|
|
|
* modules." Some of these IP blocks are identical across several
|
|
|
|
* OMAP versions. Others are revised frequently.
|
2009-09-04 01:14:03 +08:00
|
|
|
*
|
2010-09-22 05:02:23 +08:00
|
|
|
* These OMAP modules are tied together by various interconnects.
|
|
|
|
* Most of the address and data flow between modules is via OCP-based
|
|
|
|
* interconnects such as the L3 and L4 buses; but there are other
|
|
|
|
* interconnects that distribute the hardware clock tree, handle idle
|
|
|
|
* and reset signaling, supply power, and connect the modules to
|
|
|
|
* various pads or balls on the OMAP package.
|
|
|
|
*
|
|
|
|
* OMAP hwmod provides a consistent way to describe the on-chip
|
|
|
|
* hardware blocks and their integration into the rest of the chip.
|
|
|
|
* This description can be automatically generated from the TI
|
|
|
|
* hardware database. OMAP hwmod provides a standard, consistent API
|
|
|
|
* to reset, enable, idle, and disable these hardware blocks. And
|
|
|
|
* hwmod provides a way for other core code, such as the Linux device
|
|
|
|
* code or the OMAP power management and address space mapping code,
|
|
|
|
* to query the hardware database.
|
|
|
|
*
|
|
|
|
* Using hwmod
|
|
|
|
* -----------
|
|
|
|
* Drivers won't call hwmod functions directly. That is done by the
|
|
|
|
* omap_device code, and in rare occasions, by custom integration code
|
|
|
|
* in arch/arm/ *omap*. The omap_device code includes functions to
|
|
|
|
* build a struct platform_device using omap_hwmod data, and that is
|
|
|
|
* currently how hwmod data is communicated to drivers and to the
|
|
|
|
* Linux driver model. Most drivers will call omap_hwmod functions only
|
|
|
|
* indirectly, via pm_runtime*() functions.
|
|
|
|
*
|
|
|
|
* From a layering perspective, here is where the OMAP hwmod code
|
|
|
|
* fits into the kernel software stack:
|
|
|
|
*
|
|
|
|
* +-------------------------------+
|
|
|
|
* | Device driver code |
|
|
|
|
* | (e.g., drivers/) |
|
|
|
|
* +-------------------------------+
|
|
|
|
* | Linux driver model |
|
|
|
|
* | (platform_device / |
|
|
|
|
* | platform_driver data/code) |
|
|
|
|
* +-------------------------------+
|
|
|
|
* | OMAP core-driver integration |
|
|
|
|
* |(arch/arm/mach-omap2/devices.c)|
|
|
|
|
* +-------------------------------+
|
|
|
|
* | omap_device code |
|
|
|
|
* | (../plat-omap/omap_device.c) |
|
|
|
|
* +-------------------------------+
|
|
|
|
* ----> | omap_hwmod code/data | <-----
|
|
|
|
* | (../mach-omap2/omap_hwmod*) |
|
|
|
|
* +-------------------------------+
|
|
|
|
* | OMAP clock/PRCM/register fns |
|
|
|
|
* | (__raw_{read,write}l, clk*) |
|
|
|
|
* +-------------------------------+
|
|
|
|
*
|
|
|
|
* Device drivers should not contain any OMAP-specific code or data in
|
|
|
|
* them. They should only contain code to operate the IP block that
|
|
|
|
* the driver is responsible for. This is because these IP blocks can
|
|
|
|
* also appear in other SoCs, either from TI (such as DaVinci) or from
|
|
|
|
* other manufacturers; and drivers should be reusable across other
|
|
|
|
* platforms.
|
|
|
|
*
|
|
|
|
* The OMAP hwmod code also will attempt to reset and idle all on-chip
|
|
|
|
* devices upon boot. The goal here is for the kernel to be
|
|
|
|
* completely self-reliant and independent from bootloaders. This is
|
|
|
|
* to ensure a repeatable configuration, both to ensure consistent
|
|
|
|
* runtime behavior, and to make it easier for others to reproduce
|
|
|
|
* bugs.
|
|
|
|
*
|
|
|
|
* OMAP module activity states
|
|
|
|
* ---------------------------
|
|
|
|
* The hwmod code considers modules to be in one of several activity
|
|
|
|
* states. IP blocks start out in an UNKNOWN state, then once they
|
|
|
|
* are registered via the hwmod code, proceed to the REGISTERED state.
|
|
|
|
* Once their clock names are resolved to clock pointers, the module
|
|
|
|
* enters the CLKS_INITED state; and finally, once the module has been
|
|
|
|
* reset and the integration registers programmed, the INITIALIZED state
|
|
|
|
* is entered. The hwmod code will then place the module into either
|
|
|
|
* the IDLE state to save power, or in the case of a critical system
|
|
|
|
* module, the ENABLED state.
|
|
|
|
*
|
|
|
|
* OMAP core integration code can then call omap_hwmod*() functions
|
|
|
|
* directly to move the module between the IDLE, ENABLED, and DISABLED
|
|
|
|
* states, as needed. This is done during both the PM idle loop, and
|
|
|
|
* in the OMAP core integration code's implementation of the PM runtime
|
|
|
|
* functions.
|
|
|
|
*
|
|
|
|
* References
|
|
|
|
* ----------
|
|
|
|
* This is a partial list.
|
2009-09-04 01:14:03 +08:00
|
|
|
* - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
|
|
|
|
* - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
|
|
|
|
* - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
|
|
|
|
* - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
|
|
|
|
* - Open Core Protocol Specification 2.2
|
|
|
|
*
|
|
|
|
* To do:
|
|
|
|
* - handle IO mapping
|
|
|
|
* - bus throughput & module latency measurement code
|
|
|
|
*
|
|
|
|
* XXX add tests at the beginning of each function to ensure the hwmod is
|
|
|
|
* in the appropriate state
|
|
|
|
* XXX error return values should be checked to ensure that they are
|
|
|
|
* appropriate
|
|
|
|
*/
|
|
|
|
#undef DEBUG
|
|
|
|
|
|
|
|
#include <linux/kernel.h>
|
|
|
|
#include <linux/errno.h>
|
|
|
|
#include <linux/io.h>
|
|
|
|
#include <linux/clk.h>
|
|
|
|
#include <linux/delay.h>
|
|
|
|
#include <linux/err.h>
|
|
|
|
#include <linux/list.h>
|
|
|
|
#include <linux/mutex.h>
|
OMAP2+: hwmod: upgrade per-hwmod mutex to a spinlock
Change the per-hwmod mutex to a spinlock. (The per-hwmod lock
serializes most post-initialization hwmod operations such as enable,
idle, and shutdown.) Spinlocks are needed, because in some cases,
hwmods must be enabled from timer interrupt disabled-context, such as
an ISR. The current use-case that is driving this is the OMAP GPIO
block ISR: it can trigger interrupts even with its clocks disabled,
but these clocks are needed for register accesses in the ISR to succeed.
This patch also effectively reverts commit
848240223c35fcc71c424ad51a8e8aef42d3879c - this patch makes
_omap_hwmod_enable() and _omap_hwmod_init() static, renames them back
to _enable() and _idle(), and changes their callers to call the
spinlocking versions. Previously, since omap_hwmod_{enable,init}()
attempted to take mutexes, these functions could not be called while
the timer interrupt was disabled; but now that the functions use
spinlocks and save and restore the IRQ state, it is appropriate to
call them directly.
Kevin Hilman <khilman@deeprootsystems.com> originally proposed this
patch - thanks Kevin.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Benoît Cousson <b-cousson@ti.com>
2010-12-15 03:42:35 +08:00
|
|
|
#include <linux/spinlock.h>
|
2009-09-04 01:14:03 +08:00
|
|
|
|
2009-12-09 07:33:16 +08:00
|
|
|
#include <plat/common.h>
|
2009-10-21 00:40:47 +08:00
|
|
|
#include <plat/cpu.h>
|
2010-12-22 12:05:15 +08:00
|
|
|
#include "clockdomain.h"
|
2010-12-22 12:05:16 +08:00
|
|
|
#include "powerdomain.h"
|
2009-10-21 00:40:47 +08:00
|
|
|
#include <plat/clock.h>
|
|
|
|
#include <plat/omap_hwmod.h>
|
OMAP: hwmod: Add hardreset management support
Most processor IPs does have a hardreset signal controlled by the PRM.
This is different of the softreset used for local IP reset from the
SYSCONFIG register.
The granularity can be much finer than orginal HWMOD, for ex, the IVA
hwmod contains 3 reset lines, the IPU 3 as well, the DSP 2...
Since this granularity is needed by the driver, we have to ensure
than one hwmod exist for each hardreset line.
- Store reset lines as hwmod resources that a driver can query by name like
an irq or sdma line.
- Add two functions for asserting / deasserting reset lines in hwmods
processor that require manual reset control.
- Add one functions to get the current reset state.
- If an hwmod contains only one line, an automatic assertion / de-assertion
is done.
-> de-assert the hardreset line only during enable from disable transition
-> assert the hardreset line only during shutdown
Note: The hwmods with hardreset line and HWMOD_INIT_NO_RESET flag must be
kept in INITIALIZED state.
They can be properly enabled only if the hardreset line is de-asserted
before.
For information here is the list of IPs with HW reset control
on an OMAP4430 device:
RM_DSP_RSTCTRL
1,1,'RST2','RW','1','DSP - MMU, cache and slave interface reset control'
0,0,'RST1','RW','1','DSP - DSP reset control'
RM_IVA_RSTCTRL
2,2,'RST3','RW','1','IVA logic and SL2 reset control'
1,1,'RST2','RW','1','IVA Sequencer2 reset control'
0,0,'RST1','RW','1','IVA sequencer1 reset control'
RM_IPU_RSTCTRL
2,2,'RST3','RW','1','IPU MMU and CACHE interface reset control.'
1,1,'RST2','RW','1','IPU Cortex M3 CPU2 reset control.'
0,0,'RST1','RW','1','IPU Cortex M3 CPU1 reset control.'
PRM_RSTCTRL
1,1,'RST_GLOBAL_COLD_SW','RW','0','Global COLD software reset control.'
0,0,'RST_GLOBAL_WARM_SW','RW','0','Global WARM software reset control.'
RM_CPU0_CPU0_RSTCTRL
RM_CPU1_CPU1_RSTCTRL
0,0,'RST','RW','0','Cortex A9 CPU0&1 warm local reset control'
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
[paul@pwsan.com: made the hardreset functions static; moved the register
twiddling into prm*.c functions in previous patches; changed the
function names to conform with hwmod practice]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Rajendra Nayak <rnayak@ti.com>
2010-09-22 00:34:11 +08:00
|
|
|
#include <plat/prcm.h>
|
2009-09-04 01:14:03 +08:00
|
|
|
|
2010-12-22 06:30:55 +08:00
|
|
|
#include "cm2xxx_3xxx.h"
|
|
|
|
#include "cm44xx.h"
|
|
|
|
#include "prm2xxx_3xxx.h"
|
2010-12-22 06:30:54 +08:00
|
|
|
#include "prm44xx.h"
|
2010-12-23 10:42:35 +08:00
|
|
|
#include "mux.h"
|
2009-09-04 01:14:03 +08:00
|
|
|
|
OMAP: hwmod: Add hardreset management support
Most processor IPs does have a hardreset signal controlled by the PRM.
This is different of the softreset used for local IP reset from the
SYSCONFIG register.
The granularity can be much finer than orginal HWMOD, for ex, the IVA
hwmod contains 3 reset lines, the IPU 3 as well, the DSP 2...
Since this granularity is needed by the driver, we have to ensure
than one hwmod exist for each hardreset line.
- Store reset lines as hwmod resources that a driver can query by name like
an irq or sdma line.
- Add two functions for asserting / deasserting reset lines in hwmods
processor that require manual reset control.
- Add one functions to get the current reset state.
- If an hwmod contains only one line, an automatic assertion / de-assertion
is done.
-> de-assert the hardreset line only during enable from disable transition
-> assert the hardreset line only during shutdown
Note: The hwmods with hardreset line and HWMOD_INIT_NO_RESET flag must be
kept in INITIALIZED state.
They can be properly enabled only if the hardreset line is de-asserted
before.
For information here is the list of IPs with HW reset control
on an OMAP4430 device:
RM_DSP_RSTCTRL
1,1,'RST2','RW','1','DSP - MMU, cache and slave interface reset control'
0,0,'RST1','RW','1','DSP - DSP reset control'
RM_IVA_RSTCTRL
2,2,'RST3','RW','1','IVA logic and SL2 reset control'
1,1,'RST2','RW','1','IVA Sequencer2 reset control'
0,0,'RST1','RW','1','IVA sequencer1 reset control'
RM_IPU_RSTCTRL
2,2,'RST3','RW','1','IPU MMU and CACHE interface reset control.'
1,1,'RST2','RW','1','IPU Cortex M3 CPU2 reset control.'
0,0,'RST1','RW','1','IPU Cortex M3 CPU1 reset control.'
PRM_RSTCTRL
1,1,'RST_GLOBAL_COLD_SW','RW','0','Global COLD software reset control.'
0,0,'RST_GLOBAL_WARM_SW','RW','0','Global WARM software reset control.'
RM_CPU0_CPU0_RSTCTRL
RM_CPU1_CPU1_RSTCTRL
0,0,'RST','RW','0','Cortex A9 CPU0&1 warm local reset control'
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
[paul@pwsan.com: made the hardreset functions static; moved the register
twiddling into prm*.c functions in previous patches; changed the
function names to conform with hwmod practice]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Rajendra Nayak <rnayak@ti.com>
2010-09-22 00:34:11 +08:00
|
|
|
/* Maximum microseconds to wait for OMAP module to softreset */
|
|
|
|
#define MAX_MODULE_SOFTRESET_WAIT 10000
|
2009-09-04 01:14:03 +08:00
|
|
|
|
|
|
|
/* Name of the OMAP hwmod for the MPU */
|
2010-05-21 02:31:10 +08:00
|
|
|
#define MPU_INITIATOR_NAME "mpu"
|
2009-09-04 01:14:03 +08:00
|
|
|
|
|
|
|
/* omap_hwmod_list contains all registered struct omap_hwmods */
|
|
|
|
static LIST_HEAD(omap_hwmod_list);
|
|
|
|
|
|
|
|
/* mpu_oh: used to add/remove MPU initiator from sleepdep list */
|
|
|
|
static struct omap_hwmod *mpu_oh;
|
|
|
|
|
|
|
|
/* inited: 0 if omap_hwmod_init() has not yet been called; 1 otherwise */
|
|
|
|
static u8 inited;
|
|
|
|
|
|
|
|
|
|
|
|
/* Private functions */
|
|
|
|
|
|
|
|
/**
|
|
|
|
* _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
|
|
|
|
* @oh: struct omap_hwmod *
|
|
|
|
*
|
|
|
|
* Load the current value of the hwmod OCP_SYSCONFIG register into the
|
|
|
|
* struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
|
|
|
|
* OCP_SYSCONFIG register or 0 upon success.
|
|
|
|
*/
|
|
|
|
static int _update_sysc_cache(struct omap_hwmod *oh)
|
|
|
|
{
|
2010-02-23 13:09:34 +08:00
|
|
|
if (!oh->class->sysc) {
|
|
|
|
WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
|
2009-09-04 01:14:03 +08:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* XXX ensure module interface clock is up */
|
|
|
|
|
2010-10-09 01:23:22 +08:00
|
|
|
oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
|
2009-09-04 01:14:03 +08:00
|
|
|
|
2010-02-23 13:09:34 +08:00
|
|
|
if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
|
2010-01-20 08:30:51 +08:00
|
|
|
oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
|
2009-09-04 01:14:03 +08:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
|
|
|
|
* @v: OCP_SYSCONFIG value to write
|
|
|
|
* @oh: struct omap_hwmod *
|
|
|
|
*
|
2010-02-23 13:09:34 +08:00
|
|
|
* Write @v into the module class' OCP_SYSCONFIG register, if it has
|
|
|
|
* one. No return value.
|
2009-09-04 01:14:03 +08:00
|
|
|
*/
|
|
|
|
static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
|
|
|
|
{
|
2010-02-23 13:09:34 +08:00
|
|
|
if (!oh->class->sysc) {
|
|
|
|
WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
|
2009-09-04 01:14:03 +08:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* XXX ensure module interface clock is up */
|
|
|
|
|
2010-12-15 03:42:36 +08:00
|
|
|
/* Module might have lost context, always update cache and register */
|
|
|
|
oh->_sysc_cache = v;
|
|
|
|
omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
|
2009-09-04 01:14:03 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
|
|
|
|
* @oh: struct omap_hwmod *
|
|
|
|
* @standbymode: MIDLEMODE field bits
|
|
|
|
* @v: pointer to register contents to modify
|
|
|
|
*
|
|
|
|
* Update the master standby mode bits in @v to be @standbymode for
|
|
|
|
* the @oh hwmod. Does not write to the hardware. Returns -EINVAL
|
|
|
|
* upon error or 0 upon success.
|
|
|
|
*/
|
|
|
|
static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
|
|
|
|
u32 *v)
|
|
|
|
{
|
2010-02-25 03:05:58 +08:00
|
|
|
u32 mstandby_mask;
|
|
|
|
u8 mstandby_shift;
|
|
|
|
|
2010-02-23 13:09:34 +08:00
|
|
|
if (!oh->class->sysc ||
|
|
|
|
!(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
|
2009-09-04 01:14:03 +08:00
|
|
|
return -EINVAL;
|
|
|
|
|
2010-02-23 13:09:34 +08:00
|
|
|
if (!oh->class->sysc->sysc_fields) {
|
|
|
|
WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
|
2010-02-25 03:05:58 +08:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2010-02-23 13:09:34 +08:00
|
|
|
mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
|
2010-02-25 03:05:58 +08:00
|
|
|
mstandby_mask = (0x3 << mstandby_shift);
|
|
|
|
|
|
|
|
*v &= ~mstandby_mask;
|
|
|
|
*v |= __ffs(standbymode) << mstandby_shift;
|
2009-09-04 01:14:03 +08:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
|
|
|
|
* @oh: struct omap_hwmod *
|
|
|
|
* @idlemode: SIDLEMODE field bits
|
|
|
|
* @v: pointer to register contents to modify
|
|
|
|
*
|
|
|
|
* Update the slave idle mode bits in @v to be @idlemode for the @oh
|
|
|
|
* hwmod. Does not write to the hardware. Returns -EINVAL upon error
|
|
|
|
* or 0 upon success.
|
|
|
|
*/
|
|
|
|
static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
|
|
|
|
{
|
2010-02-25 03:05:58 +08:00
|
|
|
u32 sidle_mask;
|
|
|
|
u8 sidle_shift;
|
|
|
|
|
2010-02-23 13:09:34 +08:00
|
|
|
if (!oh->class->sysc ||
|
|
|
|
!(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
|
2009-09-04 01:14:03 +08:00
|
|
|
return -EINVAL;
|
|
|
|
|
2010-02-23 13:09:34 +08:00
|
|
|
if (!oh->class->sysc->sysc_fields) {
|
|
|
|
WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
|
2010-02-25 03:05:58 +08:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2010-02-23 13:09:34 +08:00
|
|
|
sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
|
2010-02-25 03:05:58 +08:00
|
|
|
sidle_mask = (0x3 << sidle_shift);
|
|
|
|
|
|
|
|
*v &= ~sidle_mask;
|
|
|
|
*v |= __ffs(idlemode) << sidle_shift;
|
2009-09-04 01:14:03 +08:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
|
|
|
|
* @oh: struct omap_hwmod *
|
|
|
|
* @clockact: CLOCKACTIVITY field bits
|
|
|
|
* @v: pointer to register contents to modify
|
|
|
|
*
|
|
|
|
* Update the clockactivity mode bits in @v to be @clockact for the
|
|
|
|
* @oh hwmod. Used for additional powersaving on some modules. Does
|
|
|
|
* not write to the hardware. Returns -EINVAL upon error or 0 upon
|
|
|
|
* success.
|
|
|
|
*/
|
|
|
|
static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
|
|
|
|
{
|
2010-02-25 03:05:58 +08:00
|
|
|
u32 clkact_mask;
|
|
|
|
u8 clkact_shift;
|
|
|
|
|
2010-02-23 13:09:34 +08:00
|
|
|
if (!oh->class->sysc ||
|
|
|
|
!(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
|
2009-09-04 01:14:03 +08:00
|
|
|
return -EINVAL;
|
|
|
|
|
2010-02-23 13:09:34 +08:00
|
|
|
if (!oh->class->sysc->sysc_fields) {
|
|
|
|
WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
|
2010-02-25 03:05:58 +08:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2010-02-23 13:09:34 +08:00
|
|
|
clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
|
2010-02-25 03:05:58 +08:00
|
|
|
clkact_mask = (0x3 << clkact_shift);
|
|
|
|
|
|
|
|
*v &= ~clkact_mask;
|
|
|
|
*v |= clockact << clkact_shift;
|
2009-09-04 01:14:03 +08:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
|
|
|
|
* @oh: struct omap_hwmod *
|
|
|
|
* @v: pointer to register contents to modify
|
|
|
|
*
|
|
|
|
* Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
|
|
|
|
* error or 0 upon success.
|
|
|
|
*/
|
|
|
|
static int _set_softreset(struct omap_hwmod *oh, u32 *v)
|
|
|
|
{
|
2010-02-25 03:05:58 +08:00
|
|
|
u32 softrst_mask;
|
|
|
|
|
2010-02-23 13:09:34 +08:00
|
|
|
if (!oh->class->sysc ||
|
|
|
|
!(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
|
2009-09-04 01:14:03 +08:00
|
|
|
return -EINVAL;
|
|
|
|
|
2010-02-23 13:09:34 +08:00
|
|
|
if (!oh->class->sysc->sysc_fields) {
|
|
|
|
WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
|
2010-02-25 03:05:58 +08:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2010-02-23 13:09:34 +08:00
|
|
|
softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
|
2010-02-25 03:05:58 +08:00
|
|
|
|
|
|
|
*v |= softrst_mask;
|
2009-09-04 01:14:03 +08:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2009-12-09 07:34:15 +08:00
|
|
|
/**
|
|
|
|
* _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
|
|
|
|
* @oh: struct omap_hwmod *
|
|
|
|
* @autoidle: desired AUTOIDLE bitfield value (0 or 1)
|
|
|
|
* @v: pointer to register contents to modify
|
|
|
|
*
|
|
|
|
* Update the module autoidle bit in @v to be @autoidle for the @oh
|
|
|
|
* hwmod. The autoidle bit controls whether the module can gate
|
|
|
|
* internal clocks automatically when it isn't doing anything; the
|
|
|
|
* exact function of this bit varies on a per-module basis. This
|
|
|
|
* function does not write to the hardware. Returns -EINVAL upon
|
|
|
|
* error or 0 upon success.
|
|
|
|
*/
|
|
|
|
static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
|
|
|
|
u32 *v)
|
|
|
|
{
|
2010-02-25 03:05:58 +08:00
|
|
|
u32 autoidle_mask;
|
|
|
|
u8 autoidle_shift;
|
|
|
|
|
2010-02-23 13:09:34 +08:00
|
|
|
if (!oh->class->sysc ||
|
|
|
|
!(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
|
2009-12-09 07:34:15 +08:00
|
|
|
return -EINVAL;
|
|
|
|
|
2010-02-23 13:09:34 +08:00
|
|
|
if (!oh->class->sysc->sysc_fields) {
|
|
|
|
WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
|
2010-02-25 03:05:58 +08:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2010-02-23 13:09:34 +08:00
|
|
|
autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
|
2011-03-04 05:22:46 +08:00
|
|
|
autoidle_mask = (0x1 << autoidle_shift);
|
2010-02-25 03:05:58 +08:00
|
|
|
|
|
|
|
*v &= ~autoidle_mask;
|
|
|
|
*v |= autoidle << autoidle_shift;
|
2009-12-09 07:34:15 +08:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2009-09-04 01:14:03 +08:00
|
|
|
/**
|
|
|
|
* _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
|
|
|
|
* @oh: struct omap_hwmod *
|
|
|
|
*
|
|
|
|
* Allow the hardware module @oh to send wakeups. Returns -EINVAL
|
|
|
|
* upon error or 0 upon success.
|
|
|
|
*/
|
OMAP2+: omap_hwmod: fix wakeup enable/disable for consistency
In the omap_hwmod core, most of the SYSCONFIG register helper
functions do not directly write the register, but instead just modify
a value passed in.
This patch converts the _enable_wakeup() and _disable_wakeup() helper
functions to take a value argument and only modify it instead of
actually writing the register. This makes the wakeup helpers
consistent with the other helper functions and avoids unintentional
problems like the following.
This problem was found after discovering that GPIO wakeups were no
longer functional. The root cause was that the ENAWAKEUP bit of the
SYSCONFIG register was being unintentionaly overwritten, leaving
wakeups disabled after the following two commits were combined:
commit: 9980ce53c97392a3dbdc9d1ac3e455d79b4167ed
OMAP: hwmod: Enable module wakeup if in smartidle
commit: 78f26e872f77b6312273216de1a8f836c6f2e143
OMAP: hwmod: Set autoidle after smartidle during _sysc_enable
There resulting in code in _enable_sysc() was this:
/*
* XXX The clock framework should handle this, by
* calling into this code. But this must wait until the
* clock structures are tagged with omap_hwmod entries
*/
if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
(sf & SYSC_HAS_CLOCKACTIVITY))
_set_clockactivity(oh, oh->class->sysc->clockact, &v);
_write_sysconfig(v, oh);
so here, 'v' has wakeups disabled.
/* If slave is in SMARTIDLE, also enable wakeup */
if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
_enable_wakeup(oh);
Here wakeup is enabled in the SYSCONFIG register (but 'v' is not updated)
/*
* Set the autoidle bit only after setting the smartidle bit
* Setting this will not have any impact on the other modules.
*/
if (sf & SYSC_HAS_AUTOIDLE) {
idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
0 : 1;
_set_module_autoidle(oh, idlemode, &v);
_write_sysconfig(v, oh);
}
And here, SYSCONFIG is updated again using 'v', which does not have
wakeups enabled, resulting in ENAWAKEUP being cleared.
Special thanks to Benoit Cousson for pointing out that wakeups were
supposed to be automatically enabled when a hwmod is enabled, and thus
helping target the root cause of this problem.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-12-22 12:08:34 +08:00
|
|
|
static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
|
2009-09-04 01:14:03 +08:00
|
|
|
{
|
OMAP2+: omap_hwmod: fix wakeup enable/disable for consistency
In the omap_hwmod core, most of the SYSCONFIG register helper
functions do not directly write the register, but instead just modify
a value passed in.
This patch converts the _enable_wakeup() and _disable_wakeup() helper
functions to take a value argument and only modify it instead of
actually writing the register. This makes the wakeup helpers
consistent with the other helper functions and avoids unintentional
problems like the following.
This problem was found after discovering that GPIO wakeups were no
longer functional. The root cause was that the ENAWAKEUP bit of the
SYSCONFIG register was being unintentionaly overwritten, leaving
wakeups disabled after the following two commits were combined:
commit: 9980ce53c97392a3dbdc9d1ac3e455d79b4167ed
OMAP: hwmod: Enable module wakeup if in smartidle
commit: 78f26e872f77b6312273216de1a8f836c6f2e143
OMAP: hwmod: Set autoidle after smartidle during _sysc_enable
There resulting in code in _enable_sysc() was this:
/*
* XXX The clock framework should handle this, by
* calling into this code. But this must wait until the
* clock structures are tagged with omap_hwmod entries
*/
if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
(sf & SYSC_HAS_CLOCKACTIVITY))
_set_clockactivity(oh, oh->class->sysc->clockact, &v);
_write_sysconfig(v, oh);
so here, 'v' has wakeups disabled.
/* If slave is in SMARTIDLE, also enable wakeup */
if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
_enable_wakeup(oh);
Here wakeup is enabled in the SYSCONFIG register (but 'v' is not updated)
/*
* Set the autoidle bit only after setting the smartidle bit
* Setting this will not have any impact on the other modules.
*/
if (sf & SYSC_HAS_AUTOIDLE) {
idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
0 : 1;
_set_module_autoidle(oh, idlemode, &v);
_write_sysconfig(v, oh);
}
And here, SYSCONFIG is updated again using 'v', which does not have
wakeups enabled, resulting in ENAWAKEUP being cleared.
Special thanks to Benoit Cousson for pointing out that wakeups were
supposed to be automatically enabled when a hwmod is enabled, and thus
helping target the root cause of this problem.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-12-22 12:08:34 +08:00
|
|
|
u32 wakeup_mask;
|
2009-09-04 01:14:03 +08:00
|
|
|
|
2010-02-23 13:09:34 +08:00
|
|
|
if (!oh->class->sysc ||
|
2010-12-22 12:31:28 +08:00
|
|
|
!((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
|
|
|
|
(oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)))
|
2009-09-04 01:14:03 +08:00
|
|
|
return -EINVAL;
|
|
|
|
|
2010-02-23 13:09:34 +08:00
|
|
|
if (!oh->class->sysc->sysc_fields) {
|
|
|
|
WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
|
2010-02-25 03:05:58 +08:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2010-02-23 13:09:34 +08:00
|
|
|
wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
|
2010-02-25 03:05:58 +08:00
|
|
|
|
OMAP2+: omap_hwmod: fix wakeup enable/disable for consistency
In the omap_hwmod core, most of the SYSCONFIG register helper
functions do not directly write the register, but instead just modify
a value passed in.
This patch converts the _enable_wakeup() and _disable_wakeup() helper
functions to take a value argument and only modify it instead of
actually writing the register. This makes the wakeup helpers
consistent with the other helper functions and avoids unintentional
problems like the following.
This problem was found after discovering that GPIO wakeups were no
longer functional. The root cause was that the ENAWAKEUP bit of the
SYSCONFIG register was being unintentionaly overwritten, leaving
wakeups disabled after the following two commits were combined:
commit: 9980ce53c97392a3dbdc9d1ac3e455d79b4167ed
OMAP: hwmod: Enable module wakeup if in smartidle
commit: 78f26e872f77b6312273216de1a8f836c6f2e143
OMAP: hwmod: Set autoidle after smartidle during _sysc_enable
There resulting in code in _enable_sysc() was this:
/*
* XXX The clock framework should handle this, by
* calling into this code. But this must wait until the
* clock structures are tagged with omap_hwmod entries
*/
if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
(sf & SYSC_HAS_CLOCKACTIVITY))
_set_clockactivity(oh, oh->class->sysc->clockact, &v);
_write_sysconfig(v, oh);
so here, 'v' has wakeups disabled.
/* If slave is in SMARTIDLE, also enable wakeup */
if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
_enable_wakeup(oh);
Here wakeup is enabled in the SYSCONFIG register (but 'v' is not updated)
/*
* Set the autoidle bit only after setting the smartidle bit
* Setting this will not have any impact on the other modules.
*/
if (sf & SYSC_HAS_AUTOIDLE) {
idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
0 : 1;
_set_module_autoidle(oh, idlemode, &v);
_write_sysconfig(v, oh);
}
And here, SYSCONFIG is updated again using 'v', which does not have
wakeups enabled, resulting in ENAWAKEUP being cleared.
Special thanks to Benoit Cousson for pointing out that wakeups were
supposed to be automatically enabled when a hwmod is enabled, and thus
helping target the root cause of this problem.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-12-22 12:08:34 +08:00
|
|
|
*v |= wakeup_mask;
|
2009-09-04 01:14:03 +08:00
|
|
|
|
2010-12-22 12:31:28 +08:00
|
|
|
if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
|
|
|
|
_set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
|
|
|
|
|
2009-09-04 01:14:03 +08:00
|
|
|
/* XXX test pwrdm_get_wken for this hwmod's subsystem */
|
|
|
|
|
|
|
|
oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
|
|
|
|
* @oh: struct omap_hwmod *
|
|
|
|
*
|
|
|
|
* Prevent the hardware module @oh to send wakeups. Returns -EINVAL
|
|
|
|
* upon error or 0 upon success.
|
|
|
|
*/
|
OMAP2+: omap_hwmod: fix wakeup enable/disable for consistency
In the omap_hwmod core, most of the SYSCONFIG register helper
functions do not directly write the register, but instead just modify
a value passed in.
This patch converts the _enable_wakeup() and _disable_wakeup() helper
functions to take a value argument and only modify it instead of
actually writing the register. This makes the wakeup helpers
consistent with the other helper functions and avoids unintentional
problems like the following.
This problem was found after discovering that GPIO wakeups were no
longer functional. The root cause was that the ENAWAKEUP bit of the
SYSCONFIG register was being unintentionaly overwritten, leaving
wakeups disabled after the following two commits were combined:
commit: 9980ce53c97392a3dbdc9d1ac3e455d79b4167ed
OMAP: hwmod: Enable module wakeup if in smartidle
commit: 78f26e872f77b6312273216de1a8f836c6f2e143
OMAP: hwmod: Set autoidle after smartidle during _sysc_enable
There resulting in code in _enable_sysc() was this:
/*
* XXX The clock framework should handle this, by
* calling into this code. But this must wait until the
* clock structures are tagged with omap_hwmod entries
*/
if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
(sf & SYSC_HAS_CLOCKACTIVITY))
_set_clockactivity(oh, oh->class->sysc->clockact, &v);
_write_sysconfig(v, oh);
so here, 'v' has wakeups disabled.
/* If slave is in SMARTIDLE, also enable wakeup */
if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
_enable_wakeup(oh);
Here wakeup is enabled in the SYSCONFIG register (but 'v' is not updated)
/*
* Set the autoidle bit only after setting the smartidle bit
* Setting this will not have any impact on the other modules.
*/
if (sf & SYSC_HAS_AUTOIDLE) {
idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
0 : 1;
_set_module_autoidle(oh, idlemode, &v);
_write_sysconfig(v, oh);
}
And here, SYSCONFIG is updated again using 'v', which does not have
wakeups enabled, resulting in ENAWAKEUP being cleared.
Special thanks to Benoit Cousson for pointing out that wakeups were
supposed to be automatically enabled when a hwmod is enabled, and thus
helping target the root cause of this problem.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-12-22 12:08:34 +08:00
|
|
|
static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
|
2009-09-04 01:14:03 +08:00
|
|
|
{
|
OMAP2+: omap_hwmod: fix wakeup enable/disable for consistency
In the omap_hwmod core, most of the SYSCONFIG register helper
functions do not directly write the register, but instead just modify
a value passed in.
This patch converts the _enable_wakeup() and _disable_wakeup() helper
functions to take a value argument and only modify it instead of
actually writing the register. This makes the wakeup helpers
consistent with the other helper functions and avoids unintentional
problems like the following.
This problem was found after discovering that GPIO wakeups were no
longer functional. The root cause was that the ENAWAKEUP bit of the
SYSCONFIG register was being unintentionaly overwritten, leaving
wakeups disabled after the following two commits were combined:
commit: 9980ce53c97392a3dbdc9d1ac3e455d79b4167ed
OMAP: hwmod: Enable module wakeup if in smartidle
commit: 78f26e872f77b6312273216de1a8f836c6f2e143
OMAP: hwmod: Set autoidle after smartidle during _sysc_enable
There resulting in code in _enable_sysc() was this:
/*
* XXX The clock framework should handle this, by
* calling into this code. But this must wait until the
* clock structures are tagged with omap_hwmod entries
*/
if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
(sf & SYSC_HAS_CLOCKACTIVITY))
_set_clockactivity(oh, oh->class->sysc->clockact, &v);
_write_sysconfig(v, oh);
so here, 'v' has wakeups disabled.
/* If slave is in SMARTIDLE, also enable wakeup */
if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
_enable_wakeup(oh);
Here wakeup is enabled in the SYSCONFIG register (but 'v' is not updated)
/*
* Set the autoidle bit only after setting the smartidle bit
* Setting this will not have any impact on the other modules.
*/
if (sf & SYSC_HAS_AUTOIDLE) {
idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
0 : 1;
_set_module_autoidle(oh, idlemode, &v);
_write_sysconfig(v, oh);
}
And here, SYSCONFIG is updated again using 'v', which does not have
wakeups enabled, resulting in ENAWAKEUP being cleared.
Special thanks to Benoit Cousson for pointing out that wakeups were
supposed to be automatically enabled when a hwmod is enabled, and thus
helping target the root cause of this problem.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-12-22 12:08:34 +08:00
|
|
|
u32 wakeup_mask;
|
2009-09-04 01:14:03 +08:00
|
|
|
|
2010-02-23 13:09:34 +08:00
|
|
|
if (!oh->class->sysc ||
|
2010-12-22 12:31:28 +08:00
|
|
|
!((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
|
|
|
|
(oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)))
|
2009-09-04 01:14:03 +08:00
|
|
|
return -EINVAL;
|
|
|
|
|
2010-02-23 13:09:34 +08:00
|
|
|
if (!oh->class->sysc->sysc_fields) {
|
|
|
|
WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
|
2010-02-25 03:05:58 +08:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2010-02-23 13:09:34 +08:00
|
|
|
wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
|
2010-02-25 03:05:58 +08:00
|
|
|
|
OMAP2+: omap_hwmod: fix wakeup enable/disable for consistency
In the omap_hwmod core, most of the SYSCONFIG register helper
functions do not directly write the register, but instead just modify
a value passed in.
This patch converts the _enable_wakeup() and _disable_wakeup() helper
functions to take a value argument and only modify it instead of
actually writing the register. This makes the wakeup helpers
consistent with the other helper functions and avoids unintentional
problems like the following.
This problem was found after discovering that GPIO wakeups were no
longer functional. The root cause was that the ENAWAKEUP bit of the
SYSCONFIG register was being unintentionaly overwritten, leaving
wakeups disabled after the following two commits were combined:
commit: 9980ce53c97392a3dbdc9d1ac3e455d79b4167ed
OMAP: hwmod: Enable module wakeup if in smartidle
commit: 78f26e872f77b6312273216de1a8f836c6f2e143
OMAP: hwmod: Set autoidle after smartidle during _sysc_enable
There resulting in code in _enable_sysc() was this:
/*
* XXX The clock framework should handle this, by
* calling into this code. But this must wait until the
* clock structures are tagged with omap_hwmod entries
*/
if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
(sf & SYSC_HAS_CLOCKACTIVITY))
_set_clockactivity(oh, oh->class->sysc->clockact, &v);
_write_sysconfig(v, oh);
so here, 'v' has wakeups disabled.
/* If slave is in SMARTIDLE, also enable wakeup */
if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
_enable_wakeup(oh);
Here wakeup is enabled in the SYSCONFIG register (but 'v' is not updated)
/*
* Set the autoidle bit only after setting the smartidle bit
* Setting this will not have any impact on the other modules.
*/
if (sf & SYSC_HAS_AUTOIDLE) {
idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
0 : 1;
_set_module_autoidle(oh, idlemode, &v);
_write_sysconfig(v, oh);
}
And here, SYSCONFIG is updated again using 'v', which does not have
wakeups enabled, resulting in ENAWAKEUP being cleared.
Special thanks to Benoit Cousson for pointing out that wakeups were
supposed to be automatically enabled when a hwmod is enabled, and thus
helping target the root cause of this problem.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-12-22 12:08:34 +08:00
|
|
|
*v &= ~wakeup_mask;
|
2009-09-04 01:14:03 +08:00
|
|
|
|
2010-12-22 12:31:28 +08:00
|
|
|
if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
|
|
|
|
_set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
|
|
|
|
|
2009-09-04 01:14:03 +08:00
|
|
|
/* XXX test pwrdm_get_wken for this hwmod's subsystem */
|
|
|
|
|
|
|
|
oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
|
|
|
|
* @oh: struct omap_hwmod *
|
|
|
|
*
|
|
|
|
* Prevent the hardware module @oh from entering idle while the
|
|
|
|
* hardare module initiator @init_oh is active. Useful when a module
|
|
|
|
* will be accessed by a particular initiator (e.g., if a module will
|
|
|
|
* be accessed by the IVA, there should be a sleepdep between the IVA
|
|
|
|
* initiator and the module). Only applies to modules in smart-idle
|
|
|
|
* mode. Returns -EINVAL upon error or passes along
|
2010-01-27 11:12:59 +08:00
|
|
|
* clkdm_add_sleepdep() value upon success.
|
2009-09-04 01:14:03 +08:00
|
|
|
*/
|
|
|
|
static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
|
|
|
|
{
|
|
|
|
if (!oh->_clk)
|
|
|
|
return -EINVAL;
|
|
|
|
|
2010-01-27 11:12:59 +08:00
|
|
|
return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
|
2009-09-04 01:14:03 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
|
|
|
|
* @oh: struct omap_hwmod *
|
|
|
|
*
|
|
|
|
* Allow the hardware module @oh to enter idle while the hardare
|
|
|
|
* module initiator @init_oh is active. Useful when a module will not
|
|
|
|
* be accessed by a particular initiator (e.g., if a module will not
|
|
|
|
* be accessed by the IVA, there should be no sleepdep between the IVA
|
|
|
|
* initiator and the module). Only applies to modules in smart-idle
|
|
|
|
* mode. Returns -EINVAL upon error or passes along
|
2010-01-27 11:12:59 +08:00
|
|
|
* clkdm_del_sleepdep() value upon success.
|
2009-09-04 01:14:03 +08:00
|
|
|
*/
|
|
|
|
static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
|
|
|
|
{
|
|
|
|
if (!oh->_clk)
|
|
|
|
return -EINVAL;
|
|
|
|
|
2010-01-27 11:12:59 +08:00
|
|
|
return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
|
2009-09-04 01:14:03 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* _init_main_clk - get a struct clk * for the the hwmod's main functional clk
|
|
|
|
* @oh: struct omap_hwmod *
|
|
|
|
*
|
|
|
|
* Called from _init_clocks(). Populates the @oh _clk (main
|
|
|
|
* functional clock pointer) if a main_clk is present. Returns 0 on
|
|
|
|
* success or -EINVAL on error.
|
|
|
|
*/
|
|
|
|
static int _init_main_clk(struct omap_hwmod *oh)
|
|
|
|
{
|
|
|
|
int ret = 0;
|
|
|
|
|
2010-02-23 13:09:31 +08:00
|
|
|
if (!oh->main_clk)
|
2009-09-04 01:14:03 +08:00
|
|
|
return 0;
|
|
|
|
|
2010-05-21 02:31:10 +08:00
|
|
|
oh->_clk = omap_clk_get_by_name(oh->main_clk);
|
2010-06-24 08:15:12 +08:00
|
|
|
if (!oh->_clk) {
|
2010-05-21 02:31:09 +08:00
|
|
|
pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
|
|
|
|
oh->name, oh->main_clk);
|
2010-05-21 02:31:10 +08:00
|
|
|
return -EINVAL;
|
2010-06-24 08:15:12 +08:00
|
|
|
}
|
2009-09-04 01:14:03 +08:00
|
|
|
|
2010-05-21 02:31:10 +08:00
|
|
|
if (!oh->_clk->clkdm)
|
|
|
|
pr_warning("omap_hwmod: %s: missing clockdomain for %s.\n",
|
|
|
|
oh->main_clk, oh->_clk->name);
|
2009-12-09 07:34:24 +08:00
|
|
|
|
2009-09-04 01:14:03 +08:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
2010-07-27 06:34:33 +08:00
|
|
|
* _init_interface_clks - get a struct clk * for the the hwmod's interface clks
|
2009-09-04 01:14:03 +08:00
|
|
|
* @oh: struct omap_hwmod *
|
|
|
|
*
|
|
|
|
* Called from _init_clocks(). Populates the @oh OCP slave interface
|
|
|
|
* clock pointers. Returns 0 on success or -EINVAL on error.
|
|
|
|
*/
|
|
|
|
static int _init_interface_clks(struct omap_hwmod *oh)
|
|
|
|
{
|
|
|
|
struct clk *c;
|
|
|
|
int i;
|
|
|
|
int ret = 0;
|
|
|
|
|
|
|
|
if (oh->slaves_cnt == 0)
|
|
|
|
return 0;
|
|
|
|
|
2010-05-21 02:31:09 +08:00
|
|
|
for (i = 0; i < oh->slaves_cnt; i++) {
|
|
|
|
struct omap_hwmod_ocp_if *os = oh->slaves[i];
|
|
|
|
|
2010-02-23 13:09:31 +08:00
|
|
|
if (!os->clk)
|
2009-09-04 01:14:03 +08:00
|
|
|
continue;
|
|
|
|
|
2010-02-23 13:09:31 +08:00
|
|
|
c = omap_clk_get_by_name(os->clk);
|
2010-06-24 08:15:12 +08:00
|
|
|
if (!c) {
|
2010-05-21 02:31:09 +08:00
|
|
|
pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
|
|
|
|
oh->name, os->clk);
|
2009-09-04 01:14:03 +08:00
|
|
|
ret = -EINVAL;
|
2010-06-24 08:15:12 +08:00
|
|
|
}
|
2009-09-04 01:14:03 +08:00
|
|
|
os->_clk = c;
|
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
|
|
|
|
* @oh: struct omap_hwmod *
|
|
|
|
*
|
|
|
|
* Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
|
|
|
|
* clock pointers. Returns 0 on success or -EINVAL on error.
|
|
|
|
*/
|
|
|
|
static int _init_opt_clks(struct omap_hwmod *oh)
|
|
|
|
{
|
|
|
|
struct omap_hwmod_opt_clk *oc;
|
|
|
|
struct clk *c;
|
|
|
|
int i;
|
|
|
|
int ret = 0;
|
|
|
|
|
|
|
|
for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
|
2010-02-23 13:09:31 +08:00
|
|
|
c = omap_clk_get_by_name(oc->clk);
|
2010-06-24 08:15:12 +08:00
|
|
|
if (!c) {
|
2010-05-21 02:31:09 +08:00
|
|
|
pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
|
|
|
|
oh->name, oc->clk);
|
2009-09-04 01:14:03 +08:00
|
|
|
ret = -EINVAL;
|
2010-06-24 08:15:12 +08:00
|
|
|
}
|
2009-09-04 01:14:03 +08:00
|
|
|
oc->_clk = c;
|
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* _enable_clocks - enable hwmod main clock and interface clocks
|
|
|
|
* @oh: struct omap_hwmod *
|
|
|
|
*
|
|
|
|
* Enables all clocks necessary for register reads and writes to succeed
|
|
|
|
* on the hwmod @oh. Returns 0.
|
|
|
|
*/
|
|
|
|
static int _enable_clocks(struct omap_hwmod *oh)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
|
|
|
pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
|
|
|
|
|
2010-05-21 02:31:09 +08:00
|
|
|
if (oh->_clk)
|
2009-09-04 01:14:03 +08:00
|
|
|
clk_enable(oh->_clk);
|
|
|
|
|
|
|
|
if (oh->slaves_cnt > 0) {
|
2010-05-21 02:31:09 +08:00
|
|
|
for (i = 0; i < oh->slaves_cnt; i++) {
|
|
|
|
struct omap_hwmod_ocp_if *os = oh->slaves[i];
|
2009-09-04 01:14:03 +08:00
|
|
|
struct clk *c = os->_clk;
|
|
|
|
|
2010-05-21 02:31:09 +08:00
|
|
|
if (c && (os->flags & OCPIF_SWSUP_IDLE))
|
2009-09-04 01:14:03 +08:00
|
|
|
clk_enable(c);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* The opt clocks are controlled by the device driver. */
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* _disable_clocks - disable hwmod main clock and interface clocks
|
|
|
|
* @oh: struct omap_hwmod *
|
|
|
|
*
|
|
|
|
* Disables the hwmod @oh main functional and interface clocks. Returns 0.
|
|
|
|
*/
|
|
|
|
static int _disable_clocks(struct omap_hwmod *oh)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
|
|
|
pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
|
|
|
|
|
2010-05-21 02:31:09 +08:00
|
|
|
if (oh->_clk)
|
2009-09-04 01:14:03 +08:00
|
|
|
clk_disable(oh->_clk);
|
|
|
|
|
|
|
|
if (oh->slaves_cnt > 0) {
|
2010-05-21 02:31:09 +08:00
|
|
|
for (i = 0; i < oh->slaves_cnt; i++) {
|
|
|
|
struct omap_hwmod_ocp_if *os = oh->slaves[i];
|
2009-09-04 01:14:03 +08:00
|
|
|
struct clk *c = os->_clk;
|
|
|
|
|
2010-05-21 02:31:09 +08:00
|
|
|
if (c && (os->flags & OCPIF_SWSUP_IDLE))
|
2009-09-04 01:14:03 +08:00
|
|
|
clk_disable(c);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* The opt clocks are controlled by the device driver. */
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2010-09-22 00:57:58 +08:00
|
|
|
static void _enable_optional_clocks(struct omap_hwmod *oh)
|
|
|
|
{
|
|
|
|
struct omap_hwmod_opt_clk *oc;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
|
|
|
|
|
|
|
|
for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
|
|
|
|
if (oc->_clk) {
|
|
|
|
pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
|
|
|
|
oc->_clk->name);
|
|
|
|
clk_enable(oc->_clk);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void _disable_optional_clocks(struct omap_hwmod *oh)
|
|
|
|
{
|
|
|
|
struct omap_hwmod_opt_clk *oc;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
|
|
|
|
|
|
|
|
for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
|
|
|
|
if (oc->_clk) {
|
|
|
|
pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
|
|
|
|
oc->_clk->name);
|
|
|
|
clk_disable(oc->_clk);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2009-09-04 01:14:03 +08:00
|
|
|
/**
|
|
|
|
* _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use
|
|
|
|
* @oh: struct omap_hwmod *
|
|
|
|
*
|
|
|
|
* Returns the array index of the OCP slave port that the MPU
|
|
|
|
* addresses the device on, or -EINVAL upon error or not found.
|
|
|
|
*/
|
2010-12-22 12:31:28 +08:00
|
|
|
static int __init _find_mpu_port_index(struct omap_hwmod *oh)
|
2009-09-04 01:14:03 +08:00
|
|
|
{
|
|
|
|
int i;
|
|
|
|
int found = 0;
|
|
|
|
|
|
|
|
if (!oh || oh->slaves_cnt == 0)
|
|
|
|
return -EINVAL;
|
|
|
|
|
2010-05-21 02:31:09 +08:00
|
|
|
for (i = 0; i < oh->slaves_cnt; i++) {
|
|
|
|
struct omap_hwmod_ocp_if *os = oh->slaves[i];
|
|
|
|
|
2009-09-04 01:14:03 +08:00
|
|
|
if (os->user & OCP_USER_MPU) {
|
|
|
|
found = 1;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (found)
|
|
|
|
pr_debug("omap_hwmod: %s: MPU OCP slave port ID %d\n",
|
|
|
|
oh->name, i);
|
|
|
|
else
|
|
|
|
pr_debug("omap_hwmod: %s: no MPU OCP slave port found\n",
|
|
|
|
oh->name);
|
|
|
|
|
|
|
|
return (found) ? i : -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* _find_mpu_rt_base - find hwmod register target base addr accessible by MPU
|
|
|
|
* @oh: struct omap_hwmod *
|
|
|
|
*
|
|
|
|
* Return the virtual address of the base of the register target of
|
|
|
|
* device @oh, or NULL on error.
|
|
|
|
*/
|
2010-12-22 12:31:28 +08:00
|
|
|
static void __iomem * __init _find_mpu_rt_base(struct omap_hwmod *oh, u8 index)
|
2009-09-04 01:14:03 +08:00
|
|
|
{
|
|
|
|
struct omap_hwmod_ocp_if *os;
|
|
|
|
struct omap_hwmod_addr_space *mem;
|
|
|
|
int i;
|
|
|
|
int found = 0;
|
2009-10-20 06:25:22 +08:00
|
|
|
void __iomem *va_start;
|
2009-09-04 01:14:03 +08:00
|
|
|
|
|
|
|
if (!oh || oh->slaves_cnt == 0)
|
|
|
|
return NULL;
|
|
|
|
|
2010-05-21 02:31:09 +08:00
|
|
|
os = oh->slaves[index];
|
2009-09-04 01:14:03 +08:00
|
|
|
|
|
|
|
for (i = 0, mem = os->addr; i < os->addr_cnt; i++, mem++) {
|
|
|
|
if (mem->flags & ADDR_TYPE_RT) {
|
|
|
|
found = 1;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2009-10-20 06:25:22 +08:00
|
|
|
if (found) {
|
|
|
|
va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
|
|
|
|
if (!va_start) {
|
|
|
|
pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
|
|
|
|
return NULL;
|
|
|
|
}
|
2009-09-04 01:14:03 +08:00
|
|
|
pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
|
2009-10-20 06:25:22 +08:00
|
|
|
oh->name, va_start);
|
|
|
|
} else {
|
2009-09-04 01:14:03 +08:00
|
|
|
pr_debug("omap_hwmod: %s: no MPU register target found\n",
|
|
|
|
oh->name);
|
2009-10-20 06:25:22 +08:00
|
|
|
}
|
2009-09-04 01:14:03 +08:00
|
|
|
|
2009-10-20 06:25:22 +08:00
|
|
|
return (found) ? va_start : NULL;
|
2009-09-04 01:14:03 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
2010-09-22 05:02:23 +08:00
|
|
|
* _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
|
2009-09-04 01:14:03 +08:00
|
|
|
* @oh: struct omap_hwmod *
|
|
|
|
*
|
|
|
|
* If module is marked as SWSUP_SIDLE, force the module out of slave
|
|
|
|
* idle; otherwise, configure it for smart-idle. If module is marked
|
|
|
|
* as SWSUP_MSUSPEND, force the module out of master standby;
|
|
|
|
* otherwise, configure it for smart-standby. No return value.
|
|
|
|
*/
|
2010-09-22 05:02:23 +08:00
|
|
|
static void _enable_sysc(struct omap_hwmod *oh)
|
2009-09-04 01:14:03 +08:00
|
|
|
{
|
2010-02-23 13:09:34 +08:00
|
|
|
u8 idlemode, sf;
|
2009-09-04 01:14:03 +08:00
|
|
|
u32 v;
|
|
|
|
|
2010-02-23 13:09:34 +08:00
|
|
|
if (!oh->class->sysc)
|
2009-09-04 01:14:03 +08:00
|
|
|
return;
|
|
|
|
|
|
|
|
v = oh->_sysc_cache;
|
2010-02-23 13:09:34 +08:00
|
|
|
sf = oh->class->sysc->sysc_flags;
|
2009-09-04 01:14:03 +08:00
|
|
|
|
2010-02-23 13:09:34 +08:00
|
|
|
if (sf & SYSC_HAS_SIDLEMODE) {
|
2009-09-04 01:14:03 +08:00
|
|
|
idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
|
|
|
|
HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
|
|
|
|
_set_slave_idlemode(oh, idlemode, &v);
|
|
|
|
}
|
|
|
|
|
2010-02-23 13:09:34 +08:00
|
|
|
if (sf & SYSC_HAS_MIDLEMODE) {
|
2009-09-04 01:14:03 +08:00
|
|
|
idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ?
|
|
|
|
HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
|
|
|
|
_set_master_standbymode(oh, idlemode, &v);
|
|
|
|
}
|
|
|
|
|
OMAP3 hwmod: drop most of the OCP_SYSCONFIG.CLOCKACTIVITY code
Earlier, the hwmod code had considered the OCP_SYSCONFIG.CLOCKACTIVITY
bits to be incremental power saving bits, controlling internal IP
block clock gates. This was a misapprehension. The CLOCKACTIVITY
bits are used to indicate, in advance, which clocks will be cut when
the module acknowledges an idle request. This enables the IP block to
take whatever action is necessary to complete any in-progress work
before asserting its IdleAck.
In the current Linux-OMAP code, this implies that the clock framework
should be changing module CLOCKACTIVITY bits as module clocks are enabled
and disabled. We don't do that yet, but in the future, we should.
This must wait until the clock tree is annotated with omap_hwmod pointers
(or vice-versa). In the meantime, drop most of the hwmod code that
controls CLOCKACTIVITY bits to avoid confusion.
This patch has benefited from many illuminating discussions with (in
alphabetical order) Benoît Cousson <b-cousson@ti.com>, Rajendra Nayak
<rnayak@ti.com>, and Sebastien Sabatier <s-sabatier1@ti.com>.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Sebastien Sabatier <s-sabatier1@ti.com>
Cc: Benoît Cousson <b-cousson@ti.com>
2009-12-09 07:34:17 +08:00
|
|
|
/*
|
|
|
|
* XXX The clock framework should handle this, by
|
|
|
|
* calling into this code. But this must wait until the
|
|
|
|
* clock structures are tagged with omap_hwmod entries
|
|
|
|
*/
|
2010-02-23 13:09:34 +08:00
|
|
|
if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
|
|
|
|
(sf & SYSC_HAS_CLOCKACTIVITY))
|
|
|
|
_set_clockactivity(oh, oh->class->sysc->clockact, &v);
|
2009-09-04 01:14:03 +08:00
|
|
|
|
2010-09-21 22:28:30 +08:00
|
|
|
/* If slave is in SMARTIDLE, also enable wakeup */
|
|
|
|
if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
|
OMAP2+: omap_hwmod: fix wakeup enable/disable for consistency
In the omap_hwmod core, most of the SYSCONFIG register helper
functions do not directly write the register, but instead just modify
a value passed in.
This patch converts the _enable_wakeup() and _disable_wakeup() helper
functions to take a value argument and only modify it instead of
actually writing the register. This makes the wakeup helpers
consistent with the other helper functions and avoids unintentional
problems like the following.
This problem was found after discovering that GPIO wakeups were no
longer functional. The root cause was that the ENAWAKEUP bit of the
SYSCONFIG register was being unintentionaly overwritten, leaving
wakeups disabled after the following two commits were combined:
commit: 9980ce53c97392a3dbdc9d1ac3e455d79b4167ed
OMAP: hwmod: Enable module wakeup if in smartidle
commit: 78f26e872f77b6312273216de1a8f836c6f2e143
OMAP: hwmod: Set autoidle after smartidle during _sysc_enable
There resulting in code in _enable_sysc() was this:
/*
* XXX The clock framework should handle this, by
* calling into this code. But this must wait until the
* clock structures are tagged with omap_hwmod entries
*/
if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
(sf & SYSC_HAS_CLOCKACTIVITY))
_set_clockactivity(oh, oh->class->sysc->clockact, &v);
_write_sysconfig(v, oh);
so here, 'v' has wakeups disabled.
/* If slave is in SMARTIDLE, also enable wakeup */
if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
_enable_wakeup(oh);
Here wakeup is enabled in the SYSCONFIG register (but 'v' is not updated)
/*
* Set the autoidle bit only after setting the smartidle bit
* Setting this will not have any impact on the other modules.
*/
if (sf & SYSC_HAS_AUTOIDLE) {
idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
0 : 1;
_set_module_autoidle(oh, idlemode, &v);
_write_sysconfig(v, oh);
}
And here, SYSCONFIG is updated again using 'v', which does not have
wakeups enabled, resulting in ENAWAKEUP being cleared.
Special thanks to Benoit Cousson for pointing out that wakeups were
supposed to be automatically enabled when a hwmod is enabled, and thus
helping target the root cause of this problem.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-12-22 12:08:34 +08:00
|
|
|
_enable_wakeup(oh, &v);
|
|
|
|
|
|
|
|
_write_sysconfig(v, oh);
|
2010-09-25 00:23:19 +08:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Set the autoidle bit only after setting the smartidle bit
|
|
|
|
* Setting this will not have any impact on the other modules.
|
|
|
|
*/
|
|
|
|
if (sf & SYSC_HAS_AUTOIDLE) {
|
|
|
|
idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
|
|
|
|
0 : 1;
|
|
|
|
_set_module_autoidle(oh, idlemode, &v);
|
|
|
|
_write_sysconfig(v, oh);
|
|
|
|
}
|
2009-09-04 01:14:03 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
2010-09-22 05:02:23 +08:00
|
|
|
* _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
|
2009-09-04 01:14:03 +08:00
|
|
|
* @oh: struct omap_hwmod *
|
|
|
|
*
|
|
|
|
* If module is marked as SWSUP_SIDLE, force the module into slave
|
|
|
|
* idle; otherwise, configure it for smart-idle. If module is marked
|
|
|
|
* as SWSUP_MSUSPEND, force the module into master standby; otherwise,
|
|
|
|
* configure it for smart-standby. No return value.
|
|
|
|
*/
|
2010-09-22 05:02:23 +08:00
|
|
|
static void _idle_sysc(struct omap_hwmod *oh)
|
2009-09-04 01:14:03 +08:00
|
|
|
{
|
2010-02-23 13:09:34 +08:00
|
|
|
u8 idlemode, sf;
|
2009-09-04 01:14:03 +08:00
|
|
|
u32 v;
|
|
|
|
|
2010-02-23 13:09:34 +08:00
|
|
|
if (!oh->class->sysc)
|
2009-09-04 01:14:03 +08:00
|
|
|
return;
|
|
|
|
|
|
|
|
v = oh->_sysc_cache;
|
2010-02-23 13:09:34 +08:00
|
|
|
sf = oh->class->sysc->sysc_flags;
|
2009-09-04 01:14:03 +08:00
|
|
|
|
2010-02-23 13:09:34 +08:00
|
|
|
if (sf & SYSC_HAS_SIDLEMODE) {
|
2009-09-04 01:14:03 +08:00
|
|
|
idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
|
|
|
|
HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
|
|
|
|
_set_slave_idlemode(oh, idlemode, &v);
|
|
|
|
}
|
|
|
|
|
2010-02-23 13:09:34 +08:00
|
|
|
if (sf & SYSC_HAS_MIDLEMODE) {
|
2009-09-04 01:14:03 +08:00
|
|
|
idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ?
|
|
|
|
HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
|
|
|
|
_set_master_standbymode(oh, idlemode, &v);
|
|
|
|
}
|
|
|
|
|
2010-12-22 12:31:28 +08:00
|
|
|
/* If slave is in SMARTIDLE, also enable wakeup */
|
|
|
|
if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
|
|
|
|
_enable_wakeup(oh, &v);
|
|
|
|
|
2009-09-04 01:14:03 +08:00
|
|
|
_write_sysconfig(v, oh);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
2010-09-22 05:02:23 +08:00
|
|
|
* _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
|
2009-09-04 01:14:03 +08:00
|
|
|
* @oh: struct omap_hwmod *
|
|
|
|
*
|
|
|
|
* Force the module into slave idle and master suspend. No return
|
|
|
|
* value.
|
|
|
|
*/
|
2010-09-22 05:02:23 +08:00
|
|
|
static void _shutdown_sysc(struct omap_hwmod *oh)
|
2009-09-04 01:14:03 +08:00
|
|
|
{
|
|
|
|
u32 v;
|
2010-02-23 13:09:34 +08:00
|
|
|
u8 sf;
|
2009-09-04 01:14:03 +08:00
|
|
|
|
2010-02-23 13:09:34 +08:00
|
|
|
if (!oh->class->sysc)
|
2009-09-04 01:14:03 +08:00
|
|
|
return;
|
|
|
|
|
|
|
|
v = oh->_sysc_cache;
|
2010-02-23 13:09:34 +08:00
|
|
|
sf = oh->class->sysc->sysc_flags;
|
2009-09-04 01:14:03 +08:00
|
|
|
|
2010-02-23 13:09:34 +08:00
|
|
|
if (sf & SYSC_HAS_SIDLEMODE)
|
2009-09-04 01:14:03 +08:00
|
|
|
_set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
|
|
|
|
|
2010-02-23 13:09:34 +08:00
|
|
|
if (sf & SYSC_HAS_MIDLEMODE)
|
2009-09-04 01:14:03 +08:00
|
|
|
_set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
|
|
|
|
|
2010-02-23 13:09:34 +08:00
|
|
|
if (sf & SYSC_HAS_AUTOIDLE)
|
2009-12-09 07:34:15 +08:00
|
|
|
_set_module_autoidle(oh, 1, &v);
|
2009-09-04 01:14:03 +08:00
|
|
|
|
|
|
|
_write_sysconfig(v, oh);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* _lookup - find an omap_hwmod by name
|
|
|
|
* @name: find an omap_hwmod by name
|
|
|
|
*
|
|
|
|
* Return a pointer to an omap_hwmod by name, or NULL if not found.
|
|
|
|
*/
|
|
|
|
static struct omap_hwmod *_lookup(const char *name)
|
|
|
|
{
|
|
|
|
struct omap_hwmod *oh, *temp_oh;
|
|
|
|
|
|
|
|
oh = NULL;
|
|
|
|
|
|
|
|
list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
|
|
|
|
if (!strcmp(name, temp_oh->name)) {
|
|
|
|
oh = temp_oh;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return oh;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* _init_clocks - clk_get() all clocks associated with this hwmod
|
|
|
|
* @oh: struct omap_hwmod *
|
2010-07-27 06:34:30 +08:00
|
|
|
* @data: not used; pass NULL
|
2009-09-04 01:14:03 +08:00
|
|
|
*
|
|
|
|
* Called by omap_hwmod_late_init() (after omap2_clk_init()).
|
2010-09-22 00:34:09 +08:00
|
|
|
* Resolves all clock names embedded in the hwmod. Returns -EINVAL if
|
|
|
|
* the omap_hwmod has not yet been registered or if the clocks have
|
|
|
|
* already been initialized, 0 on success, or a non-zero error on
|
|
|
|
* failure.
|
2009-09-04 01:14:03 +08:00
|
|
|
*/
|
2010-07-27 06:34:30 +08:00
|
|
|
static int _init_clocks(struct omap_hwmod *oh, void *data)
|
2009-09-04 01:14:03 +08:00
|
|
|
{
|
|
|
|
int ret = 0;
|
|
|
|
|
|
|
|
if (!oh || (oh->_state != _HWMOD_STATE_REGISTERED))
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
|
|
|
|
|
|
|
|
ret |= _init_main_clk(oh);
|
|
|
|
ret |= _init_interface_clks(oh);
|
|
|
|
ret |= _init_opt_clks(oh);
|
|
|
|
|
2010-05-21 02:31:10 +08:00
|
|
|
if (!ret)
|
|
|
|
oh->_state = _HWMOD_STATE_CLKS_INITED;
|
2009-09-04 01:14:03 +08:00
|
|
|
|
2011-02-16 20:11:24 +08:00
|
|
|
return ret;
|
2009-09-04 01:14:03 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* _wait_target_ready - wait for a module to leave slave idle
|
|
|
|
* @oh: struct omap_hwmod *
|
|
|
|
*
|
|
|
|
* Wait for a module @oh to leave slave idle. Returns 0 if the module
|
|
|
|
* does not have an IDLEST bit or if the module successfully leaves
|
|
|
|
* slave idle; otherwise, pass along the return value of the
|
|
|
|
* appropriate *_cm_wait_module_ready() function.
|
|
|
|
*/
|
|
|
|
static int _wait_target_ready(struct omap_hwmod *oh)
|
|
|
|
{
|
|
|
|
struct omap_hwmod_ocp_if *os;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
if (!oh)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
|
|
|
|
return 0;
|
|
|
|
|
2010-05-21 02:31:09 +08:00
|
|
|
os = oh->slaves[oh->_mpu_port_index];
|
2009-09-04 01:14:03 +08:00
|
|
|
|
2010-05-21 02:31:09 +08:00
|
|
|
if (oh->flags & HWMOD_NO_IDLEST)
|
2009-09-04 01:14:03 +08:00
|
|
|
return 0;
|
|
|
|
|
|
|
|
/* XXX check module SIDLEMODE */
|
|
|
|
|
|
|
|
/* XXX check clock enable states */
|
|
|
|
|
|
|
|
if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
|
|
|
|
ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
|
|
|
|
oh->prcm.omap2.idlest_reg_id,
|
|
|
|
oh->prcm.omap2.idlest_idle_bit);
|
|
|
|
} else if (cpu_is_omap44xx()) {
|
2010-05-21 02:31:08 +08:00
|
|
|
ret = omap4_cm_wait_module_ready(oh->prcm.omap4.clkctrl_reg);
|
2009-09-04 01:14:03 +08:00
|
|
|
} else {
|
|
|
|
BUG();
|
|
|
|
};
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
OMAP: hwmod: Add hardreset management support
Most processor IPs does have a hardreset signal controlled by the PRM.
This is different of the softreset used for local IP reset from the
SYSCONFIG register.
The granularity can be much finer than orginal HWMOD, for ex, the IVA
hwmod contains 3 reset lines, the IPU 3 as well, the DSP 2...
Since this granularity is needed by the driver, we have to ensure
than one hwmod exist for each hardreset line.
- Store reset lines as hwmod resources that a driver can query by name like
an irq or sdma line.
- Add two functions for asserting / deasserting reset lines in hwmods
processor that require manual reset control.
- Add one functions to get the current reset state.
- If an hwmod contains only one line, an automatic assertion / de-assertion
is done.
-> de-assert the hardreset line only during enable from disable transition
-> assert the hardreset line only during shutdown
Note: The hwmods with hardreset line and HWMOD_INIT_NO_RESET flag must be
kept in INITIALIZED state.
They can be properly enabled only if the hardreset line is de-asserted
before.
For information here is the list of IPs with HW reset control
on an OMAP4430 device:
RM_DSP_RSTCTRL
1,1,'RST2','RW','1','DSP - MMU, cache and slave interface reset control'
0,0,'RST1','RW','1','DSP - DSP reset control'
RM_IVA_RSTCTRL
2,2,'RST3','RW','1','IVA logic and SL2 reset control'
1,1,'RST2','RW','1','IVA Sequencer2 reset control'
0,0,'RST1','RW','1','IVA sequencer1 reset control'
RM_IPU_RSTCTRL
2,2,'RST3','RW','1','IPU MMU and CACHE interface reset control.'
1,1,'RST2','RW','1','IPU Cortex M3 CPU2 reset control.'
0,0,'RST1','RW','1','IPU Cortex M3 CPU1 reset control.'
PRM_RSTCTRL
1,1,'RST_GLOBAL_COLD_SW','RW','0','Global COLD software reset control.'
0,0,'RST_GLOBAL_WARM_SW','RW','0','Global WARM software reset control.'
RM_CPU0_CPU0_RSTCTRL
RM_CPU1_CPU1_RSTCTRL
0,0,'RST','RW','0','Cortex A9 CPU0&1 warm local reset control'
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
[paul@pwsan.com: made the hardreset functions static; moved the register
twiddling into prm*.c functions in previous patches; changed the
function names to conform with hwmod practice]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Rajendra Nayak <rnayak@ti.com>
2010-09-22 00:34:11 +08:00
|
|
|
/**
|
|
|
|
* _lookup_hardreset - return the register bit shift for this hwmod/reset line
|
|
|
|
* @oh: struct omap_hwmod *
|
|
|
|
* @name: name of the reset line in the context of this hwmod
|
|
|
|
*
|
|
|
|
* Return the bit position of the reset line that match the
|
|
|
|
* input name. Return -ENOENT if not found.
|
|
|
|
*/
|
|
|
|
static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = 0; i < oh->rst_lines_cnt; i++) {
|
|
|
|
const char *rst_line = oh->rst_lines[i].name;
|
|
|
|
if (!strcmp(rst_line, name)) {
|
|
|
|
u8 shift = oh->rst_lines[i].rst_shift;
|
|
|
|
pr_debug("omap_hwmod: %s: _lookup_hardreset: %s: %d\n",
|
|
|
|
oh->name, rst_line, shift);
|
|
|
|
|
|
|
|
return shift;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return -ENOENT;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* _assert_hardreset - assert the HW reset line of submodules
|
|
|
|
* contained in the hwmod module.
|
|
|
|
* @oh: struct omap_hwmod *
|
|
|
|
* @name: name of the reset line to lookup and assert
|
|
|
|
*
|
|
|
|
* Some IP like dsp, ipu or iva contain processor that require
|
|
|
|
* an HW reset line to be assert / deassert in order to enable fully
|
|
|
|
* the IP.
|
|
|
|
*/
|
|
|
|
static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
|
|
|
|
{
|
|
|
|
u8 shift;
|
|
|
|
|
|
|
|
if (!oh)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
shift = _lookup_hardreset(oh, name);
|
|
|
|
if (IS_ERR_VALUE(shift))
|
|
|
|
return shift;
|
|
|
|
|
|
|
|
if (cpu_is_omap24xx() || cpu_is_omap34xx())
|
|
|
|
return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
|
|
|
|
shift);
|
|
|
|
else if (cpu_is_omap44xx())
|
|
|
|
return omap4_prm_assert_hardreset(oh->prcm.omap4.rstctrl_reg,
|
|
|
|
shift);
|
|
|
|
else
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* _deassert_hardreset - deassert the HW reset line of submodules contained
|
|
|
|
* in the hwmod module.
|
|
|
|
* @oh: struct omap_hwmod *
|
|
|
|
* @name: name of the reset line to look up and deassert
|
|
|
|
*
|
|
|
|
* Some IP like dsp, ipu or iva contain processor that require
|
|
|
|
* an HW reset line to be assert / deassert in order to enable fully
|
|
|
|
* the IP.
|
|
|
|
*/
|
|
|
|
static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
|
|
|
|
{
|
|
|
|
u8 shift;
|
|
|
|
int r;
|
|
|
|
|
|
|
|
if (!oh)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
shift = _lookup_hardreset(oh, name);
|
|
|
|
if (IS_ERR_VALUE(shift))
|
|
|
|
return shift;
|
|
|
|
|
|
|
|
if (cpu_is_omap24xx() || cpu_is_omap34xx())
|
|
|
|
r = omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
|
|
|
|
shift);
|
|
|
|
else if (cpu_is_omap44xx())
|
|
|
|
r = omap4_prm_deassert_hardreset(oh->prcm.omap4.rstctrl_reg,
|
|
|
|
shift);
|
|
|
|
else
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
if (r == -EBUSY)
|
|
|
|
pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
|
|
|
|
|
|
|
|
return r;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* _read_hardreset - read the HW reset line state of submodules
|
|
|
|
* contained in the hwmod module
|
|
|
|
* @oh: struct omap_hwmod *
|
|
|
|
* @name: name of the reset line to look up and read
|
|
|
|
*
|
|
|
|
* Return the state of the reset line.
|
|
|
|
*/
|
|
|
|
static int _read_hardreset(struct omap_hwmod *oh, const char *name)
|
|
|
|
{
|
|
|
|
u8 shift;
|
|
|
|
|
|
|
|
if (!oh)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
shift = _lookup_hardreset(oh, name);
|
|
|
|
if (IS_ERR_VALUE(shift))
|
|
|
|
return shift;
|
|
|
|
|
|
|
|
if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
|
|
|
|
return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
|
|
|
|
shift);
|
|
|
|
} else if (cpu_is_omap44xx()) {
|
|
|
|
return omap4_prm_is_hardreset_asserted(oh->prcm.omap4.rstctrl_reg,
|
|
|
|
shift);
|
|
|
|
} else {
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2009-09-04 01:14:03 +08:00
|
|
|
/**
|
OMAP2+: hwmod: add support for per-class custom device reset functions
The standard omap_hwmod.c _reset() code relies on an IP block's
OCP_SYSCONFIG.SOFTRESET register bit to reset the IP block. This
works for most IP blocks on the chip, but unfortunately not all. For
example, initiator-only IP blocks often don't have any MPU-accessible
OCP-header registers, and therefore the MPU can't write to any
OCP_SYSCONFIG registers in that block. Other IP blocks, such as the
IVA and I2C, require a specialized reset sequence.
Since we need to be able to reset these IP blocks as well, allow
custom IP block reset functions to be passed into the hwmod code via a
per-hwmod-class reset function pointer, struct omap_hwmod_class.reset.
If .reset is non-null, then the hwmod _reset() code will call the custom
function instead of the standard OCP SOFTRESET-based code.
As part of this change, rename most of the existing _reset() function
code to _ocp_softreset(), to indicate more clearly that it does not work
for all cases.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Paul Hunt <hunt@ti.com>
Cc: Stanley Liu <stanley_liu@ti.com>
2010-12-15 03:42:35 +08:00
|
|
|
* _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
|
2009-09-04 01:14:03 +08:00
|
|
|
* @oh: struct omap_hwmod *
|
|
|
|
*
|
|
|
|
* Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
|
2010-09-22 00:34:09 +08:00
|
|
|
* enabled for this to work. Returns -EINVAL if the hwmod cannot be
|
|
|
|
* reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
|
|
|
|
* the module did not reset in time, or 0 upon success.
|
2010-09-22 00:57:59 +08:00
|
|
|
*
|
|
|
|
* In OMAP3 a specific SYSSTATUS register is used to get the reset status.
|
OMAP2+: hwmod: add support for per-class custom device reset functions
The standard omap_hwmod.c _reset() code relies on an IP block's
OCP_SYSCONFIG.SOFTRESET register bit to reset the IP block. This
works for most IP blocks on the chip, but unfortunately not all. For
example, initiator-only IP blocks often don't have any MPU-accessible
OCP-header registers, and therefore the MPU can't write to any
OCP_SYSCONFIG registers in that block. Other IP blocks, such as the
IVA and I2C, require a specialized reset sequence.
Since we need to be able to reset these IP blocks as well, allow
custom IP block reset functions to be passed into the hwmod code via a
per-hwmod-class reset function pointer, struct omap_hwmod_class.reset.
If .reset is non-null, then the hwmod _reset() code will call the custom
function instead of the standard OCP SOFTRESET-based code.
As part of this change, rename most of the existing _reset() function
code to _ocp_softreset(), to indicate more clearly that it does not work
for all cases.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Paul Hunt <hunt@ti.com>
Cc: Stanley Liu <stanley_liu@ti.com>
2010-12-15 03:42:35 +08:00
|
|
|
* Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
|
2010-09-22 00:57:59 +08:00
|
|
|
* use the SYSCONFIG softreset bit to provide the status.
|
|
|
|
*
|
OMAP2+: hwmod: add support for per-class custom device reset functions
The standard omap_hwmod.c _reset() code relies on an IP block's
OCP_SYSCONFIG.SOFTRESET register bit to reset the IP block. This
works for most IP blocks on the chip, but unfortunately not all. For
example, initiator-only IP blocks often don't have any MPU-accessible
OCP-header registers, and therefore the MPU can't write to any
OCP_SYSCONFIG registers in that block. Other IP blocks, such as the
IVA and I2C, require a specialized reset sequence.
Since we need to be able to reset these IP blocks as well, allow
custom IP block reset functions to be passed into the hwmod code via a
per-hwmod-class reset function pointer, struct omap_hwmod_class.reset.
If .reset is non-null, then the hwmod _reset() code will call the custom
function instead of the standard OCP SOFTRESET-based code.
As part of this change, rename most of the existing _reset() function
code to _ocp_softreset(), to indicate more clearly that it does not work
for all cases.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Paul Hunt <hunt@ti.com>
Cc: Stanley Liu <stanley_liu@ti.com>
2010-12-15 03:42:35 +08:00
|
|
|
* Note that some IP like McBSP do have reset control but don't have
|
|
|
|
* reset status.
|
2009-09-04 01:14:03 +08:00
|
|
|
*/
|
OMAP2+: hwmod: add support for per-class custom device reset functions
The standard omap_hwmod.c _reset() code relies on an IP block's
OCP_SYSCONFIG.SOFTRESET register bit to reset the IP block. This
works for most IP blocks on the chip, but unfortunately not all. For
example, initiator-only IP blocks often don't have any MPU-accessible
OCP-header registers, and therefore the MPU can't write to any
OCP_SYSCONFIG registers in that block. Other IP blocks, such as the
IVA and I2C, require a specialized reset sequence.
Since we need to be able to reset these IP blocks as well, allow
custom IP block reset functions to be passed into the hwmod code via a
per-hwmod-class reset function pointer, struct omap_hwmod_class.reset.
If .reset is non-null, then the hwmod _reset() code will call the custom
function instead of the standard OCP SOFTRESET-based code.
As part of this change, rename most of the existing _reset() function
code to _ocp_softreset(), to indicate more clearly that it does not work
for all cases.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Paul Hunt <hunt@ti.com>
Cc: Stanley Liu <stanley_liu@ti.com>
2010-12-15 03:42:35 +08:00
|
|
|
static int _ocp_softreset(struct omap_hwmod *oh)
|
2009-09-04 01:14:03 +08:00
|
|
|
{
|
2010-09-22 00:57:58 +08:00
|
|
|
u32 v;
|
2009-12-09 07:33:16 +08:00
|
|
|
int c = 0;
|
2010-09-22 00:57:58 +08:00
|
|
|
int ret = 0;
|
2009-09-04 01:14:03 +08:00
|
|
|
|
2010-02-23 13:09:34 +08:00
|
|
|
if (!oh->class->sysc ||
|
2010-09-22 00:57:59 +08:00
|
|
|
!(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
|
2009-09-04 01:14:03 +08:00
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
/* clocks must be on for this operation */
|
|
|
|
if (oh->_state != _HWMOD_STATE_ENABLED) {
|
2010-09-22 00:34:11 +08:00
|
|
|
pr_warning("omap_hwmod: %s: reset can only be entered from "
|
|
|
|
"enabled state\n", oh->name);
|
2009-09-04 01:14:03 +08:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2010-09-22 00:57:58 +08:00
|
|
|
/* For some modules, all optionnal clocks need to be enabled as well */
|
|
|
|
if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
|
|
|
|
_enable_optional_clocks(oh);
|
|
|
|
|
OMAP2+: hwmod: add support for per-class custom device reset functions
The standard omap_hwmod.c _reset() code relies on an IP block's
OCP_SYSCONFIG.SOFTRESET register bit to reset the IP block. This
works for most IP blocks on the chip, but unfortunately not all. For
example, initiator-only IP blocks often don't have any MPU-accessible
OCP-header registers, and therefore the MPU can't write to any
OCP_SYSCONFIG registers in that block. Other IP blocks, such as the
IVA and I2C, require a specialized reset sequence.
Since we need to be able to reset these IP blocks as well, allow
custom IP block reset functions to be passed into the hwmod code via a
per-hwmod-class reset function pointer, struct omap_hwmod_class.reset.
If .reset is non-null, then the hwmod _reset() code will call the custom
function instead of the standard OCP SOFTRESET-based code.
As part of this change, rename most of the existing _reset() function
code to _ocp_softreset(), to indicate more clearly that it does not work
for all cases.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Paul Hunt <hunt@ti.com>
Cc: Stanley Liu <stanley_liu@ti.com>
2010-12-15 03:42:35 +08:00
|
|
|
pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
|
2009-09-04 01:14:03 +08:00
|
|
|
|
|
|
|
v = oh->_sysc_cache;
|
2010-09-22 00:57:58 +08:00
|
|
|
ret = _set_softreset(oh, &v);
|
|
|
|
if (ret)
|
|
|
|
goto dis_opt_clks;
|
2009-09-04 01:14:03 +08:00
|
|
|
_write_sysconfig(v, oh);
|
|
|
|
|
2010-09-22 00:57:59 +08:00
|
|
|
if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
|
2010-10-09 01:23:22 +08:00
|
|
|
omap_test_timeout((omap_hwmod_read(oh,
|
2010-09-22 00:57:59 +08:00
|
|
|
oh->class->sysc->syss_offs)
|
|
|
|
& SYSS_RESETDONE_MASK),
|
|
|
|
MAX_MODULE_SOFTRESET_WAIT, c);
|
|
|
|
else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS)
|
2010-10-09 01:23:22 +08:00
|
|
|
omap_test_timeout(!(omap_hwmod_read(oh,
|
2010-09-22 00:57:59 +08:00
|
|
|
oh->class->sysc->sysc_offs)
|
|
|
|
& SYSC_TYPE2_SOFTRESET_MASK),
|
|
|
|
MAX_MODULE_SOFTRESET_WAIT, c);
|
2009-09-04 01:14:03 +08:00
|
|
|
|
OMAP: hwmod: Add hardreset management support
Most processor IPs does have a hardreset signal controlled by the PRM.
This is different of the softreset used for local IP reset from the
SYSCONFIG register.
The granularity can be much finer than orginal HWMOD, for ex, the IVA
hwmod contains 3 reset lines, the IPU 3 as well, the DSP 2...
Since this granularity is needed by the driver, we have to ensure
than one hwmod exist for each hardreset line.
- Store reset lines as hwmod resources that a driver can query by name like
an irq or sdma line.
- Add two functions for asserting / deasserting reset lines in hwmods
processor that require manual reset control.
- Add one functions to get the current reset state.
- If an hwmod contains only one line, an automatic assertion / de-assertion
is done.
-> de-assert the hardreset line only during enable from disable transition
-> assert the hardreset line only during shutdown
Note: The hwmods with hardreset line and HWMOD_INIT_NO_RESET flag must be
kept in INITIALIZED state.
They can be properly enabled only if the hardreset line is de-asserted
before.
For information here is the list of IPs with HW reset control
on an OMAP4430 device:
RM_DSP_RSTCTRL
1,1,'RST2','RW','1','DSP - MMU, cache and slave interface reset control'
0,0,'RST1','RW','1','DSP - DSP reset control'
RM_IVA_RSTCTRL
2,2,'RST3','RW','1','IVA logic and SL2 reset control'
1,1,'RST2','RW','1','IVA Sequencer2 reset control'
0,0,'RST1','RW','1','IVA sequencer1 reset control'
RM_IPU_RSTCTRL
2,2,'RST3','RW','1','IPU MMU and CACHE interface reset control.'
1,1,'RST2','RW','1','IPU Cortex M3 CPU2 reset control.'
0,0,'RST1','RW','1','IPU Cortex M3 CPU1 reset control.'
PRM_RSTCTRL
1,1,'RST_GLOBAL_COLD_SW','RW','0','Global COLD software reset control.'
0,0,'RST_GLOBAL_WARM_SW','RW','0','Global WARM software reset control.'
RM_CPU0_CPU0_RSTCTRL
RM_CPU1_CPU1_RSTCTRL
0,0,'RST','RW','0','Cortex A9 CPU0&1 warm local reset control'
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
[paul@pwsan.com: made the hardreset functions static; moved the register
twiddling into prm*.c functions in previous patches; changed the
function names to conform with hwmod practice]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Rajendra Nayak <rnayak@ti.com>
2010-09-22 00:34:11 +08:00
|
|
|
if (c == MAX_MODULE_SOFTRESET_WAIT)
|
2010-09-22 00:34:11 +08:00
|
|
|
pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
|
|
|
|
oh->name, MAX_MODULE_SOFTRESET_WAIT);
|
2009-09-04 01:14:03 +08:00
|
|
|
else
|
OMAP: hwmod: Add hardreset management support
Most processor IPs does have a hardreset signal controlled by the PRM.
This is different of the softreset used for local IP reset from the
SYSCONFIG register.
The granularity can be much finer than orginal HWMOD, for ex, the IVA
hwmod contains 3 reset lines, the IPU 3 as well, the DSP 2...
Since this granularity is needed by the driver, we have to ensure
than one hwmod exist for each hardreset line.
- Store reset lines as hwmod resources that a driver can query by name like
an irq or sdma line.
- Add two functions for asserting / deasserting reset lines in hwmods
processor that require manual reset control.
- Add one functions to get the current reset state.
- If an hwmod contains only one line, an automatic assertion / de-assertion
is done.
-> de-assert the hardreset line only during enable from disable transition
-> assert the hardreset line only during shutdown
Note: The hwmods with hardreset line and HWMOD_INIT_NO_RESET flag must be
kept in INITIALIZED state.
They can be properly enabled only if the hardreset line is de-asserted
before.
For information here is the list of IPs with HW reset control
on an OMAP4430 device:
RM_DSP_RSTCTRL
1,1,'RST2','RW','1','DSP - MMU, cache and slave interface reset control'
0,0,'RST1','RW','1','DSP - DSP reset control'
RM_IVA_RSTCTRL
2,2,'RST3','RW','1','IVA logic and SL2 reset control'
1,1,'RST2','RW','1','IVA Sequencer2 reset control'
0,0,'RST1','RW','1','IVA sequencer1 reset control'
RM_IPU_RSTCTRL
2,2,'RST3','RW','1','IPU MMU and CACHE interface reset control.'
1,1,'RST2','RW','1','IPU Cortex M3 CPU2 reset control.'
0,0,'RST1','RW','1','IPU Cortex M3 CPU1 reset control.'
PRM_RSTCTRL
1,1,'RST_GLOBAL_COLD_SW','RW','0','Global COLD software reset control.'
0,0,'RST_GLOBAL_WARM_SW','RW','0','Global WARM software reset control.'
RM_CPU0_CPU0_RSTCTRL
RM_CPU1_CPU1_RSTCTRL
0,0,'RST','RW','0','Cortex A9 CPU0&1 warm local reset control'
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
[paul@pwsan.com: made the hardreset functions static; moved the register
twiddling into prm*.c functions in previous patches; changed the
function names to conform with hwmod practice]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Rajendra Nayak <rnayak@ti.com>
2010-09-22 00:34:11 +08:00
|
|
|
pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
|
2009-09-04 01:14:03 +08:00
|
|
|
|
|
|
|
/*
|
|
|
|
* XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
|
|
|
|
* _wait_target_ready() or _reset()
|
|
|
|
*/
|
|
|
|
|
2010-09-22 00:57:58 +08:00
|
|
|
ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
|
|
|
|
|
|
|
|
dis_opt_clks:
|
|
|
|
if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
|
|
|
|
_disable_optional_clocks(oh);
|
|
|
|
|
|
|
|
return ret;
|
2009-09-04 01:14:03 +08:00
|
|
|
}
|
|
|
|
|
OMAP2+: hwmod: add support for per-class custom device reset functions
The standard omap_hwmod.c _reset() code relies on an IP block's
OCP_SYSCONFIG.SOFTRESET register bit to reset the IP block. This
works for most IP blocks on the chip, but unfortunately not all. For
example, initiator-only IP blocks often don't have any MPU-accessible
OCP-header registers, and therefore the MPU can't write to any
OCP_SYSCONFIG registers in that block. Other IP blocks, such as the
IVA and I2C, require a specialized reset sequence.
Since we need to be able to reset these IP blocks as well, allow
custom IP block reset functions to be passed into the hwmod code via a
per-hwmod-class reset function pointer, struct omap_hwmod_class.reset.
If .reset is non-null, then the hwmod _reset() code will call the custom
function instead of the standard OCP SOFTRESET-based code.
As part of this change, rename most of the existing _reset() function
code to _ocp_softreset(), to indicate more clearly that it does not work
for all cases.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Paul Hunt <hunt@ti.com>
Cc: Stanley Liu <stanley_liu@ti.com>
2010-12-15 03:42:35 +08:00
|
|
|
/**
|
|
|
|
* _reset - reset an omap_hwmod
|
|
|
|
* @oh: struct omap_hwmod *
|
|
|
|
*
|
|
|
|
* Resets an omap_hwmod @oh. The default software reset mechanism for
|
|
|
|
* most OMAP IP blocks is triggered via the OCP_SYSCONFIG.SOFTRESET
|
|
|
|
* bit. However, some hwmods cannot be reset via this method: some
|
|
|
|
* are not targets and therefore have no OCP header registers to
|
|
|
|
* access; others (like the IVA) have idiosyncratic reset sequences.
|
|
|
|
* So for these relatively rare cases, custom reset code can be
|
|
|
|
* supplied in the struct omap_hwmod_class .reset function pointer.
|
|
|
|
* Passes along the return value from either _reset() or the custom
|
|
|
|
* reset function - these must return -EINVAL if the hwmod cannot be
|
|
|
|
* reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
|
|
|
|
* the module did not reset in time, or 0 upon success.
|
|
|
|
*/
|
|
|
|
static int _reset(struct omap_hwmod *oh)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
pr_debug("omap_hwmod: %s: resetting\n", oh->name);
|
|
|
|
|
|
|
|
ret = (oh->class->reset) ? oh->class->reset(oh) : _ocp_softreset(oh);
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2009-09-04 01:14:03 +08:00
|
|
|
/**
|
OMAP2+: hwmod: upgrade per-hwmod mutex to a spinlock
Change the per-hwmod mutex to a spinlock. (The per-hwmod lock
serializes most post-initialization hwmod operations such as enable,
idle, and shutdown.) Spinlocks are needed, because in some cases,
hwmods must be enabled from timer interrupt disabled-context, such as
an ISR. The current use-case that is driving this is the OMAP GPIO
block ISR: it can trigger interrupts even with its clocks disabled,
but these clocks are needed for register accesses in the ISR to succeed.
This patch also effectively reverts commit
848240223c35fcc71c424ad51a8e8aef42d3879c - this patch makes
_omap_hwmod_enable() and _omap_hwmod_init() static, renames them back
to _enable() and _idle(), and changes their callers to call the
spinlocking versions. Previously, since omap_hwmod_{enable,init}()
attempted to take mutexes, these functions could not be called while
the timer interrupt was disabled; but now that the functions use
spinlocks and save and restore the IRQ state, it is appropriate to
call them directly.
Kevin Hilman <khilman@deeprootsystems.com> originally proposed this
patch - thanks Kevin.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Benoît Cousson <b-cousson@ti.com>
2010-12-15 03:42:35 +08:00
|
|
|
* _enable - enable an omap_hwmod
|
2009-09-04 01:14:03 +08:00
|
|
|
* @oh: struct omap_hwmod *
|
|
|
|
*
|
|
|
|
* Enables an omap_hwmod @oh such that the MPU can access the hwmod's
|
OMAP2+: hwmod: upgrade per-hwmod mutex to a spinlock
Change the per-hwmod mutex to a spinlock. (The per-hwmod lock
serializes most post-initialization hwmod operations such as enable,
idle, and shutdown.) Spinlocks are needed, because in some cases,
hwmods must be enabled from timer interrupt disabled-context, such as
an ISR. The current use-case that is driving this is the OMAP GPIO
block ISR: it can trigger interrupts even with its clocks disabled,
but these clocks are needed for register accesses in the ISR to succeed.
This patch also effectively reverts commit
848240223c35fcc71c424ad51a8e8aef42d3879c - this patch makes
_omap_hwmod_enable() and _omap_hwmod_init() static, renames them back
to _enable() and _idle(), and changes their callers to call the
spinlocking versions. Previously, since omap_hwmod_{enable,init}()
attempted to take mutexes, these functions could not be called while
the timer interrupt was disabled; but now that the functions use
spinlocks and save and restore the IRQ state, it is appropriate to
call them directly.
Kevin Hilman <khilman@deeprootsystems.com> originally proposed this
patch - thanks Kevin.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Benoît Cousson <b-cousson@ti.com>
2010-12-15 03:42:35 +08:00
|
|
|
* register target. Returns -EINVAL if the hwmod is in the wrong
|
|
|
|
* state or passes along the return value of _wait_target_ready().
|
2009-09-04 01:14:03 +08:00
|
|
|
*/
|
OMAP2+: hwmod: upgrade per-hwmod mutex to a spinlock
Change the per-hwmod mutex to a spinlock. (The per-hwmod lock
serializes most post-initialization hwmod operations such as enable,
idle, and shutdown.) Spinlocks are needed, because in some cases,
hwmods must be enabled from timer interrupt disabled-context, such as
an ISR. The current use-case that is driving this is the OMAP GPIO
block ISR: it can trigger interrupts even with its clocks disabled,
but these clocks are needed for register accesses in the ISR to succeed.
This patch also effectively reverts commit
848240223c35fcc71c424ad51a8e8aef42d3879c - this patch makes
_omap_hwmod_enable() and _omap_hwmod_init() static, renames them back
to _enable() and _idle(), and changes their callers to call the
spinlocking versions. Previously, since omap_hwmod_{enable,init}()
attempted to take mutexes, these functions could not be called while
the timer interrupt was disabled; but now that the functions use
spinlocks and save and restore the IRQ state, it is appropriate to
call them directly.
Kevin Hilman <khilman@deeprootsystems.com> originally proposed this
patch - thanks Kevin.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Benoît Cousson <b-cousson@ti.com>
2010-12-15 03:42:35 +08:00
|
|
|
static int _enable(struct omap_hwmod *oh)
|
2009-09-04 01:14:03 +08:00
|
|
|
{
|
|
|
|
int r;
|
|
|
|
|
|
|
|
if (oh->_state != _HWMOD_STATE_INITIALIZED &&
|
|
|
|
oh->_state != _HWMOD_STATE_IDLE &&
|
|
|
|
oh->_state != _HWMOD_STATE_DISABLED) {
|
|
|
|
WARN(1, "omap_hwmod: %s: enabled state can only be entered "
|
|
|
|
"from initialized, idle, or disabled state\n", oh->name);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
pr_debug("omap_hwmod: %s: enabling\n", oh->name);
|
|
|
|
|
OMAP: hwmod: Add hardreset management support
Most processor IPs does have a hardreset signal controlled by the PRM.
This is different of the softreset used for local IP reset from the
SYSCONFIG register.
The granularity can be much finer than orginal HWMOD, for ex, the IVA
hwmod contains 3 reset lines, the IPU 3 as well, the DSP 2...
Since this granularity is needed by the driver, we have to ensure
than one hwmod exist for each hardreset line.
- Store reset lines as hwmod resources that a driver can query by name like
an irq or sdma line.
- Add two functions for asserting / deasserting reset lines in hwmods
processor that require manual reset control.
- Add one functions to get the current reset state.
- If an hwmod contains only one line, an automatic assertion / de-assertion
is done.
-> de-assert the hardreset line only during enable from disable transition
-> assert the hardreset line only during shutdown
Note: The hwmods with hardreset line and HWMOD_INIT_NO_RESET flag must be
kept in INITIALIZED state.
They can be properly enabled only if the hardreset line is de-asserted
before.
For information here is the list of IPs with HW reset control
on an OMAP4430 device:
RM_DSP_RSTCTRL
1,1,'RST2','RW','1','DSP - MMU, cache and slave interface reset control'
0,0,'RST1','RW','1','DSP - DSP reset control'
RM_IVA_RSTCTRL
2,2,'RST3','RW','1','IVA logic and SL2 reset control'
1,1,'RST2','RW','1','IVA Sequencer2 reset control'
0,0,'RST1','RW','1','IVA sequencer1 reset control'
RM_IPU_RSTCTRL
2,2,'RST3','RW','1','IPU MMU and CACHE interface reset control.'
1,1,'RST2','RW','1','IPU Cortex M3 CPU2 reset control.'
0,0,'RST1','RW','1','IPU Cortex M3 CPU1 reset control.'
PRM_RSTCTRL
1,1,'RST_GLOBAL_COLD_SW','RW','0','Global COLD software reset control.'
0,0,'RST_GLOBAL_WARM_SW','RW','0','Global WARM software reset control.'
RM_CPU0_CPU0_RSTCTRL
RM_CPU1_CPU1_RSTCTRL
0,0,'RST','RW','0','Cortex A9 CPU0&1 warm local reset control'
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
[paul@pwsan.com: made the hardreset functions static; moved the register
twiddling into prm*.c functions in previous patches; changed the
function names to conform with hwmod practice]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Rajendra Nayak <rnayak@ti.com>
2010-09-22 00:34:11 +08:00
|
|
|
/*
|
|
|
|
* If an IP contains only one HW reset line, then de-assert it in order
|
|
|
|
* to allow to enable the clocks. Otherwise the PRCM will return
|
|
|
|
* Intransition status, and the init will failed.
|
|
|
|
*/
|
|
|
|
if ((oh->_state == _HWMOD_STATE_INITIALIZED ||
|
|
|
|
oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1)
|
|
|
|
_deassert_hardreset(oh, oh->rst_lines[0].name);
|
|
|
|
|
2010-12-23 10:42:35 +08:00
|
|
|
/* Mux pins for device runtime if populated */
|
|
|
|
if (oh->mux)
|
|
|
|
omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
|
2009-09-04 01:14:03 +08:00
|
|
|
|
|
|
|
_add_initiator_dep(oh, mpu_oh);
|
|
|
|
_enable_clocks(oh);
|
|
|
|
|
|
|
|
r = _wait_target_ready(oh);
|
2010-05-21 02:31:08 +08:00
|
|
|
if (!r) {
|
2009-09-04 01:14:03 +08:00
|
|
|
oh->_state = _HWMOD_STATE_ENABLED;
|
|
|
|
|
2010-05-21 02:31:08 +08:00
|
|
|
/* Access the sysconfig only if the target is ready */
|
|
|
|
if (oh->class->sysc) {
|
|
|
|
if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
|
|
|
|
_update_sysc_cache(oh);
|
2010-09-22 05:02:23 +08:00
|
|
|
_enable_sysc(oh);
|
2010-05-21 02:31:08 +08:00
|
|
|
}
|
|
|
|
} else {
|
2010-12-22 12:31:28 +08:00
|
|
|
_disable_clocks(oh);
|
2010-05-21 02:31:08 +08:00
|
|
|
pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
|
|
|
|
oh->name, r);
|
|
|
|
}
|
|
|
|
|
2009-09-04 01:14:03 +08:00
|
|
|
return r;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
OMAP2+: hwmod: upgrade per-hwmod mutex to a spinlock
Change the per-hwmod mutex to a spinlock. (The per-hwmod lock
serializes most post-initialization hwmod operations such as enable,
idle, and shutdown.) Spinlocks are needed, because in some cases,
hwmods must be enabled from timer interrupt disabled-context, such as
an ISR. The current use-case that is driving this is the OMAP GPIO
block ISR: it can trigger interrupts even with its clocks disabled,
but these clocks are needed for register accesses in the ISR to succeed.
This patch also effectively reverts commit
848240223c35fcc71c424ad51a8e8aef42d3879c - this patch makes
_omap_hwmod_enable() and _omap_hwmod_init() static, renames them back
to _enable() and _idle(), and changes their callers to call the
spinlocking versions. Previously, since omap_hwmod_{enable,init}()
attempted to take mutexes, these functions could not be called while
the timer interrupt was disabled; but now that the functions use
spinlocks and save and restore the IRQ state, it is appropriate to
call them directly.
Kevin Hilman <khilman@deeprootsystems.com> originally proposed this
patch - thanks Kevin.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Benoît Cousson <b-cousson@ti.com>
2010-12-15 03:42:35 +08:00
|
|
|
* _idle - idle an omap_hwmod
|
2009-09-04 01:14:03 +08:00
|
|
|
* @oh: struct omap_hwmod *
|
|
|
|
*
|
|
|
|
* Idles an omap_hwmod @oh. This should be called once the hwmod has
|
OMAP2+: hwmod: upgrade per-hwmod mutex to a spinlock
Change the per-hwmod mutex to a spinlock. (The per-hwmod lock
serializes most post-initialization hwmod operations such as enable,
idle, and shutdown.) Spinlocks are needed, because in some cases,
hwmods must be enabled from timer interrupt disabled-context, such as
an ISR. The current use-case that is driving this is the OMAP GPIO
block ISR: it can trigger interrupts even with its clocks disabled,
but these clocks are needed for register accesses in the ISR to succeed.
This patch also effectively reverts commit
848240223c35fcc71c424ad51a8e8aef42d3879c - this patch makes
_omap_hwmod_enable() and _omap_hwmod_init() static, renames them back
to _enable() and _idle(), and changes their callers to call the
spinlocking versions. Previously, since omap_hwmod_{enable,init}()
attempted to take mutexes, these functions could not be called while
the timer interrupt was disabled; but now that the functions use
spinlocks and save and restore the IRQ state, it is appropriate to
call them directly.
Kevin Hilman <khilman@deeprootsystems.com> originally proposed this
patch - thanks Kevin.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Benoît Cousson <b-cousson@ti.com>
2010-12-15 03:42:35 +08:00
|
|
|
* no further work. Returns -EINVAL if the hwmod is in the wrong
|
|
|
|
* state or returns 0.
|
2009-09-04 01:14:03 +08:00
|
|
|
*/
|
OMAP2+: hwmod: upgrade per-hwmod mutex to a spinlock
Change the per-hwmod mutex to a spinlock. (The per-hwmod lock
serializes most post-initialization hwmod operations such as enable,
idle, and shutdown.) Spinlocks are needed, because in some cases,
hwmods must be enabled from timer interrupt disabled-context, such as
an ISR. The current use-case that is driving this is the OMAP GPIO
block ISR: it can trigger interrupts even with its clocks disabled,
but these clocks are needed for register accesses in the ISR to succeed.
This patch also effectively reverts commit
848240223c35fcc71c424ad51a8e8aef42d3879c - this patch makes
_omap_hwmod_enable() and _omap_hwmod_init() static, renames them back
to _enable() and _idle(), and changes their callers to call the
spinlocking versions. Previously, since omap_hwmod_{enable,init}()
attempted to take mutexes, these functions could not be called while
the timer interrupt was disabled; but now that the functions use
spinlocks and save and restore the IRQ state, it is appropriate to
call them directly.
Kevin Hilman <khilman@deeprootsystems.com> originally proposed this
patch - thanks Kevin.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Benoît Cousson <b-cousson@ti.com>
2010-12-15 03:42:35 +08:00
|
|
|
static int _idle(struct omap_hwmod *oh)
|
2009-09-04 01:14:03 +08:00
|
|
|
{
|
|
|
|
if (oh->_state != _HWMOD_STATE_ENABLED) {
|
|
|
|
WARN(1, "omap_hwmod: %s: idle state can only be entered from "
|
|
|
|
"enabled state\n", oh->name);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
pr_debug("omap_hwmod: %s: idling\n", oh->name);
|
|
|
|
|
2010-02-23 13:09:34 +08:00
|
|
|
if (oh->class->sysc)
|
2010-09-22 05:02:23 +08:00
|
|
|
_idle_sysc(oh);
|
2009-09-04 01:14:03 +08:00
|
|
|
_del_initiator_dep(oh, mpu_oh);
|
|
|
|
_disable_clocks(oh);
|
|
|
|
|
2010-12-23 10:42:35 +08:00
|
|
|
/* Mux pins for device idle if populated */
|
|
|
|
if (oh->mux)
|
|
|
|
omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
|
|
|
|
|
2009-09-04 01:14:03 +08:00
|
|
|
oh->_state = _HWMOD_STATE_IDLE;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* _shutdown - shutdown an omap_hwmod
|
|
|
|
* @oh: struct omap_hwmod *
|
|
|
|
*
|
|
|
|
* Shut down an omap_hwmod @oh. This should be called when the driver
|
|
|
|
* used for the hwmod is removed or unloaded or if the driver is not
|
|
|
|
* used by the system. Returns -EINVAL if the hwmod is in the wrong
|
|
|
|
* state or returns 0.
|
|
|
|
*/
|
|
|
|
static int _shutdown(struct omap_hwmod *oh)
|
|
|
|
{
|
2010-12-15 03:42:34 +08:00
|
|
|
int ret;
|
|
|
|
u8 prev_state;
|
|
|
|
|
2009-09-04 01:14:03 +08:00
|
|
|
if (oh->_state != _HWMOD_STATE_IDLE &&
|
|
|
|
oh->_state != _HWMOD_STATE_ENABLED) {
|
|
|
|
WARN(1, "omap_hwmod: %s: disabled state can only be entered "
|
|
|
|
"from idle, or enabled state\n", oh->name);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
pr_debug("omap_hwmod: %s: disabling\n", oh->name);
|
|
|
|
|
2010-12-15 03:42:34 +08:00
|
|
|
if (oh->class->pre_shutdown) {
|
|
|
|
prev_state = oh->_state;
|
|
|
|
if (oh->_state == _HWMOD_STATE_IDLE)
|
OMAP2+: hwmod: upgrade per-hwmod mutex to a spinlock
Change the per-hwmod mutex to a spinlock. (The per-hwmod lock
serializes most post-initialization hwmod operations such as enable,
idle, and shutdown.) Spinlocks are needed, because in some cases,
hwmods must be enabled from timer interrupt disabled-context, such as
an ISR. The current use-case that is driving this is the OMAP GPIO
block ISR: it can trigger interrupts even with its clocks disabled,
but these clocks are needed for register accesses in the ISR to succeed.
This patch also effectively reverts commit
848240223c35fcc71c424ad51a8e8aef42d3879c - this patch makes
_omap_hwmod_enable() and _omap_hwmod_init() static, renames them back
to _enable() and _idle(), and changes their callers to call the
spinlocking versions. Previously, since omap_hwmod_{enable,init}()
attempted to take mutexes, these functions could not be called while
the timer interrupt was disabled; but now that the functions use
spinlocks and save and restore the IRQ state, it is appropriate to
call them directly.
Kevin Hilman <khilman@deeprootsystems.com> originally proposed this
patch - thanks Kevin.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Benoît Cousson <b-cousson@ti.com>
2010-12-15 03:42:35 +08:00
|
|
|
_enable(oh);
|
2010-12-15 03:42:34 +08:00
|
|
|
ret = oh->class->pre_shutdown(oh);
|
|
|
|
if (ret) {
|
|
|
|
if (prev_state == _HWMOD_STATE_IDLE)
|
OMAP2+: hwmod: upgrade per-hwmod mutex to a spinlock
Change the per-hwmod mutex to a spinlock. (The per-hwmod lock
serializes most post-initialization hwmod operations such as enable,
idle, and shutdown.) Spinlocks are needed, because in some cases,
hwmods must be enabled from timer interrupt disabled-context, such as
an ISR. The current use-case that is driving this is the OMAP GPIO
block ISR: it can trigger interrupts even with its clocks disabled,
but these clocks are needed for register accesses in the ISR to succeed.
This patch also effectively reverts commit
848240223c35fcc71c424ad51a8e8aef42d3879c - this patch makes
_omap_hwmod_enable() and _omap_hwmod_init() static, renames them back
to _enable() and _idle(), and changes their callers to call the
spinlocking versions. Previously, since omap_hwmod_{enable,init}()
attempted to take mutexes, these functions could not be called while
the timer interrupt was disabled; but now that the functions use
spinlocks and save and restore the IRQ state, it is appropriate to
call them directly.
Kevin Hilman <khilman@deeprootsystems.com> originally proposed this
patch - thanks Kevin.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Benoît Cousson <b-cousson@ti.com>
2010-12-15 03:42:35 +08:00
|
|
|
_idle(oh);
|
2010-12-15 03:42:34 +08:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2010-02-23 13:09:34 +08:00
|
|
|
if (oh->class->sysc)
|
2010-09-22 05:02:23 +08:00
|
|
|
_shutdown_sysc(oh);
|
2010-09-22 00:34:08 +08:00
|
|
|
|
OMAP: hwmod: Add hardreset management support
Most processor IPs does have a hardreset signal controlled by the PRM.
This is different of the softreset used for local IP reset from the
SYSCONFIG register.
The granularity can be much finer than orginal HWMOD, for ex, the IVA
hwmod contains 3 reset lines, the IPU 3 as well, the DSP 2...
Since this granularity is needed by the driver, we have to ensure
than one hwmod exist for each hardreset line.
- Store reset lines as hwmod resources that a driver can query by name like
an irq or sdma line.
- Add two functions for asserting / deasserting reset lines in hwmods
processor that require manual reset control.
- Add one functions to get the current reset state.
- If an hwmod contains only one line, an automatic assertion / de-assertion
is done.
-> de-assert the hardreset line only during enable from disable transition
-> assert the hardreset line only during shutdown
Note: The hwmods with hardreset line and HWMOD_INIT_NO_RESET flag must be
kept in INITIALIZED state.
They can be properly enabled only if the hardreset line is de-asserted
before.
For information here is the list of IPs with HW reset control
on an OMAP4430 device:
RM_DSP_RSTCTRL
1,1,'RST2','RW','1','DSP - MMU, cache and slave interface reset control'
0,0,'RST1','RW','1','DSP - DSP reset control'
RM_IVA_RSTCTRL
2,2,'RST3','RW','1','IVA logic and SL2 reset control'
1,1,'RST2','RW','1','IVA Sequencer2 reset control'
0,0,'RST1','RW','1','IVA sequencer1 reset control'
RM_IPU_RSTCTRL
2,2,'RST3','RW','1','IPU MMU and CACHE interface reset control.'
1,1,'RST2','RW','1','IPU Cortex M3 CPU2 reset control.'
0,0,'RST1','RW','1','IPU Cortex M3 CPU1 reset control.'
PRM_RSTCTRL
1,1,'RST_GLOBAL_COLD_SW','RW','0','Global COLD software reset control.'
0,0,'RST_GLOBAL_WARM_SW','RW','0','Global WARM software reset control.'
RM_CPU0_CPU0_RSTCTRL
RM_CPU1_CPU1_RSTCTRL
0,0,'RST','RW','0','Cortex A9 CPU0&1 warm local reset control'
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
[paul@pwsan.com: made the hardreset functions static; moved the register
twiddling into prm*.c functions in previous patches; changed the
function names to conform with hwmod practice]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Rajendra Nayak <rnayak@ti.com>
2010-09-22 00:34:11 +08:00
|
|
|
/*
|
|
|
|
* If an IP contains only one HW reset line, then assert it
|
|
|
|
* before disabling the clocks and shutting down the IP.
|
|
|
|
*/
|
|
|
|
if (oh->rst_lines_cnt == 1)
|
|
|
|
_assert_hardreset(oh, oh->rst_lines[0].name);
|
|
|
|
|
2010-09-22 00:34:08 +08:00
|
|
|
/* clocks and deps are already disabled in idle */
|
|
|
|
if (oh->_state == _HWMOD_STATE_ENABLED) {
|
|
|
|
_del_initiator_dep(oh, mpu_oh);
|
|
|
|
/* XXX what about the other system initiators here? dma, dsp */
|
|
|
|
_disable_clocks(oh);
|
|
|
|
}
|
2009-09-04 01:14:03 +08:00
|
|
|
/* XXX Should this code also force-disable the optional clocks? */
|
|
|
|
|
2010-12-23 10:42:35 +08:00
|
|
|
/* Mux pins to safe mode or use populated off mode values */
|
|
|
|
if (oh->mux)
|
|
|
|
omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
|
2009-09-04 01:14:03 +08:00
|
|
|
|
|
|
|
oh->_state = _HWMOD_STATE_DISABLED;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* _setup - do initial configuration of omap_hwmod
|
|
|
|
* @oh: struct omap_hwmod *
|
|
|
|
*
|
|
|
|
* Writes the CLOCKACTIVITY bits @clockact to the hwmod @oh
|
2010-12-15 03:42:35 +08:00
|
|
|
* OCP_SYSCONFIG register. Returns -EINVAL if the hwmod is in the
|
|
|
|
* wrong state or returns 0.
|
2009-09-04 01:14:03 +08:00
|
|
|
*/
|
2010-07-27 06:34:30 +08:00
|
|
|
static int _setup(struct omap_hwmod *oh, void *data)
|
2009-09-04 01:14:03 +08:00
|
|
|
{
|
2010-05-21 02:31:08 +08:00
|
|
|
int i, r;
|
2010-12-15 03:42:35 +08:00
|
|
|
u8 postsetup_state;
|
2010-07-27 06:34:30 +08:00
|
|
|
|
2009-09-04 01:14:03 +08:00
|
|
|
/* Set iclk autoidle mode */
|
|
|
|
if (oh->slaves_cnt > 0) {
|
2010-05-21 02:31:09 +08:00
|
|
|
for (i = 0; i < oh->slaves_cnt; i++) {
|
|
|
|
struct omap_hwmod_ocp_if *os = oh->slaves[i];
|
2009-09-04 01:14:03 +08:00
|
|
|
struct clk *c = os->_clk;
|
|
|
|
|
2010-05-21 02:31:09 +08:00
|
|
|
if (!c)
|
2009-09-04 01:14:03 +08:00
|
|
|
continue;
|
|
|
|
|
|
|
|
if (os->flags & OCPIF_SWSUP_IDLE) {
|
|
|
|
/* XXX omap_iclk_deny_idle(c); */
|
|
|
|
} else {
|
|
|
|
/* XXX omap_iclk_allow_idle(c); */
|
|
|
|
clk_enable(c);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
oh->_state = _HWMOD_STATE_INITIALIZED;
|
|
|
|
|
OMAP: hwmod: Add hardreset management support
Most processor IPs does have a hardreset signal controlled by the PRM.
This is different of the softreset used for local IP reset from the
SYSCONFIG register.
The granularity can be much finer than orginal HWMOD, for ex, the IVA
hwmod contains 3 reset lines, the IPU 3 as well, the DSP 2...
Since this granularity is needed by the driver, we have to ensure
than one hwmod exist for each hardreset line.
- Store reset lines as hwmod resources that a driver can query by name like
an irq or sdma line.
- Add two functions for asserting / deasserting reset lines in hwmods
processor that require manual reset control.
- Add one functions to get the current reset state.
- If an hwmod contains only one line, an automatic assertion / de-assertion
is done.
-> de-assert the hardreset line only during enable from disable transition
-> assert the hardreset line only during shutdown
Note: The hwmods with hardreset line and HWMOD_INIT_NO_RESET flag must be
kept in INITIALIZED state.
They can be properly enabled only if the hardreset line is de-asserted
before.
For information here is the list of IPs with HW reset control
on an OMAP4430 device:
RM_DSP_RSTCTRL
1,1,'RST2','RW','1','DSP - MMU, cache and slave interface reset control'
0,0,'RST1','RW','1','DSP - DSP reset control'
RM_IVA_RSTCTRL
2,2,'RST3','RW','1','IVA logic and SL2 reset control'
1,1,'RST2','RW','1','IVA Sequencer2 reset control'
0,0,'RST1','RW','1','IVA sequencer1 reset control'
RM_IPU_RSTCTRL
2,2,'RST3','RW','1','IPU MMU and CACHE interface reset control.'
1,1,'RST2','RW','1','IPU Cortex M3 CPU2 reset control.'
0,0,'RST1','RW','1','IPU Cortex M3 CPU1 reset control.'
PRM_RSTCTRL
1,1,'RST_GLOBAL_COLD_SW','RW','0','Global COLD software reset control.'
0,0,'RST_GLOBAL_WARM_SW','RW','0','Global WARM software reset control.'
RM_CPU0_CPU0_RSTCTRL
RM_CPU1_CPU1_RSTCTRL
0,0,'RST','RW','0','Cortex A9 CPU0&1 warm local reset control'
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
[paul@pwsan.com: made the hardreset functions static; moved the register
twiddling into prm*.c functions in previous patches; changed the
function names to conform with hwmod practice]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Rajendra Nayak <rnayak@ti.com>
2010-09-22 00:34:11 +08:00
|
|
|
/*
|
|
|
|
* In the case of hwmod with hardreset that should not be
|
|
|
|
* de-assert at boot time, we have to keep the module
|
|
|
|
* initialized, because we cannot enable it properly with the
|
|
|
|
* reset asserted. Exit without warning because that behavior is
|
|
|
|
* expected.
|
|
|
|
*/
|
|
|
|
if ((oh->flags & HWMOD_INIT_NO_RESET) && oh->rst_lines_cnt == 1)
|
|
|
|
return 0;
|
|
|
|
|
OMAP2+: hwmod: upgrade per-hwmod mutex to a spinlock
Change the per-hwmod mutex to a spinlock. (The per-hwmod lock
serializes most post-initialization hwmod operations such as enable,
idle, and shutdown.) Spinlocks are needed, because in some cases,
hwmods must be enabled from timer interrupt disabled-context, such as
an ISR. The current use-case that is driving this is the OMAP GPIO
block ISR: it can trigger interrupts even with its clocks disabled,
but these clocks are needed for register accesses in the ISR to succeed.
This patch also effectively reverts commit
848240223c35fcc71c424ad51a8e8aef42d3879c - this patch makes
_omap_hwmod_enable() and _omap_hwmod_init() static, renames them back
to _enable() and _idle(), and changes their callers to call the
spinlocking versions. Previously, since omap_hwmod_{enable,init}()
attempted to take mutexes, these functions could not be called while
the timer interrupt was disabled; but now that the functions use
spinlocks and save and restore the IRQ state, it is appropriate to
call them directly.
Kevin Hilman <khilman@deeprootsystems.com> originally proposed this
patch - thanks Kevin.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Benoît Cousson <b-cousson@ti.com>
2010-12-15 03:42:35 +08:00
|
|
|
r = _enable(oh);
|
2010-05-21 02:31:08 +08:00
|
|
|
if (r) {
|
|
|
|
pr_warning("omap_hwmod: %s: cannot be enabled (%d)\n",
|
|
|
|
oh->name, oh->_state);
|
|
|
|
return 0;
|
|
|
|
}
|
2009-09-04 01:14:03 +08:00
|
|
|
|
2009-12-09 07:34:14 +08:00
|
|
|
if (!(oh->flags & HWMOD_INIT_NO_RESET)) {
|
2010-09-22 00:34:11 +08:00
|
|
|
_reset(oh);
|
|
|
|
|
2009-12-09 07:34:14 +08:00
|
|
|
/*
|
2010-09-22 00:34:11 +08:00
|
|
|
* OCP_SYSCONFIG bits need to be reprogrammed after a softreset.
|
OMAP2+: hwmod: upgrade per-hwmod mutex to a spinlock
Change the per-hwmod mutex to a spinlock. (The per-hwmod lock
serializes most post-initialization hwmod operations such as enable,
idle, and shutdown.) Spinlocks are needed, because in some cases,
hwmods must be enabled from timer interrupt disabled-context, such as
an ISR. The current use-case that is driving this is the OMAP GPIO
block ISR: it can trigger interrupts even with its clocks disabled,
but these clocks are needed for register accesses in the ISR to succeed.
This patch also effectively reverts commit
848240223c35fcc71c424ad51a8e8aef42d3879c - this patch makes
_omap_hwmod_enable() and _omap_hwmod_init() static, renames them back
to _enable() and _idle(), and changes their callers to call the
spinlocking versions. Previously, since omap_hwmod_{enable,init}()
attempted to take mutexes, these functions could not be called while
the timer interrupt was disabled; but now that the functions use
spinlocks and save and restore the IRQ state, it is appropriate to
call them directly.
Kevin Hilman <khilman@deeprootsystems.com> originally proposed this
patch - thanks Kevin.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Benoît Cousson <b-cousson@ti.com>
2010-12-15 03:42:35 +08:00
|
|
|
* The _enable() function should be split to
|
2010-09-22 00:34:11 +08:00
|
|
|
* avoid the rewrite of the OCP_SYSCONFIG register.
|
2009-12-09 07:34:14 +08:00
|
|
|
*/
|
2010-02-23 13:09:34 +08:00
|
|
|
if (oh->class->sysc) {
|
2009-12-09 07:34:14 +08:00
|
|
|
_update_sysc_cache(oh);
|
2010-09-22 05:02:23 +08:00
|
|
|
_enable_sysc(oh);
|
2009-12-09 07:34:14 +08:00
|
|
|
}
|
|
|
|
}
|
2009-09-04 01:14:03 +08:00
|
|
|
|
2010-12-15 03:42:35 +08:00
|
|
|
postsetup_state = oh->_postsetup_state;
|
|
|
|
if (postsetup_state == _HWMOD_STATE_UNKNOWN)
|
|
|
|
postsetup_state = _HWMOD_STATE_ENABLED;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
|
|
|
|
* it should be set by the core code as a runtime flag during startup
|
|
|
|
*/
|
|
|
|
if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
|
|
|
|
(postsetup_state == _HWMOD_STATE_IDLE))
|
|
|
|
postsetup_state = _HWMOD_STATE_ENABLED;
|
|
|
|
|
|
|
|
if (postsetup_state == _HWMOD_STATE_IDLE)
|
OMAP2+: hwmod: upgrade per-hwmod mutex to a spinlock
Change the per-hwmod mutex to a spinlock. (The per-hwmod lock
serializes most post-initialization hwmod operations such as enable,
idle, and shutdown.) Spinlocks are needed, because in some cases,
hwmods must be enabled from timer interrupt disabled-context, such as
an ISR. The current use-case that is driving this is the OMAP GPIO
block ISR: it can trigger interrupts even with its clocks disabled,
but these clocks are needed for register accesses in the ISR to succeed.
This patch also effectively reverts commit
848240223c35fcc71c424ad51a8e8aef42d3879c - this patch makes
_omap_hwmod_enable() and _omap_hwmod_init() static, renames them back
to _enable() and _idle(), and changes their callers to call the
spinlocking versions. Previously, since omap_hwmod_{enable,init}()
attempted to take mutexes, these functions could not be called while
the timer interrupt was disabled; but now that the functions use
spinlocks and save and restore the IRQ state, it is appropriate to
call them directly.
Kevin Hilman <khilman@deeprootsystems.com> originally proposed this
patch - thanks Kevin.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Benoît Cousson <b-cousson@ti.com>
2010-12-15 03:42:35 +08:00
|
|
|
_idle(oh);
|
2010-12-15 03:42:35 +08:00
|
|
|
else if (postsetup_state == _HWMOD_STATE_DISABLED)
|
|
|
|
_shutdown(oh);
|
|
|
|
else if (postsetup_state != _HWMOD_STATE_ENABLED)
|
|
|
|
WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
|
|
|
|
oh->name, postsetup_state);
|
2009-09-04 01:14:03 +08:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
2010-12-22 12:31:27 +08:00
|
|
|
* _register - register a struct omap_hwmod
|
2009-09-04 01:14:03 +08:00
|
|
|
* @oh: struct omap_hwmod *
|
|
|
|
*
|
2010-02-23 13:09:34 +08:00
|
|
|
* Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
|
|
|
|
* already has been registered by the same name; -EINVAL if the
|
|
|
|
* omap_hwmod is in the wrong state, if @oh is NULL, if the
|
|
|
|
* omap_hwmod's class field is NULL; if the omap_hwmod is missing a
|
|
|
|
* name, or if the omap_hwmod's class is missing a name; or 0 upon
|
|
|
|
* success.
|
2009-09-04 01:14:03 +08:00
|
|
|
*
|
|
|
|
* XXX The data should be copied into bootmem, so the original data
|
|
|
|
* should be marked __initdata and freed after init. This would allow
|
|
|
|
* unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
|
|
|
|
* that the copy process would be relatively complex due to the large number
|
|
|
|
* of substructures.
|
|
|
|
*/
|
2010-12-22 12:31:28 +08:00
|
|
|
static int __init _register(struct omap_hwmod *oh)
|
2009-09-04 01:14:03 +08:00
|
|
|
{
|
|
|
|
int ret, ms_id;
|
|
|
|
|
2010-02-23 13:09:34 +08:00
|
|
|
if (!oh || !oh->name || !oh->class || !oh->class->name ||
|
|
|
|
(oh->_state != _HWMOD_STATE_UNKNOWN))
|
2009-09-04 01:14:03 +08:00
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
pr_debug("omap_hwmod: %s: registering\n", oh->name);
|
|
|
|
|
2010-12-22 12:31:28 +08:00
|
|
|
if (_lookup(oh->name))
|
|
|
|
return -EEXIST;
|
2009-09-04 01:14:03 +08:00
|
|
|
|
|
|
|
ms_id = _find_mpu_port_index(oh);
|
|
|
|
if (!IS_ERR_VALUE(ms_id)) {
|
|
|
|
oh->_mpu_port_index = ms_id;
|
2010-07-27 06:34:33 +08:00
|
|
|
oh->_mpu_rt_va = _find_mpu_rt_base(oh, oh->_mpu_port_index);
|
2009-09-04 01:14:03 +08:00
|
|
|
} else {
|
|
|
|
oh->_int_flags |= _HWMOD_NO_MPU_PORT;
|
|
|
|
}
|
|
|
|
|
|
|
|
list_add_tail(&oh->node, &omap_hwmod_list);
|
|
|
|
|
OMAP2+: hwmod: upgrade per-hwmod mutex to a spinlock
Change the per-hwmod mutex to a spinlock. (The per-hwmod lock
serializes most post-initialization hwmod operations such as enable,
idle, and shutdown.) Spinlocks are needed, because in some cases,
hwmods must be enabled from timer interrupt disabled-context, such as
an ISR. The current use-case that is driving this is the OMAP GPIO
block ISR: it can trigger interrupts even with its clocks disabled,
but these clocks are needed for register accesses in the ISR to succeed.
This patch also effectively reverts commit
848240223c35fcc71c424ad51a8e8aef42d3879c - this patch makes
_omap_hwmod_enable() and _omap_hwmod_init() static, renames them back
to _enable() and _idle(), and changes their callers to call the
spinlocking versions. Previously, since omap_hwmod_{enable,init}()
attempted to take mutexes, these functions could not be called while
the timer interrupt was disabled; but now that the functions use
spinlocks and save and restore the IRQ state, it is appropriate to
call them directly.
Kevin Hilman <khilman@deeprootsystems.com> originally proposed this
patch - thanks Kevin.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Benoît Cousson <b-cousson@ti.com>
2010-12-15 03:42:35 +08:00
|
|
|
spin_lock_init(&oh->_lock);
|
2010-12-15 03:42:35 +08:00
|
|
|
|
2009-09-04 01:14:03 +08:00
|
|
|
oh->_state = _HWMOD_STATE_REGISTERED;
|
|
|
|
|
|
|
|
ret = 0;
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2010-12-22 12:31:27 +08:00
|
|
|
|
|
|
|
/* Public functions */
|
|
|
|
|
|
|
|
u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
|
|
|
|
{
|
|
|
|
if (oh->flags & HWMOD_16BIT_REG)
|
|
|
|
return __raw_readw(oh->_mpu_rt_va + reg_offs);
|
|
|
|
else
|
|
|
|
return __raw_readl(oh->_mpu_rt_va + reg_offs);
|
|
|
|
}
|
|
|
|
|
|
|
|
void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
|
|
|
|
{
|
|
|
|
if (oh->flags & HWMOD_16BIT_REG)
|
|
|
|
__raw_writew(v, oh->_mpu_rt_va + reg_offs);
|
|
|
|
else
|
|
|
|
__raw_writel(v, oh->_mpu_rt_va + reg_offs);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
|
|
|
|
* @oh: struct omap_hwmod *
|
|
|
|
* @idlemode: SIDLEMODE field bits (shifted to bit 0)
|
|
|
|
*
|
|
|
|
* Sets the IP block's OCP slave idlemode in hardware, and updates our
|
|
|
|
* local copy. Intended to be used by drivers that have some erratum
|
|
|
|
* that requires direct manipulation of the SIDLEMODE bits. Returns
|
|
|
|
* -EINVAL if @oh is null, or passes along the return value from
|
|
|
|
* _set_slave_idlemode().
|
|
|
|
*
|
|
|
|
* XXX Does this function have any current users? If not, we should
|
|
|
|
* remove it; it is better to let the rest of the hwmod code handle this.
|
|
|
|
* Any users of this function should be scrutinized carefully.
|
|
|
|
*/
|
|
|
|
int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
|
|
|
|
{
|
|
|
|
u32 v;
|
|
|
|
int retval = 0;
|
|
|
|
|
|
|
|
if (!oh)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
v = oh->_sysc_cache;
|
|
|
|
|
|
|
|
retval = _set_slave_idlemode(oh, idlemode, &v);
|
|
|
|
if (!retval)
|
|
|
|
_write_sysconfig(v, oh);
|
|
|
|
|
|
|
|
return retval;
|
|
|
|
}
|
|
|
|
|
2009-09-04 01:14:03 +08:00
|
|
|
/**
|
|
|
|
* omap_hwmod_lookup - look up a registered omap_hwmod by name
|
|
|
|
* @name: name of the omap_hwmod to look up
|
|
|
|
*
|
|
|
|
* Given a @name of an omap_hwmod, return a pointer to the registered
|
|
|
|
* struct omap_hwmod *, or NULL upon error.
|
|
|
|
*/
|
|
|
|
struct omap_hwmod *omap_hwmod_lookup(const char *name)
|
|
|
|
{
|
|
|
|
struct omap_hwmod *oh;
|
|
|
|
|
|
|
|
if (!name)
|
|
|
|
return NULL;
|
|
|
|
|
|
|
|
oh = _lookup(name);
|
|
|
|
|
|
|
|
return oh;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* omap_hwmod_for_each - call function for each registered omap_hwmod
|
|
|
|
* @fn: pointer to a callback function
|
2010-07-27 06:34:30 +08:00
|
|
|
* @data: void * data to pass to callback function
|
2009-09-04 01:14:03 +08:00
|
|
|
*
|
|
|
|
* Call @fn for each registered omap_hwmod, passing @data to each
|
|
|
|
* function. @fn must return 0 for success or any other value for
|
|
|
|
* failure. If @fn returns non-zero, the iteration across omap_hwmods
|
|
|
|
* will stop and the non-zero return value will be passed to the
|
|
|
|
* caller of omap_hwmod_for_each(). @fn is called with
|
|
|
|
* omap_hwmod_for_each() held.
|
|
|
|
*/
|
2010-07-27 06:34:30 +08:00
|
|
|
int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
|
|
|
|
void *data)
|
2009-09-04 01:14:03 +08:00
|
|
|
{
|
|
|
|
struct omap_hwmod *temp_oh;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
if (!fn)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
|
2010-07-27 06:34:30 +08:00
|
|
|
ret = (*fn)(temp_oh, data);
|
2009-09-04 01:14:03 +08:00
|
|
|
if (ret)
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/**
|
|
|
|
* omap_hwmod_init - init omap_hwmod code and register hwmods
|
|
|
|
* @ohs: pointer to an array of omap_hwmods to register
|
|
|
|
*
|
|
|
|
* Intended to be called early in boot before the clock framework is
|
|
|
|
* initialized. If @ohs is not null, will register all omap_hwmods
|
|
|
|
* listed in @ohs that are valid for this chip. Returns -EINVAL if
|
|
|
|
* omap_hwmod_init() has already been called or 0 otherwise.
|
|
|
|
*/
|
2010-12-22 12:31:28 +08:00
|
|
|
int __init omap_hwmod_init(struct omap_hwmod **ohs)
|
2009-09-04 01:14:03 +08:00
|
|
|
{
|
|
|
|
struct omap_hwmod *oh;
|
|
|
|
int r;
|
|
|
|
|
|
|
|
if (inited)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
inited = 1;
|
|
|
|
|
|
|
|
if (!ohs)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
oh = *ohs;
|
|
|
|
while (oh) {
|
|
|
|
if (omap_chip_is(oh->omap_chip)) {
|
2010-12-22 12:31:27 +08:00
|
|
|
r = _register(oh);
|
|
|
|
WARN(r, "omap_hwmod: %s: _register returned "
|
2009-09-04 01:14:03 +08:00
|
|
|
"%d\n", oh->name, r);
|
|
|
|
}
|
|
|
|
oh = *++ohs;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* omap_hwmod_late_init - do some post-clock framework initialization
|
|
|
|
*
|
|
|
|
* Must be called after omap2_clk_init(). Resolves the struct clk names
|
|
|
|
* to struct clk pointers for each registered omap_hwmod. Also calls
|
|
|
|
* _setup() on each hwmod. Returns 0.
|
|
|
|
*/
|
2010-12-15 03:42:35 +08:00
|
|
|
int omap_hwmod_late_init(void)
|
2009-09-04 01:14:03 +08:00
|
|
|
{
|
|
|
|
int r;
|
|
|
|
|
|
|
|
/* XXX check return value */
|
2010-07-27 06:34:30 +08:00
|
|
|
r = omap_hwmod_for_each(_init_clocks, NULL);
|
2009-09-04 01:14:03 +08:00
|
|
|
WARN(r, "omap_hwmod: omap_hwmod_late_init(): _init_clocks failed\n");
|
|
|
|
|
|
|
|
mpu_oh = omap_hwmod_lookup(MPU_INITIATOR_NAME);
|
|
|
|
WARN(!mpu_oh, "omap_hwmod: could not find MPU initiator hwmod %s\n",
|
|
|
|
MPU_INITIATOR_NAME);
|
|
|
|
|
2010-12-15 03:42:35 +08:00
|
|
|
omap_hwmod_for_each(_setup, NULL);
|
2009-09-04 01:14:03 +08:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* omap_hwmod_enable - enable an omap_hwmod
|
|
|
|
* @oh: struct omap_hwmod *
|
|
|
|
*
|
2010-09-22 05:02:23 +08:00
|
|
|
* Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
|
2009-09-04 01:14:03 +08:00
|
|
|
* Returns -EINVAL on error or passes along the return value from _enable().
|
|
|
|
*/
|
|
|
|
int omap_hwmod_enable(struct omap_hwmod *oh)
|
|
|
|
{
|
|
|
|
int r;
|
OMAP2+: hwmod: upgrade per-hwmod mutex to a spinlock
Change the per-hwmod mutex to a spinlock. (The per-hwmod lock
serializes most post-initialization hwmod operations such as enable,
idle, and shutdown.) Spinlocks are needed, because in some cases,
hwmods must be enabled from timer interrupt disabled-context, such as
an ISR. The current use-case that is driving this is the OMAP GPIO
block ISR: it can trigger interrupts even with its clocks disabled,
but these clocks are needed for register accesses in the ISR to succeed.
This patch also effectively reverts commit
848240223c35fcc71c424ad51a8e8aef42d3879c - this patch makes
_omap_hwmod_enable() and _omap_hwmod_init() static, renames them back
to _enable() and _idle(), and changes their callers to call the
spinlocking versions. Previously, since omap_hwmod_{enable,init}()
attempted to take mutexes, these functions could not be called while
the timer interrupt was disabled; but now that the functions use
spinlocks and save and restore the IRQ state, it is appropriate to
call them directly.
Kevin Hilman <khilman@deeprootsystems.com> originally proposed this
patch - thanks Kevin.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Benoît Cousson <b-cousson@ti.com>
2010-12-15 03:42:35 +08:00
|
|
|
unsigned long flags;
|
2009-09-04 01:14:03 +08:00
|
|
|
|
|
|
|
if (!oh)
|
|
|
|
return -EINVAL;
|
|
|
|
|
OMAP2+: hwmod: upgrade per-hwmod mutex to a spinlock
Change the per-hwmod mutex to a spinlock. (The per-hwmod lock
serializes most post-initialization hwmod operations such as enable,
idle, and shutdown.) Spinlocks are needed, because in some cases,
hwmods must be enabled from timer interrupt disabled-context, such as
an ISR. The current use-case that is driving this is the OMAP GPIO
block ISR: it can trigger interrupts even with its clocks disabled,
but these clocks are needed for register accesses in the ISR to succeed.
This patch also effectively reverts commit
848240223c35fcc71c424ad51a8e8aef42d3879c - this patch makes
_omap_hwmod_enable() and _omap_hwmod_init() static, renames them back
to _enable() and _idle(), and changes their callers to call the
spinlocking versions. Previously, since omap_hwmod_{enable,init}()
attempted to take mutexes, these functions could not be called while
the timer interrupt was disabled; but now that the functions use
spinlocks and save and restore the IRQ state, it is appropriate to
call them directly.
Kevin Hilman <khilman@deeprootsystems.com> originally proposed this
patch - thanks Kevin.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Benoît Cousson <b-cousson@ti.com>
2010-12-15 03:42:35 +08:00
|
|
|
spin_lock_irqsave(&oh->_lock, flags);
|
|
|
|
r = _enable(oh);
|
|
|
|
spin_unlock_irqrestore(&oh->_lock, flags);
|
2009-09-04 01:14:03 +08:00
|
|
|
|
|
|
|
return r;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* omap_hwmod_idle - idle an omap_hwmod
|
|
|
|
* @oh: struct omap_hwmod *
|
|
|
|
*
|
2010-09-22 05:02:23 +08:00
|
|
|
* Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
|
2009-09-04 01:14:03 +08:00
|
|
|
* Returns -EINVAL on error or passes along the return value from _idle().
|
|
|
|
*/
|
|
|
|
int omap_hwmod_idle(struct omap_hwmod *oh)
|
|
|
|
{
|
OMAP2+: hwmod: upgrade per-hwmod mutex to a spinlock
Change the per-hwmod mutex to a spinlock. (The per-hwmod lock
serializes most post-initialization hwmod operations such as enable,
idle, and shutdown.) Spinlocks are needed, because in some cases,
hwmods must be enabled from timer interrupt disabled-context, such as
an ISR. The current use-case that is driving this is the OMAP GPIO
block ISR: it can trigger interrupts even with its clocks disabled,
but these clocks are needed for register accesses in the ISR to succeed.
This patch also effectively reverts commit
848240223c35fcc71c424ad51a8e8aef42d3879c - this patch makes
_omap_hwmod_enable() and _omap_hwmod_init() static, renames them back
to _enable() and _idle(), and changes their callers to call the
spinlocking versions. Previously, since omap_hwmod_{enable,init}()
attempted to take mutexes, these functions could not be called while
the timer interrupt was disabled; but now that the functions use
spinlocks and save and restore the IRQ state, it is appropriate to
call them directly.
Kevin Hilman <khilman@deeprootsystems.com> originally proposed this
patch - thanks Kevin.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Benoît Cousson <b-cousson@ti.com>
2010-12-15 03:42:35 +08:00
|
|
|
unsigned long flags;
|
|
|
|
|
2009-09-04 01:14:03 +08:00
|
|
|
if (!oh)
|
|
|
|
return -EINVAL;
|
|
|
|
|
OMAP2+: hwmod: upgrade per-hwmod mutex to a spinlock
Change the per-hwmod mutex to a spinlock. (The per-hwmod lock
serializes most post-initialization hwmod operations such as enable,
idle, and shutdown.) Spinlocks are needed, because in some cases,
hwmods must be enabled from timer interrupt disabled-context, such as
an ISR. The current use-case that is driving this is the OMAP GPIO
block ISR: it can trigger interrupts even with its clocks disabled,
but these clocks are needed for register accesses in the ISR to succeed.
This patch also effectively reverts commit
848240223c35fcc71c424ad51a8e8aef42d3879c - this patch makes
_omap_hwmod_enable() and _omap_hwmod_init() static, renames them back
to _enable() and _idle(), and changes their callers to call the
spinlocking versions. Previously, since omap_hwmod_{enable,init}()
attempted to take mutexes, these functions could not be called while
the timer interrupt was disabled; but now that the functions use
spinlocks and save and restore the IRQ state, it is appropriate to
call them directly.
Kevin Hilman <khilman@deeprootsystems.com> originally proposed this
patch - thanks Kevin.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Benoît Cousson <b-cousson@ti.com>
2010-12-15 03:42:35 +08:00
|
|
|
spin_lock_irqsave(&oh->_lock, flags);
|
|
|
|
_idle(oh);
|
|
|
|
spin_unlock_irqrestore(&oh->_lock, flags);
|
2009-09-04 01:14:03 +08:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* omap_hwmod_shutdown - shutdown an omap_hwmod
|
|
|
|
* @oh: struct omap_hwmod *
|
|
|
|
*
|
2010-09-22 05:02:23 +08:00
|
|
|
* Shutdown an omap_hwmod @oh. Intended to be called by
|
2009-09-04 01:14:03 +08:00
|
|
|
* omap_device_shutdown(). Returns -EINVAL on error or passes along
|
|
|
|
* the return value from _shutdown().
|
|
|
|
*/
|
|
|
|
int omap_hwmod_shutdown(struct omap_hwmod *oh)
|
|
|
|
{
|
OMAP2+: hwmod: upgrade per-hwmod mutex to a spinlock
Change the per-hwmod mutex to a spinlock. (The per-hwmod lock
serializes most post-initialization hwmod operations such as enable,
idle, and shutdown.) Spinlocks are needed, because in some cases,
hwmods must be enabled from timer interrupt disabled-context, such as
an ISR. The current use-case that is driving this is the OMAP GPIO
block ISR: it can trigger interrupts even with its clocks disabled,
but these clocks are needed for register accesses in the ISR to succeed.
This patch also effectively reverts commit
848240223c35fcc71c424ad51a8e8aef42d3879c - this patch makes
_omap_hwmod_enable() and _omap_hwmod_init() static, renames them back
to _enable() and _idle(), and changes their callers to call the
spinlocking versions. Previously, since omap_hwmod_{enable,init}()
attempted to take mutexes, these functions could not be called while
the timer interrupt was disabled; but now that the functions use
spinlocks and save and restore the IRQ state, it is appropriate to
call them directly.
Kevin Hilman <khilman@deeprootsystems.com> originally proposed this
patch - thanks Kevin.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Benoît Cousson <b-cousson@ti.com>
2010-12-15 03:42:35 +08:00
|
|
|
unsigned long flags;
|
|
|
|
|
2009-09-04 01:14:03 +08:00
|
|
|
if (!oh)
|
|
|
|
return -EINVAL;
|
|
|
|
|
OMAP2+: hwmod: upgrade per-hwmod mutex to a spinlock
Change the per-hwmod mutex to a spinlock. (The per-hwmod lock
serializes most post-initialization hwmod operations such as enable,
idle, and shutdown.) Spinlocks are needed, because in some cases,
hwmods must be enabled from timer interrupt disabled-context, such as
an ISR. The current use-case that is driving this is the OMAP GPIO
block ISR: it can trigger interrupts even with its clocks disabled,
but these clocks are needed for register accesses in the ISR to succeed.
This patch also effectively reverts commit
848240223c35fcc71c424ad51a8e8aef42d3879c - this patch makes
_omap_hwmod_enable() and _omap_hwmod_init() static, renames them back
to _enable() and _idle(), and changes their callers to call the
spinlocking versions. Previously, since omap_hwmod_{enable,init}()
attempted to take mutexes, these functions could not be called while
the timer interrupt was disabled; but now that the functions use
spinlocks and save and restore the IRQ state, it is appropriate to
call them directly.
Kevin Hilman <khilman@deeprootsystems.com> originally proposed this
patch - thanks Kevin.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Benoît Cousson <b-cousson@ti.com>
2010-12-15 03:42:35 +08:00
|
|
|
spin_lock_irqsave(&oh->_lock, flags);
|
2009-09-04 01:14:03 +08:00
|
|
|
_shutdown(oh);
|
OMAP2+: hwmod: upgrade per-hwmod mutex to a spinlock
Change the per-hwmod mutex to a spinlock. (The per-hwmod lock
serializes most post-initialization hwmod operations such as enable,
idle, and shutdown.) Spinlocks are needed, because in some cases,
hwmods must be enabled from timer interrupt disabled-context, such as
an ISR. The current use-case that is driving this is the OMAP GPIO
block ISR: it can trigger interrupts even with its clocks disabled,
but these clocks are needed for register accesses in the ISR to succeed.
This patch also effectively reverts commit
848240223c35fcc71c424ad51a8e8aef42d3879c - this patch makes
_omap_hwmod_enable() and _omap_hwmod_init() static, renames them back
to _enable() and _idle(), and changes their callers to call the
spinlocking versions. Previously, since omap_hwmod_{enable,init}()
attempted to take mutexes, these functions could not be called while
the timer interrupt was disabled; but now that the functions use
spinlocks and save and restore the IRQ state, it is appropriate to
call them directly.
Kevin Hilman <khilman@deeprootsystems.com> originally proposed this
patch - thanks Kevin.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Benoît Cousson <b-cousson@ti.com>
2010-12-15 03:42:35 +08:00
|
|
|
spin_unlock_irqrestore(&oh->_lock, flags);
|
2009-09-04 01:14:03 +08:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* omap_hwmod_enable_clocks - enable main_clk, all interface clocks
|
|
|
|
* @oh: struct omap_hwmod *oh
|
|
|
|
*
|
|
|
|
* Intended to be called by the omap_device code.
|
|
|
|
*/
|
|
|
|
int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
|
|
|
|
{
|
OMAP2+: hwmod: upgrade per-hwmod mutex to a spinlock
Change the per-hwmod mutex to a spinlock. (The per-hwmod lock
serializes most post-initialization hwmod operations such as enable,
idle, and shutdown.) Spinlocks are needed, because in some cases,
hwmods must be enabled from timer interrupt disabled-context, such as
an ISR. The current use-case that is driving this is the OMAP GPIO
block ISR: it can trigger interrupts even with its clocks disabled,
but these clocks are needed for register accesses in the ISR to succeed.
This patch also effectively reverts commit
848240223c35fcc71c424ad51a8e8aef42d3879c - this patch makes
_omap_hwmod_enable() and _omap_hwmod_init() static, renames them back
to _enable() and _idle(), and changes their callers to call the
spinlocking versions. Previously, since omap_hwmod_{enable,init}()
attempted to take mutexes, these functions could not be called while
the timer interrupt was disabled; but now that the functions use
spinlocks and save and restore the IRQ state, it is appropriate to
call them directly.
Kevin Hilman <khilman@deeprootsystems.com> originally proposed this
patch - thanks Kevin.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Benoît Cousson <b-cousson@ti.com>
2010-12-15 03:42:35 +08:00
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
spin_lock_irqsave(&oh->_lock, flags);
|
2009-09-04 01:14:03 +08:00
|
|
|
_enable_clocks(oh);
|
OMAP2+: hwmod: upgrade per-hwmod mutex to a spinlock
Change the per-hwmod mutex to a spinlock. (The per-hwmod lock
serializes most post-initialization hwmod operations such as enable,
idle, and shutdown.) Spinlocks are needed, because in some cases,
hwmods must be enabled from timer interrupt disabled-context, such as
an ISR. The current use-case that is driving this is the OMAP GPIO
block ISR: it can trigger interrupts even with its clocks disabled,
but these clocks are needed for register accesses in the ISR to succeed.
This patch also effectively reverts commit
848240223c35fcc71c424ad51a8e8aef42d3879c - this patch makes
_omap_hwmod_enable() and _omap_hwmod_init() static, renames them back
to _enable() and _idle(), and changes their callers to call the
spinlocking versions. Previously, since omap_hwmod_{enable,init}()
attempted to take mutexes, these functions could not be called while
the timer interrupt was disabled; but now that the functions use
spinlocks and save and restore the IRQ state, it is appropriate to
call them directly.
Kevin Hilman <khilman@deeprootsystems.com> originally proposed this
patch - thanks Kevin.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Benoît Cousson <b-cousson@ti.com>
2010-12-15 03:42:35 +08:00
|
|
|
spin_unlock_irqrestore(&oh->_lock, flags);
|
2009-09-04 01:14:03 +08:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* omap_hwmod_disable_clocks - disable main_clk, all interface clocks
|
|
|
|
* @oh: struct omap_hwmod *oh
|
|
|
|
*
|
|
|
|
* Intended to be called by the omap_device code.
|
|
|
|
*/
|
|
|
|
int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
|
|
|
|
{
|
OMAP2+: hwmod: upgrade per-hwmod mutex to a spinlock
Change the per-hwmod mutex to a spinlock. (The per-hwmod lock
serializes most post-initialization hwmod operations such as enable,
idle, and shutdown.) Spinlocks are needed, because in some cases,
hwmods must be enabled from timer interrupt disabled-context, such as
an ISR. The current use-case that is driving this is the OMAP GPIO
block ISR: it can trigger interrupts even with its clocks disabled,
but these clocks are needed for register accesses in the ISR to succeed.
This patch also effectively reverts commit
848240223c35fcc71c424ad51a8e8aef42d3879c - this patch makes
_omap_hwmod_enable() and _omap_hwmod_init() static, renames them back
to _enable() and _idle(), and changes their callers to call the
spinlocking versions. Previously, since omap_hwmod_{enable,init}()
attempted to take mutexes, these functions could not be called while
the timer interrupt was disabled; but now that the functions use
spinlocks and save and restore the IRQ state, it is appropriate to
call them directly.
Kevin Hilman <khilman@deeprootsystems.com> originally proposed this
patch - thanks Kevin.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Benoît Cousson <b-cousson@ti.com>
2010-12-15 03:42:35 +08:00
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
spin_lock_irqsave(&oh->_lock, flags);
|
2009-09-04 01:14:03 +08:00
|
|
|
_disable_clocks(oh);
|
OMAP2+: hwmod: upgrade per-hwmod mutex to a spinlock
Change the per-hwmod mutex to a spinlock. (The per-hwmod lock
serializes most post-initialization hwmod operations such as enable,
idle, and shutdown.) Spinlocks are needed, because in some cases,
hwmods must be enabled from timer interrupt disabled-context, such as
an ISR. The current use-case that is driving this is the OMAP GPIO
block ISR: it can trigger interrupts even with its clocks disabled,
but these clocks are needed for register accesses in the ISR to succeed.
This patch also effectively reverts commit
848240223c35fcc71c424ad51a8e8aef42d3879c - this patch makes
_omap_hwmod_enable() and _omap_hwmod_init() static, renames them back
to _enable() and _idle(), and changes their callers to call the
spinlocking versions. Previously, since omap_hwmod_{enable,init}()
attempted to take mutexes, these functions could not be called while
the timer interrupt was disabled; but now that the functions use
spinlocks and save and restore the IRQ state, it is appropriate to
call them directly.
Kevin Hilman <khilman@deeprootsystems.com> originally proposed this
patch - thanks Kevin.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Benoît Cousson <b-cousson@ti.com>
2010-12-15 03:42:35 +08:00
|
|
|
spin_unlock_irqrestore(&oh->_lock, flags);
|
2009-09-04 01:14:03 +08:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
|
|
|
|
* @oh: struct omap_hwmod *oh
|
|
|
|
*
|
|
|
|
* Intended to be called by drivers and core code when all posted
|
|
|
|
* writes to a device must complete before continuing further
|
|
|
|
* execution (for example, after clearing some device IRQSTATUS
|
|
|
|
* register bits)
|
|
|
|
*
|
|
|
|
* XXX what about targets with multiple OCP threads?
|
|
|
|
*/
|
|
|
|
void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
|
|
|
|
{
|
|
|
|
BUG_ON(!oh);
|
|
|
|
|
2010-02-23 13:09:34 +08:00
|
|
|
if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
|
2009-09-04 01:14:03 +08:00
|
|
|
WARN(1, "omap_device: %s: OCP barrier impossible due to "
|
|
|
|
"device configuration\n", oh->name);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Forces posted writes to complete on the OCP thread handling
|
|
|
|
* register writes
|
|
|
|
*/
|
2010-10-09 01:23:22 +08:00
|
|
|
omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
|
2009-09-04 01:14:03 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* omap_hwmod_reset - reset the hwmod
|
|
|
|
* @oh: struct omap_hwmod *
|
|
|
|
*
|
|
|
|
* Under some conditions, a driver may wish to reset the entire device.
|
|
|
|
* Called from omap_device code. Returns -EINVAL on error or passes along
|
2010-09-22 00:34:09 +08:00
|
|
|
* the return value from _reset().
|
2009-09-04 01:14:03 +08:00
|
|
|
*/
|
|
|
|
int omap_hwmod_reset(struct omap_hwmod *oh)
|
|
|
|
{
|
|
|
|
int r;
|
OMAP2+: hwmod: upgrade per-hwmod mutex to a spinlock
Change the per-hwmod mutex to a spinlock. (The per-hwmod lock
serializes most post-initialization hwmod operations such as enable,
idle, and shutdown.) Spinlocks are needed, because in some cases,
hwmods must be enabled from timer interrupt disabled-context, such as
an ISR. The current use-case that is driving this is the OMAP GPIO
block ISR: it can trigger interrupts even with its clocks disabled,
but these clocks are needed for register accesses in the ISR to succeed.
This patch also effectively reverts commit
848240223c35fcc71c424ad51a8e8aef42d3879c - this patch makes
_omap_hwmod_enable() and _omap_hwmod_init() static, renames them back
to _enable() and _idle(), and changes their callers to call the
spinlocking versions. Previously, since omap_hwmod_{enable,init}()
attempted to take mutexes, these functions could not be called while
the timer interrupt was disabled; but now that the functions use
spinlocks and save and restore the IRQ state, it is appropriate to
call them directly.
Kevin Hilman <khilman@deeprootsystems.com> originally proposed this
patch - thanks Kevin.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Benoît Cousson <b-cousson@ti.com>
2010-12-15 03:42:35 +08:00
|
|
|
unsigned long flags;
|
2009-09-04 01:14:03 +08:00
|
|
|
|
2010-09-22 00:34:09 +08:00
|
|
|
if (!oh)
|
2009-09-04 01:14:03 +08:00
|
|
|
return -EINVAL;
|
|
|
|
|
OMAP2+: hwmod: upgrade per-hwmod mutex to a spinlock
Change the per-hwmod mutex to a spinlock. (The per-hwmod lock
serializes most post-initialization hwmod operations such as enable,
idle, and shutdown.) Spinlocks are needed, because in some cases,
hwmods must be enabled from timer interrupt disabled-context, such as
an ISR. The current use-case that is driving this is the OMAP GPIO
block ISR: it can trigger interrupts even with its clocks disabled,
but these clocks are needed for register accesses in the ISR to succeed.
This patch also effectively reverts commit
848240223c35fcc71c424ad51a8e8aef42d3879c - this patch makes
_omap_hwmod_enable() and _omap_hwmod_init() static, renames them back
to _enable() and _idle(), and changes their callers to call the
spinlocking versions. Previously, since omap_hwmod_{enable,init}()
attempted to take mutexes, these functions could not be called while
the timer interrupt was disabled; but now that the functions use
spinlocks and save and restore the IRQ state, it is appropriate to
call them directly.
Kevin Hilman <khilman@deeprootsystems.com> originally proposed this
patch - thanks Kevin.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Benoît Cousson <b-cousson@ti.com>
2010-12-15 03:42:35 +08:00
|
|
|
spin_lock_irqsave(&oh->_lock, flags);
|
2009-09-04 01:14:03 +08:00
|
|
|
r = _reset(oh);
|
OMAP2+: hwmod: upgrade per-hwmod mutex to a spinlock
Change the per-hwmod mutex to a spinlock. (The per-hwmod lock
serializes most post-initialization hwmod operations such as enable,
idle, and shutdown.) Spinlocks are needed, because in some cases,
hwmods must be enabled from timer interrupt disabled-context, such as
an ISR. The current use-case that is driving this is the OMAP GPIO
block ISR: it can trigger interrupts even with its clocks disabled,
but these clocks are needed for register accesses in the ISR to succeed.
This patch also effectively reverts commit
848240223c35fcc71c424ad51a8e8aef42d3879c - this patch makes
_omap_hwmod_enable() and _omap_hwmod_init() static, renames them back
to _enable() and _idle(), and changes their callers to call the
spinlocking versions. Previously, since omap_hwmod_{enable,init}()
attempted to take mutexes, these functions could not be called while
the timer interrupt was disabled; but now that the functions use
spinlocks and save and restore the IRQ state, it is appropriate to
call them directly.
Kevin Hilman <khilman@deeprootsystems.com> originally proposed this
patch - thanks Kevin.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Benoît Cousson <b-cousson@ti.com>
2010-12-15 03:42:35 +08:00
|
|
|
spin_unlock_irqrestore(&oh->_lock, flags);
|
2009-09-04 01:14:03 +08:00
|
|
|
|
|
|
|
return r;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* omap_hwmod_count_resources - count number of struct resources needed by hwmod
|
|
|
|
* @oh: struct omap_hwmod *
|
|
|
|
* @res: pointer to the first element of an array of struct resource to fill
|
|
|
|
*
|
|
|
|
* Count the number of struct resource array elements necessary to
|
|
|
|
* contain omap_hwmod @oh resources. Intended to be called by code
|
|
|
|
* that registers omap_devices. Intended to be used to determine the
|
|
|
|
* size of a dynamically-allocated struct resource array, before
|
|
|
|
* calling omap_hwmod_fill_resources(). Returns the number of struct
|
|
|
|
* resource array elements needed.
|
|
|
|
*
|
|
|
|
* XXX This code is not optimized. It could attempt to merge adjacent
|
|
|
|
* resource IDs.
|
|
|
|
*
|
|
|
|
*/
|
|
|
|
int omap_hwmod_count_resources(struct omap_hwmod *oh)
|
|
|
|
{
|
|
|
|
int ret, i;
|
|
|
|
|
2010-09-22 00:34:08 +08:00
|
|
|
ret = oh->mpu_irqs_cnt + oh->sdma_reqs_cnt;
|
2009-09-04 01:14:03 +08:00
|
|
|
|
|
|
|
for (i = 0; i < oh->slaves_cnt; i++)
|
2010-05-21 02:31:09 +08:00
|
|
|
ret += oh->slaves[i]->addr_cnt;
|
2009-09-04 01:14:03 +08:00
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* omap_hwmod_fill_resources - fill struct resource array with hwmod data
|
|
|
|
* @oh: struct omap_hwmod *
|
|
|
|
* @res: pointer to the first element of an array of struct resource to fill
|
|
|
|
*
|
|
|
|
* Fill the struct resource array @res with resource data from the
|
|
|
|
* omap_hwmod @oh. Intended to be called by code that registers
|
|
|
|
* omap_devices. See also omap_hwmod_count_resources(). Returns the
|
|
|
|
* number of array elements filled.
|
|
|
|
*/
|
|
|
|
int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
|
|
|
|
{
|
|
|
|
int i, j;
|
|
|
|
int r = 0;
|
|
|
|
|
|
|
|
/* For each IRQ, DMA, memory area, fill in array.*/
|
|
|
|
|
|
|
|
for (i = 0; i < oh->mpu_irqs_cnt; i++) {
|
2009-12-09 07:34:16 +08:00
|
|
|
(res + r)->name = (oh->mpu_irqs + i)->name;
|
|
|
|
(res + r)->start = (oh->mpu_irqs + i)->irq;
|
|
|
|
(res + r)->end = (oh->mpu_irqs + i)->irq;
|
2009-09-04 01:14:03 +08:00
|
|
|
(res + r)->flags = IORESOURCE_IRQ;
|
|
|
|
r++;
|
|
|
|
}
|
|
|
|
|
2010-09-22 00:34:08 +08:00
|
|
|
for (i = 0; i < oh->sdma_reqs_cnt; i++) {
|
|
|
|
(res + r)->name = (oh->sdma_reqs + i)->name;
|
|
|
|
(res + r)->start = (oh->sdma_reqs + i)->dma_req;
|
|
|
|
(res + r)->end = (oh->sdma_reqs + i)->dma_req;
|
2009-09-04 01:14:03 +08:00
|
|
|
(res + r)->flags = IORESOURCE_DMA;
|
|
|
|
r++;
|
|
|
|
}
|
|
|
|
|
|
|
|
for (i = 0; i < oh->slaves_cnt; i++) {
|
|
|
|
struct omap_hwmod_ocp_if *os;
|
|
|
|
|
2010-05-21 02:31:09 +08:00
|
|
|
os = oh->slaves[i];
|
2009-09-04 01:14:03 +08:00
|
|
|
|
|
|
|
for (j = 0; j < os->addr_cnt; j++) {
|
|
|
|
(res + r)->start = (os->addr + j)->pa_start;
|
|
|
|
(res + r)->end = (os->addr + j)->pa_end;
|
|
|
|
(res + r)->flags = IORESOURCE_MEM;
|
|
|
|
r++;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return r;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
|
|
|
|
* @oh: struct omap_hwmod *
|
|
|
|
*
|
|
|
|
* Return the powerdomain pointer associated with the OMAP module
|
|
|
|
* @oh's main clock. If @oh does not have a main clk, return the
|
|
|
|
* powerdomain associated with the interface clock associated with the
|
|
|
|
* module's MPU port. (XXX Perhaps this should use the SDMA port
|
|
|
|
* instead?) Returns NULL on error, or a struct powerdomain * on
|
|
|
|
* success.
|
|
|
|
*/
|
|
|
|
struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
|
|
|
|
{
|
|
|
|
struct clk *c;
|
|
|
|
|
|
|
|
if (!oh)
|
|
|
|
return NULL;
|
|
|
|
|
|
|
|
if (oh->_clk) {
|
|
|
|
c = oh->_clk;
|
|
|
|
} else {
|
|
|
|
if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
|
|
|
|
return NULL;
|
|
|
|
c = oh->slaves[oh->_mpu_port_index]->_clk;
|
|
|
|
}
|
|
|
|
|
2010-03-31 18:16:29 +08:00
|
|
|
if (!c->clkdm)
|
|
|
|
return NULL;
|
|
|
|
|
2009-09-04 01:14:03 +08:00
|
|
|
return c->clkdm->pwrdm.ptr;
|
|
|
|
|
|
|
|
}
|
|
|
|
|
2010-07-27 06:34:33 +08:00
|
|
|
/**
|
|
|
|
* omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
|
|
|
|
* @oh: struct omap_hwmod *
|
|
|
|
*
|
|
|
|
* Returns the virtual address corresponding to the beginning of the
|
|
|
|
* module's register target, in the address range that is intended to
|
|
|
|
* be used by the MPU. Returns the virtual address upon success or NULL
|
|
|
|
* upon error.
|
|
|
|
*/
|
|
|
|
void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
|
|
|
|
{
|
|
|
|
if (!oh)
|
|
|
|
return NULL;
|
|
|
|
|
|
|
|
if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
|
|
|
|
return NULL;
|
|
|
|
|
|
|
|
if (oh->_state == _HWMOD_STATE_UNKNOWN)
|
|
|
|
return NULL;
|
|
|
|
|
|
|
|
return oh->_mpu_rt_va;
|
|
|
|
}
|
|
|
|
|
2009-09-04 01:14:03 +08:00
|
|
|
/**
|
|
|
|
* omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
|
|
|
|
* @oh: struct omap_hwmod *
|
|
|
|
* @init_oh: struct omap_hwmod * (initiator)
|
|
|
|
*
|
|
|
|
* Add a sleep dependency between the initiator @init_oh and @oh.
|
|
|
|
* Intended to be called by DSP/Bridge code via platform_data for the
|
|
|
|
* DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
|
|
|
|
* code needs to add/del initiator dependencies dynamically
|
|
|
|
* before/after accessing a device. Returns the return value from
|
|
|
|
* _add_initiator_dep().
|
|
|
|
*
|
|
|
|
* XXX Keep a usecount in the clockdomain code
|
|
|
|
*/
|
|
|
|
int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
|
|
|
|
struct omap_hwmod *init_oh)
|
|
|
|
{
|
|
|
|
return _add_initiator_dep(oh, init_oh);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* XXX what about functions for drivers to save/restore ocp_sysconfig
|
|
|
|
* for context save/restore operations?
|
|
|
|
*/
|
|
|
|
|
|
|
|
/**
|
|
|
|
* omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
|
|
|
|
* @oh: struct omap_hwmod *
|
|
|
|
* @init_oh: struct omap_hwmod * (initiator)
|
|
|
|
*
|
|
|
|
* Remove a sleep dependency between the initiator @init_oh and @oh.
|
|
|
|
* Intended to be called by DSP/Bridge code via platform_data for the
|
|
|
|
* DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
|
|
|
|
* code needs to add/del initiator dependencies dynamically
|
|
|
|
* before/after accessing a device. Returns the return value from
|
|
|
|
* _del_initiator_dep().
|
|
|
|
*
|
|
|
|
* XXX Keep a usecount in the clockdomain code
|
|
|
|
*/
|
|
|
|
int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
|
|
|
|
struct omap_hwmod *init_oh)
|
|
|
|
{
|
|
|
|
return _del_initiator_dep(oh, init_oh);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* omap_hwmod_enable_wakeup - allow device to wake up the system
|
|
|
|
* @oh: struct omap_hwmod *
|
|
|
|
*
|
|
|
|
* Sets the module OCP socket ENAWAKEUP bit to allow the module to
|
|
|
|
* send wakeups to the PRCM. Eventually this should sets PRCM wakeup
|
|
|
|
* registers to cause the PRCM to receive wakeup events from the
|
|
|
|
* module. Does not set any wakeup routing registers beyond this
|
|
|
|
* point - if the module is to wake up any other module or subsystem,
|
|
|
|
* that must be set separately. Called by omap_device code. Returns
|
|
|
|
* -EINVAL on error or 0 upon success.
|
|
|
|
*/
|
|
|
|
int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
|
|
|
|
{
|
OMAP2+: hwmod: upgrade per-hwmod mutex to a spinlock
Change the per-hwmod mutex to a spinlock. (The per-hwmod lock
serializes most post-initialization hwmod operations such as enable,
idle, and shutdown.) Spinlocks are needed, because in some cases,
hwmods must be enabled from timer interrupt disabled-context, such as
an ISR. The current use-case that is driving this is the OMAP GPIO
block ISR: it can trigger interrupts even with its clocks disabled,
but these clocks are needed for register accesses in the ISR to succeed.
This patch also effectively reverts commit
848240223c35fcc71c424ad51a8e8aef42d3879c - this patch makes
_omap_hwmod_enable() and _omap_hwmod_init() static, renames them back
to _enable() and _idle(), and changes their callers to call the
spinlocking versions. Previously, since omap_hwmod_{enable,init}()
attempted to take mutexes, these functions could not be called while
the timer interrupt was disabled; but now that the functions use
spinlocks and save and restore the IRQ state, it is appropriate to
call them directly.
Kevin Hilman <khilman@deeprootsystems.com> originally proposed this
patch - thanks Kevin.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Benoît Cousson <b-cousson@ti.com>
2010-12-15 03:42:35 +08:00
|
|
|
unsigned long flags;
|
OMAP2+: omap_hwmod: fix wakeup enable/disable for consistency
In the omap_hwmod core, most of the SYSCONFIG register helper
functions do not directly write the register, but instead just modify
a value passed in.
This patch converts the _enable_wakeup() and _disable_wakeup() helper
functions to take a value argument and only modify it instead of
actually writing the register. This makes the wakeup helpers
consistent with the other helper functions and avoids unintentional
problems like the following.
This problem was found after discovering that GPIO wakeups were no
longer functional. The root cause was that the ENAWAKEUP bit of the
SYSCONFIG register was being unintentionaly overwritten, leaving
wakeups disabled after the following two commits were combined:
commit: 9980ce53c97392a3dbdc9d1ac3e455d79b4167ed
OMAP: hwmod: Enable module wakeup if in smartidle
commit: 78f26e872f77b6312273216de1a8f836c6f2e143
OMAP: hwmod: Set autoidle after smartidle during _sysc_enable
There resulting in code in _enable_sysc() was this:
/*
* XXX The clock framework should handle this, by
* calling into this code. But this must wait until the
* clock structures are tagged with omap_hwmod entries
*/
if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
(sf & SYSC_HAS_CLOCKACTIVITY))
_set_clockactivity(oh, oh->class->sysc->clockact, &v);
_write_sysconfig(v, oh);
so here, 'v' has wakeups disabled.
/* If slave is in SMARTIDLE, also enable wakeup */
if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
_enable_wakeup(oh);
Here wakeup is enabled in the SYSCONFIG register (but 'v' is not updated)
/*
* Set the autoidle bit only after setting the smartidle bit
* Setting this will not have any impact on the other modules.
*/
if (sf & SYSC_HAS_AUTOIDLE) {
idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
0 : 1;
_set_module_autoidle(oh, idlemode, &v);
_write_sysconfig(v, oh);
}
And here, SYSCONFIG is updated again using 'v', which does not have
wakeups enabled, resulting in ENAWAKEUP being cleared.
Special thanks to Benoit Cousson for pointing out that wakeups were
supposed to be automatically enabled when a hwmod is enabled, and thus
helping target the root cause of this problem.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-12-22 12:08:34 +08:00
|
|
|
u32 v;
|
OMAP2+: hwmod: upgrade per-hwmod mutex to a spinlock
Change the per-hwmod mutex to a spinlock. (The per-hwmod lock
serializes most post-initialization hwmod operations such as enable,
idle, and shutdown.) Spinlocks are needed, because in some cases,
hwmods must be enabled from timer interrupt disabled-context, such as
an ISR. The current use-case that is driving this is the OMAP GPIO
block ISR: it can trigger interrupts even with its clocks disabled,
but these clocks are needed for register accesses in the ISR to succeed.
This patch also effectively reverts commit
848240223c35fcc71c424ad51a8e8aef42d3879c - this patch makes
_omap_hwmod_enable() and _omap_hwmod_init() static, renames them back
to _enable() and _idle(), and changes their callers to call the
spinlocking versions. Previously, since omap_hwmod_{enable,init}()
attempted to take mutexes, these functions could not be called while
the timer interrupt was disabled; but now that the functions use
spinlocks and save and restore the IRQ state, it is appropriate to
call them directly.
Kevin Hilman <khilman@deeprootsystems.com> originally proposed this
patch - thanks Kevin.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Benoît Cousson <b-cousson@ti.com>
2010-12-15 03:42:35 +08:00
|
|
|
|
2010-02-23 13:09:34 +08:00
|
|
|
if (!oh->class->sysc ||
|
|
|
|
!(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
|
2009-09-04 01:14:03 +08:00
|
|
|
return -EINVAL;
|
|
|
|
|
OMAP2+: hwmod: upgrade per-hwmod mutex to a spinlock
Change the per-hwmod mutex to a spinlock. (The per-hwmod lock
serializes most post-initialization hwmod operations such as enable,
idle, and shutdown.) Spinlocks are needed, because in some cases,
hwmods must be enabled from timer interrupt disabled-context, such as
an ISR. The current use-case that is driving this is the OMAP GPIO
block ISR: it can trigger interrupts even with its clocks disabled,
but these clocks are needed for register accesses in the ISR to succeed.
This patch also effectively reverts commit
848240223c35fcc71c424ad51a8e8aef42d3879c - this patch makes
_omap_hwmod_enable() and _omap_hwmod_init() static, renames them back
to _enable() and _idle(), and changes their callers to call the
spinlocking versions. Previously, since omap_hwmod_{enable,init}()
attempted to take mutexes, these functions could not be called while
the timer interrupt was disabled; but now that the functions use
spinlocks and save and restore the IRQ state, it is appropriate to
call them directly.
Kevin Hilman <khilman@deeprootsystems.com> originally proposed this
patch - thanks Kevin.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Benoît Cousson <b-cousson@ti.com>
2010-12-15 03:42:35 +08:00
|
|
|
spin_lock_irqsave(&oh->_lock, flags);
|
OMAP2+: omap_hwmod: fix wakeup enable/disable for consistency
In the omap_hwmod core, most of the SYSCONFIG register helper
functions do not directly write the register, but instead just modify
a value passed in.
This patch converts the _enable_wakeup() and _disable_wakeup() helper
functions to take a value argument and only modify it instead of
actually writing the register. This makes the wakeup helpers
consistent with the other helper functions and avoids unintentional
problems like the following.
This problem was found after discovering that GPIO wakeups were no
longer functional. The root cause was that the ENAWAKEUP bit of the
SYSCONFIG register was being unintentionaly overwritten, leaving
wakeups disabled after the following two commits were combined:
commit: 9980ce53c97392a3dbdc9d1ac3e455d79b4167ed
OMAP: hwmod: Enable module wakeup if in smartidle
commit: 78f26e872f77b6312273216de1a8f836c6f2e143
OMAP: hwmod: Set autoidle after smartidle during _sysc_enable
There resulting in code in _enable_sysc() was this:
/*
* XXX The clock framework should handle this, by
* calling into this code. But this must wait until the
* clock structures are tagged with omap_hwmod entries
*/
if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
(sf & SYSC_HAS_CLOCKACTIVITY))
_set_clockactivity(oh, oh->class->sysc->clockact, &v);
_write_sysconfig(v, oh);
so here, 'v' has wakeups disabled.
/* If slave is in SMARTIDLE, also enable wakeup */
if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
_enable_wakeup(oh);
Here wakeup is enabled in the SYSCONFIG register (but 'v' is not updated)
/*
* Set the autoidle bit only after setting the smartidle bit
* Setting this will not have any impact on the other modules.
*/
if (sf & SYSC_HAS_AUTOIDLE) {
idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
0 : 1;
_set_module_autoidle(oh, idlemode, &v);
_write_sysconfig(v, oh);
}
And here, SYSCONFIG is updated again using 'v', which does not have
wakeups enabled, resulting in ENAWAKEUP being cleared.
Special thanks to Benoit Cousson for pointing out that wakeups were
supposed to be automatically enabled when a hwmod is enabled, and thus
helping target the root cause of this problem.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-12-22 12:08:34 +08:00
|
|
|
v = oh->_sysc_cache;
|
|
|
|
_enable_wakeup(oh, &v);
|
|
|
|
_write_sysconfig(v, oh);
|
OMAP2+: hwmod: upgrade per-hwmod mutex to a spinlock
Change the per-hwmod mutex to a spinlock. (The per-hwmod lock
serializes most post-initialization hwmod operations such as enable,
idle, and shutdown.) Spinlocks are needed, because in some cases,
hwmods must be enabled from timer interrupt disabled-context, such as
an ISR. The current use-case that is driving this is the OMAP GPIO
block ISR: it can trigger interrupts even with its clocks disabled,
but these clocks are needed for register accesses in the ISR to succeed.
This patch also effectively reverts commit
848240223c35fcc71c424ad51a8e8aef42d3879c - this patch makes
_omap_hwmod_enable() and _omap_hwmod_init() static, renames them back
to _enable() and _idle(), and changes their callers to call the
spinlocking versions. Previously, since omap_hwmod_{enable,init}()
attempted to take mutexes, these functions could not be called while
the timer interrupt was disabled; but now that the functions use
spinlocks and save and restore the IRQ state, it is appropriate to
call them directly.
Kevin Hilman <khilman@deeprootsystems.com> originally proposed this
patch - thanks Kevin.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Benoît Cousson <b-cousson@ti.com>
2010-12-15 03:42:35 +08:00
|
|
|
spin_unlock_irqrestore(&oh->_lock, flags);
|
2009-09-04 01:14:03 +08:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* omap_hwmod_disable_wakeup - prevent device from waking the system
|
|
|
|
* @oh: struct omap_hwmod *
|
|
|
|
*
|
|
|
|
* Clears the module OCP socket ENAWAKEUP bit to prevent the module
|
|
|
|
* from sending wakeups to the PRCM. Eventually this should clear
|
|
|
|
* PRCM wakeup registers to cause the PRCM to ignore wakeup events
|
|
|
|
* from the module. Does not set any wakeup routing registers beyond
|
|
|
|
* this point - if the module is to wake up any other module or
|
|
|
|
* subsystem, that must be set separately. Called by omap_device
|
|
|
|
* code. Returns -EINVAL on error or 0 upon success.
|
|
|
|
*/
|
|
|
|
int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
|
|
|
|
{
|
OMAP2+: hwmod: upgrade per-hwmod mutex to a spinlock
Change the per-hwmod mutex to a spinlock. (The per-hwmod lock
serializes most post-initialization hwmod operations such as enable,
idle, and shutdown.) Spinlocks are needed, because in some cases,
hwmods must be enabled from timer interrupt disabled-context, such as
an ISR. The current use-case that is driving this is the OMAP GPIO
block ISR: it can trigger interrupts even with its clocks disabled,
but these clocks are needed for register accesses in the ISR to succeed.
This patch also effectively reverts commit
848240223c35fcc71c424ad51a8e8aef42d3879c - this patch makes
_omap_hwmod_enable() and _omap_hwmod_init() static, renames them back
to _enable() and _idle(), and changes their callers to call the
spinlocking versions. Previously, since omap_hwmod_{enable,init}()
attempted to take mutexes, these functions could not be called while
the timer interrupt was disabled; but now that the functions use
spinlocks and save and restore the IRQ state, it is appropriate to
call them directly.
Kevin Hilman <khilman@deeprootsystems.com> originally proposed this
patch - thanks Kevin.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Benoît Cousson <b-cousson@ti.com>
2010-12-15 03:42:35 +08:00
|
|
|
unsigned long flags;
|
OMAP2+: omap_hwmod: fix wakeup enable/disable for consistency
In the omap_hwmod core, most of the SYSCONFIG register helper
functions do not directly write the register, but instead just modify
a value passed in.
This patch converts the _enable_wakeup() and _disable_wakeup() helper
functions to take a value argument and only modify it instead of
actually writing the register. This makes the wakeup helpers
consistent with the other helper functions and avoids unintentional
problems like the following.
This problem was found after discovering that GPIO wakeups were no
longer functional. The root cause was that the ENAWAKEUP bit of the
SYSCONFIG register was being unintentionaly overwritten, leaving
wakeups disabled after the following two commits were combined:
commit: 9980ce53c97392a3dbdc9d1ac3e455d79b4167ed
OMAP: hwmod: Enable module wakeup if in smartidle
commit: 78f26e872f77b6312273216de1a8f836c6f2e143
OMAP: hwmod: Set autoidle after smartidle during _sysc_enable
There resulting in code in _enable_sysc() was this:
/*
* XXX The clock framework should handle this, by
* calling into this code. But this must wait until the
* clock structures are tagged with omap_hwmod entries
*/
if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
(sf & SYSC_HAS_CLOCKACTIVITY))
_set_clockactivity(oh, oh->class->sysc->clockact, &v);
_write_sysconfig(v, oh);
so here, 'v' has wakeups disabled.
/* If slave is in SMARTIDLE, also enable wakeup */
if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
_enable_wakeup(oh);
Here wakeup is enabled in the SYSCONFIG register (but 'v' is not updated)
/*
* Set the autoidle bit only after setting the smartidle bit
* Setting this will not have any impact on the other modules.
*/
if (sf & SYSC_HAS_AUTOIDLE) {
idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
0 : 1;
_set_module_autoidle(oh, idlemode, &v);
_write_sysconfig(v, oh);
}
And here, SYSCONFIG is updated again using 'v', which does not have
wakeups enabled, resulting in ENAWAKEUP being cleared.
Special thanks to Benoit Cousson for pointing out that wakeups were
supposed to be automatically enabled when a hwmod is enabled, and thus
helping target the root cause of this problem.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-12-22 12:08:34 +08:00
|
|
|
u32 v;
|
OMAP2+: hwmod: upgrade per-hwmod mutex to a spinlock
Change the per-hwmod mutex to a spinlock. (The per-hwmod lock
serializes most post-initialization hwmod operations such as enable,
idle, and shutdown.) Spinlocks are needed, because in some cases,
hwmods must be enabled from timer interrupt disabled-context, such as
an ISR. The current use-case that is driving this is the OMAP GPIO
block ISR: it can trigger interrupts even with its clocks disabled,
but these clocks are needed for register accesses in the ISR to succeed.
This patch also effectively reverts commit
848240223c35fcc71c424ad51a8e8aef42d3879c - this patch makes
_omap_hwmod_enable() and _omap_hwmod_init() static, renames them back
to _enable() and _idle(), and changes their callers to call the
spinlocking versions. Previously, since omap_hwmod_{enable,init}()
attempted to take mutexes, these functions could not be called while
the timer interrupt was disabled; but now that the functions use
spinlocks and save and restore the IRQ state, it is appropriate to
call them directly.
Kevin Hilman <khilman@deeprootsystems.com> originally proposed this
patch - thanks Kevin.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Benoît Cousson <b-cousson@ti.com>
2010-12-15 03:42:35 +08:00
|
|
|
|
2010-02-23 13:09:34 +08:00
|
|
|
if (!oh->class->sysc ||
|
|
|
|
!(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
|
2009-09-04 01:14:03 +08:00
|
|
|
return -EINVAL;
|
|
|
|
|
OMAP2+: hwmod: upgrade per-hwmod mutex to a spinlock
Change the per-hwmod mutex to a spinlock. (The per-hwmod lock
serializes most post-initialization hwmod operations such as enable,
idle, and shutdown.) Spinlocks are needed, because in some cases,
hwmods must be enabled from timer interrupt disabled-context, such as
an ISR. The current use-case that is driving this is the OMAP GPIO
block ISR: it can trigger interrupts even with its clocks disabled,
but these clocks are needed for register accesses in the ISR to succeed.
This patch also effectively reverts commit
848240223c35fcc71c424ad51a8e8aef42d3879c - this patch makes
_omap_hwmod_enable() and _omap_hwmod_init() static, renames them back
to _enable() and _idle(), and changes their callers to call the
spinlocking versions. Previously, since omap_hwmod_{enable,init}()
attempted to take mutexes, these functions could not be called while
the timer interrupt was disabled; but now that the functions use
spinlocks and save and restore the IRQ state, it is appropriate to
call them directly.
Kevin Hilman <khilman@deeprootsystems.com> originally proposed this
patch - thanks Kevin.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Benoît Cousson <b-cousson@ti.com>
2010-12-15 03:42:35 +08:00
|
|
|
spin_lock_irqsave(&oh->_lock, flags);
|
OMAP2+: omap_hwmod: fix wakeup enable/disable for consistency
In the omap_hwmod core, most of the SYSCONFIG register helper
functions do not directly write the register, but instead just modify
a value passed in.
This patch converts the _enable_wakeup() and _disable_wakeup() helper
functions to take a value argument and only modify it instead of
actually writing the register. This makes the wakeup helpers
consistent with the other helper functions and avoids unintentional
problems like the following.
This problem was found after discovering that GPIO wakeups were no
longer functional. The root cause was that the ENAWAKEUP bit of the
SYSCONFIG register was being unintentionaly overwritten, leaving
wakeups disabled after the following two commits were combined:
commit: 9980ce53c97392a3dbdc9d1ac3e455d79b4167ed
OMAP: hwmod: Enable module wakeup if in smartidle
commit: 78f26e872f77b6312273216de1a8f836c6f2e143
OMAP: hwmod: Set autoidle after smartidle during _sysc_enable
There resulting in code in _enable_sysc() was this:
/*
* XXX The clock framework should handle this, by
* calling into this code. But this must wait until the
* clock structures are tagged with omap_hwmod entries
*/
if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
(sf & SYSC_HAS_CLOCKACTIVITY))
_set_clockactivity(oh, oh->class->sysc->clockact, &v);
_write_sysconfig(v, oh);
so here, 'v' has wakeups disabled.
/* If slave is in SMARTIDLE, also enable wakeup */
if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
_enable_wakeup(oh);
Here wakeup is enabled in the SYSCONFIG register (but 'v' is not updated)
/*
* Set the autoidle bit only after setting the smartidle bit
* Setting this will not have any impact on the other modules.
*/
if (sf & SYSC_HAS_AUTOIDLE) {
idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
0 : 1;
_set_module_autoidle(oh, idlemode, &v);
_write_sysconfig(v, oh);
}
And here, SYSCONFIG is updated again using 'v', which does not have
wakeups enabled, resulting in ENAWAKEUP being cleared.
Special thanks to Benoit Cousson for pointing out that wakeups were
supposed to be automatically enabled when a hwmod is enabled, and thus
helping target the root cause of this problem.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-12-22 12:08:34 +08:00
|
|
|
v = oh->_sysc_cache;
|
|
|
|
_disable_wakeup(oh, &v);
|
|
|
|
_write_sysconfig(v, oh);
|
OMAP2+: hwmod: upgrade per-hwmod mutex to a spinlock
Change the per-hwmod mutex to a spinlock. (The per-hwmod lock
serializes most post-initialization hwmod operations such as enable,
idle, and shutdown.) Spinlocks are needed, because in some cases,
hwmods must be enabled from timer interrupt disabled-context, such as
an ISR. The current use-case that is driving this is the OMAP GPIO
block ISR: it can trigger interrupts even with its clocks disabled,
but these clocks are needed for register accesses in the ISR to succeed.
This patch also effectively reverts commit
848240223c35fcc71c424ad51a8e8aef42d3879c - this patch makes
_omap_hwmod_enable() and _omap_hwmod_init() static, renames them back
to _enable() and _idle(), and changes their callers to call the
spinlocking versions. Previously, since omap_hwmod_{enable,init}()
attempted to take mutexes, these functions could not be called while
the timer interrupt was disabled; but now that the functions use
spinlocks and save and restore the IRQ state, it is appropriate to
call them directly.
Kevin Hilman <khilman@deeprootsystems.com> originally proposed this
patch - thanks Kevin.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Benoît Cousson <b-cousson@ti.com>
2010-12-15 03:42:35 +08:00
|
|
|
spin_unlock_irqrestore(&oh->_lock, flags);
|
2009-09-04 01:14:03 +08:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
2010-02-23 13:09:34 +08:00
|
|
|
|
2010-09-22 00:34:11 +08:00
|
|
|
/**
|
|
|
|
* omap_hwmod_assert_hardreset - assert the HW reset line of submodules
|
|
|
|
* contained in the hwmod module.
|
|
|
|
* @oh: struct omap_hwmod *
|
|
|
|
* @name: name of the reset line to lookup and assert
|
|
|
|
*
|
|
|
|
* Some IP like dsp, ipu or iva contain processor that require
|
|
|
|
* an HW reset line to be assert / deassert in order to enable fully
|
|
|
|
* the IP. Returns -EINVAL if @oh is null or if the operation is not
|
|
|
|
* yet supported on this OMAP; otherwise, passes along the return value
|
|
|
|
* from _assert_hardreset().
|
|
|
|
*/
|
|
|
|
int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
|
|
|
|
{
|
|
|
|
int ret;
|
OMAP2+: hwmod: upgrade per-hwmod mutex to a spinlock
Change the per-hwmod mutex to a spinlock. (The per-hwmod lock
serializes most post-initialization hwmod operations such as enable,
idle, and shutdown.) Spinlocks are needed, because in some cases,
hwmods must be enabled from timer interrupt disabled-context, such as
an ISR. The current use-case that is driving this is the OMAP GPIO
block ISR: it can trigger interrupts even with its clocks disabled,
but these clocks are needed for register accesses in the ISR to succeed.
This patch also effectively reverts commit
848240223c35fcc71c424ad51a8e8aef42d3879c - this patch makes
_omap_hwmod_enable() and _omap_hwmod_init() static, renames them back
to _enable() and _idle(), and changes their callers to call the
spinlocking versions. Previously, since omap_hwmod_{enable,init}()
attempted to take mutexes, these functions could not be called while
the timer interrupt was disabled; but now that the functions use
spinlocks and save and restore the IRQ state, it is appropriate to
call them directly.
Kevin Hilman <khilman@deeprootsystems.com> originally proposed this
patch - thanks Kevin.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Benoît Cousson <b-cousson@ti.com>
2010-12-15 03:42:35 +08:00
|
|
|
unsigned long flags;
|
2010-09-22 00:34:11 +08:00
|
|
|
|
|
|
|
if (!oh)
|
|
|
|
return -EINVAL;
|
|
|
|
|
OMAP2+: hwmod: upgrade per-hwmod mutex to a spinlock
Change the per-hwmod mutex to a spinlock. (The per-hwmod lock
serializes most post-initialization hwmod operations such as enable,
idle, and shutdown.) Spinlocks are needed, because in some cases,
hwmods must be enabled from timer interrupt disabled-context, such as
an ISR. The current use-case that is driving this is the OMAP GPIO
block ISR: it can trigger interrupts even with its clocks disabled,
but these clocks are needed for register accesses in the ISR to succeed.
This patch also effectively reverts commit
848240223c35fcc71c424ad51a8e8aef42d3879c - this patch makes
_omap_hwmod_enable() and _omap_hwmod_init() static, renames them back
to _enable() and _idle(), and changes their callers to call the
spinlocking versions. Previously, since omap_hwmod_{enable,init}()
attempted to take mutexes, these functions could not be called while
the timer interrupt was disabled; but now that the functions use
spinlocks and save and restore the IRQ state, it is appropriate to
call them directly.
Kevin Hilman <khilman@deeprootsystems.com> originally proposed this
patch - thanks Kevin.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Benoît Cousson <b-cousson@ti.com>
2010-12-15 03:42:35 +08:00
|
|
|
spin_lock_irqsave(&oh->_lock, flags);
|
2010-09-22 00:34:11 +08:00
|
|
|
ret = _assert_hardreset(oh, name);
|
OMAP2+: hwmod: upgrade per-hwmod mutex to a spinlock
Change the per-hwmod mutex to a spinlock. (The per-hwmod lock
serializes most post-initialization hwmod operations such as enable,
idle, and shutdown.) Spinlocks are needed, because in some cases,
hwmods must be enabled from timer interrupt disabled-context, such as
an ISR. The current use-case that is driving this is the OMAP GPIO
block ISR: it can trigger interrupts even with its clocks disabled,
but these clocks are needed for register accesses in the ISR to succeed.
This patch also effectively reverts commit
848240223c35fcc71c424ad51a8e8aef42d3879c - this patch makes
_omap_hwmod_enable() and _omap_hwmod_init() static, renames them back
to _enable() and _idle(), and changes their callers to call the
spinlocking versions. Previously, since omap_hwmod_{enable,init}()
attempted to take mutexes, these functions could not be called while
the timer interrupt was disabled; but now that the functions use
spinlocks and save and restore the IRQ state, it is appropriate to
call them directly.
Kevin Hilman <khilman@deeprootsystems.com> originally proposed this
patch - thanks Kevin.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Benoît Cousson <b-cousson@ti.com>
2010-12-15 03:42:35 +08:00
|
|
|
spin_unlock_irqrestore(&oh->_lock, flags);
|
2010-09-22 00:34:11 +08:00
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
|
|
|
|
* contained in the hwmod module.
|
|
|
|
* @oh: struct omap_hwmod *
|
|
|
|
* @name: name of the reset line to look up and deassert
|
|
|
|
*
|
|
|
|
* Some IP like dsp, ipu or iva contain processor that require
|
|
|
|
* an HW reset line to be assert / deassert in order to enable fully
|
|
|
|
* the IP. Returns -EINVAL if @oh is null or if the operation is not
|
|
|
|
* yet supported on this OMAP; otherwise, passes along the return value
|
|
|
|
* from _deassert_hardreset().
|
|
|
|
*/
|
|
|
|
int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
|
|
|
|
{
|
|
|
|
int ret;
|
OMAP2+: hwmod: upgrade per-hwmod mutex to a spinlock
Change the per-hwmod mutex to a spinlock. (The per-hwmod lock
serializes most post-initialization hwmod operations such as enable,
idle, and shutdown.) Spinlocks are needed, because in some cases,
hwmods must be enabled from timer interrupt disabled-context, such as
an ISR. The current use-case that is driving this is the OMAP GPIO
block ISR: it can trigger interrupts even with its clocks disabled,
but these clocks are needed for register accesses in the ISR to succeed.
This patch also effectively reverts commit
848240223c35fcc71c424ad51a8e8aef42d3879c - this patch makes
_omap_hwmod_enable() and _omap_hwmod_init() static, renames them back
to _enable() and _idle(), and changes their callers to call the
spinlocking versions. Previously, since omap_hwmod_{enable,init}()
attempted to take mutexes, these functions could not be called while
the timer interrupt was disabled; but now that the functions use
spinlocks and save and restore the IRQ state, it is appropriate to
call them directly.
Kevin Hilman <khilman@deeprootsystems.com> originally proposed this
patch - thanks Kevin.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Benoît Cousson <b-cousson@ti.com>
2010-12-15 03:42:35 +08:00
|
|
|
unsigned long flags;
|
2010-09-22 00:34:11 +08:00
|
|
|
|
|
|
|
if (!oh)
|
|
|
|
return -EINVAL;
|
|
|
|
|
OMAP2+: hwmod: upgrade per-hwmod mutex to a spinlock
Change the per-hwmod mutex to a spinlock. (The per-hwmod lock
serializes most post-initialization hwmod operations such as enable,
idle, and shutdown.) Spinlocks are needed, because in some cases,
hwmods must be enabled from timer interrupt disabled-context, such as
an ISR. The current use-case that is driving this is the OMAP GPIO
block ISR: it can trigger interrupts even with its clocks disabled,
but these clocks are needed for register accesses in the ISR to succeed.
This patch also effectively reverts commit
848240223c35fcc71c424ad51a8e8aef42d3879c - this patch makes
_omap_hwmod_enable() and _omap_hwmod_init() static, renames them back
to _enable() and _idle(), and changes their callers to call the
spinlocking versions. Previously, since omap_hwmod_{enable,init}()
attempted to take mutexes, these functions could not be called while
the timer interrupt was disabled; but now that the functions use
spinlocks and save and restore the IRQ state, it is appropriate to
call them directly.
Kevin Hilman <khilman@deeprootsystems.com> originally proposed this
patch - thanks Kevin.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Benoît Cousson <b-cousson@ti.com>
2010-12-15 03:42:35 +08:00
|
|
|
spin_lock_irqsave(&oh->_lock, flags);
|
2010-09-22 00:34:11 +08:00
|
|
|
ret = _deassert_hardreset(oh, name);
|
OMAP2+: hwmod: upgrade per-hwmod mutex to a spinlock
Change the per-hwmod mutex to a spinlock. (The per-hwmod lock
serializes most post-initialization hwmod operations such as enable,
idle, and shutdown.) Spinlocks are needed, because in some cases,
hwmods must be enabled from timer interrupt disabled-context, such as
an ISR. The current use-case that is driving this is the OMAP GPIO
block ISR: it can trigger interrupts even with its clocks disabled,
but these clocks are needed for register accesses in the ISR to succeed.
This patch also effectively reverts commit
848240223c35fcc71c424ad51a8e8aef42d3879c - this patch makes
_omap_hwmod_enable() and _omap_hwmod_init() static, renames them back
to _enable() and _idle(), and changes their callers to call the
spinlocking versions. Previously, since omap_hwmod_{enable,init}()
attempted to take mutexes, these functions could not be called while
the timer interrupt was disabled; but now that the functions use
spinlocks and save and restore the IRQ state, it is appropriate to
call them directly.
Kevin Hilman <khilman@deeprootsystems.com> originally proposed this
patch - thanks Kevin.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Benoît Cousson <b-cousson@ti.com>
2010-12-15 03:42:35 +08:00
|
|
|
spin_unlock_irqrestore(&oh->_lock, flags);
|
2010-09-22 00:34:11 +08:00
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* omap_hwmod_read_hardreset - read the HW reset line state of submodules
|
|
|
|
* contained in the hwmod module
|
|
|
|
* @oh: struct omap_hwmod *
|
|
|
|
* @name: name of the reset line to look up and read
|
|
|
|
*
|
|
|
|
* Return the current state of the hwmod @oh's reset line named @name:
|
|
|
|
* returns -EINVAL upon parameter error or if this operation
|
|
|
|
* is unsupported on the current OMAP; otherwise, passes along the return
|
|
|
|
* value from _read_hardreset().
|
|
|
|
*/
|
|
|
|
int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
|
|
|
|
{
|
|
|
|
int ret;
|
OMAP2+: hwmod: upgrade per-hwmod mutex to a spinlock
Change the per-hwmod mutex to a spinlock. (The per-hwmod lock
serializes most post-initialization hwmod operations such as enable,
idle, and shutdown.) Spinlocks are needed, because in some cases,
hwmods must be enabled from timer interrupt disabled-context, such as
an ISR. The current use-case that is driving this is the OMAP GPIO
block ISR: it can trigger interrupts even with its clocks disabled,
but these clocks are needed for register accesses in the ISR to succeed.
This patch also effectively reverts commit
848240223c35fcc71c424ad51a8e8aef42d3879c - this patch makes
_omap_hwmod_enable() and _omap_hwmod_init() static, renames them back
to _enable() and _idle(), and changes their callers to call the
spinlocking versions. Previously, since omap_hwmod_{enable,init}()
attempted to take mutexes, these functions could not be called while
the timer interrupt was disabled; but now that the functions use
spinlocks and save and restore the IRQ state, it is appropriate to
call them directly.
Kevin Hilman <khilman@deeprootsystems.com> originally proposed this
patch - thanks Kevin.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Benoît Cousson <b-cousson@ti.com>
2010-12-15 03:42:35 +08:00
|
|
|
unsigned long flags;
|
2010-09-22 00:34:11 +08:00
|
|
|
|
|
|
|
if (!oh)
|
|
|
|
return -EINVAL;
|
|
|
|
|
OMAP2+: hwmod: upgrade per-hwmod mutex to a spinlock
Change the per-hwmod mutex to a spinlock. (The per-hwmod lock
serializes most post-initialization hwmod operations such as enable,
idle, and shutdown.) Spinlocks are needed, because in some cases,
hwmods must be enabled from timer interrupt disabled-context, such as
an ISR. The current use-case that is driving this is the OMAP GPIO
block ISR: it can trigger interrupts even with its clocks disabled,
but these clocks are needed for register accesses in the ISR to succeed.
This patch also effectively reverts commit
848240223c35fcc71c424ad51a8e8aef42d3879c - this patch makes
_omap_hwmod_enable() and _omap_hwmod_init() static, renames them back
to _enable() and _idle(), and changes their callers to call the
spinlocking versions. Previously, since omap_hwmod_{enable,init}()
attempted to take mutexes, these functions could not be called while
the timer interrupt was disabled; but now that the functions use
spinlocks and save and restore the IRQ state, it is appropriate to
call them directly.
Kevin Hilman <khilman@deeprootsystems.com> originally proposed this
patch - thanks Kevin.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Benoît Cousson <b-cousson@ti.com>
2010-12-15 03:42:35 +08:00
|
|
|
spin_lock_irqsave(&oh->_lock, flags);
|
2010-09-22 00:34:11 +08:00
|
|
|
ret = _read_hardreset(oh, name);
|
OMAP2+: hwmod: upgrade per-hwmod mutex to a spinlock
Change the per-hwmod mutex to a spinlock. (The per-hwmod lock
serializes most post-initialization hwmod operations such as enable,
idle, and shutdown.) Spinlocks are needed, because in some cases,
hwmods must be enabled from timer interrupt disabled-context, such as
an ISR. The current use-case that is driving this is the OMAP GPIO
block ISR: it can trigger interrupts even with its clocks disabled,
but these clocks are needed for register accesses in the ISR to succeed.
This patch also effectively reverts commit
848240223c35fcc71c424ad51a8e8aef42d3879c - this patch makes
_omap_hwmod_enable() and _omap_hwmod_init() static, renames them back
to _enable() and _idle(), and changes their callers to call the
spinlocking versions. Previously, since omap_hwmod_{enable,init}()
attempted to take mutexes, these functions could not be called while
the timer interrupt was disabled; but now that the functions use
spinlocks and save and restore the IRQ state, it is appropriate to
call them directly.
Kevin Hilman <khilman@deeprootsystems.com> originally proposed this
patch - thanks Kevin.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Benoît Cousson <b-cousson@ti.com>
2010-12-15 03:42:35 +08:00
|
|
|
spin_unlock_irqrestore(&oh->_lock, flags);
|
2010-09-22 00:34:11 +08:00
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
2010-02-23 13:09:34 +08:00
|
|
|
/**
|
|
|
|
* omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
|
|
|
|
* @classname: struct omap_hwmod_class name to search for
|
|
|
|
* @fn: callback function pointer to call for each hwmod in class @classname
|
|
|
|
* @user: arbitrary context data to pass to the callback function
|
|
|
|
*
|
2010-12-22 12:31:28 +08:00
|
|
|
* For each omap_hwmod of class @classname, call @fn.
|
|
|
|
* If the callback function returns something other than
|
2010-02-23 13:09:34 +08:00
|
|
|
* zero, the iterator is terminated, and the callback function's return
|
|
|
|
* value is passed back to the caller. Returns 0 upon success, -EINVAL
|
|
|
|
* if @classname or @fn are NULL, or passes back the error code from @fn.
|
|
|
|
*/
|
|
|
|
int omap_hwmod_for_each_by_class(const char *classname,
|
|
|
|
int (*fn)(struct omap_hwmod *oh,
|
|
|
|
void *user),
|
|
|
|
void *user)
|
|
|
|
{
|
|
|
|
struct omap_hwmod *temp_oh;
|
|
|
|
int ret = 0;
|
|
|
|
|
|
|
|
if (!classname || !fn)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
|
|
|
|
__func__, classname);
|
|
|
|
|
|
|
|
list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
|
|
|
|
if (!strcmp(temp_oh->class->name, classname)) {
|
|
|
|
pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
|
|
|
|
__func__, temp_oh->name);
|
|
|
|
ret = (*fn)(temp_oh, user);
|
|
|
|
if (ret)
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (ret)
|
|
|
|
pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
|
|
|
|
__func__, ret);
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2010-12-15 03:42:35 +08:00
|
|
|
/**
|
|
|
|
* omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
|
|
|
|
* @oh: struct omap_hwmod *
|
|
|
|
* @state: state that _setup() should leave the hwmod in
|
|
|
|
*
|
|
|
|
* Sets the hwmod state that @oh will enter at the end of _setup() (called by
|
|
|
|
* omap_hwmod_late_init()). Only valid to call between calls to
|
|
|
|
* omap_hwmod_init() and omap_hwmod_late_init(). Returns 0 upon success or
|
|
|
|
* -EINVAL if there is a problem with the arguments or if the hwmod is
|
|
|
|
* in the wrong state.
|
|
|
|
*/
|
|
|
|
int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
|
|
|
|
{
|
|
|
|
int ret;
|
OMAP2+: hwmod: upgrade per-hwmod mutex to a spinlock
Change the per-hwmod mutex to a spinlock. (The per-hwmod lock
serializes most post-initialization hwmod operations such as enable,
idle, and shutdown.) Spinlocks are needed, because in some cases,
hwmods must be enabled from timer interrupt disabled-context, such as
an ISR. The current use-case that is driving this is the OMAP GPIO
block ISR: it can trigger interrupts even with its clocks disabled,
but these clocks are needed for register accesses in the ISR to succeed.
This patch also effectively reverts commit
848240223c35fcc71c424ad51a8e8aef42d3879c - this patch makes
_omap_hwmod_enable() and _omap_hwmod_init() static, renames them back
to _enable() and _idle(), and changes their callers to call the
spinlocking versions. Previously, since omap_hwmod_{enable,init}()
attempted to take mutexes, these functions could not be called while
the timer interrupt was disabled; but now that the functions use
spinlocks and save and restore the IRQ state, it is appropriate to
call them directly.
Kevin Hilman <khilman@deeprootsystems.com> originally proposed this
patch - thanks Kevin.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Benoît Cousson <b-cousson@ti.com>
2010-12-15 03:42:35 +08:00
|
|
|
unsigned long flags;
|
2010-12-15 03:42:35 +08:00
|
|
|
|
|
|
|
if (!oh)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
if (state != _HWMOD_STATE_DISABLED &&
|
|
|
|
state != _HWMOD_STATE_ENABLED &&
|
|
|
|
state != _HWMOD_STATE_IDLE)
|
|
|
|
return -EINVAL;
|
|
|
|
|
OMAP2+: hwmod: upgrade per-hwmod mutex to a spinlock
Change the per-hwmod mutex to a spinlock. (The per-hwmod lock
serializes most post-initialization hwmod operations such as enable,
idle, and shutdown.) Spinlocks are needed, because in some cases,
hwmods must be enabled from timer interrupt disabled-context, such as
an ISR. The current use-case that is driving this is the OMAP GPIO
block ISR: it can trigger interrupts even with its clocks disabled,
but these clocks are needed for register accesses in the ISR to succeed.
This patch also effectively reverts commit
848240223c35fcc71c424ad51a8e8aef42d3879c - this patch makes
_omap_hwmod_enable() and _omap_hwmod_init() static, renames them back
to _enable() and _idle(), and changes their callers to call the
spinlocking versions. Previously, since omap_hwmod_{enable,init}()
attempted to take mutexes, these functions could not be called while
the timer interrupt was disabled; but now that the functions use
spinlocks and save and restore the IRQ state, it is appropriate to
call them directly.
Kevin Hilman <khilman@deeprootsystems.com> originally proposed this
patch - thanks Kevin.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Benoît Cousson <b-cousson@ti.com>
2010-12-15 03:42:35 +08:00
|
|
|
spin_lock_irqsave(&oh->_lock, flags);
|
2010-12-15 03:42:35 +08:00
|
|
|
|
|
|
|
if (oh->_state != _HWMOD_STATE_REGISTERED) {
|
|
|
|
ret = -EINVAL;
|
|
|
|
goto ohsps_unlock;
|
|
|
|
}
|
|
|
|
|
|
|
|
oh->_postsetup_state = state;
|
|
|
|
ret = 0;
|
|
|
|
|
|
|
|
ohsps_unlock:
|
OMAP2+: hwmod: upgrade per-hwmod mutex to a spinlock
Change the per-hwmod mutex to a spinlock. (The per-hwmod lock
serializes most post-initialization hwmod operations such as enable,
idle, and shutdown.) Spinlocks are needed, because in some cases,
hwmods must be enabled from timer interrupt disabled-context, such as
an ISR. The current use-case that is driving this is the OMAP GPIO
block ISR: it can trigger interrupts even with its clocks disabled,
but these clocks are needed for register accesses in the ISR to succeed.
This patch also effectively reverts commit
848240223c35fcc71c424ad51a8e8aef42d3879c - this patch makes
_omap_hwmod_enable() and _omap_hwmod_init() static, renames them back
to _enable() and _idle(), and changes their callers to call the
spinlocking versions. Previously, since omap_hwmod_{enable,init}()
attempted to take mutexes, these functions could not be called while
the timer interrupt was disabled; but now that the functions use
spinlocks and save and restore the IRQ state, it is appropriate to
call them directly.
Kevin Hilman <khilman@deeprootsystems.com> originally proposed this
patch - thanks Kevin.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Benoît Cousson <b-cousson@ti.com>
2010-12-15 03:42:35 +08:00
|
|
|
spin_unlock_irqrestore(&oh->_lock, flags);
|
2010-12-15 03:42:35 +08:00
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
2010-12-22 12:31:55 +08:00
|
|
|
|
|
|
|
/**
|
|
|
|
* omap_hwmod_get_context_loss_count - get lost context count
|
|
|
|
* @oh: struct omap_hwmod *
|
|
|
|
*
|
|
|
|
* Query the powerdomain of of @oh to get the context loss
|
|
|
|
* count for this device.
|
|
|
|
*
|
|
|
|
* Returns the context loss count of the powerdomain assocated with @oh
|
|
|
|
* upon success, or zero if no powerdomain exists for @oh.
|
|
|
|
*/
|
|
|
|
u32 omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
|
|
|
|
{
|
|
|
|
struct powerdomain *pwrdm;
|
|
|
|
int ret = 0;
|
|
|
|
|
|
|
|
pwrdm = omap_hwmod_get_pwrdm(oh);
|
|
|
|
if (pwrdm)
|
|
|
|
ret = pwrdm_get_context_loss_count(pwrdm);
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|