2013-07-07 22:25:49 +08:00
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/*
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* Copyright (c) 2013, Mellanox Technologies inc. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#include <linux/kref.h>
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#include <linux/random.h>
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#include <linux/debugfs.h>
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#include <linux/export.h>
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2013-10-23 14:53:14 +08:00
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#include <linux/delay.h>
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2013-07-07 22:25:49 +08:00
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#include <rdma/ib_umem.h>
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#include "mlx5_ib.h"
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enum {
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2013-10-23 14:53:14 +08:00
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MAX_PENDING_REG_MR = 8,
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2013-07-07 22:25:49 +08:00
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};
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2013-09-11 21:35:35 +08:00
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enum {
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MLX5_UMR_ALIGN = 2048
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};
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2013-07-07 22:25:49 +08:00
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static __be64 *mr_align(__be64 *ptr, int align)
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{
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unsigned long mask = align - 1;
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return (__be64 *)(((unsigned long)ptr + mask) & ~mask);
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}
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static int order2idx(struct mlx5_ib_dev *dev, int order)
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{
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struct mlx5_mr_cache *cache = &dev->cache;
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if (order < cache->ent[0].order)
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return 0;
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else
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return order - cache->ent[0].order;
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}
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2013-10-23 14:53:14 +08:00
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static void reg_mr_callback(int status, void *context)
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{
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struct mlx5_ib_mr *mr = context;
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struct mlx5_ib_dev *dev = mr->dev;
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struct mlx5_mr_cache *cache = &dev->cache;
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int c = order2idx(dev, mr->order);
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struct mlx5_cache_ent *ent = &cache->ent[c];
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u8 key;
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unsigned long flags;
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2014-05-22 19:50:09 +08:00
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struct mlx5_mr_table *table = &dev->mdev.priv.mr_table;
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int err;
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2013-10-23 14:53:14 +08:00
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spin_lock_irqsave(&ent->lock, flags);
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ent->pending--;
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spin_unlock_irqrestore(&ent->lock, flags);
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if (status) {
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mlx5_ib_warn(dev, "async reg mr failed. status %d\n", status);
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kfree(mr);
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dev->fill_delay = 1;
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mod_timer(&dev->delay_timer, jiffies + HZ);
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return;
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}
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if (mr->out.hdr.status) {
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mlx5_ib_warn(dev, "failed - status %d, syndorme 0x%x\n",
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mr->out.hdr.status,
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be32_to_cpu(mr->out.hdr.syndrome));
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kfree(mr);
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dev->fill_delay = 1;
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mod_timer(&dev->delay_timer, jiffies + HZ);
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return;
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}
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spin_lock_irqsave(&dev->mdev.priv.mkey_lock, flags);
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key = dev->mdev.priv.mkey_key++;
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spin_unlock_irqrestore(&dev->mdev.priv.mkey_lock, flags);
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mr->mmr.key = mlx5_idx_to_mkey(be32_to_cpu(mr->out.mkey) & 0xffffff) | key;
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cache->last_add = jiffies;
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spin_lock_irqsave(&ent->lock, flags);
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list_add_tail(&mr->list, &ent->head);
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ent->cur++;
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ent->size++;
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spin_unlock_irqrestore(&ent->lock, flags);
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2014-05-22 19:50:09 +08:00
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write_lock_irqsave(&table->lock, flags);
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err = radix_tree_insert(&table->tree, mlx5_base_mkey(mr->mmr.key),
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&mr->mmr);
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if (err)
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pr_err("Error inserting to mr tree. 0x%x\n", -err);
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write_unlock_irqrestore(&table->lock, flags);
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2013-10-23 14:53:14 +08:00
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}
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2013-07-07 22:25:49 +08:00
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static int add_keys(struct mlx5_ib_dev *dev, int c, int num)
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{
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struct mlx5_mr_cache *cache = &dev->cache;
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struct mlx5_cache_ent *ent = &cache->ent[c];
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struct mlx5_create_mkey_mbox_in *in;
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struct mlx5_ib_mr *mr;
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int npages = 1 << ent->order;
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int err = 0;
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int i;
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in = kzalloc(sizeof(*in), GFP_KERNEL);
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if (!in)
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return -ENOMEM;
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for (i = 0; i < num; i++) {
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2013-10-23 14:53:14 +08:00
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if (ent->pending >= MAX_PENDING_REG_MR) {
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err = -EAGAIN;
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break;
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}
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2013-07-07 22:25:49 +08:00
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mr = kzalloc(sizeof(*mr), GFP_KERNEL);
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if (!mr) {
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err = -ENOMEM;
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2013-10-23 14:53:14 +08:00
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break;
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2013-07-07 22:25:49 +08:00
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}
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mr->order = ent->order;
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mr->umred = 1;
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2013-10-23 14:53:14 +08:00
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mr->dev = dev;
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2013-07-07 22:25:49 +08:00
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in->seg.status = 1 << 6;
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in->seg.xlt_oct_size = cpu_to_be32((npages + 1) / 2);
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in->seg.qpn_mkey7_0 = cpu_to_be32(0xffffff << 8);
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in->seg.flags = MLX5_ACCESS_MODE_MTT | MLX5_PERM_UMR_EN;
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in->seg.log2_page_size = 12;
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2013-10-23 14:53:14 +08:00
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spin_lock_irq(&ent->lock);
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ent->pending++;
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spin_unlock_irq(&ent->lock);
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2013-07-07 22:25:49 +08:00
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err = mlx5_core_create_mkey(&dev->mdev, &mr->mmr, in,
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2013-10-23 14:53:14 +08:00
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sizeof(*in), reg_mr_callback,
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mr, &mr->out);
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2013-07-07 22:25:49 +08:00
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if (err) {
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mlx5_ib_warn(dev, "create mkey failed %d\n", err);
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kfree(mr);
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2013-10-23 14:53:14 +08:00
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break;
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2013-07-07 22:25:49 +08:00
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}
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}
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kfree(in);
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return err;
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}
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static void remove_keys(struct mlx5_ib_dev *dev, int c, int num)
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{
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struct mlx5_mr_cache *cache = &dev->cache;
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struct mlx5_cache_ent *ent = &cache->ent[c];
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struct mlx5_ib_mr *mr;
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int err;
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int i;
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for (i = 0; i < num; i++) {
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2013-10-23 14:53:14 +08:00
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spin_lock_irq(&ent->lock);
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2013-07-07 22:25:49 +08:00
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if (list_empty(&ent->head)) {
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2013-10-23 14:53:14 +08:00
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spin_unlock_irq(&ent->lock);
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2013-07-07 22:25:49 +08:00
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return;
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}
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mr = list_first_entry(&ent->head, struct mlx5_ib_mr, list);
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list_del(&mr->list);
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ent->cur--;
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ent->size--;
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2013-10-23 14:53:14 +08:00
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spin_unlock_irq(&ent->lock);
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2013-07-07 22:25:49 +08:00
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err = mlx5_core_destroy_mkey(&dev->mdev, &mr->mmr);
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2013-09-11 21:35:26 +08:00
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if (err)
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2013-07-07 22:25:49 +08:00
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mlx5_ib_warn(dev, "failed destroy mkey\n");
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2013-09-11 21:35:26 +08:00
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else
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2013-07-07 22:25:49 +08:00
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kfree(mr);
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}
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}
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static ssize_t size_write(struct file *filp, const char __user *buf,
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size_t count, loff_t *pos)
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{
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struct mlx5_cache_ent *ent = filp->private_data;
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struct mlx5_ib_dev *dev = ent->dev;
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char lbuf[20];
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u32 var;
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int err;
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int c;
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if (copy_from_user(lbuf, buf, sizeof(lbuf)))
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2013-07-10 18:58:59 +08:00
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return -EFAULT;
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2013-07-07 22:25:49 +08:00
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c = order2idx(dev, ent->order);
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lbuf[sizeof(lbuf) - 1] = 0;
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if (sscanf(lbuf, "%u", &var) != 1)
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return -EINVAL;
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if (var < ent->limit)
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return -EINVAL;
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if (var > ent->size) {
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2013-10-23 14:53:14 +08:00
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do {
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err = add_keys(dev, c, var - ent->size);
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if (err && err != -EAGAIN)
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return err;
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usleep_range(3000, 5000);
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} while (err);
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2013-07-07 22:25:49 +08:00
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} else if (var < ent->size) {
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remove_keys(dev, c, ent->size - var);
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}
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return count;
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}
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static ssize_t size_read(struct file *filp, char __user *buf, size_t count,
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loff_t *pos)
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{
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struct mlx5_cache_ent *ent = filp->private_data;
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char lbuf[20];
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int err;
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if (*pos)
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return 0;
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err = snprintf(lbuf, sizeof(lbuf), "%d\n", ent->size);
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if (err < 0)
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return err;
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if (copy_to_user(buf, lbuf, err))
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2013-07-10 18:58:59 +08:00
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return -EFAULT;
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2013-07-07 22:25:49 +08:00
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*pos += err;
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return err;
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}
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static const struct file_operations size_fops = {
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.owner = THIS_MODULE,
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.open = simple_open,
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.write = size_write,
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.read = size_read,
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};
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static ssize_t limit_write(struct file *filp, const char __user *buf,
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size_t count, loff_t *pos)
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{
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struct mlx5_cache_ent *ent = filp->private_data;
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struct mlx5_ib_dev *dev = ent->dev;
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char lbuf[20];
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u32 var;
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int err;
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int c;
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if (copy_from_user(lbuf, buf, sizeof(lbuf)))
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2013-07-10 18:58:59 +08:00
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return -EFAULT;
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2013-07-07 22:25:49 +08:00
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c = order2idx(dev, ent->order);
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lbuf[sizeof(lbuf) - 1] = 0;
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if (sscanf(lbuf, "%u", &var) != 1)
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return -EINVAL;
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if (var > ent->size)
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return -EINVAL;
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ent->limit = var;
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if (ent->cur < ent->limit) {
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err = add_keys(dev, c, 2 * ent->limit - ent->cur);
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if (err)
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return err;
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}
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return count;
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}
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static ssize_t limit_read(struct file *filp, char __user *buf, size_t count,
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loff_t *pos)
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{
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struct mlx5_cache_ent *ent = filp->private_data;
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char lbuf[20];
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int err;
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if (*pos)
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return 0;
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err = snprintf(lbuf, sizeof(lbuf), "%d\n", ent->limit);
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if (err < 0)
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return err;
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if (copy_to_user(buf, lbuf, err))
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2013-07-10 18:58:59 +08:00
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return -EFAULT;
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2013-07-07 22:25:49 +08:00
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*pos += err;
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return err;
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}
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static const struct file_operations limit_fops = {
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.owner = THIS_MODULE,
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.open = simple_open,
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.write = limit_write,
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.read = limit_read,
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};
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static int someone_adding(struct mlx5_mr_cache *cache)
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{
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int i;
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for (i = 0; i < MAX_MR_CACHE_ENTRIES; i++) {
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if (cache->ent[i].cur < cache->ent[i].limit)
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return 1;
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}
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return 0;
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}
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static void __cache_work_func(struct mlx5_cache_ent *ent)
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{
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struct mlx5_ib_dev *dev = ent->dev;
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struct mlx5_mr_cache *cache = &dev->cache;
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int i = order2idx(dev, ent->order);
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2013-10-23 14:53:14 +08:00
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int err;
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2013-07-07 22:25:49 +08:00
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if (cache->stopped)
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return;
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ent = &dev->cache.ent[i];
|
2013-10-23 14:53:14 +08:00
|
|
|
if (ent->cur < 2 * ent->limit && !dev->fill_delay) {
|
|
|
|
err = add_keys(dev, i, 1);
|
|
|
|
if (ent->cur < 2 * ent->limit) {
|
|
|
|
if (err == -EAGAIN) {
|
|
|
|
mlx5_ib_dbg(dev, "returned eagain, order %d\n",
|
|
|
|
i + 2);
|
|
|
|
queue_delayed_work(cache->wq, &ent->dwork,
|
|
|
|
msecs_to_jiffies(3));
|
|
|
|
} else if (err) {
|
|
|
|
mlx5_ib_warn(dev, "command failed order %d, err %d\n",
|
|
|
|
i + 2, err);
|
|
|
|
queue_delayed_work(cache->wq, &ent->dwork,
|
|
|
|
msecs_to_jiffies(1000));
|
|
|
|
} else {
|
|
|
|
queue_work(cache->wq, &ent->work);
|
|
|
|
}
|
|
|
|
}
|
2013-07-07 22:25:49 +08:00
|
|
|
} else if (ent->cur > 2 * ent->limit) {
|
|
|
|
if (!someone_adding(cache) &&
|
2013-10-23 14:53:14 +08:00
|
|
|
time_after(jiffies, cache->last_add + 300 * HZ)) {
|
2013-07-07 22:25:49 +08:00
|
|
|
remove_keys(dev, i, 1);
|
|
|
|
if (ent->cur > ent->limit)
|
|
|
|
queue_work(cache->wq, &ent->work);
|
|
|
|
} else {
|
2013-10-23 14:53:14 +08:00
|
|
|
queue_delayed_work(cache->wq, &ent->dwork, 300 * HZ);
|
2013-07-07 22:25:49 +08:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void delayed_cache_work_func(struct work_struct *work)
|
|
|
|
{
|
|
|
|
struct mlx5_cache_ent *ent;
|
|
|
|
|
|
|
|
ent = container_of(work, struct mlx5_cache_ent, dwork.work);
|
|
|
|
__cache_work_func(ent);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void cache_work_func(struct work_struct *work)
|
|
|
|
{
|
|
|
|
struct mlx5_cache_ent *ent;
|
|
|
|
|
|
|
|
ent = container_of(work, struct mlx5_cache_ent, work);
|
|
|
|
__cache_work_func(ent);
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct mlx5_ib_mr *alloc_cached_mr(struct mlx5_ib_dev *dev, int order)
|
|
|
|
{
|
|
|
|
struct mlx5_mr_cache *cache = &dev->cache;
|
|
|
|
struct mlx5_ib_mr *mr = NULL;
|
|
|
|
struct mlx5_cache_ent *ent;
|
|
|
|
int c;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
c = order2idx(dev, order);
|
|
|
|
if (c < 0 || c >= MAX_MR_CACHE_ENTRIES) {
|
|
|
|
mlx5_ib_warn(dev, "order %d, cache index %d\n", order, c);
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
for (i = c; i < MAX_MR_CACHE_ENTRIES; i++) {
|
|
|
|
ent = &cache->ent[i];
|
|
|
|
|
|
|
|
mlx5_ib_dbg(dev, "order %d, cache index %d\n", ent->order, i);
|
|
|
|
|
2013-10-23 14:53:14 +08:00
|
|
|
spin_lock_irq(&ent->lock);
|
2013-07-07 22:25:49 +08:00
|
|
|
if (!list_empty(&ent->head)) {
|
|
|
|
mr = list_first_entry(&ent->head, struct mlx5_ib_mr,
|
|
|
|
list);
|
|
|
|
list_del(&mr->list);
|
|
|
|
ent->cur--;
|
2013-10-23 14:53:14 +08:00
|
|
|
spin_unlock_irq(&ent->lock);
|
2013-07-07 22:25:49 +08:00
|
|
|
if (ent->cur < ent->limit)
|
|
|
|
queue_work(cache->wq, &ent->work);
|
|
|
|
break;
|
|
|
|
}
|
2013-10-23 14:53:14 +08:00
|
|
|
spin_unlock_irq(&ent->lock);
|
2013-07-07 22:25:49 +08:00
|
|
|
|
|
|
|
queue_work(cache->wq, &ent->work);
|
|
|
|
|
|
|
|
if (mr)
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!mr)
|
|
|
|
cache->ent[c].miss++;
|
|
|
|
|
|
|
|
return mr;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void free_cached_mr(struct mlx5_ib_dev *dev, struct mlx5_ib_mr *mr)
|
|
|
|
{
|
|
|
|
struct mlx5_mr_cache *cache = &dev->cache;
|
|
|
|
struct mlx5_cache_ent *ent;
|
|
|
|
int shrink = 0;
|
|
|
|
int c;
|
|
|
|
|
|
|
|
c = order2idx(dev, mr->order);
|
|
|
|
if (c < 0 || c >= MAX_MR_CACHE_ENTRIES) {
|
|
|
|
mlx5_ib_warn(dev, "order %d, cache index %d\n", mr->order, c);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
ent = &cache->ent[c];
|
2013-10-23 14:53:14 +08:00
|
|
|
spin_lock_irq(&ent->lock);
|
2013-07-07 22:25:49 +08:00
|
|
|
list_add_tail(&mr->list, &ent->head);
|
|
|
|
ent->cur++;
|
|
|
|
if (ent->cur > 2 * ent->limit)
|
|
|
|
shrink = 1;
|
2013-10-23 14:53:14 +08:00
|
|
|
spin_unlock_irq(&ent->lock);
|
2013-07-07 22:25:49 +08:00
|
|
|
|
|
|
|
if (shrink)
|
|
|
|
queue_work(cache->wq, &ent->work);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void clean_keys(struct mlx5_ib_dev *dev, int c)
|
|
|
|
{
|
|
|
|
struct mlx5_mr_cache *cache = &dev->cache;
|
|
|
|
struct mlx5_cache_ent *ent = &cache->ent[c];
|
|
|
|
struct mlx5_ib_mr *mr;
|
|
|
|
int err;
|
|
|
|
|
2013-09-11 21:35:23 +08:00
|
|
|
cancel_delayed_work(&ent->dwork);
|
2013-07-07 22:25:49 +08:00
|
|
|
while (1) {
|
2013-10-23 14:53:14 +08:00
|
|
|
spin_lock_irq(&ent->lock);
|
2013-07-07 22:25:49 +08:00
|
|
|
if (list_empty(&ent->head)) {
|
2013-10-23 14:53:14 +08:00
|
|
|
spin_unlock_irq(&ent->lock);
|
2013-07-07 22:25:49 +08:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
mr = list_first_entry(&ent->head, struct mlx5_ib_mr, list);
|
|
|
|
list_del(&mr->list);
|
|
|
|
ent->cur--;
|
|
|
|
ent->size--;
|
2013-10-23 14:53:14 +08:00
|
|
|
spin_unlock_irq(&ent->lock);
|
2013-07-07 22:25:49 +08:00
|
|
|
err = mlx5_core_destroy_mkey(&dev->mdev, &mr->mmr);
|
2013-09-11 21:35:26 +08:00
|
|
|
if (err)
|
2013-07-07 22:25:49 +08:00
|
|
|
mlx5_ib_warn(dev, "failed destroy mkey\n");
|
2013-09-11 21:35:26 +08:00
|
|
|
else
|
2013-07-07 22:25:49 +08:00
|
|
|
kfree(mr);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static int mlx5_mr_cache_debugfs_init(struct mlx5_ib_dev *dev)
|
|
|
|
{
|
|
|
|
struct mlx5_mr_cache *cache = &dev->cache;
|
|
|
|
struct mlx5_cache_ent *ent;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
if (!mlx5_debugfs_root)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
cache->root = debugfs_create_dir("mr_cache", dev->mdev.priv.dbg_root);
|
|
|
|
if (!cache->root)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
for (i = 0; i < MAX_MR_CACHE_ENTRIES; i++) {
|
|
|
|
ent = &cache->ent[i];
|
|
|
|
sprintf(ent->name, "%d", ent->order);
|
|
|
|
ent->dir = debugfs_create_dir(ent->name, cache->root);
|
|
|
|
if (!ent->dir)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
ent->fsize = debugfs_create_file("size", 0600, ent->dir, ent,
|
|
|
|
&size_fops);
|
|
|
|
if (!ent->fsize)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
ent->flimit = debugfs_create_file("limit", 0600, ent->dir, ent,
|
|
|
|
&limit_fops);
|
|
|
|
if (!ent->flimit)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
ent->fcur = debugfs_create_u32("cur", 0400, ent->dir,
|
|
|
|
&ent->cur);
|
|
|
|
if (!ent->fcur)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
ent->fmiss = debugfs_create_u32("miss", 0600, ent->dir,
|
|
|
|
&ent->miss);
|
|
|
|
if (!ent->fmiss)
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void mlx5_mr_cache_debugfs_cleanup(struct mlx5_ib_dev *dev)
|
|
|
|
{
|
|
|
|
if (!mlx5_debugfs_root)
|
|
|
|
return;
|
|
|
|
|
|
|
|
debugfs_remove_recursive(dev->cache.root);
|
|
|
|
}
|
|
|
|
|
2013-10-23 14:53:14 +08:00
|
|
|
static void delay_time_func(unsigned long ctx)
|
|
|
|
{
|
|
|
|
struct mlx5_ib_dev *dev = (struct mlx5_ib_dev *)ctx;
|
|
|
|
|
|
|
|
dev->fill_delay = 0;
|
|
|
|
}
|
|
|
|
|
2013-07-07 22:25:49 +08:00
|
|
|
int mlx5_mr_cache_init(struct mlx5_ib_dev *dev)
|
|
|
|
{
|
|
|
|
struct mlx5_mr_cache *cache = &dev->cache;
|
|
|
|
struct mlx5_cache_ent *ent;
|
|
|
|
int limit;
|
|
|
|
int err;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
cache->wq = create_singlethread_workqueue("mkey_cache");
|
|
|
|
if (!cache->wq) {
|
|
|
|
mlx5_ib_warn(dev, "failed to create work queue\n");
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
|
2013-10-23 14:53:14 +08:00
|
|
|
setup_timer(&dev->delay_timer, delay_time_func, (unsigned long)dev);
|
2013-07-07 22:25:49 +08:00
|
|
|
for (i = 0; i < MAX_MR_CACHE_ENTRIES; i++) {
|
|
|
|
INIT_LIST_HEAD(&cache->ent[i].head);
|
|
|
|
spin_lock_init(&cache->ent[i].lock);
|
|
|
|
|
|
|
|
ent = &cache->ent[i];
|
|
|
|
INIT_LIST_HEAD(&ent->head);
|
|
|
|
spin_lock_init(&ent->lock);
|
|
|
|
ent->order = i + 2;
|
|
|
|
ent->dev = dev;
|
|
|
|
|
2013-10-24 17:01:00 +08:00
|
|
|
if (dev->mdev.profile->mask & MLX5_PROF_MASK_MR_CACHE)
|
2013-07-07 22:25:49 +08:00
|
|
|
limit = dev->mdev.profile->mr_cache[i].limit;
|
2013-10-24 17:01:00 +08:00
|
|
|
else
|
2013-07-07 22:25:49 +08:00
|
|
|
limit = 0;
|
2013-10-24 17:01:00 +08:00
|
|
|
|
2013-07-07 22:25:49 +08:00
|
|
|
INIT_WORK(&ent->work, cache_work_func);
|
|
|
|
INIT_DELAYED_WORK(&ent->dwork, delayed_cache_work_func);
|
|
|
|
ent->limit = limit;
|
|
|
|
queue_work(cache->wq, &ent->work);
|
|
|
|
}
|
|
|
|
|
|
|
|
err = mlx5_mr_cache_debugfs_init(dev);
|
|
|
|
if (err)
|
|
|
|
mlx5_ib_warn(dev, "cache debugfs failure\n");
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
int mlx5_mr_cache_cleanup(struct mlx5_ib_dev *dev)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
|
|
|
dev->cache.stopped = 1;
|
2013-09-11 21:35:23 +08:00
|
|
|
flush_workqueue(dev->cache.wq);
|
2013-07-07 22:25:49 +08:00
|
|
|
|
|
|
|
mlx5_mr_cache_debugfs_cleanup(dev);
|
|
|
|
|
|
|
|
for (i = 0; i < MAX_MR_CACHE_ENTRIES; i++)
|
|
|
|
clean_keys(dev, i);
|
|
|
|
|
2013-09-11 21:35:23 +08:00
|
|
|
destroy_workqueue(dev->cache.wq);
|
2013-10-23 14:53:14 +08:00
|
|
|
del_timer_sync(&dev->delay_timer);
|
2013-09-11 21:35:23 +08:00
|
|
|
|
2013-07-07 22:25:49 +08:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
struct ib_mr *mlx5_ib_get_dma_mr(struct ib_pd *pd, int acc)
|
|
|
|
{
|
|
|
|
struct mlx5_ib_dev *dev = to_mdev(pd->device);
|
|
|
|
struct mlx5_core_dev *mdev = &dev->mdev;
|
|
|
|
struct mlx5_create_mkey_mbox_in *in;
|
|
|
|
struct mlx5_mkey_seg *seg;
|
|
|
|
struct mlx5_ib_mr *mr;
|
|
|
|
int err;
|
|
|
|
|
|
|
|
mr = kzalloc(sizeof(*mr), GFP_KERNEL);
|
|
|
|
if (!mr)
|
|
|
|
return ERR_PTR(-ENOMEM);
|
|
|
|
|
|
|
|
in = kzalloc(sizeof(*in), GFP_KERNEL);
|
|
|
|
if (!in) {
|
|
|
|
err = -ENOMEM;
|
|
|
|
goto err_free;
|
|
|
|
}
|
|
|
|
|
|
|
|
seg = &in->seg;
|
|
|
|
seg->flags = convert_access(acc) | MLX5_ACCESS_MODE_PA;
|
|
|
|
seg->flags_pd = cpu_to_be32(to_mpd(pd)->pdn | MLX5_MKEY_LEN64);
|
|
|
|
seg->qpn_mkey7_0 = cpu_to_be32(0xffffff << 8);
|
|
|
|
seg->start_addr = 0;
|
|
|
|
|
2013-10-23 14:53:14 +08:00
|
|
|
err = mlx5_core_create_mkey(mdev, &mr->mmr, in, sizeof(*in), NULL, NULL,
|
|
|
|
NULL);
|
2013-07-07 22:25:49 +08:00
|
|
|
if (err)
|
|
|
|
goto err_in;
|
|
|
|
|
|
|
|
kfree(in);
|
|
|
|
mr->ibmr.lkey = mr->mmr.key;
|
|
|
|
mr->ibmr.rkey = mr->mmr.key;
|
|
|
|
mr->umem = NULL;
|
|
|
|
|
|
|
|
return &mr->ibmr;
|
|
|
|
|
|
|
|
err_in:
|
|
|
|
kfree(in);
|
|
|
|
|
|
|
|
err_free:
|
|
|
|
kfree(mr);
|
|
|
|
|
|
|
|
return ERR_PTR(err);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int get_octo_len(u64 addr, u64 len, int page_size)
|
|
|
|
{
|
|
|
|
u64 offset;
|
|
|
|
int npages;
|
|
|
|
|
|
|
|
offset = addr & (page_size - 1);
|
|
|
|
npages = ALIGN(len + offset, page_size) >> ilog2(page_size);
|
|
|
|
return (npages + 1) / 2;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int use_umr(int order)
|
|
|
|
{
|
|
|
|
return order <= 17;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void prep_umr_reg_wqe(struct ib_pd *pd, struct ib_send_wr *wr,
|
|
|
|
struct ib_sge *sg, u64 dma, int n, u32 key,
|
|
|
|
int page_shift, u64 virt_addr, u64 len,
|
|
|
|
int access_flags)
|
|
|
|
{
|
|
|
|
struct mlx5_ib_dev *dev = to_mdev(pd->device);
|
|
|
|
struct ib_mr *mr = dev->umrc.mr;
|
|
|
|
|
|
|
|
sg->addr = dma;
|
|
|
|
sg->length = ALIGN(sizeof(u64) * n, 64);
|
|
|
|
sg->lkey = mr->lkey;
|
|
|
|
|
|
|
|
wr->next = NULL;
|
|
|
|
wr->send_flags = 0;
|
|
|
|
wr->sg_list = sg;
|
|
|
|
if (n)
|
|
|
|
wr->num_sge = 1;
|
|
|
|
else
|
|
|
|
wr->num_sge = 0;
|
|
|
|
|
|
|
|
wr->opcode = MLX5_IB_WR_UMR;
|
|
|
|
wr->wr.fast_reg.page_list_len = n;
|
|
|
|
wr->wr.fast_reg.page_shift = page_shift;
|
|
|
|
wr->wr.fast_reg.rkey = key;
|
|
|
|
wr->wr.fast_reg.iova_start = virt_addr;
|
|
|
|
wr->wr.fast_reg.length = len;
|
|
|
|
wr->wr.fast_reg.access_flags = access_flags;
|
|
|
|
wr->wr.fast_reg.page_list = (struct ib_fast_reg_page_list *)pd;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void prep_umr_unreg_wqe(struct mlx5_ib_dev *dev,
|
|
|
|
struct ib_send_wr *wr, u32 key)
|
|
|
|
{
|
|
|
|
wr->send_flags = MLX5_IB_SEND_UMR_UNREG;
|
|
|
|
wr->opcode = MLX5_IB_WR_UMR;
|
|
|
|
wr->wr.fast_reg.rkey = key;
|
|
|
|
}
|
|
|
|
|
|
|
|
void mlx5_umr_cq_handler(struct ib_cq *cq, void *cq_context)
|
|
|
|
{
|
2014-05-22 19:50:12 +08:00
|
|
|
struct mlx5_ib_umr_context *context;
|
2013-07-07 22:25:49 +08:00
|
|
|
struct ib_wc wc;
|
|
|
|
int err;
|
|
|
|
|
|
|
|
while (1) {
|
|
|
|
err = ib_poll_cq(cq, 1, &wc);
|
|
|
|
if (err < 0) {
|
|
|
|
pr_warn("poll cq error %d\n", err);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
if (err == 0)
|
|
|
|
break;
|
|
|
|
|
2014-05-29 00:23:03 +08:00
|
|
|
context = (struct mlx5_ib_umr_context *) (unsigned long) wc.wr_id;
|
2014-05-22 19:50:12 +08:00
|
|
|
context->status = wc.status;
|
|
|
|
complete(&context->done);
|
2013-07-07 22:25:49 +08:00
|
|
|
}
|
|
|
|
ib_req_notify_cq(cq, IB_CQ_NEXT_COMP);
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct mlx5_ib_mr *reg_umr(struct ib_pd *pd, struct ib_umem *umem,
|
|
|
|
u64 virt_addr, u64 len, int npages,
|
|
|
|
int page_shift, int order, int access_flags)
|
|
|
|
{
|
|
|
|
struct mlx5_ib_dev *dev = to_mdev(pd->device);
|
2013-09-11 21:35:26 +08:00
|
|
|
struct device *ddev = dev->ib_dev.dma_device;
|
2013-07-07 22:25:49 +08:00
|
|
|
struct umr_common *umrc = &dev->umrc;
|
2014-05-22 19:50:12 +08:00
|
|
|
struct mlx5_ib_umr_context umr_context;
|
2013-07-07 22:25:49 +08:00
|
|
|
struct ib_send_wr wr, *bad;
|
|
|
|
struct mlx5_ib_mr *mr;
|
|
|
|
struct ib_sge sg;
|
2013-09-11 21:35:26 +08:00
|
|
|
int size = sizeof(u64) * npages;
|
2014-05-22 19:50:08 +08:00
|
|
|
int err = 0;
|
2013-07-07 22:25:49 +08:00
|
|
|
int i;
|
|
|
|
|
2013-10-23 14:53:14 +08:00
|
|
|
for (i = 0; i < 1; i++) {
|
2013-07-07 22:25:49 +08:00
|
|
|
mr = alloc_cached_mr(dev, order);
|
|
|
|
if (mr)
|
|
|
|
break;
|
|
|
|
|
|
|
|
err = add_keys(dev, order2idx(dev, order), 1);
|
2013-10-23 14:53:14 +08:00
|
|
|
if (err && err != -EAGAIN) {
|
|
|
|
mlx5_ib_warn(dev, "add_keys failed, err %d\n", err);
|
2013-07-07 22:25:49 +08:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!mr)
|
|
|
|
return ERR_PTR(-EAGAIN);
|
|
|
|
|
2013-09-11 21:35:35 +08:00
|
|
|
mr->pas = kmalloc(size + MLX5_UMR_ALIGN - 1, GFP_KERNEL);
|
2013-09-11 21:35:26 +08:00
|
|
|
if (!mr->pas) {
|
|
|
|
err = -ENOMEM;
|
2014-05-22 19:50:08 +08:00
|
|
|
goto free_mr;
|
2013-09-11 21:35:26 +08:00
|
|
|
}
|
2013-09-11 21:35:36 +08:00
|
|
|
|
|
|
|
mlx5_ib_populate_pas(dev, umem, page_shift,
|
|
|
|
mr_align(mr->pas, MLX5_UMR_ALIGN), 1);
|
|
|
|
|
2013-09-11 21:35:35 +08:00
|
|
|
mr->dma = dma_map_single(ddev, mr_align(mr->pas, MLX5_UMR_ALIGN), size,
|
2013-09-11 21:35:26 +08:00
|
|
|
DMA_TO_DEVICE);
|
|
|
|
if (dma_mapping_error(ddev, mr->dma)) {
|
|
|
|
err = -ENOMEM;
|
2014-05-22 19:50:08 +08:00
|
|
|
goto free_pas;
|
2013-09-11 21:35:26 +08:00
|
|
|
}
|
|
|
|
|
2013-07-07 22:25:49 +08:00
|
|
|
memset(&wr, 0, sizeof(wr));
|
2014-05-22 19:50:12 +08:00
|
|
|
wr.wr_id = (u64)(unsigned long)&umr_context;
|
2013-07-07 22:25:49 +08:00
|
|
|
prep_umr_reg_wqe(pd, &wr, &sg, mr->dma, npages, mr->mmr.key, page_shift, virt_addr, len, access_flags);
|
|
|
|
|
2014-05-22 19:50:12 +08:00
|
|
|
mlx5_ib_init_umr_context(&umr_context);
|
2013-07-07 22:25:49 +08:00
|
|
|
down(&umrc->sem);
|
|
|
|
err = ib_post_send(umrc->qp, &wr, &bad);
|
|
|
|
if (err) {
|
|
|
|
mlx5_ib_warn(dev, "post send failed, err %d\n", err);
|
2014-05-22 19:50:08 +08:00
|
|
|
goto unmap_dma;
|
2014-05-22 19:50:12 +08:00
|
|
|
} else {
|
|
|
|
wait_for_completion(&umr_context.done);
|
|
|
|
if (umr_context.status != IB_WC_SUCCESS) {
|
|
|
|
mlx5_ib_warn(dev, "reg umr failed\n");
|
|
|
|
err = -EFAULT;
|
|
|
|
}
|
2014-05-22 19:50:08 +08:00
|
|
|
}
|
2013-07-07 22:25:49 +08:00
|
|
|
|
2014-05-22 19:50:10 +08:00
|
|
|
mr->mmr.iova = virt_addr;
|
|
|
|
mr->mmr.size = len;
|
|
|
|
mr->mmr.pd = to_mpd(pd)->pdn;
|
|
|
|
|
2014-05-22 19:50:08 +08:00
|
|
|
unmap_dma:
|
|
|
|
up(&umrc->sem);
|
2013-09-11 21:35:26 +08:00
|
|
|
dma_unmap_single(ddev, mr->dma, size, DMA_TO_DEVICE);
|
2014-05-22 19:50:08 +08:00
|
|
|
|
|
|
|
free_pas:
|
2013-09-11 21:35:26 +08:00
|
|
|
kfree(mr->pas);
|
|
|
|
|
2014-05-22 19:50:08 +08:00
|
|
|
free_mr:
|
|
|
|
if (err) {
|
|
|
|
free_cached_mr(dev, mr);
|
|
|
|
return ERR_PTR(err);
|
2013-07-07 22:25:49 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
return mr;
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct mlx5_ib_mr *reg_create(struct ib_pd *pd, u64 virt_addr,
|
|
|
|
u64 length, struct ib_umem *umem,
|
|
|
|
int npages, int page_shift,
|
|
|
|
int access_flags)
|
|
|
|
{
|
|
|
|
struct mlx5_ib_dev *dev = to_mdev(pd->device);
|
|
|
|
struct mlx5_create_mkey_mbox_in *in;
|
|
|
|
struct mlx5_ib_mr *mr;
|
|
|
|
int inlen;
|
|
|
|
int err;
|
|
|
|
|
|
|
|
mr = kzalloc(sizeof(*mr), GFP_KERNEL);
|
|
|
|
if (!mr)
|
|
|
|
return ERR_PTR(-ENOMEM);
|
|
|
|
|
|
|
|
inlen = sizeof(*in) + sizeof(*in->pas) * ((npages + 1) / 2) * 2;
|
|
|
|
in = mlx5_vzalloc(inlen);
|
|
|
|
if (!in) {
|
|
|
|
err = -ENOMEM;
|
|
|
|
goto err_1;
|
|
|
|
}
|
|
|
|
mlx5_ib_populate_pas(dev, umem, page_shift, in->pas, 0);
|
|
|
|
|
|
|
|
in->seg.flags = convert_access(access_flags) |
|
|
|
|
MLX5_ACCESS_MODE_MTT;
|
|
|
|
in->seg.flags_pd = cpu_to_be32(to_mpd(pd)->pdn);
|
|
|
|
in->seg.start_addr = cpu_to_be64(virt_addr);
|
|
|
|
in->seg.len = cpu_to_be64(length);
|
|
|
|
in->seg.bsfs_octo_size = 0;
|
|
|
|
in->seg.xlt_oct_size = cpu_to_be32(get_octo_len(virt_addr, length, 1 << page_shift));
|
|
|
|
in->seg.log2_page_size = page_shift;
|
|
|
|
in->seg.qpn_mkey7_0 = cpu_to_be32(0xffffff << 8);
|
2013-10-23 14:53:14 +08:00
|
|
|
in->xlat_oct_act_size = cpu_to_be32(get_octo_len(virt_addr, length,
|
|
|
|
1 << page_shift));
|
|
|
|
err = mlx5_core_create_mkey(&dev->mdev, &mr->mmr, in, inlen, NULL,
|
|
|
|
NULL, NULL);
|
2013-07-07 22:25:49 +08:00
|
|
|
if (err) {
|
|
|
|
mlx5_ib_warn(dev, "create mkey failed\n");
|
|
|
|
goto err_2;
|
|
|
|
}
|
|
|
|
mr->umem = umem;
|
|
|
|
mlx5_vfree(in);
|
|
|
|
|
|
|
|
mlx5_ib_dbg(dev, "mkey = 0x%x\n", mr->mmr.key);
|
|
|
|
|
|
|
|
return mr;
|
|
|
|
|
|
|
|
err_2:
|
|
|
|
mlx5_vfree(in);
|
|
|
|
|
|
|
|
err_1:
|
|
|
|
kfree(mr);
|
|
|
|
|
|
|
|
return ERR_PTR(err);
|
|
|
|
}
|
|
|
|
|
|
|
|
struct ib_mr *mlx5_ib_reg_user_mr(struct ib_pd *pd, u64 start, u64 length,
|
|
|
|
u64 virt_addr, int access_flags,
|
|
|
|
struct ib_udata *udata)
|
|
|
|
{
|
|
|
|
struct mlx5_ib_dev *dev = to_mdev(pd->device);
|
|
|
|
struct mlx5_ib_mr *mr = NULL;
|
|
|
|
struct ib_umem *umem;
|
|
|
|
int page_shift;
|
|
|
|
int npages;
|
|
|
|
int ncont;
|
|
|
|
int order;
|
|
|
|
int err;
|
|
|
|
|
|
|
|
mlx5_ib_dbg(dev, "start 0x%llx, virt_addr 0x%llx, length 0x%llx\n",
|
|
|
|
start, virt_addr, length);
|
|
|
|
umem = ib_umem_get(pd->uobject->context, start, length, access_flags,
|
|
|
|
0);
|
|
|
|
if (IS_ERR(umem)) {
|
|
|
|
mlx5_ib_dbg(dev, "umem get failed\n");
|
|
|
|
return (void *)umem;
|
|
|
|
}
|
|
|
|
|
|
|
|
mlx5_ib_cont_pages(umem, start, &npages, &page_shift, &ncont, &order);
|
|
|
|
if (!npages) {
|
|
|
|
mlx5_ib_warn(dev, "avoid zero region\n");
|
|
|
|
err = -EINVAL;
|
|
|
|
goto error;
|
|
|
|
}
|
|
|
|
|
|
|
|
mlx5_ib_dbg(dev, "npages %d, ncont %d, order %d, page_shift %d\n",
|
|
|
|
npages, ncont, order, page_shift);
|
|
|
|
|
|
|
|
if (use_umr(order)) {
|
|
|
|
mr = reg_umr(pd, umem, virt_addr, length, ncont, page_shift,
|
|
|
|
order, access_flags);
|
|
|
|
if (PTR_ERR(mr) == -EAGAIN) {
|
|
|
|
mlx5_ib_dbg(dev, "cache empty for order %d", order);
|
|
|
|
mr = NULL;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!mr)
|
|
|
|
mr = reg_create(pd, virt_addr, length, umem, ncont, page_shift,
|
|
|
|
access_flags);
|
|
|
|
|
|
|
|
if (IS_ERR(mr)) {
|
|
|
|
err = PTR_ERR(mr);
|
|
|
|
goto error;
|
|
|
|
}
|
|
|
|
|
|
|
|
mlx5_ib_dbg(dev, "mkey 0x%x\n", mr->mmr.key);
|
|
|
|
|
|
|
|
mr->umem = umem;
|
|
|
|
mr->npages = npages;
|
|
|
|
spin_lock(&dev->mr_lock);
|
|
|
|
dev->mdev.priv.reg_pages += npages;
|
|
|
|
spin_unlock(&dev->mr_lock);
|
|
|
|
mr->ibmr.lkey = mr->mmr.key;
|
|
|
|
mr->ibmr.rkey = mr->mmr.key;
|
|
|
|
|
|
|
|
return &mr->ibmr;
|
|
|
|
|
|
|
|
error:
|
|
|
|
ib_umem_release(umem);
|
|
|
|
return ERR_PTR(err);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int unreg_umr(struct mlx5_ib_dev *dev, struct mlx5_ib_mr *mr)
|
|
|
|
{
|
|
|
|
struct umr_common *umrc = &dev->umrc;
|
2014-05-22 19:50:12 +08:00
|
|
|
struct mlx5_ib_umr_context umr_context;
|
2013-07-07 22:25:49 +08:00
|
|
|
struct ib_send_wr wr, *bad;
|
|
|
|
int err;
|
|
|
|
|
|
|
|
memset(&wr, 0, sizeof(wr));
|
2014-05-22 19:50:12 +08:00
|
|
|
wr.wr_id = (u64)(unsigned long)&umr_context;
|
2013-07-07 22:25:49 +08:00
|
|
|
prep_umr_unreg_wqe(dev, &wr, mr->mmr.key);
|
|
|
|
|
2014-05-22 19:50:12 +08:00
|
|
|
mlx5_ib_init_umr_context(&umr_context);
|
2013-07-07 22:25:49 +08:00
|
|
|
down(&umrc->sem);
|
|
|
|
err = ib_post_send(umrc->qp, &wr, &bad);
|
|
|
|
if (err) {
|
|
|
|
up(&umrc->sem);
|
|
|
|
mlx5_ib_dbg(dev, "err %d\n", err);
|
|
|
|
goto error;
|
2014-05-22 19:50:12 +08:00
|
|
|
} else {
|
|
|
|
wait_for_completion(&umr_context.done);
|
|
|
|
up(&umrc->sem);
|
2013-07-07 22:25:49 +08:00
|
|
|
}
|
2014-05-22 19:50:12 +08:00
|
|
|
if (umr_context.status != IB_WC_SUCCESS) {
|
2013-07-07 22:25:49 +08:00
|
|
|
mlx5_ib_warn(dev, "unreg umr failed\n");
|
|
|
|
err = -EFAULT;
|
|
|
|
goto error;
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
error:
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
|
|
|
int mlx5_ib_dereg_mr(struct ib_mr *ibmr)
|
|
|
|
{
|
|
|
|
struct mlx5_ib_dev *dev = to_mdev(ibmr->device);
|
|
|
|
struct mlx5_ib_mr *mr = to_mmr(ibmr);
|
|
|
|
struct ib_umem *umem = mr->umem;
|
|
|
|
int npages = mr->npages;
|
|
|
|
int umred = mr->umred;
|
|
|
|
int err;
|
|
|
|
|
|
|
|
if (!umred) {
|
|
|
|
err = mlx5_core_destroy_mkey(&dev->mdev, &mr->mmr);
|
|
|
|
if (err) {
|
|
|
|
mlx5_ib_warn(dev, "failed to destroy mkey 0x%x (%d)\n",
|
|
|
|
mr->mmr.key, err);
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
err = unreg_umr(dev, mr);
|
|
|
|
if (err) {
|
|
|
|
mlx5_ib_warn(dev, "failed unregister\n");
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
free_cached_mr(dev, mr);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (umem) {
|
|
|
|
ib_umem_release(umem);
|
|
|
|
spin_lock(&dev->mr_lock);
|
|
|
|
dev->mdev.priv.reg_pages -= npages;
|
|
|
|
spin_unlock(&dev->mr_lock);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!umred)
|
|
|
|
kfree(mr);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2014-02-23 20:19:06 +08:00
|
|
|
struct ib_mr *mlx5_ib_create_mr(struct ib_pd *pd,
|
|
|
|
struct ib_mr_init_attr *mr_init_attr)
|
|
|
|
{
|
|
|
|
struct mlx5_ib_dev *dev = to_mdev(pd->device);
|
|
|
|
struct mlx5_create_mkey_mbox_in *in;
|
|
|
|
struct mlx5_ib_mr *mr;
|
|
|
|
int access_mode, err;
|
|
|
|
int ndescs = roundup(mr_init_attr->max_reg_descriptors, 4);
|
|
|
|
|
|
|
|
mr = kzalloc(sizeof(*mr), GFP_KERNEL);
|
|
|
|
if (!mr)
|
|
|
|
return ERR_PTR(-ENOMEM);
|
|
|
|
|
|
|
|
in = kzalloc(sizeof(*in), GFP_KERNEL);
|
|
|
|
if (!in) {
|
|
|
|
err = -ENOMEM;
|
|
|
|
goto err_free;
|
|
|
|
}
|
|
|
|
|
|
|
|
in->seg.status = 1 << 6; /* free */
|
|
|
|
in->seg.xlt_oct_size = cpu_to_be32(ndescs);
|
|
|
|
in->seg.qpn_mkey7_0 = cpu_to_be32(0xffffff << 8);
|
|
|
|
in->seg.flags_pd = cpu_to_be32(to_mpd(pd)->pdn);
|
|
|
|
access_mode = MLX5_ACCESS_MODE_MTT;
|
|
|
|
|
|
|
|
if (mr_init_attr->flags & IB_MR_SIGNATURE_EN) {
|
|
|
|
u32 psv_index[2];
|
|
|
|
|
|
|
|
in->seg.flags_pd = cpu_to_be32(be32_to_cpu(in->seg.flags_pd) |
|
|
|
|
MLX5_MKEY_BSF_EN);
|
|
|
|
in->seg.bsfs_octo_size = cpu_to_be32(MLX5_MKEY_BSF_OCTO_SIZE);
|
|
|
|
mr->sig = kzalloc(sizeof(*mr->sig), GFP_KERNEL);
|
|
|
|
if (!mr->sig) {
|
|
|
|
err = -ENOMEM;
|
|
|
|
goto err_free_in;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* create mem & wire PSVs */
|
|
|
|
err = mlx5_core_create_psv(&dev->mdev, to_mpd(pd)->pdn,
|
|
|
|
2, psv_index);
|
|
|
|
if (err)
|
|
|
|
goto err_free_sig;
|
|
|
|
|
|
|
|
access_mode = MLX5_ACCESS_MODE_KLM;
|
|
|
|
mr->sig->psv_memory.psv_idx = psv_index[0];
|
|
|
|
mr->sig->psv_wire.psv_idx = psv_index[1];
|
2014-02-23 20:19:12 +08:00
|
|
|
|
|
|
|
mr->sig->sig_status_checked = true;
|
|
|
|
mr->sig->sig_err_exists = false;
|
|
|
|
/* Next UMR, Arm SIGERR */
|
|
|
|
++mr->sig->sigerr_count;
|
2014-02-23 20:19:06 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
in->seg.flags = MLX5_PERM_UMR_EN | access_mode;
|
|
|
|
err = mlx5_core_create_mkey(&dev->mdev, &mr->mmr, in, sizeof(*in),
|
|
|
|
NULL, NULL, NULL);
|
|
|
|
if (err)
|
|
|
|
goto err_destroy_psv;
|
|
|
|
|
|
|
|
mr->ibmr.lkey = mr->mmr.key;
|
|
|
|
mr->ibmr.rkey = mr->mmr.key;
|
|
|
|
mr->umem = NULL;
|
|
|
|
kfree(in);
|
|
|
|
|
|
|
|
return &mr->ibmr;
|
|
|
|
|
|
|
|
err_destroy_psv:
|
|
|
|
if (mr->sig) {
|
|
|
|
if (mlx5_core_destroy_psv(&dev->mdev,
|
|
|
|
mr->sig->psv_memory.psv_idx))
|
|
|
|
mlx5_ib_warn(dev, "failed to destroy mem psv %d\n",
|
|
|
|
mr->sig->psv_memory.psv_idx);
|
|
|
|
if (mlx5_core_destroy_psv(&dev->mdev,
|
|
|
|
mr->sig->psv_wire.psv_idx))
|
|
|
|
mlx5_ib_warn(dev, "failed to destroy wire psv %d\n",
|
|
|
|
mr->sig->psv_wire.psv_idx);
|
|
|
|
}
|
|
|
|
err_free_sig:
|
|
|
|
kfree(mr->sig);
|
|
|
|
err_free_in:
|
|
|
|
kfree(in);
|
|
|
|
err_free:
|
|
|
|
kfree(mr);
|
|
|
|
return ERR_PTR(err);
|
|
|
|
}
|
|
|
|
|
|
|
|
int mlx5_ib_destroy_mr(struct ib_mr *ibmr)
|
|
|
|
{
|
|
|
|
struct mlx5_ib_dev *dev = to_mdev(ibmr->device);
|
|
|
|
struct mlx5_ib_mr *mr = to_mmr(ibmr);
|
|
|
|
int err;
|
|
|
|
|
|
|
|
if (mr->sig) {
|
|
|
|
if (mlx5_core_destroy_psv(&dev->mdev,
|
|
|
|
mr->sig->psv_memory.psv_idx))
|
|
|
|
mlx5_ib_warn(dev, "failed to destroy mem psv %d\n",
|
|
|
|
mr->sig->psv_memory.psv_idx);
|
|
|
|
if (mlx5_core_destroy_psv(&dev->mdev,
|
|
|
|
mr->sig->psv_wire.psv_idx))
|
|
|
|
mlx5_ib_warn(dev, "failed to destroy wire psv %d\n",
|
|
|
|
mr->sig->psv_wire.psv_idx);
|
|
|
|
kfree(mr->sig);
|
|
|
|
}
|
|
|
|
|
|
|
|
err = mlx5_core_destroy_mkey(&dev->mdev, &mr->mmr);
|
|
|
|
if (err) {
|
|
|
|
mlx5_ib_warn(dev, "failed to destroy mkey 0x%x (%d)\n",
|
|
|
|
mr->mmr.key, err);
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
|
|
|
kfree(mr);
|
|
|
|
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
2013-07-07 22:25:49 +08:00
|
|
|
struct ib_mr *mlx5_ib_alloc_fast_reg_mr(struct ib_pd *pd,
|
|
|
|
int max_page_list_len)
|
|
|
|
{
|
|
|
|
struct mlx5_ib_dev *dev = to_mdev(pd->device);
|
|
|
|
struct mlx5_create_mkey_mbox_in *in;
|
|
|
|
struct mlx5_ib_mr *mr;
|
|
|
|
int err;
|
|
|
|
|
|
|
|
mr = kzalloc(sizeof(*mr), GFP_KERNEL);
|
|
|
|
if (!mr)
|
|
|
|
return ERR_PTR(-ENOMEM);
|
|
|
|
|
|
|
|
in = kzalloc(sizeof(*in), GFP_KERNEL);
|
|
|
|
if (!in) {
|
|
|
|
err = -ENOMEM;
|
|
|
|
goto err_free;
|
|
|
|
}
|
|
|
|
|
|
|
|
in->seg.status = 1 << 6; /* free */
|
|
|
|
in->seg.xlt_oct_size = cpu_to_be32((max_page_list_len + 1) / 2);
|
|
|
|
in->seg.qpn_mkey7_0 = cpu_to_be32(0xffffff << 8);
|
|
|
|
in->seg.flags = MLX5_PERM_UMR_EN | MLX5_ACCESS_MODE_MTT;
|
|
|
|
in->seg.flags_pd = cpu_to_be32(to_mpd(pd)->pdn);
|
|
|
|
/*
|
|
|
|
* TBD not needed - issue 197292 */
|
|
|
|
in->seg.log2_page_size = PAGE_SHIFT;
|
|
|
|
|
2013-10-23 14:53:14 +08:00
|
|
|
err = mlx5_core_create_mkey(&dev->mdev, &mr->mmr, in, sizeof(*in), NULL,
|
|
|
|
NULL, NULL);
|
2013-07-07 22:25:49 +08:00
|
|
|
kfree(in);
|
|
|
|
if (err)
|
|
|
|
goto err_free;
|
|
|
|
|
|
|
|
mr->ibmr.lkey = mr->mmr.key;
|
|
|
|
mr->ibmr.rkey = mr->mmr.key;
|
|
|
|
mr->umem = NULL;
|
|
|
|
|
|
|
|
return &mr->ibmr;
|
|
|
|
|
|
|
|
err_free:
|
|
|
|
kfree(mr);
|
|
|
|
return ERR_PTR(err);
|
|
|
|
}
|
|
|
|
|
|
|
|
struct ib_fast_reg_page_list *mlx5_ib_alloc_fast_reg_page_list(struct ib_device *ibdev,
|
|
|
|
int page_list_len)
|
|
|
|
{
|
|
|
|
struct mlx5_ib_fast_reg_page_list *mfrpl;
|
|
|
|
int size = page_list_len * sizeof(u64);
|
|
|
|
|
|
|
|
mfrpl = kmalloc(sizeof(*mfrpl), GFP_KERNEL);
|
|
|
|
if (!mfrpl)
|
|
|
|
return ERR_PTR(-ENOMEM);
|
|
|
|
|
|
|
|
mfrpl->ibfrpl.page_list = kmalloc(size, GFP_KERNEL);
|
|
|
|
if (!mfrpl->ibfrpl.page_list)
|
|
|
|
goto err_free;
|
|
|
|
|
|
|
|
mfrpl->mapped_page_list = dma_alloc_coherent(ibdev->dma_device,
|
|
|
|
size, &mfrpl->map,
|
|
|
|
GFP_KERNEL);
|
|
|
|
if (!mfrpl->mapped_page_list)
|
|
|
|
goto err_free;
|
|
|
|
|
|
|
|
WARN_ON(mfrpl->map & 0x3f);
|
|
|
|
|
|
|
|
return &mfrpl->ibfrpl;
|
|
|
|
|
|
|
|
err_free:
|
|
|
|
kfree(mfrpl->ibfrpl.page_list);
|
|
|
|
kfree(mfrpl);
|
|
|
|
return ERR_PTR(-ENOMEM);
|
|
|
|
}
|
|
|
|
|
|
|
|
void mlx5_ib_free_fast_reg_page_list(struct ib_fast_reg_page_list *page_list)
|
|
|
|
{
|
|
|
|
struct mlx5_ib_fast_reg_page_list *mfrpl = to_mfrpl(page_list);
|
|
|
|
struct mlx5_ib_dev *dev = to_mdev(page_list->device);
|
|
|
|
int size = page_list->max_page_list_len * sizeof(u64);
|
|
|
|
|
|
|
|
dma_free_coherent(&dev->mdev.pdev->dev, size, mfrpl->mapped_page_list,
|
|
|
|
mfrpl->map);
|
|
|
|
kfree(mfrpl->ibfrpl.page_list);
|
|
|
|
kfree(mfrpl);
|
|
|
|
}
|
2014-02-23 20:19:12 +08:00
|
|
|
|
|
|
|
int mlx5_ib_check_mr_status(struct ib_mr *ibmr, u32 check_mask,
|
|
|
|
struct ib_mr_status *mr_status)
|
|
|
|
{
|
|
|
|
struct mlx5_ib_mr *mmr = to_mmr(ibmr);
|
|
|
|
int ret = 0;
|
|
|
|
|
|
|
|
if (check_mask & ~IB_MR_CHECK_SIG_STATUS) {
|
|
|
|
pr_err("Invalid status check mask\n");
|
|
|
|
ret = -EINVAL;
|
|
|
|
goto done;
|
|
|
|
}
|
|
|
|
|
|
|
|
mr_status->fail_status = 0;
|
|
|
|
if (check_mask & IB_MR_CHECK_SIG_STATUS) {
|
|
|
|
if (!mmr->sig) {
|
|
|
|
ret = -EINVAL;
|
|
|
|
pr_err("signature status check requested on a non-signature enabled MR\n");
|
|
|
|
goto done;
|
|
|
|
}
|
|
|
|
|
|
|
|
mmr->sig->sig_status_checked = true;
|
|
|
|
if (!mmr->sig->sig_err_exists)
|
|
|
|
goto done;
|
|
|
|
|
|
|
|
if (ibmr->lkey == mmr->sig->err_item.key)
|
|
|
|
memcpy(&mr_status->sig_err, &mmr->sig->err_item,
|
|
|
|
sizeof(mr_status->sig_err));
|
|
|
|
else {
|
|
|
|
mr_status->sig_err.err_type = IB_SIG_BAD_GUARD;
|
|
|
|
mr_status->sig_err.sig_err_offset = 0;
|
|
|
|
mr_status->sig_err.key = mmr->sig->err_item.key;
|
|
|
|
}
|
|
|
|
|
|
|
|
mmr->sig->sig_err_exists = false;
|
|
|
|
mr_status->fail_status |= IB_MR_CHECK_SIG_STATUS;
|
|
|
|
}
|
|
|
|
|
|
|
|
done:
|
|
|
|
return ret;
|
|
|
|
}
|