2009-06-17 06:34:17 +08:00
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#ifndef __LIS3LV02D_H_
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#define __LIS3LV02D_H_
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struct lis3lv02d_platform_data {
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/* please note: the 'click' feature is only supported for
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* LIS[32]02DL variants of the chip and will be ignored for
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* others */
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#define LIS3_CLICK_SINGLE_X (1 << 0)
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#define LIS3_CLICK_DOUBLE_X (1 << 1)
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#define LIS3_CLICK_SINGLE_Y (1 << 2)
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#define LIS3_CLICK_DOUBLE_Y (1 << 3)
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#define LIS3_CLICK_SINGLE_Z (1 << 4)
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#define LIS3_CLICK_DOUBLE_Z (1 << 5)
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unsigned char click_flags;
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unsigned char click_thresh_x;
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unsigned char click_thresh_y;
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unsigned char click_thresh_z;
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unsigned char click_time_limit;
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unsigned char click_latency;
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unsigned char click_window;
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#define LIS3_IRQ1_DISABLE (0 << 0)
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#define LIS3_IRQ1_FF_WU_1 (1 << 0)
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#define LIS3_IRQ1_FF_WU_2 (2 << 0)
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#define LIS3_IRQ1_FF_WU_12 (3 << 0)
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#define LIS3_IRQ1_DATA_READY (4 << 0)
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#define LIS3_IRQ1_CLICK (7 << 0)
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2010-05-25 05:33:37 +08:00
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#define LIS3_IRQ1_MASK (7 << 0)
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2009-06-17 06:34:17 +08:00
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#define LIS3_IRQ2_DISABLE (0 << 3)
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#define LIS3_IRQ2_FF_WU_1 (1 << 3)
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#define LIS3_IRQ2_FF_WU_2 (2 << 3)
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#define LIS3_IRQ2_FF_WU_12 (3 << 3)
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#define LIS3_IRQ2_DATA_READY (4 << 3)
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#define LIS3_IRQ2_CLICK (7 << 3)
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2010-05-25 05:33:37 +08:00
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#define LIS3_IRQ2_MASK (7 << 3)
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2009-06-17 06:34:17 +08:00
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#define LIS3_IRQ_OPEN_DRAIN (1 << 6)
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2009-09-22 08:04:42 +08:00
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#define LIS3_IRQ_ACTIVE_LOW (1 << 7)
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2009-06-17 06:34:17 +08:00
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unsigned char irq_cfg;
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2010-10-22 19:57:29 +08:00
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unsigned char irq_flags1; /* Additional irq edge / level flags */
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unsigned char irq_flags2; /* Additional irq edge / level flags */
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unsigned char duration1;
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unsigned char duration2;
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2009-09-22 08:04:43 +08:00
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#define LIS3_WAKEUP_X_LO (1 << 0)
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#define LIS3_WAKEUP_X_HI (1 << 1)
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#define LIS3_WAKEUP_Y_LO (1 << 2)
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#define LIS3_WAKEUP_Y_HI (1 << 3)
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#define LIS3_WAKEUP_Z_LO (1 << 4)
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#define LIS3_WAKEUP_Z_HI (1 << 5)
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unsigned char wakeup_flags;
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unsigned char wakeup_thresh;
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2010-05-25 05:33:35 +08:00
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unsigned char wakeup_flags2;
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unsigned char wakeup_thresh2;
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#define LIS3_HIPASS_CUTFF_8HZ 0
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#define LIS3_HIPASS_CUTFF_4HZ 1
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#define LIS3_HIPASS_CUTFF_2HZ 2
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#define LIS3_HIPASS_CUTFF_1HZ 3
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#define LIS3_HIPASS1_DISABLE (1 << 2)
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#define LIS3_HIPASS2_DISABLE (1 << 3)
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unsigned char hipass_ctrl;
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2009-12-15 10:01:35 +08:00
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#define LIS3_NO_MAP 0
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#define LIS3_DEV_X 1
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#define LIS3_DEV_Y 2
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#define LIS3_DEV_Z 3
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#define LIS3_INV_DEV_X -1
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#define LIS3_INV_DEV_Y -2
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#define LIS3_INV_DEV_Z -3
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s8 axis_x;
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s8 axis_y;
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s8 axis_z;
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2010-10-22 19:57:24 +08:00
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#define LIS3_USE_REGULATOR_CTRL 0x01
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u16 driver_features;
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2010-10-22 19:57:29 +08:00
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int default_rate;
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2009-12-15 10:01:35 +08:00
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int (*setup_resources)(void);
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int (*release_resources)(void);
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2009-12-15 10:01:43 +08:00
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/* Limits for selftest are specified in chip data sheet */
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s16 st_min_limits[3]; /* min pass limit x, y, z */
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s16 st_max_limits[3]; /* max pass limit x, y, z */
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2010-05-25 05:33:36 +08:00
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int irq2;
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2009-06-17 06:34:17 +08:00
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};
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#endif /* __LIS3LV02D_H_ */
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