2007-02-08 16:42:40 +08:00
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/*
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* arch/arm/mach-at91/at91sam9263.c
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*
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* Copyright (C) 2007 Atmel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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*/
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#include <linux/module.h>
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2011-08-02 22:21:36 +08:00
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#include <asm/proc-fns.h>
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[ARM] fix AT91, davinci, h720x, ks8695, msm, mx2, mx3, netx, omap1, omap2, pxa, s3c
arch/arm/mach-at91/at91cap9.c:337: error: 'NR_AIC_IRQS' undeclared here (not in a function)
arch/arm/mach-at91/at91rm9200.c:301: error: 'NR_AIC_IRQS' undeclared here (not in a function)
arch/arm/mach-at91/at91sam9260.c:351: error: 'NR_AIC_IRQS' undeclared here (not in a function)
arch/arm/mach-at91/at91sam9261.c:287: error: 'NR_AIC_IRQS' undeclared here (not in a function)
arch/arm/mach-at91/at91sam9263.c:312: error: 'NR_AIC_IRQS' undeclared here (not in a function)
arch/arm/mach-at91/at91sam9rl.c:304: error: 'NR_AIC_IRQS' undeclared here (not in a function)
arch/arm/mach-h720x/h7202-eval.c:38: error: implicit declaration of function 'IRQ_CHAINED_GPIOB'
arch/arm/mach-ks8695/devices.c:46: error: 'KS8695_IRQ_WAN_RX_STATUS' undeclared here (not in a function)
arch/arm/mach-msm/devices.c:28: error: 'INT_UART1' undeclared here (not in a function)
arch/arm/mach-mx2/devices.c:233: error: 'MXC_GPIO_IRQ_START' undeclared here (not in a function)
arch/arm/mach-mx3/devices.c:128: error: 'MXC_GPIO_IRQ_START' undeclared here (not in a function)
arch/arm/mach-omap1/mcbsp.c:140: error: 'INT_730_McBSP1RX' undeclared here (not in a function)
arch/arm/mach-omap1/mcbsp.c:165: error: 'INT_McBSP1RX' undeclared here (not in a function)
arch/arm/mach-omap1/mcbsp.c:200: error: 'INT_McBSP1RX' undeclared here (not in a function)
arch/arm/mach-omap2/board-apollon.c:286: error: implicit declaration of function 'omap_set_gpio_direction'
arch/arm/mach-omap2/mcbsp.c:154: error: 'INT_24XX_MCBSP1_IRQ_RX' undeclared here (not in a function)
arch/arm/mach-omap2/mcbsp.c:181: error: 'INT_24XX_MCBSP1_IRQ_RX' undeclared here (not in a function)
arch/arm/mach-pxa/e350.c:36: error: 'IRQ_BOARD_START' undeclared here (not in a function)
arch/arm/plat-s3c/dev-i2c0.c:32: error: 'IRQ_IIC' undeclared here (not in a function)
...
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-01-08 18:01:47 +08:00
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#include <asm/irq.h>
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2007-02-08 16:42:40 +08:00
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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2012-03-29 01:30:01 +08:00
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#include <asm/system_misc.h>
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2008-08-05 23:14:15 +08:00
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#include <mach/at91sam9263.h>
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#include <mach/at91_pmc.h>
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2007-02-08 16:42:40 +08:00
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2012-10-30 06:41:28 +08:00
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#include "at91_aic.h"
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2012-10-30 08:11:24 +08:00
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#include "at91_rstc.h"
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2011-04-23 15:28:34 +08:00
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#include "soc.h"
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2007-02-08 16:42:40 +08:00
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#include "generic.h"
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#include "clock.h"
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2011-10-14 01:37:09 +08:00
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#include "sam9_smc.h"
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2007-02-08 16:42:40 +08:00
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/* --------------------------------------------------------------------
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* Clocks
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* -------------------------------------------------------------------- */
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/*
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* The peripheral clocks.
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*/
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static struct clk pioA_clk = {
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.name = "pioA_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_PIOA,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk pioB_clk = {
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.name = "pioB_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_PIOB,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk pioCDE_clk = {
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.name = "pioCDE_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_PIOCDE,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk usart0_clk = {
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.name = "usart0_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_US0,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk usart1_clk = {
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.name = "usart1_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_US1,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk usart2_clk = {
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.name = "usart2_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_US2,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk mmc0_clk = {
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.name = "mci0_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_MCI0,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk mmc1_clk = {
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.name = "mci1_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_MCI1,
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.type = CLK_TYPE_PERIPHERAL,
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};
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2007-05-03 00:14:57 +08:00
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static struct clk can_clk = {
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.name = "can_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_CAN,
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.type = CLK_TYPE_PERIPHERAL,
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};
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2007-02-08 16:42:40 +08:00
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static struct clk twi_clk = {
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.name = "twi_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_TWI,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk spi0_clk = {
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.name = "spi0_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_SPI0,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk spi1_clk = {
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.name = "spi1_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_SPI1,
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.type = CLK_TYPE_PERIPHERAL,
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};
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2007-05-03 00:14:57 +08:00
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static struct clk ssc0_clk = {
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.name = "ssc0_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_SSC0,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk ssc1_clk = {
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.name = "ssc1_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_SSC1,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk ac97_clk = {
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.name = "ac97_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_AC97C,
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.type = CLK_TYPE_PERIPHERAL,
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};
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2007-02-08 16:42:40 +08:00
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static struct clk tcb_clk = {
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.name = "tcb_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_TCB,
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.type = CLK_TYPE_PERIPHERAL,
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};
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2008-09-19 02:42:37 +08:00
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static struct clk pwm_clk = {
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.name = "pwm_clk",
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2007-05-03 00:14:57 +08:00
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.pmc_mask = 1 << AT91SAM9263_ID_PWMC,
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.type = CLK_TYPE_PERIPHERAL,
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};
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2007-02-14 15:44:43 +08:00
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static struct clk macb_clk = {
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2011-08-09 22:51:11 +08:00
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.name = "pclk",
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2007-02-08 16:42:40 +08:00
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.pmc_mask = 1 << AT91SAM9263_ID_EMAC,
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.type = CLK_TYPE_PERIPHERAL,
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};
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2007-05-03 00:14:57 +08:00
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static struct clk dma_clk = {
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.name = "dma_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_DMA,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk twodge_clk = {
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.name = "2dge_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_2DGE,
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.type = CLK_TYPE_PERIPHERAL,
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};
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2007-02-08 16:42:40 +08:00
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static struct clk udc_clk = {
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.name = "udc_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_UDP,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk isi_clk = {
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.name = "isi_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_ISI,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk lcdc_clk = {
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.name = "lcdc_clk",
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2007-02-22 14:34:56 +08:00
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.pmc_mask = 1 << AT91SAM9263_ID_LCDC,
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2007-02-08 16:42:40 +08:00
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk ohci_clk = {
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.name = "ohci_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_UHP,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk *periph_clocks[] __initdata = {
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&pioA_clk,
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&pioB_clk,
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&pioCDE_clk,
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&usart0_clk,
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&usart1_clk,
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&usart2_clk,
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&mmc0_clk,
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&mmc1_clk,
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2007-05-03 00:14:57 +08:00
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&can_clk,
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2007-02-08 16:42:40 +08:00
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&twi_clk,
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&spi0_clk,
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&spi1_clk,
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2007-05-03 00:14:57 +08:00
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&ssc0_clk,
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&ssc1_clk,
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&ac97_clk,
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2007-02-08 16:42:40 +08:00
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&tcb_clk,
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2008-09-19 02:42:37 +08:00
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&pwm_clk,
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2007-02-14 15:44:43 +08:00
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&macb_clk,
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2007-05-03 00:14:57 +08:00
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&twodge_clk,
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2007-02-08 16:42:40 +08:00
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&udc_clk,
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&isi_clk,
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&lcdc_clk,
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2007-05-03 00:14:57 +08:00
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&dma_clk,
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2007-02-08 16:42:40 +08:00
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&ohci_clk,
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// irq0 .. irq1
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};
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2011-02-02 14:27:07 +08:00
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static struct clk_lookup periph_clocks_lookups[] = {
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2011-08-09 22:51:11 +08:00
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/* One additional fake clock for macb_hclk */
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CLKDEV_CON_ID("hclk", &macb_clk),
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2012-11-06 13:57:51 +08:00
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CLKDEV_CON_DEV_ID("pclk", "at91rm9200_ssc.0", &ssc0_clk),
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CLKDEV_CON_DEV_ID("pclk", "at91rm9200_ssc.1", &ssc1_clk),
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2012-11-07 11:41:41 +08:00
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CLKDEV_CON_DEV_ID("pclk", "fff98000.ssc", &ssc0_clk),
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CLKDEV_CON_DEV_ID("pclk", "fff9c000.ssc", &ssc1_clk),
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2013-02-07 23:31:58 +08:00
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CLKDEV_CON_DEV_ID("hclk", "at91sam9263-lcdfb.0", &lcdc_clk),
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2012-05-21 18:23:27 +08:00
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CLKDEV_CON_DEV_ID("mci_clk", "atmel_mci.0", &mmc0_clk),
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CLKDEV_CON_DEV_ID("mci_clk", "atmel_mci.1", &mmc1_clk),
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2011-02-02 14:27:07 +08:00
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CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk),
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CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk),
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CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb_clk),
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2012-10-15 17:30:28 +08:00
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CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9260.0", &twi_clk),
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2011-08-30 09:29:28 +08:00
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/* fake hclk clock */
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CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk),
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2011-11-13 13:00:58 +08:00
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CLKDEV_CON_ID("pioA", &pioA_clk),
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CLKDEV_CON_ID("pioB", &pioB_clk),
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CLKDEV_CON_ID("pioC", &pioCDE_clk),
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CLKDEV_CON_ID("pioD", &pioCDE_clk),
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CLKDEV_CON_ID("pioE", &pioCDE_clk),
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2012-02-26 19:12:43 +08:00
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/* more usart lookup table for DT entries */
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CLKDEV_CON_DEV_ID("usart", "ffffee00.serial", &mck),
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CLKDEV_CON_DEV_ID("usart", "fff8c000.serial", &usart0_clk),
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CLKDEV_CON_DEV_ID("usart", "fff90000.serial", &usart1_clk),
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CLKDEV_CON_DEV_ID("usart", "fff94000.serial", &usart2_clk),
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/* more tc lookup table for DT entries */
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CLKDEV_CON_DEV_ID("t0_clk", "fff7c000.timer", &tcb_clk),
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CLKDEV_CON_DEV_ID("hclk", "a00000.ohci", &ohci_clk),
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CLKDEV_CON_DEV_ID("spi_clk", "fffa4000.spi", &spi0_clk),
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CLKDEV_CON_DEV_ID("spi_clk", "fffa8000.spi", &spi1_clk),
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2012-11-19 19:19:53 +08:00
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CLKDEV_CON_DEV_ID("mci_clk", "fff80000.mmc", &mmc0_clk),
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CLKDEV_CON_DEV_ID("mci_clk", "fff84000.mmc", &mmc1_clk),
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2012-09-12 14:42:15 +08:00
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CLKDEV_CON_DEV_ID(NULL, "fff88000.i2c", &twi_clk),
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2012-07-05 16:56:09 +08:00
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CLKDEV_CON_DEV_ID(NULL, "fffff200.gpio", &pioA_clk),
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CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioB_clk),
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CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioCDE_clk),
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CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioCDE_clk),
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CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioCDE_clk),
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2011-02-02 14:27:07 +08:00
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};
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static struct clk_lookup usart_clocks_lookups[] = {
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CLKDEV_CON_DEV_ID("usart", "atmel_usart.0", &mck),
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CLKDEV_CON_DEV_ID("usart", "atmel_usart.1", &usart0_clk),
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CLKDEV_CON_DEV_ID("usart", "atmel_usart.2", &usart1_clk),
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CLKDEV_CON_DEV_ID("usart", "atmel_usart.3", &usart2_clk),
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};
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2007-02-08 16:42:40 +08:00
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/*
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* The four programmable clocks.
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* You must configure pin multiplexing to bring these signals out.
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*/
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static struct clk pck0 = {
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.name = "pck0",
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.pmc_mask = AT91_PMC_PCK0,
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.type = CLK_TYPE_PROGRAMMABLE,
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.id = 0,
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};
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static struct clk pck1 = {
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.name = "pck1",
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.pmc_mask = AT91_PMC_PCK1,
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.type = CLK_TYPE_PROGRAMMABLE,
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.id = 1,
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};
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static struct clk pck2 = {
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.name = "pck2",
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.pmc_mask = AT91_PMC_PCK2,
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.type = CLK_TYPE_PROGRAMMABLE,
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.id = 2,
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};
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static struct clk pck3 = {
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|
|
.name = "pck3",
|
|
|
|
.pmc_mask = AT91_PMC_PCK3,
|
|
|
|
.type = CLK_TYPE_PROGRAMMABLE,
|
|
|
|
.id = 3,
|
|
|
|
};
|
|
|
|
|
|
|
|
static void __init at91sam9263_register_clocks(void)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
|
|
|
|
clk_register(periph_clocks[i]);
|
|
|
|
|
2011-02-02 14:27:07 +08:00
|
|
|
clkdev_add_table(periph_clocks_lookups,
|
|
|
|
ARRAY_SIZE(periph_clocks_lookups));
|
|
|
|
clkdev_add_table(usart_clocks_lookups,
|
|
|
|
ARRAY_SIZE(usart_clocks_lookups));
|
|
|
|
|
2007-02-08 16:42:40 +08:00
|
|
|
clk_register(&pck0);
|
|
|
|
clk_register(&pck1);
|
|
|
|
clk_register(&pck2);
|
|
|
|
clk_register(&pck3);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* --------------------------------------------------------------------
|
|
|
|
* GPIO
|
|
|
|
* -------------------------------------------------------------------- */
|
|
|
|
|
2011-10-17 14:28:38 +08:00
|
|
|
static struct at91_gpio_bank at91sam9263_gpio[] __initdata = {
|
2007-02-08 16:42:40 +08:00
|
|
|
{
|
|
|
|
.id = AT91SAM9263_ID_PIOA,
|
2011-09-16 23:37:50 +08:00
|
|
|
.regbase = AT91SAM9263_BASE_PIOA,
|
2007-02-08 16:42:40 +08:00
|
|
|
}, {
|
|
|
|
.id = AT91SAM9263_ID_PIOB,
|
2011-09-16 23:37:50 +08:00
|
|
|
.regbase = AT91SAM9263_BASE_PIOB,
|
2007-02-08 16:42:40 +08:00
|
|
|
}, {
|
|
|
|
.id = AT91SAM9263_ID_PIOCDE,
|
2011-09-16 23:37:50 +08:00
|
|
|
.regbase = AT91SAM9263_BASE_PIOC,
|
2007-02-08 16:42:40 +08:00
|
|
|
}, {
|
|
|
|
.id = AT91SAM9263_ID_PIOCDE,
|
2011-09-16 23:37:50 +08:00
|
|
|
.regbase = AT91SAM9263_BASE_PIOD,
|
2007-02-08 16:42:40 +08:00
|
|
|
}, {
|
|
|
|
.id = AT91SAM9263_ID_PIOCDE,
|
2011-09-16 23:37:50 +08:00
|
|
|
.regbase = AT91SAM9263_BASE_PIOE,
|
2007-02-08 16:42:40 +08:00
|
|
|
}
|
|
|
|
};
|
|
|
|
|
|
|
|
/* --------------------------------------------------------------------
|
|
|
|
* AT91SAM9263 processor initialization
|
|
|
|
* -------------------------------------------------------------------- */
|
|
|
|
|
2011-04-23 15:28:34 +08:00
|
|
|
static void __init at91sam9263_map_io(void)
|
2007-02-08 16:42:40 +08:00
|
|
|
{
|
2011-05-10 03:20:09 +08:00
|
|
|
at91_init_sram(0, AT91SAM9263_SRAM0_BASE, AT91SAM9263_SRAM0_SIZE);
|
|
|
|
at91_init_sram(1, AT91SAM9263_SRAM1_BASE, AT91SAM9263_SRAM1_SIZE);
|
2011-04-28 20:19:32 +08:00
|
|
|
}
|
2007-02-08 16:42:40 +08:00
|
|
|
|
2011-10-14 01:17:18 +08:00
|
|
|
static void __init at91sam9263_ioremap_registers(void)
|
|
|
|
{
|
2011-11-01 01:23:20 +08:00
|
|
|
at91_ioremap_shdwc(AT91SAM9263_BASE_SHDWC);
|
2011-11-18 01:25:52 +08:00
|
|
|
at91_ioremap_rstc(AT91SAM9263_BASE_RSTC);
|
2012-02-13 12:58:53 +08:00
|
|
|
at91_ioremap_ramc(0, AT91SAM9263_BASE_SDRAMC0, 512);
|
|
|
|
at91_ioremap_ramc(1, AT91SAM9263_BASE_SDRAMC1, 512);
|
2011-09-18 22:29:50 +08:00
|
|
|
at91sam926x_ioremap_pit(AT91SAM9263_BASE_PIT);
|
2011-10-14 01:37:09 +08:00
|
|
|
at91sam9_ioremap_smc(0, AT91SAM9263_BASE_SMC0);
|
|
|
|
at91sam9_ioremap_smc(1, AT91SAM9263_BASE_SMC1);
|
2011-11-27 23:15:50 +08:00
|
|
|
at91_ioremap_matrix(AT91SAM9263_BASE_MATRIX);
|
2011-10-14 01:17:18 +08:00
|
|
|
}
|
|
|
|
|
2011-04-24 18:20:28 +08:00
|
|
|
static void __init at91sam9263_initialize(void)
|
2011-04-28 20:19:32 +08:00
|
|
|
{
|
2012-02-05 20:25:32 +08:00
|
|
|
arm_pm_idle = at91sam9_idle;
|
2011-11-03 17:53:29 +08:00
|
|
|
arm_pm_restart = at91sam9_alt_restart;
|
2007-02-08 16:42:40 +08:00
|
|
|
|
|
|
|
/* Register GPIO subsystem */
|
|
|
|
at91_gpio_init(at91sam9263_gpio, 5);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* --------------------------------------------------------------------
|
|
|
|
* Interrupt initialization
|
|
|
|
* -------------------------------------------------------------------- */
|
|
|
|
|
|
|
|
/*
|
|
|
|
* The default interrupt priority levels (0 = lowest, 7 = highest).
|
|
|
|
*/
|
|
|
|
static unsigned int at91sam9263_default_irq_priority[NR_AIC_IRQS] __initdata = {
|
|
|
|
7, /* Advanced Interrupt Controller (FIQ) */
|
|
|
|
7, /* System Peripherals */
|
2007-11-20 15:46:53 +08:00
|
|
|
1, /* Parallel IO Controller A */
|
|
|
|
1, /* Parallel IO Controller B */
|
|
|
|
1, /* Parallel IO Controller C, D and E */
|
2007-02-08 16:42:40 +08:00
|
|
|
0,
|
|
|
|
0,
|
2007-11-20 15:46:53 +08:00
|
|
|
5, /* USART 0 */
|
|
|
|
5, /* USART 1 */
|
|
|
|
5, /* USART 2 */
|
2007-02-08 16:42:40 +08:00
|
|
|
0, /* Multimedia Card Interface 0 */
|
|
|
|
0, /* Multimedia Card Interface 1 */
|
2007-11-20 15:46:53 +08:00
|
|
|
3, /* CAN */
|
|
|
|
6, /* Two-Wire Interface */
|
|
|
|
5, /* Serial Peripheral Interface 0 */
|
|
|
|
5, /* Serial Peripheral Interface 1 */
|
|
|
|
4, /* Serial Synchronous Controller 0 */
|
|
|
|
4, /* Serial Synchronous Controller 1 */
|
|
|
|
5, /* AC97 Controller */
|
2007-02-08 16:42:40 +08:00
|
|
|
0, /* Timer Counter 0, 1 and 2 */
|
|
|
|
0, /* Pulse Width Modulation Controller */
|
|
|
|
3, /* Ethernet */
|
|
|
|
0,
|
|
|
|
0, /* 2D Graphic Engine */
|
2007-11-20 15:46:53 +08:00
|
|
|
2, /* USB Device Port */
|
2007-02-08 16:42:40 +08:00
|
|
|
0, /* Image Sensor Interface */
|
|
|
|
3, /* LDC Controller */
|
|
|
|
0, /* DMA Controller */
|
|
|
|
0,
|
2007-11-20 15:46:53 +08:00
|
|
|
2, /* USB Host port */
|
2007-02-08 16:42:40 +08:00
|
|
|
0, /* Advanced Interrupt Controller (IRQ0) */
|
|
|
|
0, /* Advanced Interrupt Controller (IRQ1) */
|
|
|
|
};
|
|
|
|
|
2013-03-22 21:24:09 +08:00
|
|
|
AT91_SOC_START(at91sam9263)
|
2011-04-23 15:28:34 +08:00
|
|
|
.map_io = at91sam9263_map_io,
|
2011-04-23 15:28:34 +08:00
|
|
|
.default_irq_priority = at91sam9263_default_irq_priority,
|
2013-06-01 22:40:11 +08:00
|
|
|
.extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1),
|
2011-10-14 01:17:18 +08:00
|
|
|
.ioremap_registers = at91sam9263_ioremap_registers,
|
2011-04-24 18:15:34 +08:00
|
|
|
.register_clocks = at91sam9263_register_clocks,
|
2011-04-23 15:28:34 +08:00
|
|
|
.init = at91sam9263_initialize,
|
2012-08-16 17:36:55 +08:00
|
|
|
AT91_SOC_END
|