2013-01-24 02:21:58 +08:00
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/*
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* Copyright (C) 2012 ARM Ltd.
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* Author: Marc Zyngier <marc.zyngier@arm.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/cpu.h>
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#include <linux/of_irq.h>
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#include <linux/kvm.h>
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#include <linux/kvm_host.h>
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#include <linux/interrupt.h>
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2013-03-27 23:56:11 +08:00
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#include <clocksource/arm_arch_timer.h>
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2013-01-24 02:21:58 +08:00
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#include <asm/arch_timer.h>
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ARM: KVM: move GIC/timer code to a common location
As KVM/arm64 is looming on the horizon, it makes sense to move some
of the common code to a single location in order to reduce duplication.
The code could live anywhere. Actually, most of KVM is already built
with a bunch of ugly ../../.. hacks in the various Makefiles, so we're
not exactly talking about style here. But maybe it is time to start
moving into a less ugly direction.
The include files must be in a "public" location, as they are accessed
from non-KVM files (arch/arm/kernel/asm-offsets.c).
For this purpose, introduce two new locations:
- virt/kvm/arm/ : x86 and ia64 already share the ioapic code in
virt/kvm, so this could be seen as a (very ugly) precedent.
- include/kvm/ : there is already an include/xen, and while the
intent is slightly different, this seems as good a location as
any
Eventually, we should probably have independant Makefiles at every
levels (just like everywhere else in the kernel), but this is just
the first step.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Gleb Natapov <gleb@redhat.com>
2013-05-14 21:31:01 +08:00
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#include <kvm/arm_vgic.h>
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#include <kvm/arm_arch_timer.h>
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2013-01-24 02:21:58 +08:00
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static struct timecounter *timecounter;
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static struct workqueue_struct *wqueue;
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2013-04-30 14:32:15 +08:00
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static unsigned int host_vtimer_irq;
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2013-01-24 02:21:58 +08:00
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static cycle_t kvm_phys_timer_read(void)
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{
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return timecounter->cc->read(timecounter->cc);
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}
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static bool timer_is_armed(struct arch_timer_cpu *timer)
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{
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return timer->armed;
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}
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/* timer_arm: as in "arm the timer", not as in ARM the company */
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static void timer_arm(struct arch_timer_cpu *timer, u64 ns)
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{
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timer->armed = true;
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hrtimer_start(&timer->timer, ktime_add_ns(ktime_get(), ns),
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HRTIMER_MODE_ABS);
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}
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static void timer_disarm(struct arch_timer_cpu *timer)
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{
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if (timer_is_armed(timer)) {
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hrtimer_cancel(&timer->timer);
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cancel_work_sync(&timer->expired);
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timer->armed = false;
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}
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}
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static void kvm_timer_inject_irq(struct kvm_vcpu *vcpu)
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{
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2014-12-13 04:19:23 +08:00
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int ret;
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2013-01-24 02:21:58 +08:00
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struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu;
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2014-06-23 20:59:13 +08:00
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kvm_vgic_set_phys_irq_active(timer->map, true);
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ret = kvm_vgic_inject_mapped_irq(vcpu->kvm, vcpu->vcpu_id,
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timer->map,
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timer->irq->level);
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2014-12-13 04:19:23 +08:00
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WARN_ON(ret);
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2013-01-24 02:21:58 +08:00
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}
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static irqreturn_t kvm_arch_timer_handler(int irq, void *dev_id)
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{
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struct kvm_vcpu *vcpu = *(struct kvm_vcpu **)dev_id;
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/*
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* We disable the timer in the world switch and let it be
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* handled by kvm_timer_sync_hwstate(). Getting a timer
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* interrupt at this point is a sure sign of some major
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* breakage.
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*/
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pr_warn("Unexpected interrupt %d on vcpu %p\n", irq, vcpu);
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return IRQ_HANDLED;
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}
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arm/arm64: KVM: Fix migration race in the arch timer
When a VCPU is no longer running, we currently check to see if it has a
timer scheduled in the future, and if it does, we schedule a host
hrtimer to notify is in case the timer expires while the VCPU is still
not running. When the hrtimer fires, we mask the guest's timer and
inject the timer IRQ (still relying on the guest unmasking the time when
it receives the IRQ).
This is all good and fine, but when migration a VM (checkpoint/restore)
this introduces a race. It is unlikely, but possible, for the following
sequence of events to happen:
1. Userspace stops the VM
2. Hrtimer for VCPU is scheduled
3. Userspace checkpoints the VGIC state (no pending timer interrupts)
4. The hrtimer fires, schedules work in a workqueue
5. Workqueue function runs, masks the timer and injects timer interrupt
6. Userspace checkpoints the timer state (timer masked)
At restore time, you end up with a masked timer without any timer
interrupts and your guest halts never receiving timer interrupts.
Fix this by only kicking the VCPU in the workqueue function, and sample
the expired state of the timer when entering the guest again and inject
the interrupt and mask the timer only then.
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2015-03-14 01:02:55 +08:00
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/*
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* Work function for handling the backup timer that we schedule when a vcpu is
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* no longer running, but had a timer programmed to fire in the future.
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*/
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2013-01-24 02:21:58 +08:00
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static void kvm_timer_inject_irq_work(struct work_struct *work)
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{
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struct kvm_vcpu *vcpu;
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vcpu = container_of(work, struct kvm_vcpu, arch.timer_cpu.expired);
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vcpu->arch.timer_cpu.armed = false;
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arm/arm64: KVM: Fix migration race in the arch timer
When a VCPU is no longer running, we currently check to see if it has a
timer scheduled in the future, and if it does, we schedule a host
hrtimer to notify is in case the timer expires while the VCPU is still
not running. When the hrtimer fires, we mask the guest's timer and
inject the timer IRQ (still relying on the guest unmasking the time when
it receives the IRQ).
This is all good and fine, but when migration a VM (checkpoint/restore)
this introduces a race. It is unlikely, but possible, for the following
sequence of events to happen:
1. Userspace stops the VM
2. Hrtimer for VCPU is scheduled
3. Userspace checkpoints the VGIC state (no pending timer interrupts)
4. The hrtimer fires, schedules work in a workqueue
5. Workqueue function runs, masks the timer and injects timer interrupt
6. Userspace checkpoints the timer state (timer masked)
At restore time, you end up with a masked timer without any timer
interrupts and your guest halts never receiving timer interrupts.
Fix this by only kicking the VCPU in the workqueue function, and sample
the expired state of the timer when entering the guest again and inject
the interrupt and mask the timer only then.
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2015-03-14 01:02:55 +08:00
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/*
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* If the vcpu is blocked we want to wake it up so that it will see
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* the timer has expired when entering the guest.
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*/
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kvm_vcpu_kick(vcpu);
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2013-01-24 02:21:58 +08:00
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}
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static enum hrtimer_restart kvm_timer_expire(struct hrtimer *hrt)
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{
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struct arch_timer_cpu *timer;
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timer = container_of(hrt, struct arch_timer_cpu, timer);
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queue_work(wqueue, &timer->expired);
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return HRTIMER_NORESTART;
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}
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arm/arm64: KVM: Fix migration race in the arch timer
When a VCPU is no longer running, we currently check to see if it has a
timer scheduled in the future, and if it does, we schedule a host
hrtimer to notify is in case the timer expires while the VCPU is still
not running. When the hrtimer fires, we mask the guest's timer and
inject the timer IRQ (still relying on the guest unmasking the time when
it receives the IRQ).
This is all good and fine, but when migration a VM (checkpoint/restore)
this introduces a race. It is unlikely, but possible, for the following
sequence of events to happen:
1. Userspace stops the VM
2. Hrtimer for VCPU is scheduled
3. Userspace checkpoints the VGIC state (no pending timer interrupts)
4. The hrtimer fires, schedules work in a workqueue
5. Workqueue function runs, masks the timer and injects timer interrupt
6. Userspace checkpoints the timer state (timer masked)
At restore time, you end up with a masked timer without any timer
interrupts and your guest halts never receiving timer interrupts.
Fix this by only kicking the VCPU in the workqueue function, and sample
the expired state of the timer when entering the guest again and inject
the interrupt and mask the timer only then.
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2015-03-14 01:02:55 +08:00
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bool kvm_timer_should_fire(struct kvm_vcpu *vcpu)
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{
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struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu;
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cycle_t cval, now;
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if ((timer->cntv_ctl & ARCH_TIMER_CTRL_IT_MASK) ||
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2014-06-23 20:59:13 +08:00
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!(timer->cntv_ctl & ARCH_TIMER_CTRL_ENABLE) ||
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kvm_vgic_get_phys_irq_active(timer->map))
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arm/arm64: KVM: Fix migration race in the arch timer
When a VCPU is no longer running, we currently check to see if it has a
timer scheduled in the future, and if it does, we schedule a host
hrtimer to notify is in case the timer expires while the VCPU is still
not running. When the hrtimer fires, we mask the guest's timer and
inject the timer IRQ (still relying on the guest unmasking the time when
it receives the IRQ).
This is all good and fine, but when migration a VM (checkpoint/restore)
this introduces a race. It is unlikely, but possible, for the following
sequence of events to happen:
1. Userspace stops the VM
2. Hrtimer for VCPU is scheduled
3. Userspace checkpoints the VGIC state (no pending timer interrupts)
4. The hrtimer fires, schedules work in a workqueue
5. Workqueue function runs, masks the timer and injects timer interrupt
6. Userspace checkpoints the timer state (timer masked)
At restore time, you end up with a masked timer without any timer
interrupts and your guest halts never receiving timer interrupts.
Fix this by only kicking the VCPU in the workqueue function, and sample
the expired state of the timer when entering the guest again and inject
the interrupt and mask the timer only then.
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2015-03-14 01:02:55 +08:00
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return false;
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cval = timer->cntv_cval;
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now = kvm_phys_timer_read() - vcpu->kvm->arch.timer.cntvoff;
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return cval <= now;
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}
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2013-01-24 02:21:58 +08:00
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/**
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* kvm_timer_flush_hwstate - prepare to move the virt timer to the cpu
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* @vcpu: The vcpu pointer
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*
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* Disarm any pending soft timers, since the world-switch code will write the
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* virtual timer state back to the physical CPU.
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*/
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void kvm_timer_flush_hwstate(struct kvm_vcpu *vcpu)
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{
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struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu;
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2015-10-16 18:41:21 +08:00
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bool phys_active;
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int ret;
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2013-01-24 02:21:58 +08:00
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/*
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* We're about to run this vcpu again, so there is no need to
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* keep the background timer running, as we're about to
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* populate the CPU timer again.
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*/
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timer_disarm(timer);
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arm/arm64: KVM: Fix migration race in the arch timer
When a VCPU is no longer running, we currently check to see if it has a
timer scheduled in the future, and if it does, we schedule a host
hrtimer to notify is in case the timer expires while the VCPU is still
not running. When the hrtimer fires, we mask the guest's timer and
inject the timer IRQ (still relying on the guest unmasking the time when
it receives the IRQ).
This is all good and fine, but when migration a VM (checkpoint/restore)
this introduces a race. It is unlikely, but possible, for the following
sequence of events to happen:
1. Userspace stops the VM
2. Hrtimer for VCPU is scheduled
3. Userspace checkpoints the VGIC state (no pending timer interrupts)
4. The hrtimer fires, schedules work in a workqueue
5. Workqueue function runs, masks the timer and injects timer interrupt
6. Userspace checkpoints the timer state (timer masked)
At restore time, you end up with a masked timer without any timer
interrupts and your guest halts never receiving timer interrupts.
Fix this by only kicking the VCPU in the workqueue function, and sample
the expired state of the timer when entering the guest again and inject
the interrupt and mask the timer only then.
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2015-03-14 01:02:55 +08:00
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/*
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* If the timer expired while we were not scheduled, now is the time
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* to inject it.
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*/
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if (kvm_timer_should_fire(vcpu))
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kvm_timer_inject_irq(vcpu);
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2015-10-16 18:41:21 +08:00
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/*
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* We keep track of whether the edge-triggered interrupt has been
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* signalled to the vgic/guest, and if so, we mask the interrupt and
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* the physical distributor to prevent the timer from raising a
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* physical interrupt whenever we run a guest, preventing forward
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* VCPU progress.
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*/
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if (kvm_vgic_get_phys_irq_active(timer->map))
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phys_active = true;
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else
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phys_active = false;
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ret = irq_set_irqchip_state(timer->map->irq,
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IRQCHIP_STATE_ACTIVE,
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phys_active);
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WARN_ON(ret);
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2013-01-24 02:21:58 +08:00
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}
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/**
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* kvm_timer_sync_hwstate - sync timer state from cpu
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* @vcpu: The vcpu pointer
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*
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* Check if the virtual timer was armed and either schedule a corresponding
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* soft timer or inject directly if already expired.
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*/
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void kvm_timer_sync_hwstate(struct kvm_vcpu *vcpu)
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{
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struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu;
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cycle_t cval, now;
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u64 ns;
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BUG_ON(timer_is_armed(timer));
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arm/arm64: KVM: Fix migration race in the arch timer
When a VCPU is no longer running, we currently check to see if it has a
timer scheduled in the future, and if it does, we schedule a host
hrtimer to notify is in case the timer expires while the VCPU is still
not running. When the hrtimer fires, we mask the guest's timer and
inject the timer IRQ (still relying on the guest unmasking the time when
it receives the IRQ).
This is all good and fine, but when migration a VM (checkpoint/restore)
this introduces a race. It is unlikely, but possible, for the following
sequence of events to happen:
1. Userspace stops the VM
2. Hrtimer for VCPU is scheduled
3. Userspace checkpoints the VGIC state (no pending timer interrupts)
4. The hrtimer fires, schedules work in a workqueue
5. Workqueue function runs, masks the timer and injects timer interrupt
6. Userspace checkpoints the timer state (timer masked)
At restore time, you end up with a masked timer without any timer
interrupts and your guest halts never receiving timer interrupts.
Fix this by only kicking the VCPU in the workqueue function, and sample
the expired state of the timer when entering the guest again and inject
the interrupt and mask the timer only then.
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2015-03-14 01:02:55 +08:00
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if (kvm_timer_should_fire(vcpu)) {
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2013-01-24 02:21:58 +08:00
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/*
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* Timer has already expired while we were not
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* looking. Inject the interrupt and carry on.
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*/
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kvm_timer_inject_irq(vcpu);
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return;
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}
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arm/arm64: KVM: Fix migration race in the arch timer
When a VCPU is no longer running, we currently check to see if it has a
timer scheduled in the future, and if it does, we schedule a host
hrtimer to notify is in case the timer expires while the VCPU is still
not running. When the hrtimer fires, we mask the guest's timer and
inject the timer IRQ (still relying on the guest unmasking the time when
it receives the IRQ).
This is all good and fine, but when migration a VM (checkpoint/restore)
this introduces a race. It is unlikely, but possible, for the following
sequence of events to happen:
1. Userspace stops the VM
2. Hrtimer for VCPU is scheduled
3. Userspace checkpoints the VGIC state (no pending timer interrupts)
4. The hrtimer fires, schedules work in a workqueue
5. Workqueue function runs, masks the timer and injects timer interrupt
6. Userspace checkpoints the timer state (timer masked)
At restore time, you end up with a masked timer without any timer
interrupts and your guest halts never receiving timer interrupts.
Fix this by only kicking the VCPU in the workqueue function, and sample
the expired state of the timer when entering the guest again and inject
the interrupt and mask the timer only then.
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2015-03-14 01:02:55 +08:00
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cval = timer->cntv_cval;
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now = kvm_phys_timer_read() - vcpu->kvm->arch.timer.cntvoff;
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2014-12-22 02:47:06 +08:00
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ns = cyclecounter_cyc2ns(timecounter->cc, cval - now, timecounter->mask,
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&timecounter->frac);
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2013-01-24 02:21:58 +08:00
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timer_arm(timer, ns);
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}
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2014-06-23 20:59:13 +08:00
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int kvm_timer_vcpu_reset(struct kvm_vcpu *vcpu,
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const struct kvm_irq_level *irq)
|
2013-04-30 14:32:15 +08:00
|
|
|
{
|
|
|
|
struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu;
|
2014-06-23 20:59:13 +08:00
|
|
|
struct irq_phys_map *map;
|
2013-04-30 14:32:15 +08:00
|
|
|
|
|
|
|
/*
|
|
|
|
* The vcpu timer irq number cannot be determined in
|
|
|
|
* kvm_timer_vcpu_init() because it is called much before
|
|
|
|
* kvm_vcpu_set_target(). To handle this, we determine
|
|
|
|
* vcpu timer irq number when the vcpu is reset.
|
|
|
|
*/
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|
|
|
timer->irq = irq;
|
2014-06-23 20:59:13 +08:00
|
|
|
|
2015-09-04 22:24:39 +08:00
|
|
|
/*
|
|
|
|
* The bits in CNTV_CTL are architecturally reset to UNKNOWN for ARMv8
|
|
|
|
* and to 0 for ARMv7. We provide an implementation that always
|
|
|
|
* resets the timer to be disabled and unmasked and is compliant with
|
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|
|
* the ARMv7 architecture.
|
|
|
|
*/
|
|
|
|
timer->cntv_ctl = 0;
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|
|
|
|
2014-06-23 20:59:13 +08:00
|
|
|
/*
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|
|
|
* Tell the VGIC that the virtual interrupt is tied to a
|
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|
|
* physical interrupt. We do that once per VCPU.
|
|
|
|
*/
|
|
|
|
map = kvm_vgic_map_phys_irq(vcpu, irq->irq, host_vtimer_irq);
|
|
|
|
if (WARN_ON(IS_ERR(map)))
|
|
|
|
return PTR_ERR(map);
|
|
|
|
|
|
|
|
timer->map = map;
|
|
|
|
return 0;
|
2013-04-30 14:32:15 +08:00
|
|
|
}
|
|
|
|
|
2013-01-24 02:21:58 +08:00
|
|
|
void kvm_timer_vcpu_init(struct kvm_vcpu *vcpu)
|
|
|
|
{
|
|
|
|
struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu;
|
|
|
|
|
|
|
|
INIT_WORK(&timer->expired, kvm_timer_inject_irq_work);
|
|
|
|
hrtimer_init(&timer->timer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
|
|
|
|
timer->timer.function = kvm_timer_expire;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void kvm_timer_init_interrupt(void *info)
|
|
|
|
{
|
2013-04-30 14:32:15 +08:00
|
|
|
enable_percpu_irq(host_vtimer_irq, 0);
|
2013-01-24 02:21:58 +08:00
|
|
|
}
|
|
|
|
|
2013-12-13 21:23:26 +08:00
|
|
|
int kvm_arm_timer_set_reg(struct kvm_vcpu *vcpu, u64 regid, u64 value)
|
|
|
|
{
|
|
|
|
struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu;
|
|
|
|
|
|
|
|
switch (regid) {
|
|
|
|
case KVM_REG_ARM_TIMER_CTL:
|
|
|
|
timer->cntv_ctl = value;
|
|
|
|
break;
|
|
|
|
case KVM_REG_ARM_TIMER_CNT:
|
|
|
|
vcpu->kvm->arch.timer.cntvoff = kvm_phys_timer_read() - value;
|
|
|
|
break;
|
|
|
|
case KVM_REG_ARM_TIMER_CVAL:
|
|
|
|
timer->cntv_cval = value;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
u64 kvm_arm_timer_get_reg(struct kvm_vcpu *vcpu, u64 regid)
|
|
|
|
{
|
|
|
|
struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu;
|
|
|
|
|
|
|
|
switch (regid) {
|
|
|
|
case KVM_REG_ARM_TIMER_CTL:
|
|
|
|
return timer->cntv_ctl;
|
|
|
|
case KVM_REG_ARM_TIMER_CNT:
|
|
|
|
return kvm_phys_timer_read() - vcpu->kvm->arch.timer.cntvoff;
|
|
|
|
case KVM_REG_ARM_TIMER_CVAL:
|
|
|
|
return timer->cntv_cval;
|
|
|
|
}
|
|
|
|
return (u64)-1;
|
|
|
|
}
|
2013-01-24 02:21:58 +08:00
|
|
|
|
|
|
|
static int kvm_timer_cpu_notify(struct notifier_block *self,
|
|
|
|
unsigned long action, void *cpu)
|
|
|
|
{
|
|
|
|
switch (action) {
|
|
|
|
case CPU_STARTING:
|
|
|
|
case CPU_STARTING_FROZEN:
|
|
|
|
kvm_timer_init_interrupt(NULL);
|
|
|
|
break;
|
|
|
|
case CPU_DYING:
|
|
|
|
case CPU_DYING_FROZEN:
|
2013-04-30 14:32:15 +08:00
|
|
|
disable_percpu_irq(host_vtimer_irq);
|
2013-01-24 02:21:58 +08:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
return NOTIFY_OK;
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct notifier_block kvm_timer_cpu_nb = {
|
|
|
|
.notifier_call = kvm_timer_cpu_notify,
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct of_device_id arch_timer_of_match[] = {
|
|
|
|
{ .compatible = "arm,armv7-timer", },
|
2013-05-31 01:31:28 +08:00
|
|
|
{ .compatible = "arm,armv8-timer", },
|
2013-01-24 02:21:58 +08:00
|
|
|
{},
|
|
|
|
};
|
|
|
|
|
|
|
|
int kvm_timer_hyp_init(void)
|
|
|
|
{
|
|
|
|
struct device_node *np;
|
|
|
|
unsigned int ppi;
|
|
|
|
int err;
|
|
|
|
|
|
|
|
timecounter = arch_timer_get_timecounter();
|
|
|
|
if (!timecounter)
|
|
|
|
return -ENODEV;
|
|
|
|
|
|
|
|
np = of_find_matching_node(NULL, arch_timer_of_match);
|
|
|
|
if (!np) {
|
|
|
|
kvm_err("kvm_arch_timer: can't find DT node\n");
|
|
|
|
return -ENODEV;
|
|
|
|
}
|
|
|
|
|
|
|
|
ppi = irq_of_parse_and_map(np, 2);
|
|
|
|
if (!ppi) {
|
|
|
|
kvm_err("kvm_arch_timer: no virtual timer interrupt\n");
|
|
|
|
err = -EINVAL;
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
|
|
|
|
err = request_percpu_irq(ppi, kvm_arch_timer_handler,
|
|
|
|
"kvm guest timer", kvm_get_running_vcpus());
|
|
|
|
if (err) {
|
|
|
|
kvm_err("kvm_arch_timer: can't request interrupt %d (%d)\n",
|
|
|
|
ppi, err);
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
|
2013-04-30 14:32:15 +08:00
|
|
|
host_vtimer_irq = ppi;
|
2013-01-24 02:21:58 +08:00
|
|
|
|
2014-04-07 01:36:08 +08:00
|
|
|
err = __register_cpu_notifier(&kvm_timer_cpu_nb);
|
2013-01-24 02:21:58 +08:00
|
|
|
if (err) {
|
|
|
|
kvm_err("Cannot register timer CPU notifier\n");
|
|
|
|
goto out_free;
|
|
|
|
}
|
|
|
|
|
|
|
|
wqueue = create_singlethread_workqueue("kvm_arch_timer");
|
|
|
|
if (!wqueue) {
|
|
|
|
err = -ENOMEM;
|
|
|
|
goto out_free;
|
|
|
|
}
|
|
|
|
|
|
|
|
kvm_info("%s IRQ%d\n", np->name, ppi);
|
|
|
|
on_each_cpu(kvm_timer_init_interrupt, NULL, 1);
|
|
|
|
|
|
|
|
goto out;
|
|
|
|
out_free:
|
|
|
|
free_percpu_irq(ppi, kvm_get_running_vcpus());
|
|
|
|
out:
|
|
|
|
of_node_put(np);
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
|
|
|
void kvm_timer_vcpu_terminate(struct kvm_vcpu *vcpu)
|
|
|
|
{
|
|
|
|
struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu;
|
|
|
|
|
|
|
|
timer_disarm(timer);
|
2014-06-23 20:59:13 +08:00
|
|
|
if (timer->map)
|
|
|
|
kvm_vgic_unmap_phys_irq(vcpu, timer->map);
|
2013-01-24 02:21:58 +08:00
|
|
|
}
|
|
|
|
|
2014-12-13 04:19:23 +08:00
|
|
|
void kvm_timer_enable(struct kvm *kvm)
|
2013-01-24 02:21:58 +08:00
|
|
|
{
|
2014-12-13 04:19:23 +08:00
|
|
|
if (kvm->arch.timer.enabled)
|
|
|
|
return;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* There is a potential race here between VCPUs starting for the first
|
|
|
|
* time, which may be enabling the timer multiple times. That doesn't
|
|
|
|
* hurt though, because we're just setting a variable to the same
|
|
|
|
* variable that it already was. The important thing is that all
|
|
|
|
* VCPUs have the enabled variable set, before entering the guest, if
|
|
|
|
* the arch timers are enabled.
|
|
|
|
*/
|
|
|
|
if (timecounter && wqueue)
|
2013-01-24 02:21:58 +08:00
|
|
|
kvm->arch.timer.enabled = 1;
|
2014-12-13 04:19:23 +08:00
|
|
|
}
|
2013-01-24 02:21:58 +08:00
|
|
|
|
2014-12-13 04:19:23 +08:00
|
|
|
void kvm_timer_init(struct kvm *kvm)
|
|
|
|
{
|
|
|
|
kvm->arch.timer.cntvoff = kvm_phys_timer_read();
|
2013-01-24 02:21:58 +08:00
|
|
|
}
|