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linux-next/drivers/mtd/nand/nand_ids.c

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Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 06:20:36 +08:00
/*
* drivers/mtd/nandids.c
*
* Copyright (C) 2002 Thomas Gleixner (tglx@linutronix.de)
[MTD] NAND: Add ST chip IDs. From: Domenico DI TULLIO <domenico.di-tullio@st.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2005-06-23 17:38:54 +08:00
*
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 06:20:36 +08:00
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
#include <linux/module.h>
#include <linux/mtd/nand.h>
mtd: add 4 Toshiba nand chips for the full-id case I have 4 Toshiba nand chips which can not be parsed out by the id data. We can not get the oob size from the id data. So add them as the full-id nand chips in the first of nand_flash_ids. The comment for the full-id items is from Brian. Signed-off-by: Huang Shijie <b32955@freescale.com> Reviewed-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-03-15 11:01:01 +08:00
#include <linux/sizes.h>
mtd: nand_ids: minor clean-ups Clean-up the code a little bit: * clean-up commentaries. * move macro definitions to the top of the file. Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Acked-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-03-04 19:39:30 +08:00
#define LP_OPTIONS NAND_SAMSUNG_LP_OPTIONS
#define LP_OPTIONS16 (LP_OPTIONS | NAND_BUSWIDTH_16)
mtd: nand: reintroduce NAND_NO_READRDY as NAND_NEED_READRDY This partially reverts commit 1696e6bc2ae83734e64e206ac99766ea19e9a14e ("mtd: nand: kill NAND_NO_READRDY"). In that patch I overlooked a few things. The original documentation for NAND_NO_READRDY included "True for all large page devices, as they do not support autoincrement." I was conflating "not support autoincrement" with the NAND_NO_AUTOINCR option, which was in fact doing nothing. So, when I dropped NAND_NO_AUTOINCR, I concluded that I then could harmlessly drop NAND_NO_READRDY. But of course the fact the NAND_NO_AUTOINCR was doing nothing didn't mean NAND_NO_READRDY was doing nothing... So, NAND_NO_READRDY is re-introduced as NAND_NEED_READRDY and applied only to those few remaining small-page NAND which needed it in the first place. Cc: stable@kernel.org [3.5+] Reported-by: Alexander Shiyan <shc_work@mail.ru> Tested-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-03-14 00:51:31 +08:00
#define SP_OPTIONS NAND_NEED_READRDY
#define SP_OPTIONS16 (SP_OPTIONS | NAND_BUSWIDTH_16)
[MTD] [NAND] Move ancient NAND chip support into a config option The support for obsolete ancient NAND chips adds .data size and one of the old ids conflicts with a modern one. Make the support for such chips depending on a config option. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: David Woodhouse <dwmw2@infradead.org>
2007-04-18 01:30:57 +08:00
mtd: nand_ids: minor clean-ups Clean-up the code a little bit: * clean-up commentaries. * move macro definitions to the top of the file. Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Acked-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-03-04 19:39:30 +08:00
/*
* The chip ID list:
* name, device ID, page size, chip size in MiB, eraseblock size, options
*
* If page size and eraseblock size are 0, the sizes are taken from the
* extended chip ID.
*/
struct nand_flash_dev nand_flash_ids[] = {
mtd: add 4 Toshiba nand chips for the full-id case I have 4 Toshiba nand chips which can not be parsed out by the id data. We can not get the oob size from the id data. So add them as the full-id nand chips in the first of nand_flash_ids. The comment for the full-id items is from Brian. Signed-off-by: Huang Shijie <b32955@freescale.com> Reviewed-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-03-15 11:01:01 +08:00
/*
* Some incompatible NAND chips share device ID's and so must be
* listed by full ID. We list them first so that we can easily identify
* the most specific match.
*/
{"TC58NVG2S0F 4G 3.3V 8-bit",
{ .id = {0x98, 0xdc, 0x90, 0x26, 0x76, 0x15, 0x01, 0x08} },
mtd: add the ecc info for some full-id nand chips Add the ecc info for TC58NVG2S0F, TC58NVG3S0F, TC58NVG5D2 and TC58NVG6D2. From these chips' datasheets, we know that: The TC58NVG2S0F and TC58NVG3S0F require 4bit ECC for per 512byte. The TC58NVG5D2 and TC58NVG6D2 require 40bits ECC for per 1024byte. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-05-17 11:17:33 +08:00
SZ_4K, SZ_512, SZ_256K, 0, 8, 224, NAND_ECC_INFO(4, SZ_512) },
mtd: add 4 Toshiba nand chips for the full-id case I have 4 Toshiba nand chips which can not be parsed out by the id data. We can not get the oob size from the id data. So add them as the full-id nand chips in the first of nand_flash_ids. The comment for the full-id items is from Brian. Signed-off-by: Huang Shijie <b32955@freescale.com> Reviewed-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-03-15 11:01:01 +08:00
{"TC58NVG3S0F 8G 3.3V 8-bit",
{ .id = {0x98, 0xd3, 0x90, 0x26, 0x76, 0x15, 0x02, 0x08} },
mtd: add the ecc info for some full-id nand chips Add the ecc info for TC58NVG2S0F, TC58NVG3S0F, TC58NVG5D2 and TC58NVG6D2. From these chips' datasheets, we know that: The TC58NVG2S0F and TC58NVG3S0F require 4bit ECC for per 512byte. The TC58NVG5D2 and TC58NVG6D2 require 40bits ECC for per 1024byte. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-05-17 11:17:33 +08:00
SZ_4K, SZ_1K, SZ_256K, 0, 8, 232, NAND_ECC_INFO(4, SZ_512) },
mtd: add 4 Toshiba nand chips for the full-id case I have 4 Toshiba nand chips which can not be parsed out by the id data. We can not get the oob size from the id data. So add them as the full-id nand chips in the first of nand_flash_ids. The comment for the full-id items is from Brian. Signed-off-by: Huang Shijie <b32955@freescale.com> Reviewed-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-03-15 11:01:01 +08:00
{"TC58NVG5D2 32G 3.3V 8-bit",
{ .id = {0x98, 0xd7, 0x94, 0x32, 0x76, 0x56, 0x09, 0x00} },
mtd: add the ecc info for some full-id nand chips Add the ecc info for TC58NVG2S0F, TC58NVG3S0F, TC58NVG5D2 and TC58NVG6D2. From these chips' datasheets, we know that: The TC58NVG2S0F and TC58NVG3S0F require 4bit ECC for per 512byte. The TC58NVG5D2 and TC58NVG6D2 require 40bits ECC for per 1024byte. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-05-17 11:17:33 +08:00
SZ_8K, SZ_4K, SZ_1M, 0, 8, 640, NAND_ECC_INFO(40, SZ_1K) },
mtd: add 4 Toshiba nand chips for the full-id case I have 4 Toshiba nand chips which can not be parsed out by the id data. We can not get the oob size from the id data. So add them as the full-id nand chips in the first of nand_flash_ids. The comment for the full-id items is from Brian. Signed-off-by: Huang Shijie <b32955@freescale.com> Reviewed-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-03-15 11:01:01 +08:00
{"TC58NVG6D2 64G 3.3V 8-bit",
{ .id = {0x98, 0xde, 0x94, 0x82, 0x76, 0x56, 0x04, 0x20} },
mtd: add the ecc info for some full-id nand chips Add the ecc info for TC58NVG2S0F, TC58NVG3S0F, TC58NVG5D2 and TC58NVG6D2. From these chips' datasheets, we know that: The TC58NVG2S0F and TC58NVG3S0F require 4bit ECC for per 512byte. The TC58NVG5D2 and TC58NVG6D2 require 40bits ECC for per 1024byte. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-05-17 11:17:33 +08:00
SZ_8K, SZ_8K, SZ_2M, 0, 8, 640, NAND_ECC_INFO(40, SZ_1K) },
mtd: add 4 Toshiba nand chips for the full-id case I have 4 Toshiba nand chips which can not be parsed out by the id data. We can not get the oob size from the id data. So add them as the full-id nand chips in the first of nand_flash_ids. The comment for the full-id items is from Brian. Signed-off-by: Huang Shijie <b32955@freescale.com> Reviewed-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-03-15 11:01:01 +08:00
mtd: nand_ids: use size macros Use the convenient 'SZ_8K' and 'SZ_16K' macros for the eraseblock size in the NAND IDs table. This is a little more readable. Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-03-19 16:47:56 +08:00
LEGACY_ID_NAND("NAND 4MiB 5V 8-bit", 0x6B, 4, SZ_8K, SP_OPTIONS),
LEGACY_ID_NAND("NAND 4MiB 3,3V 8-bit", 0xE3, 4, SZ_8K, SP_OPTIONS),
LEGACY_ID_NAND("NAND 4MiB 3,3V 8-bit", 0xE5, 4, SZ_8K, SP_OPTIONS),
LEGACY_ID_NAND("NAND 8MiB 3,3V 8-bit", 0xD6, 8, SZ_8K, SP_OPTIONS),
LEGACY_ID_NAND("NAND 8MiB 3,3V 8-bit", 0xE6, 8, SZ_8K, SP_OPTIONS),
mtd: nand_ids: introduce helper macros Introduce helper macros for defining NAND chips. These macros do not really add much value in the current code-base. However, we are going to add full ID support which adds some more complexity to the table, and helper macros become useful for readability. Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-03-04 21:39:18 +08:00
mtd: nand_ids: use size macros Use the convenient 'SZ_8K' and 'SZ_16K' macros for the eraseblock size in the NAND IDs table. This is a little more readable. Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-03-19 16:47:56 +08:00
LEGACY_ID_NAND("NAND 16MiB 1,8V 8-bit", 0x33, 16, SZ_16K, SP_OPTIONS),
LEGACY_ID_NAND("NAND 16MiB 3,3V 8-bit", 0x73, 16, SZ_16K, SP_OPTIONS),
LEGACY_ID_NAND("NAND 16MiB 1,8V 16-bit", 0x43, 16, SZ_16K, SP_OPTIONS16),
LEGACY_ID_NAND("NAND 16MiB 3,3V 16-bit", 0x53, 16, SZ_16K, SP_OPTIONS16),
mtd: nand_ids: introduce helper macros Introduce helper macros for defining NAND chips. These macros do not really add much value in the current code-base. However, we are going to add full ID support which adds some more complexity to the table, and helper macros become useful for readability. Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-03-04 21:39:18 +08:00
mtd: nand_ids: use size macros Use the convenient 'SZ_8K' and 'SZ_16K' macros for the eraseblock size in the NAND IDs table. This is a little more readable. Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-03-19 16:47:56 +08:00
LEGACY_ID_NAND("NAND 32MiB 1,8V 8-bit", 0x35, 32, SZ_16K, SP_OPTIONS),
LEGACY_ID_NAND("NAND 32MiB 3,3V 8-bit", 0x75, 32, SZ_16K, SP_OPTIONS),
LEGACY_ID_NAND("NAND 32MiB 1,8V 16-bit", 0x45, 32, SZ_16K, SP_OPTIONS16),
LEGACY_ID_NAND("NAND 32MiB 3,3V 16-bit", 0x55, 32, SZ_16K, SP_OPTIONS16),
mtd: nand_ids: introduce helper macros Introduce helper macros for defining NAND chips. These macros do not really add much value in the current code-base. However, we are going to add full ID support which adds some more complexity to the table, and helper macros become useful for readability. Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-03-04 21:39:18 +08:00
mtd: nand_ids: use size macros Use the convenient 'SZ_8K' and 'SZ_16K' macros for the eraseblock size in the NAND IDs table. This is a little more readable. Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-03-19 16:47:56 +08:00
LEGACY_ID_NAND("NAND 64MiB 1,8V 8-bit", 0x36, 64, SZ_16K, SP_OPTIONS),
LEGACY_ID_NAND("NAND 64MiB 3,3V 8-bit", 0x76, 64, SZ_16K, SP_OPTIONS),
LEGACY_ID_NAND("NAND 64MiB 1,8V 16-bit", 0x46, 64, SZ_16K, SP_OPTIONS16),
LEGACY_ID_NAND("NAND 64MiB 3,3V 16-bit", 0x56, 64, SZ_16K, SP_OPTIONS16),
mtd: nand_ids: introduce helper macros Introduce helper macros for defining NAND chips. These macros do not really add much value in the current code-base. However, we are going to add full ID support which adds some more complexity to the table, and helper macros become useful for readability. Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-03-04 21:39:18 +08:00
mtd: nand_ids: use size macros Use the convenient 'SZ_8K' and 'SZ_16K' macros for the eraseblock size in the NAND IDs table. This is a little more readable. Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-03-19 16:47:56 +08:00
LEGACY_ID_NAND("NAND 128MiB 1,8V 8-bit", 0x78, 128, SZ_16K, SP_OPTIONS),
LEGACY_ID_NAND("NAND 128MiB 1,8V 8-bit", 0x39, 128, SZ_16K, SP_OPTIONS),
LEGACY_ID_NAND("NAND 128MiB 3,3V 8-bit", 0x79, 128, SZ_16K, SP_OPTIONS),
LEGACY_ID_NAND("NAND 128MiB 1,8V 16-bit", 0x72, 128, SZ_16K, SP_OPTIONS16),
LEGACY_ID_NAND("NAND 128MiB 1,8V 16-bit", 0x49, 128, SZ_16K, SP_OPTIONS16),
LEGACY_ID_NAND("NAND 128MiB 3,3V 16-bit", 0x74, 128, SZ_16K, SP_OPTIONS16),
LEGACY_ID_NAND("NAND 128MiB 3,3V 16-bit", 0x59, 128, SZ_16K, SP_OPTIONS16),
mtd: nand_ids: introduce helper macros Introduce helper macros for defining NAND chips. These macros do not really add much value in the current code-base. However, we are going to add full ID support which adds some more complexity to the table, and helper macros become useful for readability. Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-03-04 21:39:18 +08:00
mtd: nand_ids: use size macros Use the convenient 'SZ_8K' and 'SZ_16K' macros for the eraseblock size in the NAND IDs table. This is a little more readable. Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-03-19 16:47:56 +08:00
LEGACY_ID_NAND("NAND 256MiB 3,3V 8-bit", 0x71, 256, SZ_16K, SP_OPTIONS),
[MTD] NAND Introduce NAND_NO_READRDY option The nand driver has a superflous read ready / command delay in the read functions. This was added to handle chips which have an automatic read forward. Newer chips do not have this functionality anymore. Add this option to avoid the delay / I/O operation. Mark all large page chips with the new option flag. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2006-05-25 15:50:16 +08:00
/*
mtd: nand_ids: minor clean-ups Clean-up the code a little bit: * clean-up commentaries. * move macro definitions to the top of the file. Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Acked-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-03-04 19:39:30 +08:00
* These are the new chips with large page size. Their page size and
* eraseblock size are determined from the extended ID bytes.
[MTD] NAND Introduce NAND_NO_READRDY option The nand driver has a superflous read ready / command delay in the read functions. This was added to handle chips which have an automatic read forward. Newer chips do not have this functionality anymore. Add this option to avoid the delay / I/O operation. Mark all large page chips with the new option flag. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2006-05-25 15:50:16 +08:00
*/
mtd: nand: add 512 Mbit device code (Macronix) Macronix MX30LF1208AA is a 512 Mbit NAND with device code 0xF0. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2011-11-03 04:34:43 +08:00
/* 512 Megabit */
mtd: nand_ids: introduce helper macros Introduce helper macros for defining NAND chips. These macros do not really add much value in the current code-base. However, we are going to add full ID support which adds some more complexity to the table, and helper macros become useful for readability. Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-03-04 21:39:18 +08:00
EXTENDED_ID_NAND("NAND 64MiB 1,8V 8-bit", 0xA2, 64, LP_OPTIONS),
EXTENDED_ID_NAND("NAND 64MiB 1,8V 8-bit", 0xA0, 64, LP_OPTIONS),
EXTENDED_ID_NAND("NAND 64MiB 3,3V 8-bit", 0xF2, 64, LP_OPTIONS),
EXTENDED_ID_NAND("NAND 64MiB 3,3V 8-bit", 0xD0, 64, LP_OPTIONS),
EXTENDED_ID_NAND("NAND 64MiB 3,3V 8-bit", 0xF0, 64, LP_OPTIONS),
EXTENDED_ID_NAND("NAND 64MiB 1,8V 16-bit", 0xB2, 64, LP_OPTIONS16),
EXTENDED_ID_NAND("NAND 64MiB 1,8V 16-bit", 0xB0, 64, LP_OPTIONS16),
EXTENDED_ID_NAND("NAND 64MiB 3,3V 16-bit", 0xC2, 64, LP_OPTIONS16),
EXTENDED_ID_NAND("NAND 64MiB 3,3V 16-bit", 0xC0, 64, LP_OPTIONS16),
[MTD] NAND: Clean up trailing white spaces Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2005-11-07 19:15:49 +08:00
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 06:20:36 +08:00
/* 1 Gigabit */
mtd: nand_ids: introduce helper macros Introduce helper macros for defining NAND chips. These macros do not really add much value in the current code-base. However, we are going to add full ID support which adds some more complexity to the table, and helper macros become useful for readability. Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-03-04 21:39:18 +08:00
EXTENDED_ID_NAND("NAND 128MiB 1,8V 8-bit", 0xA1, 128, LP_OPTIONS),
EXTENDED_ID_NAND("NAND 128MiB 3,3V 8-bit", 0xF1, 128, LP_OPTIONS),
EXTENDED_ID_NAND("NAND 128MiB 3,3V 8-bit", 0xD1, 128, LP_OPTIONS),
EXTENDED_ID_NAND("NAND 128MiB 1,8V 16-bit", 0xB1, 128, LP_OPTIONS16),
EXTENDED_ID_NAND("NAND 128MiB 3,3V 16-bit", 0xC1, 128, LP_OPTIONS16),
EXTENDED_ID_NAND("NAND 128MiB 1,8V 16-bit", 0xAD, 128, LP_OPTIONS16),
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 06:20:36 +08:00
/* 2 Gigabit */
mtd: nand_ids: introduce helper macros Introduce helper macros for defining NAND chips. These macros do not really add much value in the current code-base. However, we are going to add full ID support which adds some more complexity to the table, and helper macros become useful for readability. Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-03-04 21:39:18 +08:00
EXTENDED_ID_NAND("NAND 256MiB 1,8V 8-bit", 0xAA, 256, LP_OPTIONS),
EXTENDED_ID_NAND("NAND 256MiB 3,3V 8-bit", 0xDA, 256, LP_OPTIONS),
EXTENDED_ID_NAND("NAND 256MiB 1,8V 16-bit", 0xBA, 256, LP_OPTIONS16),
EXTENDED_ID_NAND("NAND 256MiB 3,3V 16-bit", 0xCA, 256, LP_OPTIONS16),
[MTD] NAND: Clean up trailing white spaces Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2005-11-07 19:15:49 +08:00
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 06:20:36 +08:00
/* 4 Gigabit */
mtd: nand_ids: introduce helper macros Introduce helper macros for defining NAND chips. These macros do not really add much value in the current code-base. However, we are going to add full ID support which adds some more complexity to the table, and helper macros become useful for readability. Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-03-04 21:39:18 +08:00
EXTENDED_ID_NAND("NAND 512MiB 1,8V 8-bit", 0xAC, 512, LP_OPTIONS),
EXTENDED_ID_NAND("NAND 512MiB 3,3V 8-bit", 0xDC, 512, LP_OPTIONS),
EXTENDED_ID_NAND("NAND 512MiB 1,8V 16-bit", 0xBC, 512, LP_OPTIONS16),
EXTENDED_ID_NAND("NAND 512MiB 3,3V 16-bit", 0xCC, 512, LP_OPTIONS16),
[MTD] NAND: Clean up trailing white spaces Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2005-11-07 19:15:49 +08:00
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 06:20:36 +08:00
/* 8 Gigabit */
mtd: nand_ids: introduce helper macros Introduce helper macros for defining NAND chips. These macros do not really add much value in the current code-base. However, we are going to add full ID support which adds some more complexity to the table, and helper macros become useful for readability. Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-03-04 21:39:18 +08:00
EXTENDED_ID_NAND("NAND 1GiB 1,8V 8-bit", 0xA3, 1024, LP_OPTIONS),
EXTENDED_ID_NAND("NAND 1GiB 3,3V 8-bit", 0xD3, 1024, LP_OPTIONS),
EXTENDED_ID_NAND("NAND 1GiB 1,8V 16-bit", 0xB3, 1024, LP_OPTIONS16),
EXTENDED_ID_NAND("NAND 1GiB 3,3V 16-bit", 0xC3, 1024, LP_OPTIONS16),
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 06:20:36 +08:00
/* 16 Gigabit */
mtd: nand_ids: introduce helper macros Introduce helper macros for defining NAND chips. These macros do not really add much value in the current code-base. However, we are going to add full ID support which adds some more complexity to the table, and helper macros become useful for readability. Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-03-04 21:39:18 +08:00
EXTENDED_ID_NAND("NAND 2GiB 1,8V 8-bit", 0xA5, 2048, LP_OPTIONS),
EXTENDED_ID_NAND("NAND 2GiB 3,3V 8-bit", 0xD5, 2048, LP_OPTIONS),
EXTENDED_ID_NAND("NAND 2GiB 1,8V 16-bit", 0xB5, 2048, LP_OPTIONS16),
EXTENDED_ID_NAND("NAND 2GiB 3,3V 16-bit", 0xC5, 2048, LP_OPTIONS16),
[MTD] NAND Introduce NAND_NO_READRDY option The nand driver has a superflous read ready / command delay in the read functions. This was added to handle chips which have an automatic read forward. Newer chips do not have this functionality anymore. Add this option to avoid the delay / I/O operation. Mark all large page chips with the new option flag. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2006-05-25 15:50:16 +08:00
mtd: nand_ids: add two entries for NAND chips Included the basic size info for NAND chips with ID of 0xAD or 0xD7. The first can be found in Hynix HY27SF161G2M, while the second can be found in Micron MT29F64G08 and the Samsung K9LBG08U0D (among others). Also, some 64 Gbit (or larger) chips identify as 0xD7 because they contain multiple smaller 32 Gbit chips. I assume it's safe to classify these under the 32 Gbit listing. Signed-off-by: Brian Norris <norris@broadcom.com> Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2010-06-18 03:35:11 +08:00
/* 32 Gigabit */
mtd: nand_ids: introduce helper macros Introduce helper macros for defining NAND chips. These macros do not really add much value in the current code-base. However, we are going to add full ID support which adds some more complexity to the table, and helper macros become useful for readability. Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-03-04 21:39:18 +08:00
EXTENDED_ID_NAND("NAND 4GiB 1,8V 8-bit", 0xA7, 4096, LP_OPTIONS),
EXTENDED_ID_NAND("NAND 4GiB 3,3V 8-bit", 0xD7, 4096, LP_OPTIONS),
EXTENDED_ID_NAND("NAND 4GiB 1,8V 16-bit", 0xB7, 4096, LP_OPTIONS16),
EXTENDED_ID_NAND("NAND 4GiB 3,3V 16-bit", 0xC7, 4096, LP_OPTIONS16),
mtd: nand: support new Toshiba SLC Toshiba does not use ONFI for their NAND flash. So we have to continue to add new IDs used by Toshiba devices as well as heuristic detection for scanning the 2nd page for a BBM. This is a relatively harmless start at supporting many of them. These chips mostly follow the same ID fields of previous generations, but there is a need for a tweak. These chips introduce a strange 576 byte OOB (that's 36 bytes per 512 bytes of page). In the preliminary data, Toshiba has not defined exactly how their ID strings should decode. In the future, a new tweak must be added. Data is taken from, among others, Toshiba TC58TxG4S2FBAxx Signed-off-by: Brian Norris <norris@broadcom.com> Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2010-08-21 03:36:12 +08:00
/* 64 Gigabit */
mtd: nand_ids: introduce helper macros Introduce helper macros for defining NAND chips. These macros do not really add much value in the current code-base. However, we are going to add full ID support which adds some more complexity to the table, and helper macros become useful for readability. Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-03-04 21:39:18 +08:00
EXTENDED_ID_NAND("NAND 8GiB 1,8V 8-bit", 0xAE, 8192, LP_OPTIONS),
EXTENDED_ID_NAND("NAND 8GiB 3,3V 8-bit", 0xDE, 8192, LP_OPTIONS),
EXTENDED_ID_NAND("NAND 8GiB 1,8V 16-bit", 0xBE, 8192, LP_OPTIONS16),
EXTENDED_ID_NAND("NAND 8GiB 3,3V 16-bit", 0xCE, 8192, LP_OPTIONS16),
mtd: nand: support new Toshiba SLC Toshiba does not use ONFI for their NAND flash. So we have to continue to add new IDs used by Toshiba devices as well as heuristic detection for scanning the 2nd page for a BBM. This is a relatively harmless start at supporting many of them. These chips mostly follow the same ID fields of previous generations, but there is a need for a tweak. These chips introduce a strange 576 byte OOB (that's 36 bytes per 512 bytes of page). In the preliminary data, Toshiba has not defined exactly how their ID strings should decode. In the future, a new tweak must be added. Data is taken from, among others, Toshiba TC58TxG4S2FBAxx Signed-off-by: Brian Norris <norris@broadcom.com> Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2010-08-21 03:36:12 +08:00
/* 128 Gigabit */
mtd: nand_ids: introduce helper macros Introduce helper macros for defining NAND chips. These macros do not really add much value in the current code-base. However, we are going to add full ID support which adds some more complexity to the table, and helper macros become useful for readability. Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-03-04 21:39:18 +08:00
EXTENDED_ID_NAND("NAND 16GiB 1,8V 8-bit", 0x1A, 16384, LP_OPTIONS),
EXTENDED_ID_NAND("NAND 16GiB 3,3V 8-bit", 0x3A, 16384, LP_OPTIONS),
EXTENDED_ID_NAND("NAND 16GiB 1,8V 16-bit", 0x2A, 16384, LP_OPTIONS16),
EXTENDED_ID_NAND("NAND 16GiB 3,3V 16-bit", 0x4A, 16384, LP_OPTIONS16),
mtd: nand: support new Toshiba SLC Toshiba does not use ONFI for their NAND flash. So we have to continue to add new IDs used by Toshiba devices as well as heuristic detection for scanning the 2nd page for a BBM. This is a relatively harmless start at supporting many of them. These chips mostly follow the same ID fields of previous generations, but there is a need for a tweak. These chips introduce a strange 576 byte OOB (that's 36 bytes per 512 bytes of page). In the preliminary data, Toshiba has not defined exactly how their ID strings should decode. In the future, a new tweak must be added. Data is taken from, among others, Toshiba TC58TxG4S2FBAxx Signed-off-by: Brian Norris <norris@broadcom.com> Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2010-08-21 03:36:12 +08:00
/* 256 Gigabit */
mtd: nand_ids: introduce helper macros Introduce helper macros for defining NAND chips. These macros do not really add much value in the current code-base. However, we are going to add full ID support which adds some more complexity to the table, and helper macros become useful for readability. Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-03-04 21:39:18 +08:00
EXTENDED_ID_NAND("NAND 32GiB 1,8V 8-bit", 0x1C, 32768, LP_OPTIONS),
EXTENDED_ID_NAND("NAND 32GiB 3,3V 8-bit", 0x3C, 32768, LP_OPTIONS),
EXTENDED_ID_NAND("NAND 32GiB 1,8V 16-bit", 0x2C, 32768, LP_OPTIONS16),
EXTENDED_ID_NAND("NAND 32GiB 3,3V 16-bit", 0x4C, 32768, LP_OPTIONS16),
mtd: nand: support new Toshiba SLC Toshiba does not use ONFI for their NAND flash. So we have to continue to add new IDs used by Toshiba devices as well as heuristic detection for scanning the 2nd page for a BBM. This is a relatively harmless start at supporting many of them. These chips mostly follow the same ID fields of previous generations, but there is a need for a tweak. These chips introduce a strange 576 byte OOB (that's 36 bytes per 512 bytes of page). In the preliminary data, Toshiba has not defined exactly how their ID strings should decode. In the future, a new tweak must be added. Data is taken from, among others, Toshiba TC58TxG4S2FBAxx Signed-off-by: Brian Norris <norris@broadcom.com> Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2010-08-21 03:36:12 +08:00
/* 512 Gigabit */
mtd: nand_ids: introduce helper macros Introduce helper macros for defining NAND chips. These macros do not really add much value in the current code-base. However, we are going to add full ID support which adds some more complexity to the table, and helper macros become useful for readability. Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-03-04 21:39:18 +08:00
EXTENDED_ID_NAND("NAND 64GiB 1,8V 8-bit", 0x1E, 65536, LP_OPTIONS),
EXTENDED_ID_NAND("NAND 64GiB 3,3V 8-bit", 0x3E, 65536, LP_OPTIONS),
EXTENDED_ID_NAND("NAND 64GiB 1,8V 16-bit", 0x2E, 65536, LP_OPTIONS16),
EXTENDED_ID_NAND("NAND 64GiB 3,3V 16-bit", 0x4E, 65536, LP_OPTIONS16),
mtd: nand_ids: add two entries for NAND chips Included the basic size info for NAND chips with ID of 0xAD or 0xD7. The first can be found in Hynix HY27SF161G2M, while the second can be found in Micron MT29F64G08 and the Samsung K9LBG08U0D (among others). Also, some 64 Gbit (or larger) chips identify as 0xD7 because they contain multiple smaller 32 Gbit chips. I assume it's safe to classify these under the 32 Gbit listing. Signed-off-by: Brian Norris <norris@broadcom.com> Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2010-06-18 03:35:11 +08:00
mtd: nand_ids: introduce helper macros Introduce helper macros for defining NAND chips. These macros do not really add much value in the current code-base. However, we are going to add full ID support which adds some more complexity to the table, and helper macros become useful for readability. Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-03-04 21:39:18 +08:00
{NULL}
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 06:20:36 +08:00
};
mtd: nand_ids: minor clean-ups Clean-up the code a little bit: * clean-up commentaries. * move macro definitions to the top of the file. Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Acked-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-03-04 19:39:30 +08:00
/* Manufacturer IDs */
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 06:20:36 +08:00
struct nand_manufacturers nand_manuf_ids[] = {
{NAND_MFR_TOSHIBA, "Toshiba"},
{NAND_MFR_SAMSUNG, "Samsung"},
{NAND_MFR_FUJITSU, "Fujitsu"},
{NAND_MFR_NATIONAL, "National"},
{NAND_MFR_RENESAS, "Renesas"},
{NAND_MFR_STMICRO, "ST Micro"},
[MTD NAND] Indent all of drivers/mtd/nand/*.c. It was just too painful to deal with. Signed-off-by: David Woodhouse <dwmw2@infradead.org>
2006-05-14 01:07:53 +08:00
{NAND_MFR_HYNIX, "Hynix"},
[MTD][NAND] Add Micron Manufacturer ID Add Micron Manufacturer ID. Signed-off-by: Shahrom Sharif <sshahrom@micron.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: David Woodhouse <dwmw2@infradead.org>
2007-03-22 09:48:02 +08:00
{NAND_MFR_MICRON, "Micron"},
mtd: nand: change "AMD" manuf. ID to "AMD/Spansion" This manufacturer ID is used under the name Spansion. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-06-21 07:14:02 +08:00
{NAND_MFR_AMD, "AMD/Spansion"},
mtd: nand: add Macronix manufacturer Macronix is produing SLC NAND MX30LF1208AA, so add their manufacturer code to the manufacturer lists. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2011-11-03 04:34:42 +08:00
{NAND_MFR_MACRONIX, "Macronix"},
mtd: nand: add Eon Silicon Solutions manufacturer ID Eon's new NAND flash: EN27LN1G08. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-05-22 22:30:47 +08:00
{NAND_MFR_EON, "Eon"},
mtd: nand: add SanDisk manufacturer ID Add the manufactor ID for SanDisk. Make preparation for SanDisk SDTNRGAMA-008G. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-12-26 15:37:45 +08:00
{NAND_MFR_SANDISK, "SanDisk"},
mtd: nand: add Intel manufacturer ID Add the Intel manufacturer Id. Tested with Intel JS29F32G08ACMD1(4096 + 224) which is ONFI 2.0 compliant nand. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-01-03 16:50:39 +08:00
{NAND_MFR_INTEL, "Intel"},
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 06:20:36 +08:00
{0x0, "Unknown"}
};
[MTD NAND] Indent all of drivers/mtd/nand/*.c. It was just too painful to deal with. Signed-off-by: David Woodhouse <dwmw2@infradead.org>
2006-05-14 01:07:53 +08:00
EXPORT_SYMBOL(nand_manuf_ids);
EXPORT_SYMBOL(nand_flash_ids);
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 06:20:36 +08:00
[MTD NAND] Indent all of drivers/mtd/nand/*.c. It was just too painful to deal with. Signed-off-by: David Woodhouse <dwmw2@infradead.org>
2006-05-14 01:07:53 +08:00
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Thomas Gleixner <tglx@linutronix.de>");
MODULE_DESCRIPTION("Nand device & manufacturer IDs");
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