2018-05-03 21:26:20 +08:00
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/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
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/*
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* Copyright (c) 2017 BayLibre, SAS
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* Author: Neil Armstrong <narmstrong@baylibre.com>
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*
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* Copyright (c) 2018 Amlogic, inc.
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* Author: Qiufang Dai <qiufang.dai@amlogic.com>
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* Author: Yixun Lan <yixun.lan@amlogic.com>
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*/
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#ifndef __MESON_AOCLK_H__
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#define __MESON_AOCLK_H__
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clk: meson: rework and clean drivers dependencies
Initially, the meson clock directory only hosted 2 controllers drivers,
for meson8 and gxbb. At the time, both used the same set of clock drivers
so managing the dependencies was not a big concern.
Since this ancient time, entropy did its job, controllers with different
requirement and specific clock drivers have been added. Unfortunately, we
did not do a great job at managing the dependencies between the
controllers and the different clock drivers. Some drivers, such as
clk-phase or vid-pll-div, are compiled even if they are useless on the
target (meson8). As we are adding new controllers, we need to be able to
pick a driver w/o pulling the whole thing.
The patch aims to clean things up by:
* providing a dedicated CONFIG_ for each clock drivers
* allowing clock drivers to be compiled as a modules, if possible
* stating explicitly which drivers are required by each controller.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lkml.kernel.org/r/20190201125841.26785-5-jbrunet@baylibre.com
2019-02-01 20:58:41 +08:00
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#include <linux/clk-provider.h>
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2018-05-03 21:26:20 +08:00
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#include <linux/platform_device.h>
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clk: meson: rework and clean drivers dependencies
Initially, the meson clock directory only hosted 2 controllers drivers,
for meson8 and gxbb. At the time, both used the same set of clock drivers
so managing the dependencies was not a big concern.
Since this ancient time, entropy did its job, controllers with different
requirement and specific clock drivers have been added. Unfortunately, we
did not do a great job at managing the dependencies between the
controllers and the different clock drivers. Some drivers, such as
clk-phase or vid-pll-div, are compiled even if they are useless on the
target (meson8). As we are adding new controllers, we need to be able to
pick a driver w/o pulling the whole thing.
The patch aims to clean things up by:
* providing a dedicated CONFIG_ for each clock drivers
* allowing clock drivers to be compiled as a modules, if possible
* stating explicitly which drivers are required by each controller.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lkml.kernel.org/r/20190201125841.26785-5-jbrunet@baylibre.com
2019-02-01 20:58:41 +08:00
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#include <linux/regmap.h>
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2018-05-03 21:26:20 +08:00
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#include <linux/reset-controller.h>
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clk: meson: rework and clean drivers dependencies
Initially, the meson clock directory only hosted 2 controllers drivers,
for meson8 and gxbb. At the time, both used the same set of clock drivers
so managing the dependencies was not a big concern.
Since this ancient time, entropy did its job, controllers with different
requirement and specific clock drivers have been added. Unfortunately, we
did not do a great job at managing the dependencies between the
controllers and the different clock drivers. Some drivers, such as
clk-phase or vid-pll-div, are compiled even if they are useless on the
target (meson8). As we are adding new controllers, we need to be able to
pick a driver w/o pulling the whole thing.
The patch aims to clean things up by:
* providing a dedicated CONFIG_ for each clock drivers
* allowing clock drivers to be compiled as a modules, if possible
* stating explicitly which drivers are required by each controller.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lkml.kernel.org/r/20190201125841.26785-5-jbrunet@baylibre.com
2019-02-01 20:58:41 +08:00
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#include "clk-regmap.h"
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2019-01-17 01:54:35 +08:00
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2018-05-03 21:26:20 +08:00
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struct meson_aoclk_data {
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const unsigned int reset_reg;
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const int num_reset;
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const unsigned int *reset;
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2019-01-17 01:54:35 +08:00
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const int num_clks;
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2018-05-03 21:26:20 +08:00
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struct clk_regmap **clks;
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const struct clk_hw_onecell_data *hw_data;
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};
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struct meson_aoclk_reset_controller {
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struct reset_controller_dev reset;
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const struct meson_aoclk_data *data;
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struct regmap *regmap;
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};
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int meson_aoclkc_probe(struct platform_device *pdev);
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#endif
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