2012-02-27 18:19:34 +08:00
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Atmel AT91 device tree bindings.
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PIT Timer required properties:
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- compatible: Should be "atmel,at91sam9260-pit"
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- reg: Should contain registers location and length
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- interrupts: Should contain interrupt for the PIT which is the IRQ line
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shared across all System Controller members.
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2012-01-19 17:13:40 +08:00
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2012-10-29 02:31:07 +08:00
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System Timer (ST) required properties:
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- compatible: Should be "atmel,at91rm9200-st"
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- reg: Should contain registers location and length
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- interrupts: Should contain interrupt for the ST which is the IRQ line
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shared across all System Controller members.
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2012-01-19 17:13:40 +08:00
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TC/TCLIB Timer required properties:
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2012-09-14 17:01:29 +08:00
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- compatible: Should be "atmel,<chip>-tcb".
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2012-01-19 17:13:40 +08:00
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<chip> can be "at91rm9200" or "at91sam9x5"
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- reg: Should contain registers location and length
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- interrupts: Should contain all interrupts for the TC block
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Note that you can specify several interrupt cells if the TC
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block has one interrupt per channel.
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Examples:
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One interrupt per TC block:
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tcb0: timer@fff7c000 {
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compatible = "atmel,at91rm9200-tcb";
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reg = <0xfff7c000 0x100>;
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interrupts = <18 4>;
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};
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One interrupt per TC channel in a TC block:
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tcb1: timer@fffdc000 {
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compatible = "atmel,at91rm9200-tcb";
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reg = <0xfffdc000 0x100>;
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interrupts = <26 4 27 4 28 4>;
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};
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2012-03-03 03:16:27 +08:00
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RSTC Reset Controller required properties:
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- compatible: Should be "atmel,<chip>-rstc".
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<chip> can be "at91sam9260" or "at91sam9g45"
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- reg: Should contain registers location and length
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Example:
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rstc@fffffd00 {
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compatible = "atmel,at91sam9260-rstc";
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reg = <0xfffffd00 0x10>;
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};
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2012-03-02 20:54:37 +08:00
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RAMC SDRAM/DDR Controller required properties:
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2013-11-15 18:03:23 +08:00
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- compatible: Should be "atmel,at91rm9200-sdramc",
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"atmel,at91sam9260-sdramc",
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2012-03-02 20:54:37 +08:00
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"atmel,at91sam9g45-ddramc",
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- reg: Should contain registers location and length
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For at91sam9263 and at91sam9g45 you must specify 2 entries.
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Examples:
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ramc0: ramc@ffffe800 {
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compatible = "atmel,at91sam9g45-ddramc";
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reg = <0xffffe800 0x200>;
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};
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ramc0: ramc@ffffe400 {
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compatible = "atmel,at91sam9g45-ddramc";
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reg = <0xffffe400 0x200
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0xffffe600 0x200>;
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};
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2012-03-02 21:01:00 +08:00
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SHDWC Shutdown Controller
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required properties:
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- compatible: Should be "atmel,<chip>-shdwc".
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<chip> can be "at91sam9260", "at91sam9rl" or "at91sam9x5".
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- reg: Should contain registers location and length
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optional properties:
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- atmel,wakeup-mode: String, operation mode of the wakeup mode.
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Supported values are: "none", "high", "low", "any".
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- atmel,wakeup-counter: Counter on Wake-up 0 (between 0x0 and 0xf).
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optional at91sam9260 properties:
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- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
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optional at91sam9rl properties:
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- atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
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- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
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optional at91sam9x5 properties:
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- atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
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Example:
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rstc@fffffd00 {
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compatible = "atmel,at91sam9260-rstc";
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reg = <0xfffffd00 0x10>;
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};
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