2017-12-26 03:54:35 +08:00
|
|
|
/* SPDX-License-Identifier: GPL-2.0 */
|
|
|
|
/*
|
2011-08-30 15:49:36 +08:00
|
|
|
* Copyright (c) 2008 Simtec Electronics
|
|
|
|
* Ben Dooks <ben@simtec.co.uk>
|
|
|
|
*
|
|
|
|
* S3C24XX - Memory map definitions
|
2017-12-26 03:54:35 +08:00
|
|
|
*/
|
2011-08-30 15:49:36 +08:00
|
|
|
|
|
|
|
#ifndef __ASM_PLAT_MAP_S3C_H
|
|
|
|
#define __ASM_PLAT_MAP_S3C_H __FILE__
|
|
|
|
|
2019-09-03 00:37:30 +08:00
|
|
|
#include "map.h"
|
ARM: s3c24xx: simplify mach/io.h
s3c24xx has a custom implementation of the inb/outb family of I/O
accessors, implementing both general register access and ISA I/O port
through a multiplexer.
As far as I can tell, the first case has never been needed, and certainly
is not used now, as drivers only use inb/outb to actually driver ISA or
PCI port I/O.
Similarly, the special ISA support is limited to a single machine, the
Simtec Electronics BAST (EB2410ITX) with its PC/104 expansion connector,
all other machines could simply use the generic implementation from
asm/io.h that expects a single memory-mapped address range for byte,
word and dword access. As no other machines besides BAST actually selects
CONFIG_ISA, this is likely not even necessary.
As a cleanup, remove support for the non-ISA access from the helpers,
and make the ISA access use the virtual address window that we use
elsewhere for PCI I/O ports. In configurations without the BAST machine,
this now falls back on the generic implementation from asm/io.h, but
the mach/io.h header is still relied on to include a number of other
header files implicitly.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/r/20200806182059.2431-7-krzk@kernel.org
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-08-07 02:20:24 +08:00
|
|
|
|
2011-08-30 15:49:36 +08:00
|
|
|
#define S3C24XX_VA_IRQ S3C_VA_IRQ
|
|
|
|
#define S3C24XX_VA_MEMCTRL S3C_VA_MEM
|
|
|
|
#define S3C24XX_VA_UART S3C_VA_UART
|
|
|
|
|
|
|
|
#define S3C24XX_VA_TIMER S3C_VA_TIMER
|
|
|
|
#define S3C24XX_VA_CLKPWR S3C_VA_SYS
|
|
|
|
#define S3C24XX_VA_WATCHDOG S3C_VA_WATCHDOG
|
|
|
|
|
|
|
|
#define S3C2412_VA_SSMC S3C_ADDR_CPU(0x00000000)
|
2012-05-12 05:11:49 +08:00
|
|
|
#define S3C2412_VA_EBI S3C_ADDR_CPU(0x00100000)
|
2011-08-30 15:49:36 +08:00
|
|
|
|
|
|
|
#define S3C2410_PA_UART (0x50000000)
|
|
|
|
#define S3C24XX_PA_UART S3C2410_PA_UART
|
|
|
|
|
|
|
|
/*
|
|
|
|
* GPIO ports
|
|
|
|
*
|
|
|
|
* the calculation for the VA of this must ensure that
|
|
|
|
* it is the same distance apart from the UART in the
|
|
|
|
* phsyical address space, as the initial mapping for the IO
|
|
|
|
* is done as a 1:1 mapping. This puts it (currently) at
|
|
|
|
* 0xFA800000, which is not in the way of any current mapping
|
|
|
|
* by the base system.
|
|
|
|
*/
|
|
|
|
|
|
|
|
#define S3C2410_PA_GPIO (0x56000000)
|
|
|
|
#define S3C24XX_PA_GPIO S3C2410_PA_GPIO
|
|
|
|
|
|
|
|
#define S3C24XX_VA_GPIO ((S3C24XX_PA_GPIO - S3C24XX_PA_UART) + S3C24XX_VA_UART)
|
|
|
|
#define S3C64XX_VA_GPIO S3C_ADDR_CPU(0x00000000)
|
|
|
|
|
|
|
|
#define S3C64XX_VA_MODEM S3C_ADDR_CPU(0x00100000)
|
|
|
|
#define S3C64XX_VA_USB_HSPHY S3C_ADDR_CPU(0x00200000)
|
|
|
|
|
|
|
|
#define S3C_VA_USB_HSPHY S3C64XX_VA_USB_HSPHY
|
|
|
|
|
|
|
|
#define S3C2410_ADDR(x) S3C_ADDR(x)
|
|
|
|
|
|
|
|
/* deal with the registers that move under the 2412/2413 */
|
|
|
|
|
2017-07-17 13:48:07 +08:00
|
|
|
#if defined(CONFIG_CPU_S3C2412)
|
2011-08-30 15:49:36 +08:00
|
|
|
#ifndef __ASSEMBLY__
|
|
|
|
extern void __iomem *s3c24xx_va_gpio2;
|
|
|
|
#endif
|
|
|
|
#ifdef CONFIG_CPU_S3C2412_ONLY
|
|
|
|
#define S3C24XX_VA_GPIO2 (S3C24XX_VA_GPIO + 0x10)
|
|
|
|
#else
|
|
|
|
#define S3C24XX_VA_GPIO2 s3c24xx_va_gpio2
|
|
|
|
#endif
|
|
|
|
#else
|
|
|
|
#define s3c24xx_va_gpio2 S3C24XX_VA_GPIO
|
|
|
|
#define S3C24XX_VA_GPIO2 S3C24XX_VA_GPIO
|
|
|
|
#endif
|
|
|
|
|
2019-09-03 00:37:30 +08:00
|
|
|
#include "map-s5p.h"
|
2011-08-30 15:49:36 +08:00
|
|
|
|
|
|
|
#endif /* __ASM_PLAT_MAP_S3C_H */
|