2005-09-26 14:04:21 +08:00
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/*
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* This file contains ioremap and related functions for 64-bit machines.
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*
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* Derived from arch/ppc64/mm/init.c
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* Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
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*
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* Modifications by Paul Mackerras (PowerMac) (paulus@samba.org)
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* and Cort Dougan (PReP) (cort@cs.nmt.edu)
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* Copyright (C) 1996 Paul Mackerras
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*
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* Derived from "arch/i386/mm/init.c"
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* Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
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*
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* Dave Engebretsen <engebret@us.ibm.com>
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* Rework for PPC64 port.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*
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*/
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#include <linux/signal.h>
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/string.h>
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2011-05-27 22:46:24 +08:00
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#include <linux/export.h>
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2005-09-26 14:04:21 +08:00
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#include <linux/types.h>
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#include <linux/mman.h>
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#include <linux/mm.h>
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#include <linux/swap.h>
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#include <linux/stddef.h>
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#include <linux/vmalloc.h>
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2009-07-24 07:15:16 +08:00
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#include <linux/bootmem.h>
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2010-07-12 12:36:09 +08:00
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#include <linux/memblock.h>
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include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-24 16:04:11 +08:00
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#include <linux/slab.h>
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2005-09-26 14:04:21 +08:00
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#include <asm/pgalloc.h>
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#include <asm/page.h>
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#include <asm/prom.h>
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#include <asm/io.h>
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#include <asm/mmu_context.h>
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#include <asm/pgtable.h>
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#include <asm/mmu.h>
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#include <asm/smp.h>
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#include <asm/machdep.h>
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#include <asm/tlb.h>
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#include <asm/processor.h>
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#include <asm/cputable.h>
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#include <asm/sections.h>
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2006-09-25 11:36:31 +08:00
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#include <asm/firmware.h>
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2005-11-16 12:43:48 +08:00
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#include "mmu_decl.h"
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2005-09-26 14:04:21 +08:00
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2014-08-13 15:02:04 +08:00
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#define CREATE_TRACE_POINTS
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#include <trace/events/thp.h>
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2012-09-10 10:52:57 +08:00
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/* Some sanity checking */
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#if TASK_SIZE_USER64 > PGTABLE_RANGE
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#error TASK_SIZE_USER64 exceeds pagetable range
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#endif
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#ifdef CONFIG_PPC_STD_MMU_64
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2013-03-13 11:34:55 +08:00
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#if TASK_SIZE_USER64 > (1UL << (ESID_BITS + SID_SHIFT))
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2012-09-10 10:52:57 +08:00
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#error TASK_SIZE_USER64 exceeds user VSID range
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#endif
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#endif
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2005-09-26 14:04:21 +08:00
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2012-09-10 10:52:57 +08:00
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unsigned long ioremap_bot = IOREMAP_BASE;
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2009-07-24 07:15:16 +08:00
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#ifdef CONFIG_PPC_MMU_NOHASH
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2014-08-02 11:07:40 +08:00
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static __ref void *early_alloc_pgtable(unsigned long size)
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2009-07-24 07:15:16 +08:00
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{
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void *pt;
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if (init_bootmem_done)
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pt = __alloc_bootmem(size, size, __pa(MAX_DMA_ADDRESS));
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else
|
2010-07-12 12:36:09 +08:00
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pt = __va(memblock_alloc_base(size, size,
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2009-07-24 07:15:16 +08:00
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__pa(MAX_DMA_ADDRESS)));
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memset(pt, 0, size);
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return pt;
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}
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#endif /* CONFIG_PPC_MMU_NOHASH */
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2005-09-26 14:04:21 +08:00
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/*
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2009-07-24 07:15:16 +08:00
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* map_kernel_page currently only called by __ioremap
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* map_kernel_page adds an entry to the ioremap page table
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2005-09-26 14:04:21 +08:00
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* and adds an entry to the HPT, possibly bolting it
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*/
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2009-07-24 07:15:58 +08:00
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int map_kernel_page(unsigned long ea, unsigned long pa, int flags)
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2005-09-26 14:04:21 +08:00
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{
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pgd_t *pgdp;
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pud_t *pudp;
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pmd_t *pmdp;
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pte_t *ptep;
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2009-07-24 07:15:16 +08:00
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if (slab_is_available()) {
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2005-09-26 14:04:21 +08:00
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pgdp = pgd_offset_k(ea);
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pudp = pud_alloc(&init_mm, pgdp, ea);
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if (!pudp)
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return -ENOMEM;
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pmdp = pmd_alloc(&init_mm, pudp, ea);
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if (!pmdp)
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return -ENOMEM;
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2005-10-31 10:37:12 +08:00
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ptep = pte_alloc_kernel(pmdp, ea);
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2005-09-26 14:04:21 +08:00
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if (!ptep)
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return -ENOMEM;
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set_pte_at(&init_mm, ea, ptep, pfn_pte(pa >> PAGE_SHIFT,
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__pgprot(flags)));
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} else {
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2009-07-24 07:15:16 +08:00
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#ifdef CONFIG_PPC_MMU_NOHASH
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/* Warning ! This will blow up if bootmem is not initialized
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* which our ppc64 code is keen to do that, we'll need to
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* fix it and/or be more careful
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*/
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pgdp = pgd_offset_k(ea);
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#ifdef PUD_TABLE_SIZE
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if (pgd_none(*pgdp)) {
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pudp = early_alloc_pgtable(PUD_TABLE_SIZE);
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BUG_ON(pudp == NULL);
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pgd_populate(&init_mm, pgdp, pudp);
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}
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#endif /* PUD_TABLE_SIZE */
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pudp = pud_offset(pgdp, ea);
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if (pud_none(*pudp)) {
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pmdp = early_alloc_pgtable(PMD_TABLE_SIZE);
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BUG_ON(pmdp == NULL);
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pud_populate(&init_mm, pudp, pmdp);
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}
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pmdp = pmd_offset(pudp, ea);
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if (!pmd_present(*pmdp)) {
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ptep = early_alloc_pgtable(PAGE_SIZE);
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BUG_ON(ptep == NULL);
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pmd_populate_kernel(&init_mm, pmdp, ptep);
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}
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ptep = pte_offset_kernel(pmdp, ea);
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set_pte_at(&init_mm, ea, ptep, pfn_pte(pa >> PAGE_SHIFT,
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__pgprot(flags)));
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#else /* CONFIG_PPC_MMU_NOHASH */
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2005-09-26 14:04:21 +08:00
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/*
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* If the mm subsystem is not fully up, we cannot create a
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* linux page table entry for this mapping. Simply bolt an
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* entry in the hardware page table.
|
2005-11-07 08:06:55 +08:00
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*
|
2005-09-26 14:04:21 +08:00
|
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*/
|
2007-10-11 18:37:10 +08:00
|
|
|
if (htab_bolt_mapping(ea, ea + PAGE_SIZE, pa, flags,
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|
|
|
mmu_io_psize, mmu_kernel_ssize)) {
|
2005-11-10 08:12:11 +08:00
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|
|
printk(KERN_ERR "Failed to do bolted mapping IO "
|
|
|
|
"memory at %016lx !\n", pa);
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|
|
|
return -ENOMEM;
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|
|
|
}
|
2009-07-24 07:15:16 +08:00
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|
#endif /* !CONFIG_PPC_MMU_NOHASH */
|
2005-09-26 14:04:21 +08:00
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|
|
}
|
2013-10-12 08:22:37 +08:00
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|
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|
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#ifdef CONFIG_PPC_BOOK3E_64
|
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|
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/*
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|
|
|
* With hardware tablewalk, a sync is needed to ensure that
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|
|
* subsequent accesses see the PTE we just wrote. Unlike userspace
|
|
|
|
* mappings, we can't tolerate spurious faults, so make sure
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* the new PTE will be seen the first time.
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*/
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|
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mb();
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#else
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smp_wmb();
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|
#endif
|
2005-09-26 14:04:21 +08:00
|
|
|
return 0;
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|
|
|
}
|
|
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|
|
|
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|
|
[POWERPC] Rewrite IO allocation & mapping on powerpc64
This rewrites pretty much from scratch the handling of MMIO and PIO
space allocations on powerpc64. The main goals are:
- Get rid of imalloc and use more common code where possible
- Simplify the current mess so that PIO space is allocated and
mapped in a single place for PCI bridges
- Handle allocation constraints of PIO for all bridges including
hot plugged ones within the 2GB space reserved for IO ports,
so that devices on hotplugged busses will now work with drivers
that assume IO ports fit in an int.
- Cleanup and separate tracking of the ISA space in the reserved
low 64K of IO space. No ISA -> Nothing mapped there.
I booted a cell blade with IDE on PIO and MMIO and a dual G5 so
far, that's it :-)
With this patch, all allocations are done using the code in
mm/vmalloc.c, though we use the low level __get_vm_area with
explicit start/stop constraints in order to manage separate
areas for vmalloc/vmap, ioremap, and PCI IOs.
This greatly simplifies a lot of things, as you can see in the
diffstat of that patch :-)
A new pair of functions pcibios_map/unmap_io_space() now replace
all of the previous code that used to manipulate PCI IOs space.
The allocation is done at mapping time, which is now called from
scan_phb's, just before the devices are probed (instead of after,
which is by itself a bug fix). The only other caller is the PCI
hotplug code for hot adding PCI-PCI bridges (slots).
imalloc is gone, as is the "sub-allocation" thing, but I do beleive
that hotplug should still work in the sense that the space allocation
is always done by the PHB, but if you unmap a child bus of this PHB
(which seems to be possible), then the code should properly tear
down all the HPTE mappings for that area of the PHB allocated IO space.
I now always reserve the first 64K of IO space for the bridge with
the ISA bus on it. I have moved the code for tracking ISA in a separate
file which should also make it smarter if we ever are capable of
hot unplugging or re-plugging an ISA bridge.
This should have a side effect on platforms like powermac where VGA IOs
will no longer work. This is done on purpose though as they would have
worked semi-randomly before. The idea at this point is to isolate drivers
that might need to access those and fix them by providing a proper
function to obtain an offset to the legacy IOs of a given bus.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-06-04 13:15:36 +08:00
|
|
|
/**
|
|
|
|
* __ioremap_at - Low level function to establish the page tables
|
|
|
|
* for an IO mapping
|
|
|
|
*/
|
|
|
|
void __iomem * __ioremap_at(phys_addr_t pa, void *ea, unsigned long size,
|
2005-09-26 14:04:21 +08:00
|
|
|
unsigned long flags)
|
|
|
|
{
|
|
|
|
unsigned long i;
|
|
|
|
|
2008-07-24 12:27:08 +08:00
|
|
|
/* Make sure we have the base flags */
|
2005-09-26 14:04:21 +08:00
|
|
|
if ((flags & _PAGE_PRESENT) == 0)
|
|
|
|
flags |= pgprot_val(PAGE_KERNEL);
|
|
|
|
|
2008-07-24 12:27:08 +08:00
|
|
|
/* Non-cacheable page cannot be coherent */
|
|
|
|
if (flags & _PAGE_NO_CACHE)
|
|
|
|
flags &= ~_PAGE_COHERENT;
|
|
|
|
|
|
|
|
/* We don't support the 4K PFN hack with ioremap */
|
|
|
|
if (flags & _PAGE_4K_PFN)
|
|
|
|
return NULL;
|
|
|
|
|
[POWERPC] Rewrite IO allocation & mapping on powerpc64
This rewrites pretty much from scratch the handling of MMIO and PIO
space allocations on powerpc64. The main goals are:
- Get rid of imalloc and use more common code where possible
- Simplify the current mess so that PIO space is allocated and
mapped in a single place for PCI bridges
- Handle allocation constraints of PIO for all bridges including
hot plugged ones within the 2GB space reserved for IO ports,
so that devices on hotplugged busses will now work with drivers
that assume IO ports fit in an int.
- Cleanup and separate tracking of the ISA space in the reserved
low 64K of IO space. No ISA -> Nothing mapped there.
I booted a cell blade with IDE on PIO and MMIO and a dual G5 so
far, that's it :-)
With this patch, all allocations are done using the code in
mm/vmalloc.c, though we use the low level __get_vm_area with
explicit start/stop constraints in order to manage separate
areas for vmalloc/vmap, ioremap, and PCI IOs.
This greatly simplifies a lot of things, as you can see in the
diffstat of that patch :-)
A new pair of functions pcibios_map/unmap_io_space() now replace
all of the previous code that used to manipulate PCI IOs space.
The allocation is done at mapping time, which is now called from
scan_phb's, just before the devices are probed (instead of after,
which is by itself a bug fix). The only other caller is the PCI
hotplug code for hot adding PCI-PCI bridges (slots).
imalloc is gone, as is the "sub-allocation" thing, but I do beleive
that hotplug should still work in the sense that the space allocation
is always done by the PHB, but if you unmap a child bus of this PHB
(which seems to be possible), then the code should properly tear
down all the HPTE mappings for that area of the PHB allocated IO space.
I now always reserve the first 64K of IO space for the bridge with
the ISA bus on it. I have moved the code for tracking ISA in a separate
file which should also make it smarter if we ever are capable of
hot unplugging or re-plugging an ISA bridge.
This should have a side effect on platforms like powermac where VGA IOs
will no longer work. This is done on purpose though as they would have
worked semi-randomly before. The idea at this point is to isolate drivers
that might need to access those and fix them by providing a proper
function to obtain an offset to the legacy IOs of a given bus.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-06-04 13:15:36 +08:00
|
|
|
WARN_ON(pa & ~PAGE_MASK);
|
|
|
|
WARN_ON(((unsigned long)ea) & ~PAGE_MASK);
|
|
|
|
WARN_ON(size & ~PAGE_MASK);
|
|
|
|
|
2005-09-26 14:04:21 +08:00
|
|
|
for (i = 0; i < size; i += PAGE_SIZE)
|
2009-07-24 07:15:16 +08:00
|
|
|
if (map_kernel_page((unsigned long)ea+i, pa+i, flags))
|
2005-09-26 14:04:21 +08:00
|
|
|
return NULL;
|
|
|
|
|
[POWERPC] Rewrite IO allocation & mapping on powerpc64
This rewrites pretty much from scratch the handling of MMIO and PIO
space allocations on powerpc64. The main goals are:
- Get rid of imalloc and use more common code where possible
- Simplify the current mess so that PIO space is allocated and
mapped in a single place for PCI bridges
- Handle allocation constraints of PIO for all bridges including
hot plugged ones within the 2GB space reserved for IO ports,
so that devices on hotplugged busses will now work with drivers
that assume IO ports fit in an int.
- Cleanup and separate tracking of the ISA space in the reserved
low 64K of IO space. No ISA -> Nothing mapped there.
I booted a cell blade with IDE on PIO and MMIO and a dual G5 so
far, that's it :-)
With this patch, all allocations are done using the code in
mm/vmalloc.c, though we use the low level __get_vm_area with
explicit start/stop constraints in order to manage separate
areas for vmalloc/vmap, ioremap, and PCI IOs.
This greatly simplifies a lot of things, as you can see in the
diffstat of that patch :-)
A new pair of functions pcibios_map/unmap_io_space() now replace
all of the previous code that used to manipulate PCI IOs space.
The allocation is done at mapping time, which is now called from
scan_phb's, just before the devices are probed (instead of after,
which is by itself a bug fix). The only other caller is the PCI
hotplug code for hot adding PCI-PCI bridges (slots).
imalloc is gone, as is the "sub-allocation" thing, but I do beleive
that hotplug should still work in the sense that the space allocation
is always done by the PHB, but if you unmap a child bus of this PHB
(which seems to be possible), then the code should properly tear
down all the HPTE mappings for that area of the PHB allocated IO space.
I now always reserve the first 64K of IO space for the bridge with
the ISA bus on it. I have moved the code for tracking ISA in a separate
file which should also make it smarter if we ever are capable of
hot unplugging or re-plugging an ISA bridge.
This should have a side effect on platforms like powermac where VGA IOs
will no longer work. This is done on purpose though as they would have
worked semi-randomly before. The idea at this point is to isolate drivers
that might need to access those and fix them by providing a proper
function to obtain an offset to the legacy IOs of a given bus.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-06-04 13:15:36 +08:00
|
|
|
return (void __iomem *)ea;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* __iounmap_from - Low level function to tear down the page tables
|
|
|
|
* for an IO mapping. This is used for mappings that
|
|
|
|
* are manipulated manually, like partial unmapping of
|
|
|
|
* PCI IOs or ISA space.
|
|
|
|
*/
|
|
|
|
void __iounmap_at(void *ea, unsigned long size)
|
|
|
|
{
|
|
|
|
WARN_ON(((unsigned long)ea) & ~PAGE_MASK);
|
|
|
|
WARN_ON(size & ~PAGE_MASK);
|
|
|
|
|
|
|
|
unmap_kernel_range((unsigned long)ea, size);
|
2005-09-26 14:04:21 +08:00
|
|
|
}
|
|
|
|
|
2009-02-23 00:19:14 +08:00
|
|
|
void __iomem * __ioremap_caller(phys_addr_t addr, unsigned long size,
|
|
|
|
unsigned long flags, void *caller)
|
2005-09-26 14:04:21 +08:00
|
|
|
{
|
[POWERPC] Rewrite IO allocation & mapping on powerpc64
This rewrites pretty much from scratch the handling of MMIO and PIO
space allocations on powerpc64. The main goals are:
- Get rid of imalloc and use more common code where possible
- Simplify the current mess so that PIO space is allocated and
mapped in a single place for PCI bridges
- Handle allocation constraints of PIO for all bridges including
hot plugged ones within the 2GB space reserved for IO ports,
so that devices on hotplugged busses will now work with drivers
that assume IO ports fit in an int.
- Cleanup and separate tracking of the ISA space in the reserved
low 64K of IO space. No ISA -> Nothing mapped there.
I booted a cell blade with IDE on PIO and MMIO and a dual G5 so
far, that's it :-)
With this patch, all allocations are done using the code in
mm/vmalloc.c, though we use the low level __get_vm_area with
explicit start/stop constraints in order to manage separate
areas for vmalloc/vmap, ioremap, and PCI IOs.
This greatly simplifies a lot of things, as you can see in the
diffstat of that patch :-)
A new pair of functions pcibios_map/unmap_io_space() now replace
all of the previous code that used to manipulate PCI IOs space.
The allocation is done at mapping time, which is now called from
scan_phb's, just before the devices are probed (instead of after,
which is by itself a bug fix). The only other caller is the PCI
hotplug code for hot adding PCI-PCI bridges (slots).
imalloc is gone, as is the "sub-allocation" thing, but I do beleive
that hotplug should still work in the sense that the space allocation
is always done by the PHB, but if you unmap a child bus of this PHB
(which seems to be possible), then the code should properly tear
down all the HPTE mappings for that area of the PHB allocated IO space.
I now always reserve the first 64K of IO space for the bridge with
the ISA bus on it. I have moved the code for tracking ISA in a separate
file which should also make it smarter if we ever are capable of
hot unplugging or re-plugging an ISA bridge.
This should have a side effect on platforms like powermac where VGA IOs
will no longer work. This is done on purpose though as they would have
worked semi-randomly before. The idea at this point is to isolate drivers
that might need to access those and fix them by providing a proper
function to obtain an offset to the legacy IOs of a given bus.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-06-04 13:15:36 +08:00
|
|
|
phys_addr_t paligned;
|
2005-09-26 14:04:21 +08:00
|
|
|
void __iomem *ret;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Choose an address to map it to.
|
|
|
|
* Once the imalloc system is running, we use it.
|
|
|
|
* Before that, we map using addresses going
|
|
|
|
* up from ioremap_bot. imalloc will use
|
|
|
|
* the addresses from ioremap_bot through
|
|
|
|
* IMALLOC_END
|
|
|
|
*
|
|
|
|
*/
|
[POWERPC] Rewrite IO allocation & mapping on powerpc64
This rewrites pretty much from scratch the handling of MMIO and PIO
space allocations on powerpc64. The main goals are:
- Get rid of imalloc and use more common code where possible
- Simplify the current mess so that PIO space is allocated and
mapped in a single place for PCI bridges
- Handle allocation constraints of PIO for all bridges including
hot plugged ones within the 2GB space reserved for IO ports,
so that devices on hotplugged busses will now work with drivers
that assume IO ports fit in an int.
- Cleanup and separate tracking of the ISA space in the reserved
low 64K of IO space. No ISA -> Nothing mapped there.
I booted a cell blade with IDE on PIO and MMIO and a dual G5 so
far, that's it :-)
With this patch, all allocations are done using the code in
mm/vmalloc.c, though we use the low level __get_vm_area with
explicit start/stop constraints in order to manage separate
areas for vmalloc/vmap, ioremap, and PCI IOs.
This greatly simplifies a lot of things, as you can see in the
diffstat of that patch :-)
A new pair of functions pcibios_map/unmap_io_space() now replace
all of the previous code that used to manipulate PCI IOs space.
The allocation is done at mapping time, which is now called from
scan_phb's, just before the devices are probed (instead of after,
which is by itself a bug fix). The only other caller is the PCI
hotplug code for hot adding PCI-PCI bridges (slots).
imalloc is gone, as is the "sub-allocation" thing, but I do beleive
that hotplug should still work in the sense that the space allocation
is always done by the PHB, but if you unmap a child bus of this PHB
(which seems to be possible), then the code should properly tear
down all the HPTE mappings for that area of the PHB allocated IO space.
I now always reserve the first 64K of IO space for the bridge with
the ISA bus on it. I have moved the code for tracking ISA in a separate
file which should also make it smarter if we ever are capable of
hot unplugging or re-plugging an ISA bridge.
This should have a side effect on platforms like powermac where VGA IOs
will no longer work. This is done on purpose though as they would have
worked semi-randomly before. The idea at this point is to isolate drivers
that might need to access those and fix them by providing a proper
function to obtain an offset to the legacy IOs of a given bus.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-06-04 13:15:36 +08:00
|
|
|
paligned = addr & PAGE_MASK;
|
|
|
|
size = PAGE_ALIGN(addr + size) - paligned;
|
2005-09-26 14:04:21 +08:00
|
|
|
|
[POWERPC] Rewrite IO allocation & mapping on powerpc64
This rewrites pretty much from scratch the handling of MMIO and PIO
space allocations on powerpc64. The main goals are:
- Get rid of imalloc and use more common code where possible
- Simplify the current mess so that PIO space is allocated and
mapped in a single place for PCI bridges
- Handle allocation constraints of PIO for all bridges including
hot plugged ones within the 2GB space reserved for IO ports,
so that devices on hotplugged busses will now work with drivers
that assume IO ports fit in an int.
- Cleanup and separate tracking of the ISA space in the reserved
low 64K of IO space. No ISA -> Nothing mapped there.
I booted a cell blade with IDE on PIO and MMIO and a dual G5 so
far, that's it :-)
With this patch, all allocations are done using the code in
mm/vmalloc.c, though we use the low level __get_vm_area with
explicit start/stop constraints in order to manage separate
areas for vmalloc/vmap, ioremap, and PCI IOs.
This greatly simplifies a lot of things, as you can see in the
diffstat of that patch :-)
A new pair of functions pcibios_map/unmap_io_space() now replace
all of the previous code that used to manipulate PCI IOs space.
The allocation is done at mapping time, which is now called from
scan_phb's, just before the devices are probed (instead of after,
which is by itself a bug fix). The only other caller is the PCI
hotplug code for hot adding PCI-PCI bridges (slots).
imalloc is gone, as is the "sub-allocation" thing, but I do beleive
that hotplug should still work in the sense that the space allocation
is always done by the PHB, but if you unmap a child bus of this PHB
(which seems to be possible), then the code should properly tear
down all the HPTE mappings for that area of the PHB allocated IO space.
I now always reserve the first 64K of IO space for the bridge with
the ISA bus on it. I have moved the code for tracking ISA in a separate
file which should also make it smarter if we ever are capable of
hot unplugging or re-plugging an ISA bridge.
This should have a side effect on platforms like powermac where VGA IOs
will no longer work. This is done on purpose though as they would have
worked semi-randomly before. The idea at this point is to isolate drivers
that might need to access those and fix them by providing a proper
function to obtain an offset to the legacy IOs of a given bus.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-06-04 13:15:36 +08:00
|
|
|
if ((size == 0) || (paligned == 0))
|
2005-09-26 14:04:21 +08:00
|
|
|
return NULL;
|
|
|
|
|
|
|
|
if (mem_init_done) {
|
|
|
|
struct vm_struct *area;
|
[POWERPC] Rewrite IO allocation & mapping on powerpc64
This rewrites pretty much from scratch the handling of MMIO and PIO
space allocations on powerpc64. The main goals are:
- Get rid of imalloc and use more common code where possible
- Simplify the current mess so that PIO space is allocated and
mapped in a single place for PCI bridges
- Handle allocation constraints of PIO for all bridges including
hot plugged ones within the 2GB space reserved for IO ports,
so that devices on hotplugged busses will now work with drivers
that assume IO ports fit in an int.
- Cleanup and separate tracking of the ISA space in the reserved
low 64K of IO space. No ISA -> Nothing mapped there.
I booted a cell blade with IDE on PIO and MMIO and a dual G5 so
far, that's it :-)
With this patch, all allocations are done using the code in
mm/vmalloc.c, though we use the low level __get_vm_area with
explicit start/stop constraints in order to manage separate
areas for vmalloc/vmap, ioremap, and PCI IOs.
This greatly simplifies a lot of things, as you can see in the
diffstat of that patch :-)
A new pair of functions pcibios_map/unmap_io_space() now replace
all of the previous code that used to manipulate PCI IOs space.
The allocation is done at mapping time, which is now called from
scan_phb's, just before the devices are probed (instead of after,
which is by itself a bug fix). The only other caller is the PCI
hotplug code for hot adding PCI-PCI bridges (slots).
imalloc is gone, as is the "sub-allocation" thing, but I do beleive
that hotplug should still work in the sense that the space allocation
is always done by the PHB, but if you unmap a child bus of this PHB
(which seems to be possible), then the code should properly tear
down all the HPTE mappings for that area of the PHB allocated IO space.
I now always reserve the first 64K of IO space for the bridge with
the ISA bus on it. I have moved the code for tracking ISA in a separate
file which should also make it smarter if we ever are capable of
hot unplugging or re-plugging an ISA bridge.
This should have a side effect on platforms like powermac where VGA IOs
will no longer work. This is done on purpose though as they would have
worked semi-randomly before. The idea at this point is to isolate drivers
that might need to access those and fix them by providing a proper
function to obtain an offset to the legacy IOs of a given bus.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-06-04 13:15:36 +08:00
|
|
|
|
2009-02-23 00:19:14 +08:00
|
|
|
area = __get_vm_area_caller(size, VM_IOREMAP,
|
|
|
|
ioremap_bot, IOREMAP_END,
|
|
|
|
caller);
|
2005-09-26 14:04:21 +08:00
|
|
|
if (area == NULL)
|
|
|
|
return NULL;
|
2010-11-29 02:26:36 +08:00
|
|
|
|
|
|
|
area->phys_addr = paligned;
|
[POWERPC] Rewrite IO allocation & mapping on powerpc64
This rewrites pretty much from scratch the handling of MMIO and PIO
space allocations on powerpc64. The main goals are:
- Get rid of imalloc and use more common code where possible
- Simplify the current mess so that PIO space is allocated and
mapped in a single place for PCI bridges
- Handle allocation constraints of PIO for all bridges including
hot plugged ones within the 2GB space reserved for IO ports,
so that devices on hotplugged busses will now work with drivers
that assume IO ports fit in an int.
- Cleanup and separate tracking of the ISA space in the reserved
low 64K of IO space. No ISA -> Nothing mapped there.
I booted a cell blade with IDE on PIO and MMIO and a dual G5 so
far, that's it :-)
With this patch, all allocations are done using the code in
mm/vmalloc.c, though we use the low level __get_vm_area with
explicit start/stop constraints in order to manage separate
areas for vmalloc/vmap, ioremap, and PCI IOs.
This greatly simplifies a lot of things, as you can see in the
diffstat of that patch :-)
A new pair of functions pcibios_map/unmap_io_space() now replace
all of the previous code that used to manipulate PCI IOs space.
The allocation is done at mapping time, which is now called from
scan_phb's, just before the devices are probed (instead of after,
which is by itself a bug fix). The only other caller is the PCI
hotplug code for hot adding PCI-PCI bridges (slots).
imalloc is gone, as is the "sub-allocation" thing, but I do beleive
that hotplug should still work in the sense that the space allocation
is always done by the PHB, but if you unmap a child bus of this PHB
(which seems to be possible), then the code should properly tear
down all the HPTE mappings for that area of the PHB allocated IO space.
I now always reserve the first 64K of IO space for the bridge with
the ISA bus on it. I have moved the code for tracking ISA in a separate
file which should also make it smarter if we ever are capable of
hot unplugging or re-plugging an ISA bridge.
This should have a side effect on platforms like powermac where VGA IOs
will no longer work. This is done on purpose though as they would have
worked semi-randomly before. The idea at this point is to isolate drivers
that might need to access those and fix them by providing a proper
function to obtain an offset to the legacy IOs of a given bus.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-06-04 13:15:36 +08:00
|
|
|
ret = __ioremap_at(paligned, area->addr, size, flags);
|
2005-09-26 14:04:21 +08:00
|
|
|
if (!ret)
|
[POWERPC] Rewrite IO allocation & mapping on powerpc64
This rewrites pretty much from scratch the handling of MMIO and PIO
space allocations on powerpc64. The main goals are:
- Get rid of imalloc and use more common code where possible
- Simplify the current mess so that PIO space is allocated and
mapped in a single place for PCI bridges
- Handle allocation constraints of PIO for all bridges including
hot plugged ones within the 2GB space reserved for IO ports,
so that devices on hotplugged busses will now work with drivers
that assume IO ports fit in an int.
- Cleanup and separate tracking of the ISA space in the reserved
low 64K of IO space. No ISA -> Nothing mapped there.
I booted a cell blade with IDE on PIO and MMIO and a dual G5 so
far, that's it :-)
With this patch, all allocations are done using the code in
mm/vmalloc.c, though we use the low level __get_vm_area with
explicit start/stop constraints in order to manage separate
areas for vmalloc/vmap, ioremap, and PCI IOs.
This greatly simplifies a lot of things, as you can see in the
diffstat of that patch :-)
A new pair of functions pcibios_map/unmap_io_space() now replace
all of the previous code that used to manipulate PCI IOs space.
The allocation is done at mapping time, which is now called from
scan_phb's, just before the devices are probed (instead of after,
which is by itself a bug fix). The only other caller is the PCI
hotplug code for hot adding PCI-PCI bridges (slots).
imalloc is gone, as is the "sub-allocation" thing, but I do beleive
that hotplug should still work in the sense that the space allocation
is always done by the PHB, but if you unmap a child bus of this PHB
(which seems to be possible), then the code should properly tear
down all the HPTE mappings for that area of the PHB allocated IO space.
I now always reserve the first 64K of IO space for the bridge with
the ISA bus on it. I have moved the code for tracking ISA in a separate
file which should also make it smarter if we ever are capable of
hot unplugging or re-plugging an ISA bridge.
This should have a side effect on platforms like powermac where VGA IOs
will no longer work. This is done on purpose though as they would have
worked semi-randomly before. The idea at this point is to isolate drivers
that might need to access those and fix them by providing a proper
function to obtain an offset to the legacy IOs of a given bus.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-06-04 13:15:36 +08:00
|
|
|
vunmap(area->addr);
|
2005-09-26 14:04:21 +08:00
|
|
|
} else {
|
[POWERPC] Rewrite IO allocation & mapping on powerpc64
This rewrites pretty much from scratch the handling of MMIO and PIO
space allocations on powerpc64. The main goals are:
- Get rid of imalloc and use more common code where possible
- Simplify the current mess so that PIO space is allocated and
mapped in a single place for PCI bridges
- Handle allocation constraints of PIO for all bridges including
hot plugged ones within the 2GB space reserved for IO ports,
so that devices on hotplugged busses will now work with drivers
that assume IO ports fit in an int.
- Cleanup and separate tracking of the ISA space in the reserved
low 64K of IO space. No ISA -> Nothing mapped there.
I booted a cell blade with IDE on PIO and MMIO and a dual G5 so
far, that's it :-)
With this patch, all allocations are done using the code in
mm/vmalloc.c, though we use the low level __get_vm_area with
explicit start/stop constraints in order to manage separate
areas for vmalloc/vmap, ioremap, and PCI IOs.
This greatly simplifies a lot of things, as you can see in the
diffstat of that patch :-)
A new pair of functions pcibios_map/unmap_io_space() now replace
all of the previous code that used to manipulate PCI IOs space.
The allocation is done at mapping time, which is now called from
scan_phb's, just before the devices are probed (instead of after,
which is by itself a bug fix). The only other caller is the PCI
hotplug code for hot adding PCI-PCI bridges (slots).
imalloc is gone, as is the "sub-allocation" thing, but I do beleive
that hotplug should still work in the sense that the space allocation
is always done by the PHB, but if you unmap a child bus of this PHB
(which seems to be possible), then the code should properly tear
down all the HPTE mappings for that area of the PHB allocated IO space.
I now always reserve the first 64K of IO space for the bridge with
the ISA bus on it. I have moved the code for tracking ISA in a separate
file which should also make it smarter if we ever are capable of
hot unplugging or re-plugging an ISA bridge.
This should have a side effect on platforms like powermac where VGA IOs
will no longer work. This is done on purpose though as they would have
worked semi-randomly before. The idea at this point is to isolate drivers
that might need to access those and fix them by providing a proper
function to obtain an offset to the legacy IOs of a given bus.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-06-04 13:15:36 +08:00
|
|
|
ret = __ioremap_at(paligned, (void *)ioremap_bot, size, flags);
|
2005-09-26 14:04:21 +08:00
|
|
|
if (ret)
|
|
|
|
ioremap_bot += size;
|
|
|
|
}
|
[POWERPC] Rewrite IO allocation & mapping on powerpc64
This rewrites pretty much from scratch the handling of MMIO and PIO
space allocations on powerpc64. The main goals are:
- Get rid of imalloc and use more common code where possible
- Simplify the current mess so that PIO space is allocated and
mapped in a single place for PCI bridges
- Handle allocation constraints of PIO for all bridges including
hot plugged ones within the 2GB space reserved for IO ports,
so that devices on hotplugged busses will now work with drivers
that assume IO ports fit in an int.
- Cleanup and separate tracking of the ISA space in the reserved
low 64K of IO space. No ISA -> Nothing mapped there.
I booted a cell blade with IDE on PIO and MMIO and a dual G5 so
far, that's it :-)
With this patch, all allocations are done using the code in
mm/vmalloc.c, though we use the low level __get_vm_area with
explicit start/stop constraints in order to manage separate
areas for vmalloc/vmap, ioremap, and PCI IOs.
This greatly simplifies a lot of things, as you can see in the
diffstat of that patch :-)
A new pair of functions pcibios_map/unmap_io_space() now replace
all of the previous code that used to manipulate PCI IOs space.
The allocation is done at mapping time, which is now called from
scan_phb's, just before the devices are probed (instead of after,
which is by itself a bug fix). The only other caller is the PCI
hotplug code for hot adding PCI-PCI bridges (slots).
imalloc is gone, as is the "sub-allocation" thing, but I do beleive
that hotplug should still work in the sense that the space allocation
is always done by the PHB, but if you unmap a child bus of this PHB
(which seems to be possible), then the code should properly tear
down all the HPTE mappings for that area of the PHB allocated IO space.
I now always reserve the first 64K of IO space for the bridge with
the ISA bus on it. I have moved the code for tracking ISA in a separate
file which should also make it smarter if we ever are capable of
hot unplugging or re-plugging an ISA bridge.
This should have a side effect on platforms like powermac where VGA IOs
will no longer work. This is done on purpose though as they would have
worked semi-randomly before. The idea at this point is to isolate drivers
that might need to access those and fix them by providing a proper
function to obtain an offset to the legacy IOs of a given bus.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-06-04 13:15:36 +08:00
|
|
|
|
|
|
|
if (ret)
|
|
|
|
ret += addr & ~PAGE_MASK;
|
2005-09-26 14:04:21 +08:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2009-02-23 00:19:14 +08:00
|
|
|
void __iomem * __ioremap(phys_addr_t addr, unsigned long size,
|
|
|
|
unsigned long flags)
|
|
|
|
{
|
|
|
|
return __ioremap_caller(addr, size, flags, __builtin_return_address(0));
|
|
|
|
}
|
[POWERPC] Allow hooking of PCI MMIO & PIO accessors on 64 bits
This patch reworks the way iSeries hooks on PCI IO operations (both MMIO
and PIO) and provides a generic way for other platforms to do so (we
have need to do that for various other platforms).
While reworking the IO ops, I ended up doing some spring cleaning in
io.h and eeh.h which I might want to split into 2 or 3 patches (among
others, eeh.h had a lot of useless stuff in it).
A side effect is that EEH for PIO should work now (it used to pass IO
ports down to the eeh address check functions which is bogus).
Also, new are MMIO "repeat" ops, which other archs like ARM already had,
and that we have too now: readsb, readsw, readsl, writesb, writesw,
writesl.
In the long run, I might also make EEH use the hooks instead
of wrapping at the toplevel, which would make things even cleaner and
relegate EEH completely in platforms/iseries, but we have to measure the
performance impact there (though it's really only on MMIO reads)
Since I also need to hook on ioremap, I shuffled the functions a bit
there. I introduced ioremap_flags() to use by drivers who want to pass
explicit flags to ioremap (and it can be hooked). The old __ioremap() is
still there as a low level and cannot be hooked, thus drivers who use it
should migrate unless they know they want the low level version.
The patch "arch provides generic iomap missing accessors" (should be
number 4 in this series) is a pre-requisite to provide full iomap
API support with this patch.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-11-11 14:25:10 +08:00
|
|
|
|
2006-11-13 06:27:39 +08:00
|
|
|
void __iomem * ioremap(phys_addr_t addr, unsigned long size)
|
[POWERPC] Allow hooking of PCI MMIO & PIO accessors on 64 bits
This patch reworks the way iSeries hooks on PCI IO operations (both MMIO
and PIO) and provides a generic way for other platforms to do so (we
have need to do that for various other platforms).
While reworking the IO ops, I ended up doing some spring cleaning in
io.h and eeh.h which I might want to split into 2 or 3 patches (among
others, eeh.h had a lot of useless stuff in it).
A side effect is that EEH for PIO should work now (it used to pass IO
ports down to the eeh address check functions which is bogus).
Also, new are MMIO "repeat" ops, which other archs like ARM already had,
and that we have too now: readsb, readsw, readsl, writesb, writesw,
writesl.
In the long run, I might also make EEH use the hooks instead
of wrapping at the toplevel, which would make things even cleaner and
relegate EEH completely in platforms/iseries, but we have to measure the
performance impact there (though it's really only on MMIO reads)
Since I also need to hook on ioremap, I shuffled the functions a bit
there. I introduced ioremap_flags() to use by drivers who want to pass
explicit flags to ioremap (and it can be hooked). The old __ioremap() is
still there as a low level and cannot be hooked, thus drivers who use it
should migrate unless they know they want the low level version.
The patch "arch provides generic iomap missing accessors" (should be
number 4 in this series) is a pre-requisite to provide full iomap
API support with this patch.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-11-11 14:25:10 +08:00
|
|
|
{
|
|
|
|
unsigned long flags = _PAGE_NO_CACHE | _PAGE_GUARDED;
|
2009-02-23 00:19:14 +08:00
|
|
|
void *caller = __builtin_return_address(0);
|
[POWERPC] Allow hooking of PCI MMIO & PIO accessors on 64 bits
This patch reworks the way iSeries hooks on PCI IO operations (both MMIO
and PIO) and provides a generic way for other platforms to do so (we
have need to do that for various other platforms).
While reworking the IO ops, I ended up doing some spring cleaning in
io.h and eeh.h which I might want to split into 2 or 3 patches (among
others, eeh.h had a lot of useless stuff in it).
A side effect is that EEH for PIO should work now (it used to pass IO
ports down to the eeh address check functions which is bogus).
Also, new are MMIO "repeat" ops, which other archs like ARM already had,
and that we have too now: readsb, readsw, readsl, writesb, writesw,
writesl.
In the long run, I might also make EEH use the hooks instead
of wrapping at the toplevel, which would make things even cleaner and
relegate EEH completely in platforms/iseries, but we have to measure the
performance impact there (though it's really only on MMIO reads)
Since I also need to hook on ioremap, I shuffled the functions a bit
there. I introduced ioremap_flags() to use by drivers who want to pass
explicit flags to ioremap (and it can be hooked). The old __ioremap() is
still there as a low level and cannot be hooked, thus drivers who use it
should migrate unless they know they want the low level version.
The patch "arch provides generic iomap missing accessors" (should be
number 4 in this series) is a pre-requisite to provide full iomap
API support with this patch.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-11-11 14:25:10 +08:00
|
|
|
|
|
|
|
if (ppc_md.ioremap)
|
2009-02-23 00:19:14 +08:00
|
|
|
return ppc_md.ioremap(addr, size, flags, caller);
|
|
|
|
return __ioremap_caller(addr, size, flags, caller);
|
[POWERPC] Allow hooking of PCI MMIO & PIO accessors on 64 bits
This patch reworks the way iSeries hooks on PCI IO operations (both MMIO
and PIO) and provides a generic way for other platforms to do so (we
have need to do that for various other platforms).
While reworking the IO ops, I ended up doing some spring cleaning in
io.h and eeh.h which I might want to split into 2 or 3 patches (among
others, eeh.h had a lot of useless stuff in it).
A side effect is that EEH for PIO should work now (it used to pass IO
ports down to the eeh address check functions which is bogus).
Also, new are MMIO "repeat" ops, which other archs like ARM already had,
and that we have too now: readsb, readsw, readsl, writesb, writesw,
writesl.
In the long run, I might also make EEH use the hooks instead
of wrapping at the toplevel, which would make things even cleaner and
relegate EEH completely in platforms/iseries, but we have to measure the
performance impact there (though it's really only on MMIO reads)
Since I also need to hook on ioremap, I shuffled the functions a bit
there. I introduced ioremap_flags() to use by drivers who want to pass
explicit flags to ioremap (and it can be hooked). The old __ioremap() is
still there as a low level and cannot be hooked, thus drivers who use it
should migrate unless they know they want the low level version.
The patch "arch provides generic iomap missing accessors" (should be
number 4 in this series) is a pre-requisite to provide full iomap
API support with this patch.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-11-11 14:25:10 +08:00
|
|
|
}
|
|
|
|
|
2011-05-09 05:41:59 +08:00
|
|
|
void __iomem * ioremap_wc(phys_addr_t addr, unsigned long size)
|
|
|
|
{
|
|
|
|
unsigned long flags = _PAGE_NO_CACHE;
|
|
|
|
void *caller = __builtin_return_address(0);
|
|
|
|
|
|
|
|
if (ppc_md.ioremap)
|
|
|
|
return ppc_md.ioremap(addr, size, flags, caller);
|
|
|
|
return __ioremap_caller(addr, size, flags, caller);
|
|
|
|
}
|
|
|
|
|
2011-05-09 05:43:47 +08:00
|
|
|
void __iomem * ioremap_prot(phys_addr_t addr, unsigned long size,
|
[POWERPC] Allow hooking of PCI MMIO & PIO accessors on 64 bits
This patch reworks the way iSeries hooks on PCI IO operations (both MMIO
and PIO) and provides a generic way for other platforms to do so (we
have need to do that for various other platforms).
While reworking the IO ops, I ended up doing some spring cleaning in
io.h and eeh.h which I might want to split into 2 or 3 patches (among
others, eeh.h had a lot of useless stuff in it).
A side effect is that EEH for PIO should work now (it used to pass IO
ports down to the eeh address check functions which is bogus).
Also, new are MMIO "repeat" ops, which other archs like ARM already had,
and that we have too now: readsb, readsw, readsl, writesb, writesw,
writesl.
In the long run, I might also make EEH use the hooks instead
of wrapping at the toplevel, which would make things even cleaner and
relegate EEH completely in platforms/iseries, but we have to measure the
performance impact there (though it's really only on MMIO reads)
Since I also need to hook on ioremap, I shuffled the functions a bit
there. I introduced ioremap_flags() to use by drivers who want to pass
explicit flags to ioremap (and it can be hooked). The old __ioremap() is
still there as a low level and cannot be hooked, thus drivers who use it
should migrate unless they know they want the low level version.
The patch "arch provides generic iomap missing accessors" (should be
number 4 in this series) is a pre-requisite to provide full iomap
API support with this patch.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-11-11 14:25:10 +08:00
|
|
|
unsigned long flags)
|
|
|
|
{
|
2009-02-23 00:19:14 +08:00
|
|
|
void *caller = __builtin_return_address(0);
|
|
|
|
|
2008-07-24 12:27:08 +08:00
|
|
|
/* writeable implies dirty for kernel addresses */
|
|
|
|
if (flags & _PAGE_RW)
|
|
|
|
flags |= _PAGE_DIRTY;
|
|
|
|
|
|
|
|
/* we don't want to let _PAGE_USER and _PAGE_EXEC leak out */
|
|
|
|
flags &= ~(_PAGE_USER | _PAGE_EXEC);
|
|
|
|
|
2010-04-07 12:39:36 +08:00
|
|
|
#ifdef _PAGE_BAP_SR
|
|
|
|
/* _PAGE_USER contains _PAGE_BAP_SR on BookE using the new PTE format
|
|
|
|
* which means that we just cleared supervisor access... oops ;-) This
|
|
|
|
* restores it
|
|
|
|
*/
|
|
|
|
flags |= _PAGE_BAP_SR;
|
|
|
|
#endif
|
|
|
|
|
[POWERPC] Allow hooking of PCI MMIO & PIO accessors on 64 bits
This patch reworks the way iSeries hooks on PCI IO operations (both MMIO
and PIO) and provides a generic way for other platforms to do so (we
have need to do that for various other platforms).
While reworking the IO ops, I ended up doing some spring cleaning in
io.h and eeh.h which I might want to split into 2 or 3 patches (among
others, eeh.h had a lot of useless stuff in it).
A side effect is that EEH for PIO should work now (it used to pass IO
ports down to the eeh address check functions which is bogus).
Also, new are MMIO "repeat" ops, which other archs like ARM already had,
and that we have too now: readsb, readsw, readsl, writesb, writesw,
writesl.
In the long run, I might also make EEH use the hooks instead
of wrapping at the toplevel, which would make things even cleaner and
relegate EEH completely in platforms/iseries, but we have to measure the
performance impact there (though it's really only on MMIO reads)
Since I also need to hook on ioremap, I shuffled the functions a bit
there. I introduced ioremap_flags() to use by drivers who want to pass
explicit flags to ioremap (and it can be hooked). The old __ioremap() is
still there as a low level and cannot be hooked, thus drivers who use it
should migrate unless they know they want the low level version.
The patch "arch provides generic iomap missing accessors" (should be
number 4 in this series) is a pre-requisite to provide full iomap
API support with this patch.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-11-11 14:25:10 +08:00
|
|
|
if (ppc_md.ioremap)
|
2009-02-23 00:19:14 +08:00
|
|
|
return ppc_md.ioremap(addr, size, flags, caller);
|
|
|
|
return __ioremap_caller(addr, size, flags, caller);
|
[POWERPC] Allow hooking of PCI MMIO & PIO accessors on 64 bits
This patch reworks the way iSeries hooks on PCI IO operations (both MMIO
and PIO) and provides a generic way for other platforms to do so (we
have need to do that for various other platforms).
While reworking the IO ops, I ended up doing some spring cleaning in
io.h and eeh.h which I might want to split into 2 or 3 patches (among
others, eeh.h had a lot of useless stuff in it).
A side effect is that EEH for PIO should work now (it used to pass IO
ports down to the eeh address check functions which is bogus).
Also, new are MMIO "repeat" ops, which other archs like ARM already had,
and that we have too now: readsb, readsw, readsl, writesb, writesw,
writesl.
In the long run, I might also make EEH use the hooks instead
of wrapping at the toplevel, which would make things even cleaner and
relegate EEH completely in platforms/iseries, but we have to measure the
performance impact there (though it's really only on MMIO reads)
Since I also need to hook on ioremap, I shuffled the functions a bit
there. I introduced ioremap_flags() to use by drivers who want to pass
explicit flags to ioremap (and it can be hooked). The old __ioremap() is
still there as a low level and cannot be hooked, thus drivers who use it
should migrate unless they know they want the low level version.
The patch "arch provides generic iomap missing accessors" (should be
number 4 in this series) is a pre-requisite to provide full iomap
API support with this patch.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-11-11 14:25:10 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
|
2005-09-26 14:04:21 +08:00
|
|
|
/*
|
|
|
|
* Unmap an IO region and remove it from imalloc'd list.
|
|
|
|
* Access to IO memory should be serialized by driver.
|
|
|
|
*/
|
2006-11-13 06:27:39 +08:00
|
|
|
void __iounmap(volatile void __iomem *token)
|
2005-09-26 14:04:21 +08:00
|
|
|
{
|
|
|
|
void *addr;
|
|
|
|
|
|
|
|
if (!mem_init_done)
|
|
|
|
return;
|
|
|
|
|
[POWERPC] Rewrite IO allocation & mapping on powerpc64
This rewrites pretty much from scratch the handling of MMIO and PIO
space allocations on powerpc64. The main goals are:
- Get rid of imalloc and use more common code where possible
- Simplify the current mess so that PIO space is allocated and
mapped in a single place for PCI bridges
- Handle allocation constraints of PIO for all bridges including
hot plugged ones within the 2GB space reserved for IO ports,
so that devices on hotplugged busses will now work with drivers
that assume IO ports fit in an int.
- Cleanup and separate tracking of the ISA space in the reserved
low 64K of IO space. No ISA -> Nothing mapped there.
I booted a cell blade with IDE on PIO and MMIO and a dual G5 so
far, that's it :-)
With this patch, all allocations are done using the code in
mm/vmalloc.c, though we use the low level __get_vm_area with
explicit start/stop constraints in order to manage separate
areas for vmalloc/vmap, ioremap, and PCI IOs.
This greatly simplifies a lot of things, as you can see in the
diffstat of that patch :-)
A new pair of functions pcibios_map/unmap_io_space() now replace
all of the previous code that used to manipulate PCI IOs space.
The allocation is done at mapping time, which is now called from
scan_phb's, just before the devices are probed (instead of after,
which is by itself a bug fix). The only other caller is the PCI
hotplug code for hot adding PCI-PCI bridges (slots).
imalloc is gone, as is the "sub-allocation" thing, but I do beleive
that hotplug should still work in the sense that the space allocation
is always done by the PHB, but if you unmap a child bus of this PHB
(which seems to be possible), then the code should properly tear
down all the HPTE mappings for that area of the PHB allocated IO space.
I now always reserve the first 64K of IO space for the bridge with
the ISA bus on it. I have moved the code for tracking ISA in a separate
file which should also make it smarter if we ever are capable of
hot unplugging or re-plugging an ISA bridge.
This should have a side effect on platforms like powermac where VGA IOs
will no longer work. This is done on purpose though as they would have
worked semi-randomly before. The idea at this point is to isolate drivers
that might need to access those and fix them by providing a proper
function to obtain an offset to the legacy IOs of a given bus.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-06-04 13:15:36 +08:00
|
|
|
addr = (void *) ((unsigned long __force)
|
|
|
|
PCI_FIX_ADDR(token) & PAGE_MASK);
|
|
|
|
if ((unsigned long)addr < ioremap_bot) {
|
|
|
|
printk(KERN_WARNING "Attempt to iounmap early bolted mapping"
|
|
|
|
" at 0x%p\n", addr);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
vunmap(addr);
|
2005-09-26 14:04:21 +08:00
|
|
|
}
|
|
|
|
|
2006-11-13 06:27:39 +08:00
|
|
|
void iounmap(volatile void __iomem *token)
|
[POWERPC] Allow hooking of PCI MMIO & PIO accessors on 64 bits
This patch reworks the way iSeries hooks on PCI IO operations (both MMIO
and PIO) and provides a generic way for other platforms to do so (we
have need to do that for various other platforms).
While reworking the IO ops, I ended up doing some spring cleaning in
io.h and eeh.h which I might want to split into 2 or 3 patches (among
others, eeh.h had a lot of useless stuff in it).
A side effect is that EEH for PIO should work now (it used to pass IO
ports down to the eeh address check functions which is bogus).
Also, new are MMIO "repeat" ops, which other archs like ARM already had,
and that we have too now: readsb, readsw, readsl, writesb, writesw,
writesl.
In the long run, I might also make EEH use the hooks instead
of wrapping at the toplevel, which would make things even cleaner and
relegate EEH completely in platforms/iseries, but we have to measure the
performance impact there (though it's really only on MMIO reads)
Since I also need to hook on ioremap, I shuffled the functions a bit
there. I introduced ioremap_flags() to use by drivers who want to pass
explicit flags to ioremap (and it can be hooked). The old __ioremap() is
still there as a low level and cannot be hooked, thus drivers who use it
should migrate unless they know they want the low level version.
The patch "arch provides generic iomap missing accessors" (should be
number 4 in this series) is a pre-requisite to provide full iomap
API support with this patch.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-11-11 14:25:10 +08:00
|
|
|
{
|
|
|
|
if (ppc_md.iounmap)
|
|
|
|
ppc_md.iounmap(token);
|
|
|
|
else
|
|
|
|
__iounmap(token);
|
|
|
|
}
|
|
|
|
|
2005-09-26 14:04:21 +08:00
|
|
|
EXPORT_SYMBOL(ioremap);
|
2011-05-09 05:41:59 +08:00
|
|
|
EXPORT_SYMBOL(ioremap_wc);
|
2011-05-09 05:43:47 +08:00
|
|
|
EXPORT_SYMBOL(ioremap_prot);
|
2005-09-26 14:04:21 +08:00
|
|
|
EXPORT_SYMBOL(__ioremap);
|
2007-08-31 11:58:51 +08:00
|
|
|
EXPORT_SYMBOL(__ioremap_at);
|
2005-09-26 14:04:21 +08:00
|
|
|
EXPORT_SYMBOL(iounmap);
|
[POWERPC] Allow hooking of PCI MMIO & PIO accessors on 64 bits
This patch reworks the way iSeries hooks on PCI IO operations (both MMIO
and PIO) and provides a generic way for other platforms to do so (we
have need to do that for various other platforms).
While reworking the IO ops, I ended up doing some spring cleaning in
io.h and eeh.h which I might want to split into 2 or 3 patches (among
others, eeh.h had a lot of useless stuff in it).
A side effect is that EEH for PIO should work now (it used to pass IO
ports down to the eeh address check functions which is bogus).
Also, new are MMIO "repeat" ops, which other archs like ARM already had,
and that we have too now: readsb, readsw, readsl, writesb, writesw,
writesl.
In the long run, I might also make EEH use the hooks instead
of wrapping at the toplevel, which would make things even cleaner and
relegate EEH completely in platforms/iseries, but we have to measure the
performance impact there (though it's really only on MMIO reads)
Since I also need to hook on ioremap, I shuffled the functions a bit
there. I introduced ioremap_flags() to use by drivers who want to pass
explicit flags to ioremap (and it can be hooked). The old __ioremap() is
still there as a low level and cannot be hooked, thus drivers who use it
should migrate unless they know they want the low level version.
The patch "arch provides generic iomap missing accessors" (should be
number 4 in this series) is a pre-requisite to provide full iomap
API support with this patch.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-11-11 14:25:10 +08:00
|
|
|
EXPORT_SYMBOL(__iounmap);
|
2007-08-31 11:58:51 +08:00
|
|
|
EXPORT_SYMBOL(__iounmap_at);
|
2013-04-28 17:37:33 +08:00
|
|
|
|
2013-06-20 17:00:15 +08:00
|
|
|
/*
|
|
|
|
* For hugepage we have pfn in the pmd, we use PTE_RPN_SHIFT bits for flags
|
|
|
|
* For PTE page, we have a PTE_FRAG_SIZE (4K) aligned virtual address.
|
|
|
|
*/
|
|
|
|
struct page *pmd_page(pmd_t pmd)
|
|
|
|
{
|
|
|
|
#ifdef CONFIG_TRANSPARENT_HUGEPAGE
|
|
|
|
if (pmd_trans_huge(pmd))
|
|
|
|
return pfn_to_page(pmd_pfn(pmd));
|
|
|
|
#endif
|
|
|
|
return virt_to_page(pmd_page_vaddr(pmd));
|
|
|
|
}
|
|
|
|
|
2013-04-28 17:37:33 +08:00
|
|
|
#ifdef CONFIG_PPC_64K_PAGES
|
|
|
|
static pte_t *get_from_cache(struct mm_struct *mm)
|
|
|
|
{
|
|
|
|
void *pte_frag, *ret;
|
|
|
|
|
|
|
|
spin_lock(&mm->page_table_lock);
|
|
|
|
ret = mm->context.pte_frag;
|
|
|
|
if (ret) {
|
|
|
|
pte_frag = ret + PTE_FRAG_SIZE;
|
|
|
|
/*
|
|
|
|
* If we have taken up all the fragments mark PTE page NULL
|
|
|
|
*/
|
|
|
|
if (((unsigned long)pte_frag & ~PAGE_MASK) == 0)
|
|
|
|
pte_frag = NULL;
|
|
|
|
mm->context.pte_frag = pte_frag;
|
|
|
|
}
|
|
|
|
spin_unlock(&mm->page_table_lock);
|
|
|
|
return (pte_t *)ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static pte_t *__alloc_for_cache(struct mm_struct *mm, int kernel)
|
|
|
|
{
|
|
|
|
void *ret = NULL;
|
|
|
|
struct page *page = alloc_page(GFP_KERNEL | __GFP_NOTRACK |
|
|
|
|
__GFP_REPEAT | __GFP_ZERO);
|
|
|
|
if (!page)
|
|
|
|
return NULL;
|
2013-11-15 06:31:38 +08:00
|
|
|
if (!kernel && !pgtable_page_ctor(page)) {
|
|
|
|
__free_page(page);
|
|
|
|
return NULL;
|
|
|
|
}
|
2013-04-28 17:37:33 +08:00
|
|
|
|
|
|
|
ret = page_address(page);
|
|
|
|
spin_lock(&mm->page_table_lock);
|
|
|
|
/*
|
|
|
|
* If we find pgtable_page set, we return
|
|
|
|
* the allocated page with single fragement
|
|
|
|
* count.
|
|
|
|
*/
|
|
|
|
if (likely(!mm->context.pte_frag)) {
|
|
|
|
atomic_set(&page->_count, PTE_FRAG_NR);
|
|
|
|
mm->context.pte_frag = ret + PTE_FRAG_SIZE;
|
|
|
|
}
|
|
|
|
spin_unlock(&mm->page_table_lock);
|
|
|
|
|
|
|
|
return (pte_t *)ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
pte_t *page_table_alloc(struct mm_struct *mm, unsigned long vmaddr, int kernel)
|
|
|
|
{
|
|
|
|
pte_t *pte;
|
|
|
|
|
|
|
|
pte = get_from_cache(mm);
|
|
|
|
if (pte)
|
|
|
|
return pte;
|
|
|
|
|
|
|
|
return __alloc_for_cache(mm, kernel);
|
|
|
|
}
|
|
|
|
|
|
|
|
void page_table_free(struct mm_struct *mm, unsigned long *table, int kernel)
|
|
|
|
{
|
|
|
|
struct page *page = virt_to_page(table);
|
|
|
|
if (put_page_testzero(page)) {
|
|
|
|
if (!kernel)
|
|
|
|
pgtable_page_dtor(page);
|
|
|
|
free_hot_cold_page(page, 0);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef CONFIG_SMP
|
|
|
|
static void page_table_free_rcu(void *table)
|
|
|
|
{
|
|
|
|
struct page *page = virt_to_page(table);
|
|
|
|
if (put_page_testzero(page)) {
|
|
|
|
pgtable_page_dtor(page);
|
|
|
|
free_hot_cold_page(page, 0);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
void pgtable_free_tlb(struct mmu_gather *tlb, void *table, int shift)
|
|
|
|
{
|
|
|
|
unsigned long pgf = (unsigned long)table;
|
|
|
|
|
|
|
|
BUG_ON(shift > MAX_PGTABLE_INDEX_SIZE);
|
|
|
|
pgf |= shift;
|
|
|
|
tlb_remove_table(tlb, (void *)pgf);
|
|
|
|
}
|
|
|
|
|
|
|
|
void __tlb_remove_table(void *_table)
|
|
|
|
{
|
|
|
|
void *table = (void *)((unsigned long)_table & ~MAX_PGTABLE_INDEX_SIZE);
|
|
|
|
unsigned shift = (unsigned long)_table & MAX_PGTABLE_INDEX_SIZE;
|
|
|
|
|
|
|
|
if (!shift)
|
|
|
|
/* PTE page needs special handling */
|
|
|
|
page_table_free_rcu(table);
|
|
|
|
else {
|
|
|
|
BUG_ON(shift > MAX_PGTABLE_INDEX_SIZE);
|
|
|
|
kmem_cache_free(PGT_CACHE(shift), table);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
#else
|
|
|
|
void pgtable_free_tlb(struct mmu_gather *tlb, void *table, int shift)
|
|
|
|
{
|
|
|
|
if (!shift) {
|
|
|
|
/* PTE page needs special handling */
|
|
|
|
struct page *page = virt_to_page(table);
|
|
|
|
if (put_page_testzero(page)) {
|
|
|
|
pgtable_page_dtor(page);
|
|
|
|
free_hot_cold_page(page, 0);
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
BUG_ON(shift > MAX_PGTABLE_INDEX_SIZE);
|
|
|
|
kmem_cache_free(PGT_CACHE(shift), table);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
#endif /* CONFIG_PPC_64K_PAGES */
|
2013-06-20 17:00:15 +08:00
|
|
|
|
|
|
|
#ifdef CONFIG_TRANSPARENT_HUGEPAGE
|
|
|
|
|
|
|
|
/*
|
|
|
|
* This is called when relaxing access to a hugepage. It's also called in the page
|
|
|
|
* fault path when we don't hit any of the major fault cases, ie, a minor
|
|
|
|
* update of _PAGE_ACCESSED, _PAGE_DIRTY, etc... The generic code will have
|
|
|
|
* handled those two for us, we additionally deal with missing execute
|
|
|
|
* permission here on some processors
|
|
|
|
*/
|
|
|
|
int pmdp_set_access_flags(struct vm_area_struct *vma, unsigned long address,
|
|
|
|
pmd_t *pmdp, pmd_t entry, int dirty)
|
|
|
|
{
|
|
|
|
int changed;
|
|
|
|
#ifdef CONFIG_DEBUG_VM
|
|
|
|
WARN_ON(!pmd_trans_huge(*pmdp));
|
|
|
|
assert_spin_locked(&vma->vm_mm->page_table_lock);
|
|
|
|
#endif
|
|
|
|
changed = !pmd_same(*(pmdp), entry);
|
|
|
|
if (changed) {
|
|
|
|
__ptep_set_access_flags(pmdp_ptep(pmdp), pmd_pte(entry));
|
|
|
|
/*
|
|
|
|
* Since we are not supporting SW TLB systems, we don't
|
|
|
|
* have any thing similar to flush_tlb_page_nohash()
|
|
|
|
*/
|
|
|
|
}
|
|
|
|
return changed;
|
|
|
|
}
|
|
|
|
|
|
|
|
unsigned long pmd_hugepage_update(struct mm_struct *mm, unsigned long addr,
|
2014-02-12 11:43:36 +08:00
|
|
|
pmd_t *pmdp, unsigned long clr,
|
|
|
|
unsigned long set)
|
2013-06-20 17:00:15 +08:00
|
|
|
{
|
|
|
|
|
|
|
|
unsigned long old, tmp;
|
|
|
|
|
|
|
|
#ifdef CONFIG_DEBUG_VM
|
|
|
|
WARN_ON(!pmd_trans_huge(*pmdp));
|
|
|
|
assert_spin_locked(&mm->page_table_lock);
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#ifdef PTE_ATOMIC_UPDATES
|
|
|
|
__asm__ __volatile__(
|
|
|
|
"1: ldarx %0,0,%3\n\
|
|
|
|
andi. %1,%0,%6\n\
|
|
|
|
bne- 1b \n\
|
|
|
|
andc %1,%0,%4 \n\
|
2014-02-12 11:43:36 +08:00
|
|
|
or %1,%1,%7\n\
|
2013-06-20 17:00:15 +08:00
|
|
|
stdcx. %1,0,%3 \n\
|
|
|
|
bne- 1b"
|
|
|
|
: "=&r" (old), "=&r" (tmp), "=m" (*pmdp)
|
2014-02-12 11:43:36 +08:00
|
|
|
: "r" (pmdp), "r" (clr), "m" (*pmdp), "i" (_PAGE_BUSY), "r" (set)
|
2013-06-20 17:00:15 +08:00
|
|
|
: "cc" );
|
|
|
|
#else
|
|
|
|
old = pmd_val(*pmdp);
|
2014-02-12 11:43:36 +08:00
|
|
|
*pmdp = __pmd((old & ~clr) | set);
|
2013-06-20 17:00:15 +08:00
|
|
|
#endif
|
2014-08-13 15:02:04 +08:00
|
|
|
trace_hugepage_update(addr, old, clr, set);
|
2013-06-20 17:00:15 +08:00
|
|
|
if (old & _PAGE_HASHPTE)
|
2014-08-13 15:02:00 +08:00
|
|
|
hpte_do_hugepage_flush(mm, addr, pmdp, old);
|
2013-06-20 17:00:15 +08:00
|
|
|
return old;
|
|
|
|
}
|
|
|
|
|
|
|
|
pmd_t pmdp_clear_flush(struct vm_area_struct *vma, unsigned long address,
|
|
|
|
pmd_t *pmdp)
|
|
|
|
{
|
|
|
|
pmd_t pmd;
|
|
|
|
|
|
|
|
VM_BUG_ON(address & ~HPAGE_PMD_MASK);
|
|
|
|
if (pmd_trans_huge(*pmdp)) {
|
|
|
|
pmd = pmdp_get_and_clear(vma->vm_mm, address, pmdp);
|
|
|
|
} else {
|
|
|
|
/*
|
|
|
|
* khugepaged calls this for normal pmd
|
|
|
|
*/
|
|
|
|
pmd = *pmdp;
|
|
|
|
pmd_clear(pmdp);
|
|
|
|
/*
|
|
|
|
* Wait for all pending hash_page to finish. This is needed
|
|
|
|
* in case of subpage collapse. When we collapse normal pages
|
|
|
|
* to hugepage, we first clear the pmd, then invalidate all
|
|
|
|
* the PTE entries. The assumption here is that any low level
|
|
|
|
* page fault will see a none pmd and take the slow path that
|
|
|
|
* will wait on mmap_sem. But we could very well be in a
|
|
|
|
* hash_page with local ptep pointer value. Such a hash page
|
|
|
|
* can result in adding new HPTE entries for normal subpages.
|
|
|
|
* That means we could be modifying the page content as we
|
|
|
|
* copy them to a huge page. So wait for parallel hash_page
|
|
|
|
* to finish before invalidating HPTE entries. We can do this
|
|
|
|
* by sending an IPI to all the cpus and executing a dummy
|
|
|
|
* function there.
|
|
|
|
*/
|
|
|
|
kick_all_cpus_sync();
|
|
|
|
/*
|
|
|
|
* Now invalidate the hpte entries in the range
|
|
|
|
* covered by pmd. This make sure we take a
|
|
|
|
* fault and will find the pmd as none, which will
|
|
|
|
* result in a major fault which takes mmap_sem and
|
|
|
|
* hence wait for collapse to complete. Without this
|
|
|
|
* the __collapse_huge_page_copy can result in copying
|
|
|
|
* the old content.
|
|
|
|
*/
|
|
|
|
flush_tlb_pmd_range(vma->vm_mm, &pmd, address);
|
|
|
|
}
|
|
|
|
return pmd;
|
|
|
|
}
|
|
|
|
|
|
|
|
int pmdp_test_and_clear_young(struct vm_area_struct *vma,
|
|
|
|
unsigned long address, pmd_t *pmdp)
|
|
|
|
{
|
|
|
|
return __pmdp_test_and_clear_young(vma->vm_mm, address, pmdp);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* We currently remove entries from the hashtable regardless of whether
|
|
|
|
* the entry was young or dirty. The generic routines only flush if the
|
|
|
|
* entry was young or dirty which is not good enough.
|
|
|
|
*
|
|
|
|
* We should be more intelligent about this but for the moment we override
|
|
|
|
* these functions and force a tlb flush unconditionally
|
|
|
|
*/
|
|
|
|
int pmdp_clear_flush_young(struct vm_area_struct *vma,
|
|
|
|
unsigned long address, pmd_t *pmdp)
|
|
|
|
{
|
|
|
|
return __pmdp_test_and_clear_young(vma->vm_mm, address, pmdp);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* We mark the pmd splitting and invalidate all the hpte
|
|
|
|
* entries for this hugepage.
|
|
|
|
*/
|
|
|
|
void pmdp_splitting_flush(struct vm_area_struct *vma,
|
|
|
|
unsigned long address, pmd_t *pmdp)
|
|
|
|
{
|
|
|
|
unsigned long old, tmp;
|
|
|
|
|
|
|
|
VM_BUG_ON(address & ~HPAGE_PMD_MASK);
|
|
|
|
|
|
|
|
#ifdef CONFIG_DEBUG_VM
|
|
|
|
WARN_ON(!pmd_trans_huge(*pmdp));
|
|
|
|
assert_spin_locked(&vma->vm_mm->page_table_lock);
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#ifdef PTE_ATOMIC_UPDATES
|
|
|
|
|
|
|
|
__asm__ __volatile__(
|
|
|
|
"1: ldarx %0,0,%3\n\
|
|
|
|
andi. %1,%0,%6\n\
|
|
|
|
bne- 1b \n\
|
|
|
|
ori %1,%0,%4 \n\
|
|
|
|
stdcx. %1,0,%3 \n\
|
|
|
|
bne- 1b"
|
|
|
|
: "=&r" (old), "=&r" (tmp), "=m" (*pmdp)
|
|
|
|
: "r" (pmdp), "i" (_PAGE_SPLITTING), "m" (*pmdp), "i" (_PAGE_BUSY)
|
|
|
|
: "cc" );
|
|
|
|
#else
|
|
|
|
old = pmd_val(*pmdp);
|
|
|
|
*pmdp = __pmd(old | _PAGE_SPLITTING);
|
|
|
|
#endif
|
|
|
|
/*
|
|
|
|
* If we didn't had the splitting flag set, go and flush the
|
|
|
|
* HPTE entries.
|
|
|
|
*/
|
2014-08-13 15:02:04 +08:00
|
|
|
trace_hugepage_splitting(address, old);
|
2013-06-20 17:00:15 +08:00
|
|
|
if (!(old & _PAGE_SPLITTING)) {
|
|
|
|
/* We need to flush the hpte */
|
|
|
|
if (old & _PAGE_HASHPTE)
|
2014-08-13 15:02:00 +08:00
|
|
|
hpte_do_hugepage_flush(vma->vm_mm, address, pmdp, old);
|
2013-06-20 17:00:15 +08:00
|
|
|
}
|
2014-03-15 18:47:58 +08:00
|
|
|
/*
|
|
|
|
* This ensures that generic code that rely on IRQ disabling
|
|
|
|
* to prevent a parallel THP split work as expected.
|
|
|
|
*/
|
|
|
|
kick_all_cpus_sync();
|
2013-06-20 17:00:15 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* We want to put the pgtable in pmd and use pgtable for tracking
|
|
|
|
* the base page size hptes
|
|
|
|
*/
|
|
|
|
void pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp,
|
|
|
|
pgtable_t pgtable)
|
|
|
|
{
|
|
|
|
pgtable_t *pgtable_slot;
|
|
|
|
assert_spin_locked(&mm->page_table_lock);
|
|
|
|
/*
|
|
|
|
* we store the pgtable in the second half of PMD
|
|
|
|
*/
|
|
|
|
pgtable_slot = (pgtable_t *)pmdp + PTRS_PER_PMD;
|
|
|
|
*pgtable_slot = pgtable;
|
|
|
|
/*
|
|
|
|
* expose the deposited pgtable to other cpus.
|
|
|
|
* before we set the hugepage PTE at pmd level
|
|
|
|
* hash fault code looks at the deposted pgtable
|
|
|
|
* to store hash index values.
|
|
|
|
*/
|
|
|
|
smp_wmb();
|
|
|
|
}
|
|
|
|
|
|
|
|
pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp)
|
|
|
|
{
|
|
|
|
pgtable_t pgtable;
|
|
|
|
pgtable_t *pgtable_slot;
|
|
|
|
|
|
|
|
assert_spin_locked(&mm->page_table_lock);
|
|
|
|
pgtable_slot = (pgtable_t *)pmdp + PTRS_PER_PMD;
|
|
|
|
pgtable = *pgtable_slot;
|
|
|
|
/*
|
|
|
|
* Once we withdraw, mark the entry NULL.
|
|
|
|
*/
|
|
|
|
*pgtable_slot = NULL;
|
|
|
|
/*
|
|
|
|
* We store HPTE information in the deposited PTE fragment.
|
|
|
|
* zero out the content on withdraw.
|
|
|
|
*/
|
|
|
|
memset(pgtable, 0, PTE_FRAG_SIZE);
|
|
|
|
return pgtable;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* set a new huge pmd. We should not be called for updating
|
|
|
|
* an existing pmd entry. That should go via pmd_hugepage_update.
|
|
|
|
*/
|
|
|
|
void set_pmd_at(struct mm_struct *mm, unsigned long addr,
|
|
|
|
pmd_t *pmdp, pmd_t pmd)
|
|
|
|
{
|
|
|
|
#ifdef CONFIG_DEBUG_VM
|
2013-11-18 17:28:12 +08:00
|
|
|
WARN_ON(pmd_val(*pmdp) & _PAGE_PRESENT);
|
2013-06-20 17:00:15 +08:00
|
|
|
assert_spin_locked(&mm->page_table_lock);
|
|
|
|
WARN_ON(!pmd_trans_huge(pmd));
|
|
|
|
#endif
|
2014-08-13 15:02:04 +08:00
|
|
|
trace_hugepage_set_pmd(addr, pmd);
|
2013-06-20 17:00:15 +08:00
|
|
|
return set_pte_at(mm, addr, pmdp_ptep(pmdp), pmd_pte(pmd));
|
|
|
|
}
|
|
|
|
|
|
|
|
void pmdp_invalidate(struct vm_area_struct *vma, unsigned long address,
|
|
|
|
pmd_t *pmdp)
|
|
|
|
{
|
2014-02-12 11:43:36 +08:00
|
|
|
pmd_hugepage_update(vma->vm_mm, address, pmdp, _PAGE_PRESENT, 0);
|
2013-06-20 17:00:15 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* A linux hugepage PMD was changed and the corresponding hash table entries
|
|
|
|
* neesd to be flushed.
|
|
|
|
*/
|
|
|
|
void hpte_do_hugepage_flush(struct mm_struct *mm, unsigned long addr,
|
2014-08-13 15:02:00 +08:00
|
|
|
pmd_t *pmdp, unsigned long old_pmd)
|
2013-06-20 17:00:15 +08:00
|
|
|
{
|
|
|
|
int ssize, i;
|
|
|
|
unsigned long s_addr;
|
2013-06-20 17:00:27 +08:00
|
|
|
int max_hpte_count;
|
2013-06-20 17:00:15 +08:00
|
|
|
unsigned int psize, valid;
|
|
|
|
unsigned char *hpte_slot_array;
|
|
|
|
unsigned long hidx, vpn, vsid, hash, shift, slot;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Flush all the hptes mapping this hugepage
|
|
|
|
*/
|
|
|
|
s_addr = addr & HPAGE_PMD_MASK;
|
|
|
|
hpte_slot_array = get_hpte_slot_array(pmdp);
|
|
|
|
/*
|
|
|
|
* IF we try to do a HUGE PTE update after a withdraw is done.
|
|
|
|
* we will find the below NULL. This happens when we do
|
|
|
|
* split_huge_page_pmd
|
|
|
|
*/
|
|
|
|
if (!hpte_slot_array)
|
|
|
|
return;
|
|
|
|
|
2014-08-13 15:01:58 +08:00
|
|
|
/* get the base page size,vsid and segment size */
|
2014-08-13 15:02:00 +08:00
|
|
|
#ifdef CONFIG_DEBUG_VM
|
2013-06-20 17:00:15 +08:00
|
|
|
psize = get_slice_psize(mm, s_addr);
|
2014-08-13 15:02:00 +08:00
|
|
|
BUG_ON(psize == MMU_PAGE_16M);
|
|
|
|
#endif
|
|
|
|
if (old_pmd & _PAGE_COMBO)
|
|
|
|
psize = MMU_PAGE_4K;
|
|
|
|
else
|
|
|
|
psize = MMU_PAGE_64K;
|
|
|
|
|
2014-08-13 15:01:58 +08:00
|
|
|
if (!is_kernel_addr(s_addr)) {
|
|
|
|
ssize = user_segment_size(s_addr);
|
|
|
|
vsid = get_vsid(mm->context.id, s_addr, ssize);
|
|
|
|
WARN_ON(vsid == 0);
|
|
|
|
} else {
|
|
|
|
vsid = get_kernel_vsid(s_addr, mmu_kernel_ssize);
|
|
|
|
ssize = mmu_kernel_ssize;
|
|
|
|
}
|
2013-06-20 17:00:15 +08:00
|
|
|
|
2013-06-20 17:00:27 +08:00
|
|
|
if (ppc_md.hugepage_invalidate)
|
2014-08-13 15:01:58 +08:00
|
|
|
return ppc_md.hugepage_invalidate(vsid, s_addr,
|
|
|
|
hpte_slot_array,
|
|
|
|
psize, ssize);
|
2013-06-20 17:00:27 +08:00
|
|
|
/*
|
|
|
|
* No bluk hpte removal support, invalidate each entry
|
|
|
|
*/
|
|
|
|
shift = mmu_psize_defs[psize].shift;
|
|
|
|
max_hpte_count = HPAGE_PMD_SIZE >> shift;
|
|
|
|
for (i = 0; i < max_hpte_count; i++) {
|
2013-06-20 17:00:15 +08:00
|
|
|
/*
|
|
|
|
* 8 bits per each hpte entries
|
|
|
|
* 000| [ secondary group (one bit) | hidx (3 bits) | valid bit]
|
|
|
|
*/
|
|
|
|
valid = hpte_valid(hpte_slot_array, i);
|
|
|
|
if (!valid)
|
|
|
|
continue;
|
|
|
|
hidx = hpte_hash_index(hpte_slot_array, i);
|
|
|
|
|
|
|
|
/* get the vpn */
|
|
|
|
addr = s_addr + (i * (1ul << shift));
|
|
|
|
vpn = hpt_vpn(addr, vsid, ssize);
|
|
|
|
hash = hpt_hash(vpn, shift, ssize);
|
|
|
|
if (hidx & _PTEIDX_SECONDARY)
|
|
|
|
hash = ~hash;
|
|
|
|
|
|
|
|
slot = (hash & htab_hash_mask) * HPTES_PER_GROUP;
|
|
|
|
slot += hidx & _PTEIDX_GROUP_IX;
|
|
|
|
ppc_md.hpte_invalidate(slot, vpn, psize,
|
|
|
|
MMU_PAGE_16M, ssize, 0);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static pmd_t pmd_set_protbits(pmd_t pmd, pgprot_t pgprot)
|
|
|
|
{
|
|
|
|
pmd_val(pmd) |= pgprot_val(pgprot);
|
|
|
|
return pmd;
|
|
|
|
}
|
|
|
|
|
|
|
|
pmd_t pfn_pmd(unsigned long pfn, pgprot_t pgprot)
|
|
|
|
{
|
|
|
|
pmd_t pmd;
|
|
|
|
/*
|
|
|
|
* For a valid pte, we would have _PAGE_PRESENT or _PAGE_FILE always
|
|
|
|
* set. We use this to check THP page at pmd level.
|
|
|
|
* leaf pte for huge page, bottom two bits != 00
|
|
|
|
*/
|
|
|
|
pmd_val(pmd) = pfn << PTE_RPN_SHIFT;
|
|
|
|
pmd_val(pmd) |= _PAGE_THP_HUGE;
|
|
|
|
pmd = pmd_set_protbits(pmd, pgprot);
|
|
|
|
return pmd;
|
|
|
|
}
|
|
|
|
|
|
|
|
pmd_t mk_pmd(struct page *page, pgprot_t pgprot)
|
|
|
|
{
|
|
|
|
return pfn_pmd(page_to_pfn(page), pgprot);
|
|
|
|
}
|
|
|
|
|
|
|
|
pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
|
|
|
|
{
|
|
|
|
|
|
|
|
pmd_val(pmd) &= _HPAGE_CHG_MASK;
|
|
|
|
pmd = pmd_set_protbits(pmd, newprot);
|
|
|
|
return pmd;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* This is called at the end of handling a user page fault, when the
|
|
|
|
* fault has been handled by updating a HUGE PMD entry in the linux page tables.
|
|
|
|
* We use it to preload an HPTE into the hash table corresponding to
|
|
|
|
* the updated linux HUGE PMD entry.
|
|
|
|
*/
|
|
|
|
void update_mmu_cache_pmd(struct vm_area_struct *vma, unsigned long addr,
|
|
|
|
pmd_t *pmd)
|
|
|
|
{
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
pmd_t pmdp_get_and_clear(struct mm_struct *mm,
|
|
|
|
unsigned long addr, pmd_t *pmdp)
|
|
|
|
{
|
|
|
|
pmd_t old_pmd;
|
|
|
|
pgtable_t pgtable;
|
|
|
|
unsigned long old;
|
|
|
|
pgtable_t *pgtable_slot;
|
|
|
|
|
2014-02-12 11:43:36 +08:00
|
|
|
old = pmd_hugepage_update(mm, addr, pmdp, ~0UL, 0);
|
2013-06-20 17:00:15 +08:00
|
|
|
old_pmd = __pmd(old);
|
|
|
|
/*
|
|
|
|
* We have pmd == none and we are holding page_table_lock.
|
|
|
|
* So we can safely go and clear the pgtable hash
|
|
|
|
* index info.
|
|
|
|
*/
|
|
|
|
pgtable_slot = (pgtable_t *)pmdp + PTRS_PER_PMD;
|
|
|
|
pgtable = *pgtable_slot;
|
|
|
|
/*
|
|
|
|
* Let's zero out old valid and hash index details
|
|
|
|
* hash fault look at them.
|
|
|
|
*/
|
|
|
|
memset(pgtable, 0, PTE_FRAG_SIZE);
|
|
|
|
return old_pmd;
|
|
|
|
}
|
2013-06-20 17:00:26 +08:00
|
|
|
|
|
|
|
int has_transparent_hugepage(void)
|
|
|
|
{
|
|
|
|
if (!mmu_has_feature(MMU_FTR_16M_PAGE))
|
|
|
|
return 0;
|
|
|
|
/*
|
|
|
|
* We support THP only if PMD_SIZE is 16MB.
|
|
|
|
*/
|
|
|
|
if (mmu_psize_defs[MMU_PAGE_16M].shift != PMD_SHIFT)
|
|
|
|
return 0;
|
|
|
|
/*
|
|
|
|
* We need to make sure that we support 16MB hugepage in a segement
|
|
|
|
* with base page size 64K or 4K. We only enable THP with a PAGE_SIZE
|
|
|
|
* of 64K.
|
|
|
|
*/
|
|
|
|
/*
|
|
|
|
* If we have 64K HPTE, we will be using that by default
|
|
|
|
*/
|
|
|
|
if (mmu_psize_defs[MMU_PAGE_64K].shift &&
|
|
|
|
(mmu_psize_defs[MMU_PAGE_64K].penc[MMU_PAGE_16M] == -1))
|
|
|
|
return 0;
|
|
|
|
/*
|
|
|
|
* Ok we only have 4K HPTE
|
|
|
|
*/
|
|
|
|
if (mmu_psize_defs[MMU_PAGE_4K].penc[MMU_PAGE_16M] == -1)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
return 1;
|
|
|
|
}
|
2013-06-20 17:00:15 +08:00
|
|
|
#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
|