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46 lines
1.5 KiB
Plaintext
46 lines
1.5 KiB
Plaintext
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* Texas Instruments OMAP2+ McBSP module
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Required properties:
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- compatible: "ti,omap2420-mcbsp" for McBSP on OMAP2420
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"ti,omap2430-mcbsp" for McBSP on OMAP2430
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"ti,omap3-mcbsp" for McBSP on OMAP3
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"ti,omap4-mcbsp" for McBSP on OMAP4 and newer SoC
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- reg: Register location and size, for OMAP4+ as an array:
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<MPU access base address, size>,
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<L3 interconnect address, size>;
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- interrupts: Interrupt numbers for the McBSP port, as an array in case the
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McBSP IP have more interrupt lines:
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<OCP compliant irq>,
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<TX irq>,
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<RX irq>;
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- interrupt-parent: The parent interrupt controller
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- ti,buffer-size: Size of the FIFO on the port (OMAP2430 and newer SoC)
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- ti,hwmods: Name of the hwmod associated to the McBSP port
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Sidetone support for OMAP3 McBSP2 and 3 ports:
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- sidetone { }: Within this section the following parameters are required:
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- reg: Register location and size for the ST block
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- interrupts: The interrupt number for the ST block
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- interrupt-parent: The parent interrupt controller for the ST block
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Example:
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mcbsp2: mcbsp@49022000 {
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compatible = "ti,omap3-mcbsp";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x49022000 0xff>;
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interrupts = <0 17 0x4>, /* OCP compliant interrup */
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<0 62 0x4>, /* TX interrup */
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<0 63 0x4>; /* RX interrup */
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interrupt-parent = <&intc>;
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ti,buffer-size = <1280>;
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ti,hwmods = "mcbsp2";
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sidetone {
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reg = <0x49028000 0xff>;
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interrupts = <0 4 0x4>;
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interrupt-parent = <&intc>;
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};
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};
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