License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.
By default all files without license information are under the default
license of the kernel, which is GPL version 2.
Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier. The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.
This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.
How this work was done:
Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
- file had no licensing information it it.
- file was a */uapi/* one with no licensing information in it,
- file was a */uapi/* one with existing licensing information,
Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.
The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne. Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.
The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed. Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.
Criteria used to select files for SPDX license identifier tagging was:
- Files considered eligible had to be source code files.
- Make and config files were included as candidates if they contained >5
lines of source
- File already had some variant of a license header in it (even if <5
lines).
All documentation files were explicitly excluded.
The following heuristics were used to determine which SPDX license
identifiers to apply.
- when both scanners couldn't find any license traces, file was
considered to have no license information in it, and the top level
COPYING file license applied.
For non */uapi/* files that summary was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 11139
and resulted in the first patch in this series.
If that file was a */uapi/* path one, it was "GPL-2.0 WITH
Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 WITH Linux-syscall-note 930
and resulted in the second patch in this series.
- if a file had some form of licensing information in it, and was one
of the */uapi/* ones, it was denoted with the Linux-syscall-note if
any GPL family license was found in the file or had no licensing in
it (per prior point). Results summary:
SPDX license identifier # files
---------------------------------------------------|------
GPL-2.0 WITH Linux-syscall-note 270
GPL-2.0+ WITH Linux-syscall-note 169
((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21
((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17
LGPL-2.1+ WITH Linux-syscall-note 15
GPL-1.0+ WITH Linux-syscall-note 14
((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5
LGPL-2.0+ WITH Linux-syscall-note 4
LGPL-2.1 WITH Linux-syscall-note 3
((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3
((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1
and that resulted in the third patch in this series.
- when the two scanners agreed on the detected license(s), that became
the concluded license(s).
- when there was disagreement between the two scanners (one detected a
license but the other didn't, or they both detected different
licenses) a manual inspection of the file occurred.
- In most cases a manual inspection of the information in the file
resulted in a clear resolution of the license that should apply (and
which scanner probably needed to revisit its heuristics).
- When it was not immediately clear, the license identifier was
confirmed with lawyers working with the Linux Foundation.
- If there was any question as to the appropriate license identifier,
the file was flagged for further research and to be revisited later
in time.
In total, over 70 hours of logged manual review was done on the
spreadsheet to determine the SPDX license identifiers to apply to the
source files by Kate, Philippe, Thomas and, in some cases, confirmation
by lawyers working with the Linux Foundation.
Kate also obtained a third independent scan of the 4.13 code base from
FOSSology, and compared selected files where the other two scanners
disagreed against that SPDX file, to see if there was new insights. The
Windriver scanner is based on an older version of FOSSology in part, so
they are related.
Thomas did random spot checks in about 500 files from the spreadsheets
for the uapi headers and agreed with SPDX license identifier in the
files he inspected. For the non-uapi files Thomas did random spot checks
in about 15000 files.
In initial set of patches against 4.14-rc6, 3 files were found to have
copy/paste license identifier errors, and have been fixed to reflect the
correct identifier.
Additionally Philippe spent 10 hours this week doing a detailed manual
inspection and review of the 12,461 patched files from the initial patch
version early this week with:
- a full scancode scan run, collecting the matched texts, detected
license ids and scores
- reviewing anything where there was a license detected (about 500+
files) to ensure that the applied SPDX license was correct
- reviewing anything where there was no detection but the patch license
was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied
SPDX license was correct
This produced a worksheet with 20 files needing minor correction. This
worksheet was then exported into 3 different .csv files for the
different types of files to be modified.
These .csv files were then reviewed by Greg. Thomas wrote a script to
parse the csv files and add the proper SPDX tag to the file, in the
format that the file expected. This script was further refined by Greg
based on the output to detect more types of files automatically and to
distinguish between header and source .c files (which need different
comment types.) Finally Greg ran the script using the .csv files to
generate the patches.
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-01 22:07:57 +08:00
|
|
|
// SPDX-License-Identifier: GPL-2.0
|
2016-03-08 18:49:57 +08:00
|
|
|
/*
|
|
|
|
* Page table allocation functions
|
|
|
|
*
|
|
|
|
* Copyright IBM Corp. 2016
|
|
|
|
* Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>
|
|
|
|
*/
|
|
|
|
|
|
|
|
#include <linux/sysctl.h>
|
2017-06-13 20:46:18 +08:00
|
|
|
#include <linux/slab.h>
|
|
|
|
#include <linux/mm.h>
|
2016-03-08 18:49:57 +08:00
|
|
|
#include <asm/mmu_context.h>
|
|
|
|
#include <asm/pgalloc.h>
|
|
|
|
#include <asm/gmap.h>
|
|
|
|
#include <asm/tlb.h>
|
|
|
|
#include <asm/tlbflush.h>
|
|
|
|
|
|
|
|
#ifdef CONFIG_PGSTE
|
|
|
|
|
|
|
|
int page_table_allocate_pgste = 0;
|
|
|
|
EXPORT_SYMBOL(page_table_allocate_pgste);
|
|
|
|
|
|
|
|
static struct ctl_table page_table_sysctl[] = {
|
|
|
|
{
|
|
|
|
.procname = "allocate_pgste",
|
|
|
|
.data = &page_table_allocate_pgste,
|
|
|
|
.maxlen = sizeof(int),
|
|
|
|
.mode = S_IRUGO | S_IWUSR,
|
2018-06-24 18:17:43 +08:00
|
|
|
.proc_handler = proc_dointvec_minmax,
|
2019-06-26 06:00:42 +08:00
|
|
|
.extra1 = SYSCTL_ZERO,
|
|
|
|
.extra2 = SYSCTL_ONE,
|
2016-03-08 18:49:57 +08:00
|
|
|
},
|
|
|
|
{ }
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct ctl_table page_table_sysctl_dir[] = {
|
|
|
|
{
|
|
|
|
.procname = "vm",
|
|
|
|
.maxlen = 0,
|
|
|
|
.mode = 0555,
|
|
|
|
.child = page_table_sysctl,
|
|
|
|
},
|
|
|
|
{ }
|
|
|
|
};
|
|
|
|
|
|
|
|
static int __init page_table_register_sysctl(void)
|
|
|
|
{
|
|
|
|
return register_sysctl_table(page_table_sysctl_dir) ? 0 : -ENOMEM;
|
|
|
|
}
|
|
|
|
__initcall(page_table_register_sysctl);
|
|
|
|
|
|
|
|
#endif /* CONFIG_PGSTE */
|
|
|
|
|
|
|
|
unsigned long *crst_table_alloc(struct mm_struct *mm)
|
|
|
|
{
|
|
|
|
struct page *page = alloc_pages(GFP_KERNEL, 2);
|
|
|
|
|
|
|
|
if (!page)
|
|
|
|
return NULL;
|
2016-06-14 18:56:01 +08:00
|
|
|
arch_set_page_dat(page, 2);
|
2021-02-12 14:43:18 +08:00
|
|
|
return (unsigned long *) page_to_virt(page);
|
2016-03-08 18:49:57 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
void crst_table_free(struct mm_struct *mm, unsigned long *table)
|
|
|
|
{
|
|
|
|
free_pages((unsigned long) table, 2);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void __crst_table_upgrade(void *arg)
|
|
|
|
{
|
|
|
|
struct mm_struct *mm = arg;
|
|
|
|
|
2020-11-16 15:06:40 +08:00
|
|
|
/* change all active ASCEs to avoid the creation of new TLBs */
|
s390/mm: fix page table upgrade vs 2ndary address mode accesses
A page table upgrade in a kernel section that uses secondary address
mode will mess up the kernel instructions as follows:
Consider the following scenario: two threads are sharing memory.
On CPU1 thread 1 does e.g. strnlen_user(). That gets to
old_fs = enable_sacf_uaccess();
len = strnlen_user_srst(src, size);
and
" la %2,0(%1)\n"
" la %3,0(%0,%1)\n"
" slgr %0,%0\n"
" sacf 256\n"
"0: srst %3,%2\n"
in strnlen_user_srst(). At that point we are in secondary space mode,
control register 1 points to kernel page table and instruction fetching
happens via c1, rather than usual c13. Interrupts are not disabled, for
obvious reasons.
On CPU2 thread 2 does MAP_FIXED mmap(), forcing the upgrade of page table
from 3-level to e.g. 4-level one. We'd allocated new top-level table,
set it up and now we hit this:
notify = 1;
spin_unlock_bh(&mm->page_table_lock);
}
if (notify)
on_each_cpu(__crst_table_upgrade, mm, 0);
OK, we need to actually change over to use of new page table and we
need that to happen in all threads that are currently running. Which
happens to include the thread 1. IPI is delivered and we have
static void __crst_table_upgrade(void *arg)
{
struct mm_struct *mm = arg;
if (current->active_mm == mm)
set_user_asce(mm);
__tlb_flush_local();
}
run on CPU1. That does
static inline void set_user_asce(struct mm_struct *mm)
{
S390_lowcore.user_asce = mm->context.asce;
OK, user page table address updated...
__ctl_load(S390_lowcore.user_asce, 1, 1);
... and control register 1 set to it.
clear_cpu_flag(CIF_ASCE_PRIMARY);
}
IPI is run in home space mode, so it's fine - insns are fetched
using c13, which always points to kernel page table. But as soon
as we return from the interrupt, previous PSW is restored, putting
CPU1 back into secondary space mode, at which point we no longer
get the kernel instructions from the kernel mapping.
The fix is to only fixup the control registers that are currently in use
for user processes during the page table update. We must also disable
interrupts in enable_sacf_uaccess to synchronize the cr and
thread.mm_segment updates against the on_each-cpu.
Fixes: 0aaba41b58bc ("s390: remove all code using the access register mode")
Cc: stable@vger.kernel.org # 4.15+
Reported-by: Al Viro <viro@zeniv.linux.org.uk>
Reviewed-by: Gerald Schaefer <gerald.schaefer@de.ibm.com>
References: CVE-2020-11884
Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
2020-04-15 21:21:01 +08:00
|
|
|
if (current->active_mm == mm) {
|
|
|
|
S390_lowcore.user_asce = mm->context.asce;
|
2020-11-16 15:06:40 +08:00
|
|
|
__ctl_load(S390_lowcore.user_asce, 7, 7);
|
s390/mm: fix page table upgrade vs 2ndary address mode accesses
A page table upgrade in a kernel section that uses secondary address
mode will mess up the kernel instructions as follows:
Consider the following scenario: two threads are sharing memory.
On CPU1 thread 1 does e.g. strnlen_user(). That gets to
old_fs = enable_sacf_uaccess();
len = strnlen_user_srst(src, size);
and
" la %2,0(%1)\n"
" la %3,0(%0,%1)\n"
" slgr %0,%0\n"
" sacf 256\n"
"0: srst %3,%2\n"
in strnlen_user_srst(). At that point we are in secondary space mode,
control register 1 points to kernel page table and instruction fetching
happens via c1, rather than usual c13. Interrupts are not disabled, for
obvious reasons.
On CPU2 thread 2 does MAP_FIXED mmap(), forcing the upgrade of page table
from 3-level to e.g. 4-level one. We'd allocated new top-level table,
set it up and now we hit this:
notify = 1;
spin_unlock_bh(&mm->page_table_lock);
}
if (notify)
on_each_cpu(__crst_table_upgrade, mm, 0);
OK, we need to actually change over to use of new page table and we
need that to happen in all threads that are currently running. Which
happens to include the thread 1. IPI is delivered and we have
static void __crst_table_upgrade(void *arg)
{
struct mm_struct *mm = arg;
if (current->active_mm == mm)
set_user_asce(mm);
__tlb_flush_local();
}
run on CPU1. That does
static inline void set_user_asce(struct mm_struct *mm)
{
S390_lowcore.user_asce = mm->context.asce;
OK, user page table address updated...
__ctl_load(S390_lowcore.user_asce, 1, 1);
... and control register 1 set to it.
clear_cpu_flag(CIF_ASCE_PRIMARY);
}
IPI is run in home space mode, so it's fine - insns are fetched
using c13, which always points to kernel page table. But as soon
as we return from the interrupt, previous PSW is restored, putting
CPU1 back into secondary space mode, at which point we no longer
get the kernel instructions from the kernel mapping.
The fix is to only fixup the control registers that are currently in use
for user processes during the page table update. We must also disable
interrupts in enable_sacf_uaccess to synchronize the cr and
thread.mm_segment updates against the on_each-cpu.
Fixes: 0aaba41b58bc ("s390: remove all code using the access register mode")
Cc: stable@vger.kernel.org # 4.15+
Reported-by: Al Viro <viro@zeniv.linux.org.uk>
Reviewed-by: Gerald Schaefer <gerald.schaefer@de.ibm.com>
References: CVE-2020-11884
Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
2020-04-15 21:21:01 +08:00
|
|
|
}
|
2016-03-08 18:49:57 +08:00
|
|
|
__tlb_flush_local();
|
|
|
|
}
|
|
|
|
|
2017-04-25 00:19:10 +08:00
|
|
|
int crst_table_upgrade(struct mm_struct *mm, unsigned long end)
|
2016-03-08 18:49:57 +08:00
|
|
|
{
|
2020-03-09 04:34:49 +08:00
|
|
|
unsigned long *pgd = NULL, *p4d = NULL, *__pgd;
|
|
|
|
unsigned long asce_limit = mm->context.asce_limit;
|
2016-03-08 18:49:57 +08:00
|
|
|
|
2017-04-25 00:19:10 +08:00
|
|
|
/* upgrade should only happen from 3 to 4, 3 to 5, or 4 to 5 levels */
|
2020-03-09 04:34:49 +08:00
|
|
|
VM_BUG_ON(asce_limit < _REGION2_SIZE);
|
|
|
|
|
|
|
|
if (end <= asce_limit)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
if (asce_limit == _REGION2_SIZE) {
|
|
|
|
p4d = crst_table_alloc(mm);
|
|
|
|
if (unlikely(!p4d))
|
|
|
|
goto err_p4d;
|
|
|
|
crst_table_init(p4d, _REGION2_ENTRY_EMPTY);
|
|
|
|
}
|
|
|
|
if (end > _REGION1_SIZE) {
|
|
|
|
pgd = crst_table_alloc(mm);
|
|
|
|
if (unlikely(!pgd))
|
|
|
|
goto err_pgd;
|
|
|
|
crst_table_init(pgd, _REGION1_ENTRY_EMPTY);
|
|
|
|
}
|
|
|
|
|
|
|
|
spin_lock_bh(&mm->page_table_lock);
|
|
|
|
|
|
|
|
/*
|
2020-06-09 12:33:54 +08:00
|
|
|
* This routine gets called with mmap_lock lock held and there is
|
2020-03-09 04:34:49 +08:00
|
|
|
* no reason to optimize for the case of otherwise. However, if
|
|
|
|
* that would ever change, the below check will let us know.
|
|
|
|
*/
|
|
|
|
VM_BUG_ON(asce_limit != mm->context.asce_limit);
|
|
|
|
|
|
|
|
if (p4d) {
|
|
|
|
__pgd = (unsigned long *) mm->pgd;
|
|
|
|
p4d_populate(mm, (p4d_t *) p4d, (pud_t *) __pgd);
|
|
|
|
mm->pgd = (pgd_t *) p4d;
|
|
|
|
mm->context.asce_limit = _REGION1_SIZE;
|
|
|
|
mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH |
|
|
|
|
_ASCE_USER_BITS | _ASCE_TYPE_REGION2;
|
|
|
|
mm_inc_nr_puds(mm);
|
2017-04-25 00:19:10 +08:00
|
|
|
}
|
2020-03-09 04:34:49 +08:00
|
|
|
if (pgd) {
|
|
|
|
__pgd = (unsigned long *) mm->pgd;
|
|
|
|
pgd_populate(mm, (pgd_t *) pgd, (p4d_t *) __pgd);
|
|
|
|
mm->pgd = (pgd_t *) pgd;
|
2020-03-19 20:44:49 +08:00
|
|
|
mm->context.asce_limit = TASK_SIZE_MAX;
|
2020-03-09 04:34:49 +08:00
|
|
|
mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH |
|
|
|
|
_ASCE_USER_BITS | _ASCE_TYPE_REGION1;
|
|
|
|
}
|
|
|
|
|
|
|
|
spin_unlock_bh(&mm->page_table_lock);
|
|
|
|
|
|
|
|
on_each_cpu(__crst_table_upgrade, mm, 0);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
err_pgd:
|
|
|
|
crst_table_free(mm, p4d);
|
|
|
|
err_p4d:
|
|
|
|
return -ENOMEM;
|
2016-03-08 18:49:57 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
static inline unsigned int atomic_xor_bits(atomic_t *v, unsigned int bits)
|
|
|
|
{
|
|
|
|
unsigned int old, new;
|
|
|
|
|
|
|
|
do {
|
|
|
|
old = atomic_read(v);
|
|
|
|
new = old ^ bits;
|
|
|
|
} while (atomic_cmpxchg(v, old, new) != old);
|
|
|
|
return new;
|
|
|
|
}
|
|
|
|
|
2016-03-08 19:12:18 +08:00
|
|
|
#ifdef CONFIG_PGSTE
|
|
|
|
|
|
|
|
struct page *page_table_alloc_pgste(struct mm_struct *mm)
|
|
|
|
{
|
|
|
|
struct page *page;
|
2017-10-05 01:27:07 +08:00
|
|
|
u64 *table;
|
2016-03-08 19:12:18 +08:00
|
|
|
|
2017-03-07 23:48:40 +08:00
|
|
|
page = alloc_page(GFP_KERNEL);
|
2016-03-08 19:12:18 +08:00
|
|
|
if (page) {
|
2021-02-12 14:43:18 +08:00
|
|
|
table = (u64 *)page_to_virt(page);
|
2017-10-05 01:27:07 +08:00
|
|
|
memset64(table, _PAGE_INVALID, PTRS_PER_PTE);
|
|
|
|
memset64(table + PTRS_PER_PTE, 0, PTRS_PER_PTE);
|
2016-03-08 19:12:18 +08:00
|
|
|
}
|
|
|
|
return page;
|
|
|
|
}
|
|
|
|
|
|
|
|
void page_table_free_pgste(struct page *page)
|
|
|
|
{
|
|
|
|
__free_page(page);
|
|
|
|
}
|
|
|
|
|
|
|
|
#endif /* CONFIG_PGSTE */
|
|
|
|
|
2016-03-08 18:49:57 +08:00
|
|
|
/*
|
2021-11-04 14:14:45 +08:00
|
|
|
* A 2KB-pgtable is either upper or lower half of a normal page.
|
|
|
|
* The second half of the page may be unused or used as another
|
|
|
|
* 2KB-pgtable.
|
|
|
|
*
|
|
|
|
* Whenever possible the parent page for a new 2KB-pgtable is picked
|
|
|
|
* from the list of partially allocated pages mm_context_t::pgtable_list.
|
|
|
|
* In case the list is empty a new parent page is allocated and added to
|
|
|
|
* the list.
|
|
|
|
*
|
|
|
|
* When a parent page gets fully allocated it contains 2KB-pgtables in both
|
|
|
|
* upper and lower halves and is removed from mm_context_t::pgtable_list.
|
|
|
|
*
|
|
|
|
* When 2KB-pgtable is freed from to fully allocated parent page that
|
|
|
|
* page turns partially allocated and added to mm_context_t::pgtable_list.
|
|
|
|
*
|
|
|
|
* If 2KB-pgtable is freed from the partially allocated parent page that
|
|
|
|
* page turns unused and gets removed from mm_context_t::pgtable_list.
|
|
|
|
* Furthermore, the unused parent page is released.
|
|
|
|
*
|
|
|
|
* As follows from the above, no unallocated or fully allocated parent
|
|
|
|
* pages are contained in mm_context_t::pgtable_list.
|
|
|
|
*
|
|
|
|
* The upper byte (bits 24-31) of the parent page _refcount is used
|
|
|
|
* for tracking contained 2KB-pgtables and has the following format:
|
|
|
|
*
|
|
|
|
* PP AA
|
|
|
|
* 01234567 upper byte (bits 24-31) of struct page::_refcount
|
|
|
|
* || ||
|
|
|
|
* || |+--- upper 2KB-pgtable is allocated
|
|
|
|
* || +---- lower 2KB-pgtable is allocated
|
|
|
|
* |+------- upper 2KB-pgtable is pending for removal
|
|
|
|
* +-------- lower 2KB-pgtable is pending for removal
|
|
|
|
*
|
|
|
|
* (See commit 620b4e903179 ("s390: use _refcount for pgtables") on why
|
|
|
|
* using _refcount is possible).
|
|
|
|
*
|
|
|
|
* When 2KB-pgtable is allocated the corresponding AA bit is set to 1.
|
|
|
|
* The parent page is either:
|
|
|
|
* - added to mm_context_t::pgtable_list in case the second half of the
|
|
|
|
* parent page is still unallocated;
|
|
|
|
* - removed from mm_context_t::pgtable_list in case both hales of the
|
|
|
|
* parent page are allocated;
|
|
|
|
* These operations are protected with mm_context_t::lock.
|
|
|
|
*
|
|
|
|
* When 2KB-pgtable is deallocated the corresponding AA bit is set to 0
|
|
|
|
* and the corresponding PP bit is set to 1 in a single atomic operation.
|
|
|
|
* Thus, PP and AA bits corresponding to the same 2KB-pgtable are mutually
|
|
|
|
* exclusive and may never be both set to 1!
|
|
|
|
* The parent page is either:
|
|
|
|
* - added to mm_context_t::pgtable_list in case the second half of the
|
|
|
|
* parent page is still allocated;
|
|
|
|
* - removed from mm_context_t::pgtable_list in case the second half of
|
|
|
|
* the parent page is unallocated;
|
|
|
|
* These operations are protected with mm_context_t::lock.
|
|
|
|
*
|
|
|
|
* It is important to understand that mm_context_t::lock only protects
|
|
|
|
* mm_context_t::pgtable_list and AA bits, but not the parent page itself
|
|
|
|
* and PP bits.
|
|
|
|
*
|
|
|
|
* Releasing the parent page happens whenever the PP bit turns from 1 to 0,
|
|
|
|
* while both AA bits and the second PP bit are already unset. Then the
|
|
|
|
* parent page does not contain any 2KB-pgtable fragment anymore, and it has
|
|
|
|
* also been removed from mm_context_t::pgtable_list. It is safe to release
|
|
|
|
* the page therefore.
|
|
|
|
*
|
|
|
|
* PGSTE memory spaces use full 4KB-pgtables and do not need most of the
|
|
|
|
* logic described above. Both AA bits are set to 1 to denote a 4KB-pgtable
|
|
|
|
* while the PP bits are never used, nor such a page is added to or removed
|
|
|
|
* from mm_context_t::pgtable_list.
|
2016-03-08 18:49:57 +08:00
|
|
|
*/
|
|
|
|
unsigned long *page_table_alloc(struct mm_struct *mm)
|
|
|
|
{
|
|
|
|
unsigned long *table;
|
|
|
|
struct page *page;
|
|
|
|
unsigned int mask, bit;
|
|
|
|
|
|
|
|
/* Try to get a fragment of a 4K page as a 2K page table */
|
|
|
|
if (!mm_alloc_pgste(mm)) {
|
|
|
|
table = NULL;
|
2017-08-18 00:17:49 +08:00
|
|
|
spin_lock_bh(&mm->context.lock);
|
2016-03-08 18:49:57 +08:00
|
|
|
if (!list_empty(&mm->context.pgtable_list)) {
|
|
|
|
page = list_first_entry(&mm->context.pgtable_list,
|
|
|
|
struct page, lru);
|
2018-06-08 08:08:15 +08:00
|
|
|
mask = atomic_read(&page->_refcount) >> 24;
|
2021-11-04 14:14:45 +08:00
|
|
|
/*
|
|
|
|
* The pending removal bits must also be checked.
|
|
|
|
* Failure to do so might lead to an impossible
|
|
|
|
* value of (i.e 0x13 or 0x23) written to _refcount.
|
|
|
|
* Such values violate the assumption that pending and
|
|
|
|
* allocation bits are mutually exclusive, and the rest
|
|
|
|
* of the code unrails as result. That could lead to
|
|
|
|
* a whole bunch of races and corruptions.
|
|
|
|
*/
|
|
|
|
mask = (mask | (mask >> 4)) & 0x03U;
|
|
|
|
if (mask != 0x03U) {
|
2021-02-12 14:43:18 +08:00
|
|
|
table = (unsigned long *) page_to_virt(page);
|
2016-03-08 18:49:57 +08:00
|
|
|
bit = mask & 1; /* =1 -> second 2K */
|
|
|
|
if (bit)
|
|
|
|
table += PTRS_PER_PTE;
|
2018-06-08 08:08:15 +08:00
|
|
|
atomic_xor_bits(&page->_refcount,
|
2021-11-04 14:14:45 +08:00
|
|
|
0x01U << (bit + 24));
|
2016-03-08 18:49:57 +08:00
|
|
|
list_del(&page->lru);
|
|
|
|
}
|
|
|
|
}
|
2017-08-18 00:17:49 +08:00
|
|
|
spin_unlock_bh(&mm->context.lock);
|
2016-03-08 18:49:57 +08:00
|
|
|
if (table)
|
|
|
|
return table;
|
|
|
|
}
|
|
|
|
/* Allocate a fresh page */
|
2016-06-25 05:49:17 +08:00
|
|
|
page = alloc_page(GFP_KERNEL);
|
2016-03-08 18:49:57 +08:00
|
|
|
if (!page)
|
|
|
|
return NULL;
|
2019-09-26 07:49:46 +08:00
|
|
|
if (!pgtable_pte_page_ctor(page)) {
|
2016-03-08 18:49:57 +08:00
|
|
|
__free_page(page);
|
|
|
|
return NULL;
|
|
|
|
}
|
2016-06-14 18:56:01 +08:00
|
|
|
arch_set_page_dat(page, 0);
|
2016-03-08 18:49:57 +08:00
|
|
|
/* Initialize page table */
|
2021-02-12 14:43:18 +08:00
|
|
|
table = (unsigned long *) page_to_virt(page);
|
2016-03-08 18:49:57 +08:00
|
|
|
if (mm_alloc_pgste(mm)) {
|
|
|
|
/* Return 4K page table with PGSTEs */
|
2021-11-04 14:14:45 +08:00
|
|
|
atomic_xor_bits(&page->_refcount, 0x03U << 24);
|
2017-10-05 01:27:07 +08:00
|
|
|
memset64((u64 *)table, _PAGE_INVALID, PTRS_PER_PTE);
|
|
|
|
memset64((u64 *)table + PTRS_PER_PTE, 0, PTRS_PER_PTE);
|
2016-03-08 18:49:57 +08:00
|
|
|
} else {
|
|
|
|
/* Return the first 2K fragment of the page */
|
2021-11-04 14:14:45 +08:00
|
|
|
atomic_xor_bits(&page->_refcount, 0x01U << 24);
|
2017-10-05 01:27:07 +08:00
|
|
|
memset64((u64 *)table, _PAGE_INVALID, 2 * PTRS_PER_PTE);
|
2017-08-18 00:17:49 +08:00
|
|
|
spin_lock_bh(&mm->context.lock);
|
2016-03-08 18:49:57 +08:00
|
|
|
list_add(&page->lru, &mm->context.pgtable_list);
|
2017-08-18 00:17:49 +08:00
|
|
|
spin_unlock_bh(&mm->context.lock);
|
2016-03-08 18:49:57 +08:00
|
|
|
}
|
|
|
|
return table;
|
|
|
|
}
|
|
|
|
|
|
|
|
void page_table_free(struct mm_struct *mm, unsigned long *table)
|
|
|
|
{
|
|
|
|
struct page *page;
|
|
|
|
unsigned int bit, mask;
|
|
|
|
|
2021-02-12 14:43:18 +08:00
|
|
|
page = virt_to_page(table);
|
2016-03-08 18:49:57 +08:00
|
|
|
if (!mm_alloc_pgste(mm)) {
|
|
|
|
/* Free 2K page table fragment of a 4K page */
|
2021-02-12 14:43:18 +08:00
|
|
|
bit = ((unsigned long) table & ~PAGE_MASK)/(PTRS_PER_PTE*sizeof(pte_t));
|
2017-08-18 00:17:49 +08:00
|
|
|
spin_lock_bh(&mm->context.lock);
|
2021-11-04 14:14:45 +08:00
|
|
|
/*
|
|
|
|
* Mark the page for delayed release. The actual release
|
|
|
|
* will happen outside of the critical section from this
|
|
|
|
* function or from __tlb_remove_table()
|
|
|
|
*/
|
2021-11-04 14:14:44 +08:00
|
|
|
mask = atomic_xor_bits(&page->_refcount, 0x11U << (bit + 24));
|
2018-06-08 08:08:15 +08:00
|
|
|
mask >>= 24;
|
2021-11-04 14:14:45 +08:00
|
|
|
if (mask & 0x03U)
|
2016-03-08 18:49:57 +08:00
|
|
|
list_add(&page->lru, &mm->context.pgtable_list);
|
|
|
|
else
|
|
|
|
list_del(&page->lru);
|
2017-08-18 00:17:49 +08:00
|
|
|
spin_unlock_bh(&mm->context.lock);
|
2021-11-04 14:14:44 +08:00
|
|
|
mask = atomic_xor_bits(&page->_refcount, 0x10U << (bit + 24));
|
|
|
|
mask >>= 24;
|
2021-11-04 14:14:45 +08:00
|
|
|
if (mask != 0x00U)
|
2016-03-08 18:49:57 +08:00
|
|
|
return;
|
2018-06-30 01:54:01 +08:00
|
|
|
} else {
|
2021-11-04 14:14:45 +08:00
|
|
|
atomic_xor_bits(&page->_refcount, 0x03U << 24);
|
2016-03-08 18:49:57 +08:00
|
|
|
}
|
|
|
|
|
2019-09-26 07:49:46 +08:00
|
|
|
pgtable_pte_page_dtor(page);
|
2016-03-08 18:49:57 +08:00
|
|
|
__free_page(page);
|
|
|
|
}
|
|
|
|
|
|
|
|
void page_table_free_rcu(struct mmu_gather *tlb, unsigned long *table,
|
|
|
|
unsigned long vmaddr)
|
|
|
|
{
|
|
|
|
struct mm_struct *mm;
|
|
|
|
struct page *page;
|
|
|
|
unsigned int bit, mask;
|
|
|
|
|
|
|
|
mm = tlb->mm;
|
2021-02-12 14:43:18 +08:00
|
|
|
page = virt_to_page(table);
|
2016-03-08 18:49:57 +08:00
|
|
|
if (mm_alloc_pgste(mm)) {
|
|
|
|
gmap_unlink(mm, table, vmaddr);
|
2021-11-04 14:14:45 +08:00
|
|
|
table = (unsigned long *) ((unsigned long)table | 0x03U);
|
2016-03-08 18:49:57 +08:00
|
|
|
tlb_remove_table(tlb, table);
|
|
|
|
return;
|
|
|
|
}
|
2021-02-12 14:43:18 +08:00
|
|
|
bit = ((unsigned long) table & ~PAGE_MASK) / (PTRS_PER_PTE*sizeof(pte_t));
|
2017-08-18 00:17:49 +08:00
|
|
|
spin_lock_bh(&mm->context.lock);
|
2021-11-04 14:14:45 +08:00
|
|
|
/*
|
|
|
|
* Mark the page for delayed release. The actual release will happen
|
|
|
|
* outside of the critical section from __tlb_remove_table() or from
|
|
|
|
* page_table_free()
|
|
|
|
*/
|
2018-06-08 08:08:15 +08:00
|
|
|
mask = atomic_xor_bits(&page->_refcount, 0x11U << (bit + 24));
|
|
|
|
mask >>= 24;
|
2021-11-04 14:14:45 +08:00
|
|
|
if (mask & 0x03U)
|
2016-03-08 18:49:57 +08:00
|
|
|
list_add_tail(&page->lru, &mm->context.pgtable_list);
|
|
|
|
else
|
|
|
|
list_del(&page->lru);
|
2017-08-18 00:17:49 +08:00
|
|
|
spin_unlock_bh(&mm->context.lock);
|
2021-11-04 14:14:45 +08:00
|
|
|
table = (unsigned long *) ((unsigned long) table | (0x01U << bit));
|
2016-03-08 18:49:57 +08:00
|
|
|
tlb_remove_table(tlb, table);
|
|
|
|
}
|
|
|
|
|
2018-09-18 20:51:51 +08:00
|
|
|
void __tlb_remove_table(void *_table)
|
2016-03-08 18:49:57 +08:00
|
|
|
{
|
2021-11-04 14:14:45 +08:00
|
|
|
unsigned int mask = (unsigned long) _table & 0x03U;
|
2016-03-08 18:49:57 +08:00
|
|
|
void *table = (void *)((unsigned long) _table ^ mask);
|
2021-02-12 14:43:18 +08:00
|
|
|
struct page *page = virt_to_page(table);
|
2016-03-08 18:49:57 +08:00
|
|
|
|
|
|
|
switch (mask) {
|
2021-11-04 14:14:45 +08:00
|
|
|
case 0x00U: /* pmd, pud, or p4d */
|
2016-03-08 18:49:57 +08:00
|
|
|
free_pages((unsigned long) table, 2);
|
|
|
|
break;
|
2021-11-04 14:14:45 +08:00
|
|
|
case 0x01U: /* lower 2K of a 4K page table */
|
|
|
|
case 0x02U: /* higher 2K of a 4K page table */
|
2018-06-08 08:08:15 +08:00
|
|
|
mask = atomic_xor_bits(&page->_refcount, mask << (4 + 24));
|
|
|
|
mask >>= 24;
|
2021-11-04 14:14:45 +08:00
|
|
|
if (mask != 0x00U)
|
2016-03-08 18:49:57 +08:00
|
|
|
break;
|
2020-03-11 04:47:30 +08:00
|
|
|
fallthrough;
|
2021-11-04 14:14:45 +08:00
|
|
|
case 0x03U: /* 4K page table with pgstes */
|
|
|
|
if (mask & 0x03U)
|
|
|
|
atomic_xor_bits(&page->_refcount, 0x03U << 24);
|
2019-09-26 07:49:46 +08:00
|
|
|
pgtable_pte_page_dtor(page);
|
2016-03-08 18:49:57 +08:00
|
|
|
__free_page(page);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2017-06-13 20:46:18 +08:00
|
|
|
/*
|
|
|
|
* Base infrastructure required to generate basic asces, region, segment,
|
|
|
|
* and page tables that do not make use of enhanced features like EDAT1.
|
|
|
|
*/
|
|
|
|
|
|
|
|
static struct kmem_cache *base_pgt_cache;
|
|
|
|
|
2021-12-09 19:01:25 +08:00
|
|
|
static unsigned long *base_pgt_alloc(void)
|
2017-06-13 20:46:18 +08:00
|
|
|
{
|
2021-12-09 19:01:25 +08:00
|
|
|
unsigned long *table;
|
2017-06-13 20:46:18 +08:00
|
|
|
|
|
|
|
table = kmem_cache_alloc(base_pgt_cache, GFP_KERNEL);
|
|
|
|
if (table)
|
2021-12-09 19:01:25 +08:00
|
|
|
memset64((u64 *)table, _PAGE_INVALID, PTRS_PER_PTE);
|
|
|
|
return table;
|
2017-06-13 20:46:18 +08:00
|
|
|
}
|
|
|
|
|
2021-12-09 19:01:25 +08:00
|
|
|
static void base_pgt_free(unsigned long *table)
|
2017-06-13 20:46:18 +08:00
|
|
|
{
|
2021-12-09 19:01:25 +08:00
|
|
|
kmem_cache_free(base_pgt_cache, table);
|
2017-06-13 20:46:18 +08:00
|
|
|
}
|
|
|
|
|
2021-12-09 19:01:25 +08:00
|
|
|
static unsigned long *base_crst_alloc(unsigned long val)
|
2017-06-13 20:46:18 +08:00
|
|
|
{
|
2021-12-09 19:01:25 +08:00
|
|
|
unsigned long *table;
|
2017-06-13 20:46:18 +08:00
|
|
|
|
2021-12-09 19:01:25 +08:00
|
|
|
table = (unsigned long *)__get_free_pages(GFP_KERNEL, CRST_ALLOC_ORDER);
|
2017-06-13 20:46:18 +08:00
|
|
|
if (table)
|
2021-12-09 19:01:25 +08:00
|
|
|
crst_table_init(table, val);
|
2017-06-13 20:46:18 +08:00
|
|
|
return table;
|
|
|
|
}
|
|
|
|
|
2021-12-09 19:01:25 +08:00
|
|
|
static void base_crst_free(unsigned long *table)
|
2017-06-13 20:46:18 +08:00
|
|
|
{
|
2021-12-09 19:01:25 +08:00
|
|
|
free_pages((unsigned long)table, CRST_ALLOC_ORDER);
|
2017-06-13 20:46:18 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
#define BASE_ADDR_END_FUNC(NAME, SIZE) \
|
|
|
|
static inline unsigned long base_##NAME##_addr_end(unsigned long addr, \
|
|
|
|
unsigned long end) \
|
|
|
|
{ \
|
|
|
|
unsigned long next = (addr + (SIZE)) & ~((SIZE) - 1); \
|
|
|
|
\
|
|
|
|
return (next - 1) < (end - 1) ? next : end; \
|
|
|
|
}
|
|
|
|
|
|
|
|
BASE_ADDR_END_FUNC(page, _PAGE_SIZE)
|
|
|
|
BASE_ADDR_END_FUNC(segment, _SEGMENT_SIZE)
|
|
|
|
BASE_ADDR_END_FUNC(region3, _REGION3_SIZE)
|
|
|
|
BASE_ADDR_END_FUNC(region2, _REGION2_SIZE)
|
|
|
|
BASE_ADDR_END_FUNC(region1, _REGION1_SIZE)
|
|
|
|
|
|
|
|
static inline unsigned long base_lra(unsigned long address)
|
|
|
|
{
|
|
|
|
unsigned long real;
|
|
|
|
|
|
|
|
asm volatile(
|
|
|
|
" lra %0,0(%1)\n"
|
|
|
|
: "=d" (real) : "a" (address) : "cc");
|
|
|
|
return real;
|
|
|
|
}
|
|
|
|
|
2021-12-09 19:01:25 +08:00
|
|
|
static int base_page_walk(unsigned long *origin, unsigned long addr,
|
2017-06-13 20:46:18 +08:00
|
|
|
unsigned long end, int alloc)
|
|
|
|
{
|
|
|
|
unsigned long *pte, next;
|
|
|
|
|
|
|
|
if (!alloc)
|
|
|
|
return 0;
|
2021-12-09 19:01:25 +08:00
|
|
|
pte = origin;
|
2017-06-13 20:46:18 +08:00
|
|
|
pte += (addr & _PAGE_INDEX) >> _PAGE_SHIFT;
|
|
|
|
do {
|
|
|
|
next = base_page_addr_end(addr, end);
|
|
|
|
*pte = base_lra(addr);
|
|
|
|
} while (pte++, addr = next, addr < end);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2021-12-09 19:01:25 +08:00
|
|
|
static int base_segment_walk(unsigned long *origin, unsigned long addr,
|
2017-06-13 20:46:18 +08:00
|
|
|
unsigned long end, int alloc)
|
|
|
|
{
|
2021-12-09 19:01:25 +08:00
|
|
|
unsigned long *ste, next, *table;
|
2017-06-13 20:46:18 +08:00
|
|
|
int rc;
|
|
|
|
|
2021-12-09 19:01:25 +08:00
|
|
|
ste = origin;
|
2017-06-13 20:46:18 +08:00
|
|
|
ste += (addr & _SEGMENT_INDEX) >> _SEGMENT_SHIFT;
|
|
|
|
do {
|
|
|
|
next = base_segment_addr_end(addr, end);
|
|
|
|
if (*ste & _SEGMENT_ENTRY_INVALID) {
|
|
|
|
if (!alloc)
|
|
|
|
continue;
|
|
|
|
table = base_pgt_alloc();
|
|
|
|
if (!table)
|
|
|
|
return -ENOMEM;
|
2021-12-08 03:06:21 +08:00
|
|
|
*ste = __pa(table) | _SEGMENT_ENTRY;
|
2017-06-13 20:46:18 +08:00
|
|
|
}
|
2021-12-09 19:01:25 +08:00
|
|
|
table = __va(*ste & _SEGMENT_ENTRY_ORIGIN);
|
2017-06-13 20:46:18 +08:00
|
|
|
rc = base_page_walk(table, addr, next, alloc);
|
|
|
|
if (rc)
|
|
|
|
return rc;
|
|
|
|
if (!alloc)
|
|
|
|
base_pgt_free(table);
|
|
|
|
cond_resched();
|
|
|
|
} while (ste++, addr = next, addr < end);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2021-12-09 19:01:25 +08:00
|
|
|
static int base_region3_walk(unsigned long *origin, unsigned long addr,
|
2017-06-13 20:46:18 +08:00
|
|
|
unsigned long end, int alloc)
|
|
|
|
{
|
2021-12-09 19:01:25 +08:00
|
|
|
unsigned long *rtte, next, *table;
|
2017-06-13 20:46:18 +08:00
|
|
|
int rc;
|
|
|
|
|
2021-12-09 19:01:25 +08:00
|
|
|
rtte = origin;
|
2017-06-13 20:46:18 +08:00
|
|
|
rtte += (addr & _REGION3_INDEX) >> _REGION3_SHIFT;
|
|
|
|
do {
|
|
|
|
next = base_region3_addr_end(addr, end);
|
|
|
|
if (*rtte & _REGION_ENTRY_INVALID) {
|
|
|
|
if (!alloc)
|
|
|
|
continue;
|
|
|
|
table = base_crst_alloc(_SEGMENT_ENTRY_EMPTY);
|
|
|
|
if (!table)
|
|
|
|
return -ENOMEM;
|
2021-12-08 03:06:21 +08:00
|
|
|
*rtte = __pa(table) | _REGION3_ENTRY;
|
2017-06-13 20:46:18 +08:00
|
|
|
}
|
2021-12-09 19:01:25 +08:00
|
|
|
table = __va(*rtte & _REGION_ENTRY_ORIGIN);
|
2017-06-13 20:46:18 +08:00
|
|
|
rc = base_segment_walk(table, addr, next, alloc);
|
|
|
|
if (rc)
|
|
|
|
return rc;
|
|
|
|
if (!alloc)
|
|
|
|
base_crst_free(table);
|
|
|
|
} while (rtte++, addr = next, addr < end);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2021-12-09 19:01:25 +08:00
|
|
|
static int base_region2_walk(unsigned long *origin, unsigned long addr,
|
2017-06-13 20:46:18 +08:00
|
|
|
unsigned long end, int alloc)
|
|
|
|
{
|
2021-12-09 19:01:25 +08:00
|
|
|
unsigned long *rste, next, *table;
|
2017-06-13 20:46:18 +08:00
|
|
|
int rc;
|
|
|
|
|
2021-12-09 19:01:25 +08:00
|
|
|
rste = origin;
|
2017-06-13 20:46:18 +08:00
|
|
|
rste += (addr & _REGION2_INDEX) >> _REGION2_SHIFT;
|
|
|
|
do {
|
|
|
|
next = base_region2_addr_end(addr, end);
|
|
|
|
if (*rste & _REGION_ENTRY_INVALID) {
|
|
|
|
if (!alloc)
|
|
|
|
continue;
|
|
|
|
table = base_crst_alloc(_REGION3_ENTRY_EMPTY);
|
|
|
|
if (!table)
|
|
|
|
return -ENOMEM;
|
2021-12-08 03:06:21 +08:00
|
|
|
*rste = __pa(table) | _REGION2_ENTRY;
|
2017-06-13 20:46:18 +08:00
|
|
|
}
|
2021-12-09 19:01:25 +08:00
|
|
|
table = __va(*rste & _REGION_ENTRY_ORIGIN);
|
2017-06-13 20:46:18 +08:00
|
|
|
rc = base_region3_walk(table, addr, next, alloc);
|
|
|
|
if (rc)
|
|
|
|
return rc;
|
|
|
|
if (!alloc)
|
|
|
|
base_crst_free(table);
|
|
|
|
} while (rste++, addr = next, addr < end);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2021-12-09 19:01:25 +08:00
|
|
|
static int base_region1_walk(unsigned long *origin, unsigned long addr,
|
2017-06-13 20:46:18 +08:00
|
|
|
unsigned long end, int alloc)
|
|
|
|
{
|
2021-12-09 19:01:25 +08:00
|
|
|
unsigned long *rfte, next, *table;
|
2017-06-13 20:46:18 +08:00
|
|
|
int rc;
|
|
|
|
|
2021-12-09 19:01:25 +08:00
|
|
|
rfte = origin;
|
2017-06-13 20:46:18 +08:00
|
|
|
rfte += (addr & _REGION1_INDEX) >> _REGION1_SHIFT;
|
|
|
|
do {
|
|
|
|
next = base_region1_addr_end(addr, end);
|
|
|
|
if (*rfte & _REGION_ENTRY_INVALID) {
|
|
|
|
if (!alloc)
|
|
|
|
continue;
|
|
|
|
table = base_crst_alloc(_REGION2_ENTRY_EMPTY);
|
|
|
|
if (!table)
|
|
|
|
return -ENOMEM;
|
2021-12-08 03:06:21 +08:00
|
|
|
*rfte = __pa(table) | _REGION1_ENTRY;
|
2017-06-13 20:46:18 +08:00
|
|
|
}
|
2021-12-09 19:01:25 +08:00
|
|
|
table = __va(*rfte & _REGION_ENTRY_ORIGIN);
|
2017-06-13 20:46:18 +08:00
|
|
|
rc = base_region2_walk(table, addr, next, alloc);
|
|
|
|
if (rc)
|
|
|
|
return rc;
|
|
|
|
if (!alloc)
|
|
|
|
base_crst_free(table);
|
|
|
|
} while (rfte++, addr = next, addr < end);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* base_asce_free - free asce and tables returned from base_asce_alloc()
|
|
|
|
* @asce: asce to be freed
|
|
|
|
*
|
|
|
|
* Frees all region, segment, and page tables that were allocated with a
|
|
|
|
* corresponding base_asce_alloc() call.
|
|
|
|
*/
|
|
|
|
void base_asce_free(unsigned long asce)
|
|
|
|
{
|
2021-12-09 19:01:25 +08:00
|
|
|
unsigned long *table = __va(asce & _ASCE_ORIGIN);
|
2017-06-13 20:46:18 +08:00
|
|
|
|
|
|
|
if (!asce)
|
|
|
|
return;
|
|
|
|
switch (asce & _ASCE_TYPE_MASK) {
|
|
|
|
case _ASCE_TYPE_SEGMENT:
|
|
|
|
base_segment_walk(table, 0, _REGION3_SIZE, 0);
|
|
|
|
break;
|
|
|
|
case _ASCE_TYPE_REGION3:
|
|
|
|
base_region3_walk(table, 0, _REGION2_SIZE, 0);
|
|
|
|
break;
|
|
|
|
case _ASCE_TYPE_REGION2:
|
|
|
|
base_region2_walk(table, 0, _REGION1_SIZE, 0);
|
|
|
|
break;
|
|
|
|
case _ASCE_TYPE_REGION1:
|
2020-03-19 20:44:49 +08:00
|
|
|
base_region1_walk(table, 0, TASK_SIZE_MAX, 0);
|
2017-06-13 20:46:18 +08:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
base_crst_free(table);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int base_pgt_cache_init(void)
|
|
|
|
{
|
|
|
|
static DEFINE_MUTEX(base_pgt_cache_mutex);
|
|
|
|
unsigned long sz = _PAGE_TABLE_SIZE;
|
|
|
|
|
|
|
|
if (base_pgt_cache)
|
|
|
|
return 0;
|
|
|
|
mutex_lock(&base_pgt_cache_mutex);
|
|
|
|
if (!base_pgt_cache)
|
|
|
|
base_pgt_cache = kmem_cache_create("base_pgt", sz, sz, 0, NULL);
|
|
|
|
mutex_unlock(&base_pgt_cache_mutex);
|
|
|
|
return base_pgt_cache ? 0 : -ENOMEM;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* base_asce_alloc - create kernel mapping without enhanced DAT features
|
|
|
|
* @addr: virtual start address of kernel mapping
|
|
|
|
* @num_pages: number of consecutive pages
|
|
|
|
*
|
|
|
|
* Generate an asce, including all required region, segment and page tables,
|
|
|
|
* that can be used to access the virtual kernel mapping. The difference is
|
|
|
|
* that the returned asce does not make use of any enhanced DAT features like
|
|
|
|
* e.g. large pages. This is required for some I/O functions that pass an
|
|
|
|
* asce, like e.g. some service call requests.
|
|
|
|
*
|
|
|
|
* Note: the returned asce may NEVER be attached to any cpu. It may only be
|
|
|
|
* used for I/O requests. tlb entries that might result because the
|
|
|
|
* asce was attached to a cpu won't be cleared.
|
|
|
|
*/
|
|
|
|
unsigned long base_asce_alloc(unsigned long addr, unsigned long num_pages)
|
|
|
|
{
|
2021-12-09 19:01:25 +08:00
|
|
|
unsigned long asce, *table, end;
|
2017-06-13 20:46:18 +08:00
|
|
|
int rc;
|
|
|
|
|
|
|
|
if (base_pgt_cache_init())
|
|
|
|
return 0;
|
|
|
|
end = addr + num_pages * PAGE_SIZE;
|
|
|
|
if (end <= _REGION3_SIZE) {
|
|
|
|
table = base_crst_alloc(_SEGMENT_ENTRY_EMPTY);
|
|
|
|
if (!table)
|
|
|
|
return 0;
|
|
|
|
rc = base_segment_walk(table, addr, end, 1);
|
2021-12-08 03:06:21 +08:00
|
|
|
asce = __pa(table) | _ASCE_TYPE_SEGMENT | _ASCE_TABLE_LENGTH;
|
2017-06-13 20:46:18 +08:00
|
|
|
} else if (end <= _REGION2_SIZE) {
|
|
|
|
table = base_crst_alloc(_REGION3_ENTRY_EMPTY);
|
|
|
|
if (!table)
|
|
|
|
return 0;
|
|
|
|
rc = base_region3_walk(table, addr, end, 1);
|
2021-12-08 03:06:21 +08:00
|
|
|
asce = __pa(table) | _ASCE_TYPE_REGION3 | _ASCE_TABLE_LENGTH;
|
2017-06-13 20:46:18 +08:00
|
|
|
} else if (end <= _REGION1_SIZE) {
|
|
|
|
table = base_crst_alloc(_REGION2_ENTRY_EMPTY);
|
|
|
|
if (!table)
|
|
|
|
return 0;
|
|
|
|
rc = base_region2_walk(table, addr, end, 1);
|
2021-12-08 03:06:21 +08:00
|
|
|
asce = __pa(table) | _ASCE_TYPE_REGION2 | _ASCE_TABLE_LENGTH;
|
2017-06-13 20:46:18 +08:00
|
|
|
} else {
|
|
|
|
table = base_crst_alloc(_REGION1_ENTRY_EMPTY);
|
|
|
|
if (!table)
|
|
|
|
return 0;
|
|
|
|
rc = base_region1_walk(table, addr, end, 1);
|
2021-12-08 03:06:21 +08:00
|
|
|
asce = __pa(table) | _ASCE_TYPE_REGION1 | _ASCE_TABLE_LENGTH;
|
2017-06-13 20:46:18 +08:00
|
|
|
}
|
|
|
|
if (rc) {
|
|
|
|
base_asce_free(asce);
|
|
|
|
asce = 0;
|
|
|
|
}
|
|
|
|
return asce;
|
|
|
|
}
|