mirror of
https://github.com/edk2-porting/linux-next.git
synced 2024-12-21 11:44:01 +08:00
260 lines
5.9 KiB
C
260 lines
5.9 KiB
C
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/*
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* Workbit NinjaSCSI-32Bi/UDE PCI/CardBus SCSI Host Bus Adapter driver
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* I/O routine
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*
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* This software may be used and distributed according to the terms of
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* the GNU General Public License.
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*/
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#ifndef _NSP32_IO_H
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#define _NSP32_IO_H
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static inline void nsp32_write1(unsigned int base,
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unsigned int index,
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unsigned char val)
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{
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outb(val, (base + index));
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}
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static inline unsigned char nsp32_read1(unsigned int base,
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unsigned int index)
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{
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return inb(base + index);
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}
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static inline void nsp32_write2(unsigned int base,
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unsigned int index,
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unsigned short val)
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{
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outw(val, (base + index));
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}
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static inline unsigned short nsp32_read2(unsigned int base,
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unsigned int index)
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{
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return inw(base + index);
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}
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static inline void nsp32_write4(unsigned int base,
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unsigned int index,
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unsigned long val)
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{
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outl(val, (base + index));
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}
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static inline unsigned long nsp32_read4(unsigned int base,
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unsigned int index)
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{
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return inl(base + index);
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}
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/*==============================================*/
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static inline void nsp32_mmio_write1(unsigned long base,
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unsigned int index,
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unsigned char val)
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{
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volatile unsigned char *ptr;
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ptr = (unsigned char *)(base + NSP32_MMIO_OFFSET + index);
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writeb(val, ptr);
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}
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static inline unsigned char nsp32_mmio_read1(unsigned long base,
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unsigned int index)
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{
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volatile unsigned char *ptr;
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ptr = (unsigned char *)(base + NSP32_MMIO_OFFSET + index);
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return readb(ptr);
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}
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static inline void nsp32_mmio_write2(unsigned long base,
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unsigned int index,
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unsigned short val)
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{
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volatile unsigned short *ptr;
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ptr = (unsigned short *)(base + NSP32_MMIO_OFFSET + index);
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writew(cpu_to_le16(val), ptr);
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}
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static inline unsigned short nsp32_mmio_read2(unsigned long base,
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unsigned int index)
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{
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volatile unsigned short *ptr;
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ptr = (unsigned short *)(base + NSP32_MMIO_OFFSET + index);
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return le16_to_cpu(readw(ptr));
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}
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static inline void nsp32_mmio_write4(unsigned long base,
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unsigned int index,
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unsigned long val)
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{
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volatile unsigned long *ptr;
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ptr = (unsigned long *)(base + NSP32_MMIO_OFFSET + index);
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writel(cpu_to_le32(val), ptr);
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}
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static inline unsigned long nsp32_mmio_read4(unsigned long base,
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unsigned int index)
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{
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volatile unsigned long *ptr;
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ptr = (unsigned long *)(base + NSP32_MMIO_OFFSET + index);
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return le32_to_cpu(readl(ptr));
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}
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/*==============================================*/
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static inline unsigned char nsp32_index_read1(unsigned int base,
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unsigned int reg)
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{
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outb(reg, base + INDEX_REG);
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return inb(base + DATA_REG_LOW);
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}
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static inline void nsp32_index_write1(unsigned int base,
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unsigned int reg,
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unsigned char val)
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{
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outb(reg, base + INDEX_REG );
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outb(val, base + DATA_REG_LOW);
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}
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static inline unsigned short nsp32_index_read2(unsigned int base,
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unsigned int reg)
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{
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outb(reg, base + INDEX_REG);
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return inw(base + DATA_REG_LOW);
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}
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static inline void nsp32_index_write2(unsigned int base,
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unsigned int reg,
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unsigned short val)
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{
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outb(reg, base + INDEX_REG );
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outw(val, base + DATA_REG_LOW);
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}
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static inline unsigned long nsp32_index_read4(unsigned int base,
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unsigned int reg)
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{
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unsigned long h,l;
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outb(reg, base + INDEX_REG);
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l = inw(base + DATA_REG_LOW);
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h = inw(base + DATA_REG_HI );
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return ((h << 16) | l);
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}
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static inline void nsp32_index_write4(unsigned int base,
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unsigned int reg,
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unsigned long val)
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{
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unsigned long h,l;
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h = (val & 0xffff0000) >> 16;
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l = (val & 0x0000ffff) >> 0;
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outb(reg, base + INDEX_REG );
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outw(l, base + DATA_REG_LOW);
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outw(h, base + DATA_REG_HI );
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}
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/*==============================================*/
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static inline unsigned char nsp32_mmio_index_read1(unsigned long base,
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unsigned int reg)
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{
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volatile unsigned short *index_ptr, *data_ptr;
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index_ptr = (unsigned short *)(base + NSP32_MMIO_OFFSET + INDEX_REG);
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data_ptr = (unsigned short *)(base + NSP32_MMIO_OFFSET + DATA_REG_LOW);
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writeb(reg, index_ptr);
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return readb(data_ptr);
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}
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static inline void nsp32_mmio_index_write1(unsigned long base,
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unsigned int reg,
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unsigned char val)
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{
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volatile unsigned short *index_ptr, *data_ptr;
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index_ptr = (unsigned short *)(base + NSP32_MMIO_OFFSET + INDEX_REG);
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data_ptr = (unsigned short *)(base + NSP32_MMIO_OFFSET + DATA_REG_LOW);
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writeb(reg, index_ptr);
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writeb(val, data_ptr );
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}
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static inline unsigned short nsp32_mmio_index_read2(unsigned long base,
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unsigned int reg)
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{
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volatile unsigned short *index_ptr, *data_ptr;
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index_ptr = (unsigned short *)(base + NSP32_MMIO_OFFSET + INDEX_REG);
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data_ptr = (unsigned short *)(base + NSP32_MMIO_OFFSET + DATA_REG_LOW);
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writeb(reg, index_ptr);
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return le16_to_cpu(readw(data_ptr));
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}
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static inline void nsp32_mmio_index_write2(unsigned long base,
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unsigned int reg,
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unsigned short val)
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{
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volatile unsigned short *index_ptr, *data_ptr;
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index_ptr = (unsigned short *)(base + NSP32_MMIO_OFFSET + INDEX_REG);
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data_ptr = (unsigned short *)(base + NSP32_MMIO_OFFSET + DATA_REG_LOW);
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writeb(reg, index_ptr);
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writew(cpu_to_le16(val), data_ptr );
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}
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/*==============================================*/
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static inline void nsp32_multi_read4(unsigned int base,
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unsigned int reg,
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void *buf,
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unsigned long count)
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{
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insl(base + reg, buf, count);
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}
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static inline void nsp32_fifo_read(unsigned int base,
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void *buf,
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unsigned long count)
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{
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nsp32_multi_read4(base, FIFO_DATA_LOW, buf, count);
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}
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static inline void nsp32_multi_write4(unsigned int base,
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unsigned int reg,
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void *buf,
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unsigned long count)
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{
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outsl(base + reg, buf, count);
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}
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static inline void nsp32_fifo_write(unsigned int base,
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void *buf,
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unsigned long count)
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{
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nsp32_multi_write4(base, FIFO_DATA_LOW, buf, count);
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}
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#endif /* _NSP32_IO_H */
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/* end */
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