2011-10-24 21:07:03 +08:00
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/*
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* Virtio platform device driver
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*
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* Copyright 2011, ARM Ltd.
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*
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* Based on Virtio PCI driver by Anthony Liguori, copyright IBM Corp. 2007
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*
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* This header is BSD licensed so anyone can use the definitions to implement
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* compatible drivers/servers.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of IBM nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL IBM OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#ifndef _LINUX_VIRTIO_MMIO_H
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#define _LINUX_VIRTIO_MMIO_H
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/*
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* Control registers
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*/
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/* Magic value ("virt" string) - Read Only */
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#define VIRTIO_MMIO_MAGIC_VALUE 0x000
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/* Virtio device version - Read Only */
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#define VIRTIO_MMIO_VERSION 0x004
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/* Virtio device ID - Read Only */
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#define VIRTIO_MMIO_DEVICE_ID 0x008
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/* Virtio vendor ID - Read Only */
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#define VIRTIO_MMIO_VENDOR_ID 0x00c
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2015-01-23 12:15:55 +08:00
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/* Bitmask of the features supported by the device (host)
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2011-10-24 21:07:03 +08:00
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* (32 bits per set) - Read Only */
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2015-01-23 12:15:55 +08:00
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#define VIRTIO_MMIO_DEVICE_FEATURES 0x010
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2011-10-24 21:07:03 +08:00
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2015-01-23 12:15:55 +08:00
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/* Device (host) features set selector - Write Only */
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#define VIRTIO_MMIO_DEVICE_FEATURES_SEL 0x014
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2011-10-24 21:07:03 +08:00
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2015-01-23 12:15:55 +08:00
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/* Bitmask of features activated by the driver (guest)
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2011-10-24 21:07:03 +08:00
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* (32 bits per set) - Write Only */
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2015-01-23 12:15:55 +08:00
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#define VIRTIO_MMIO_DRIVER_FEATURES 0x020
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2011-10-24 21:07:03 +08:00
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/* Activated features set selector - Write Only */
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2015-01-23 12:15:55 +08:00
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#define VIRTIO_MMIO_DRIVER_FEATURES_SEL 0x024
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#ifndef VIRTIO_MMIO_NO_LEGACY /* LEGACY DEVICES ONLY! */
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2011-10-24 21:07:03 +08:00
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/* Guest's memory page size in bytes - Write Only */
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#define VIRTIO_MMIO_GUEST_PAGE_SIZE 0x028
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2015-01-23 12:15:55 +08:00
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#endif
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2011-10-24 21:07:03 +08:00
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/* Queue selector - Write Only */
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#define VIRTIO_MMIO_QUEUE_SEL 0x030
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/* Maximum size of the currently selected queue - Read Only */
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#define VIRTIO_MMIO_QUEUE_NUM_MAX 0x034
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/* Queue size for the currently selected queue - Write Only */
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#define VIRTIO_MMIO_QUEUE_NUM 0x038
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2015-01-23 12:15:55 +08:00
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#ifndef VIRTIO_MMIO_NO_LEGACY /* LEGACY DEVICES ONLY! */
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2011-10-24 21:07:03 +08:00
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/* Used Ring alignment for the currently selected queue - Write Only */
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#define VIRTIO_MMIO_QUEUE_ALIGN 0x03c
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/* Guest's PFN for the currently selected queue - Read Write */
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#define VIRTIO_MMIO_QUEUE_PFN 0x040
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2015-01-23 12:15:55 +08:00
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#endif
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/* Ready bit for the currently selected queue - Read Write */
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#define VIRTIO_MMIO_QUEUE_READY 0x044
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2011-10-24 21:07:03 +08:00
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/* Queue notifier - Write Only */
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#define VIRTIO_MMIO_QUEUE_NOTIFY 0x050
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/* Interrupt status - Read Only */
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#define VIRTIO_MMIO_INTERRUPT_STATUS 0x060
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/* Interrupt acknowledge - Write Only */
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#define VIRTIO_MMIO_INTERRUPT_ACK 0x064
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/* Device status register - Read Write */
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#define VIRTIO_MMIO_STATUS 0x070
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2015-01-23 12:15:55 +08:00
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/* Selected queue's Descriptor Table address, 64 bits in two halves */
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#define VIRTIO_MMIO_QUEUE_DESC_LOW 0x080
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#define VIRTIO_MMIO_QUEUE_DESC_HIGH 0x084
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/* Selected queue's Available Ring address, 64 bits in two halves */
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#define VIRTIO_MMIO_QUEUE_AVAIL_LOW 0x090
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#define VIRTIO_MMIO_QUEUE_AVAIL_HIGH 0x094
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/* Selected queue's Used Ring address, 64 bits in two halves */
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#define VIRTIO_MMIO_QUEUE_USED_LOW 0x0a0
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#define VIRTIO_MMIO_QUEUE_USED_HIGH 0x0a4
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/* Configuration atomicity value */
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#define VIRTIO_MMIO_CONFIG_GENERATION 0x0fc
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2011-10-24 21:07:03 +08:00
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/* The config space is defined by each driver as
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* the per-driver configuration space - Read Write */
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#define VIRTIO_MMIO_CONFIG 0x100
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/*
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* Interrupt flags (re: interrupt status & acknowledge registers)
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*/
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#define VIRTIO_MMIO_INT_VRING (1 << 0)
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#define VIRTIO_MMIO_INT_CONFIG (1 << 1)
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#endif
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