2008-10-13 19:18:07 +08:00
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#ifndef DRIVERS_PCI_H
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#define DRIVERS_PCI_H
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2009-03-20 11:25:16 +08:00
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#include <linux/workqueue.h>
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2008-10-13 19:18:07 +08:00
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#define PCI_CFG_SPACE_SIZE 256
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#define PCI_CFG_SPACE_EXP_SIZE 4096
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2005-04-17 06:20:36 +08:00
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/* Functions internal to the PCI core code */
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2007-08-14 21:15:12 +08:00
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extern int pci_uevent(struct device *dev, struct kobj_uevent_env *env);
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2005-04-17 06:20:36 +08:00
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extern int pci_create_sysfs_dev_files(struct pci_dev *pdev);
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extern void pci_remove_sysfs_dev_files(struct pci_dev *pdev);
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2011-03-03 01:04:17 +08:00
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#if !defined(CONFIG_DMI) && !defined(CONFIG_ACPI)
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2010-07-26 18:56:50 +08:00
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static inline void pci_create_firmware_label_files(struct pci_dev *pdev)
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2010-08-02 20:44:29 +08:00
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{ return; }
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2010-07-26 18:56:50 +08:00
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static inline void pci_remove_firmware_label_files(struct pci_dev *pdev)
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2010-08-02 20:44:29 +08:00
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{ return; }
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2010-07-26 18:56:50 +08:00
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#else
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extern void pci_create_firmware_label_files(struct pci_dev *pdev);
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extern void pci_remove_firmware_label_files(struct pci_dev *pdev);
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#endif
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2005-04-17 06:20:36 +08:00
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extern void pci_cleanup_rom(struct pci_dev *dev);
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2008-10-25 01:32:33 +08:00
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#ifdef HAVE_PCI_MMAP
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2010-11-10 18:03:21 +08:00
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enum pci_mmap_api {
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PCI_MMAP_SYSFS, /* mmap on /sys/bus/pci/devices/<BDF>/resource<N> */
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PCI_MMAP_PROCFS /* mmap on /proc/bus/pci/<BDF> */
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};
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2008-10-25 01:32:33 +08:00
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extern int pci_mmap_fits(struct pci_dev *pdev, int resno,
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2010-11-10 18:03:21 +08:00
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struct vm_area_struct *vmai,
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enum pci_mmap_api mmap_api);
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2008-10-25 01:32:33 +08:00
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#endif
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2009-07-28 04:37:48 +08:00
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int pci_probe_reset_function(struct pci_dev *dev);
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2007-07-17 12:27:10 +08:00
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2008-07-07 09:32:02 +08:00
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/**
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2009-01-10 09:04:26 +08:00
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* struct pci_platform_pm_ops - Firmware PM callbacks
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2008-07-07 09:32:02 +08:00
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*
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2009-01-10 09:04:26 +08:00
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* @is_manageable: returns 'true' if given device is power manageable by the
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* platform firmware
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2008-07-07 09:32:02 +08:00
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*
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2009-01-10 09:04:26 +08:00
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* @set_state: invokes the platform firmware to set the device's power state
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2008-07-07 09:32:02 +08:00
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*
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2009-01-10 09:04:26 +08:00
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* @choose_state: returns PCI power state of given device preferred by the
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* platform; to be used during system-wide transitions from a
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* sleeping state to the working state and vice versa
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2008-07-07 09:32:02 +08:00
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*
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2009-01-10 09:04:26 +08:00
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* @can_wakeup: returns 'true' if given device is capable of waking up the
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* system from a sleeping state
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2008-07-07 09:34:48 +08:00
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*
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2009-01-10 09:04:26 +08:00
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* @sleep_wake: enables/disables the system wake up capability of given device
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2008-07-07 09:34:48 +08:00
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*
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2010-02-18 06:44:09 +08:00
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* @run_wake: enables/disables the platform to generate run-time wake-up events
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* for given device (the device's wake-up capability has to be
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* enabled by @sleep_wake for this feature to work)
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*
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2008-07-07 09:32:02 +08:00
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* If given platform is generally capable of power managing PCI devices, all of
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* these callbacks are mandatory.
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*/
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struct pci_platform_pm_ops {
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bool (*is_manageable)(struct pci_dev *dev);
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int (*set_state)(struct pci_dev *dev, pci_power_t state);
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pci_power_t (*choose_state)(struct pci_dev *dev);
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2008-07-07 09:34:48 +08:00
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bool (*can_wakeup)(struct pci_dev *dev);
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int (*sleep_wake)(struct pci_dev *dev, bool enable);
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2010-02-18 06:44:09 +08:00
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int (*run_wake)(struct pci_dev *dev, bool enable);
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2008-07-07 09:32:02 +08:00
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};
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extern int pci_set_platform_pm(struct pci_platform_pm_ops *ops);
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PCI PM: Avoid touching devices behind bridges in unknown state
It generally is better to avoid accessing devices behind bridges that
may not be in the D0 power state, because in that case the bridges'
secondary buses may not be accessible. For this reason, during the
early phase of resume (ie. with interrupts disabled), before
restoring the standard config registers of a device, check the power
state of the bridge the device is behind and postpone the restoration
of the device's config space, as well as any other operations that
would involve accessing the device, if that state is not D0.
In such cases the restoration of the device's config space will be
retried during the "normal" phase of resume (ie. with interrupts
enabled), so that the bridge can be put into D0 before that happens.
Also, save standard configuration registers of PCI devices during the
"normal" phase of suspend (ie. with interrupts enabled), so that the
bridges the devices are behind can be put into low power states (we
don't put bridges into low power states at the moment, but we may
want to do it in the future and it seems reasonable to design for
that).
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-01-07 20:07:15 +08:00
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extern void pci_update_current_state(struct pci_dev *dev, pci_power_t state);
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PCI / PM: restore the original behavior of pci_set_power_state()
Commit cc2893b6 (PCI: Ensure we re-enable devices on resume)
addressed the problem with USB not being powered after resume on
recent Lenovo machines, but it did that in a suboptimal way.
Namely, it should have changed the relevant code paths only,
which are pci_pm_resume_noirq() and pci_pm_restore_noirq() supposed
to restore the device's power and standard configuration registers
after system resume from suspend or hibernation. Instead, however,
it modified pci_set_power_state() which is executed in several
other situations too. That resulted in some undesirable effects,
like attempting to change a device's power state in the same way
multiple times in a row (up to as many as 4 times in a row in the
snd_hda_intel driver).
Fix the bug addressed by commit cc2893b6 in an alternative way,
by forcibly powering up all devices in pci_pm_default_resume_early(),
which is called by pci_pm_resume_noirq() and pci_pm_restore_noirq()
to restore the device's power and standard configuration registers,
and modifying pci_pm_runtime_resume() to avoid the forcible power-up
if not necessary. Then, revert the changes made by commit cc2893b6
to make the confusion introduced by it go away.
Acked-by: Matthew Garrett <mjg@redhat.com>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2012-07-06 05:20:00 +08:00
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extern void pci_power_up(struct pci_dev *dev);
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2009-01-07 20:03:42 +08:00
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extern void pci_disable_enabled_device(struct pci_dev *dev);
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2010-02-18 06:44:58 +08:00
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extern int pci_finish_runtime_suspend(struct pci_dev *dev);
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2010-02-18 06:44:09 +08:00
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extern int __pci_pme_wakeup(struct pci_dev *dev, void *ign);
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PCI/PM: add PCIe runtime D3cold support
This patch adds runtime D3cold support and corresponding ACPI platform
support. This patch only enables runtime D3cold support; it does not
enable D3cold support during system suspend/hibernate.
D3cold is the deepest power saving state for a PCIe device, where its main
power is removed. While it is in D3cold, you can't access the device at
all, not even its configuration space (which is still accessible in D3hot).
Therefore the PCI PM registers can not be used to transition into/out of
the D3cold state; that must be done by platform logic such as ACPI _PR3.
To support wakeup from D3cold, a system may provide auxiliary power, which
allows a device to request wakeup using a Beacon or the sideband WAKE#
signal. WAKE# is usually connected to platform logic such as ACPI GPE.
This is quite different from other power saving states, where devices
request wakeup via a PME message on the PCIe link.
Some devices, such as those in plug-in slots, have no direct platform
logic. For example, there is usually no ACPI _PR3 for them. D3cold
support for these devices can be done via the PCIe Downstream Port leading
to the device. When the PCIe port is powered on/off, the device is powered
on/off too. Wakeup events from the device will be notified to the
corresponding PCIe port.
For more information about PCIe D3cold and corresponding ACPI support,
please refer to:
- PCI Express Base Specification Revision 2.0
- Advanced Configuration and Power Interface Specification Revision 5.0
[bhelgaas: changelog]
Reviewed-by: Rafael J. Wysocki <rjw@sisk.pl>
Originally-by: Zheng Yan <zheng.z.yan@intel.com>
Signed-off-by: Huang Ying <ying.huang@intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2012-06-23 10:23:51 +08:00
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extern void pci_wakeup_bus(struct pci_bus *bus);
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2012-10-25 09:36:03 +08:00
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extern void pci_config_pm_runtime_get(struct pci_dev *dev);
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extern void pci_config_pm_runtime_put(struct pci_dev *dev);
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2008-07-07 09:34:48 +08:00
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extern void pci_pm_init(struct pci_dev *dev);
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2008-12-18 04:10:05 +08:00
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extern void platform_pci_wakeup_init(struct pci_dev *dev);
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2008-12-08 05:02:58 +08:00
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extern void pci_allocate_cap_save_buffers(struct pci_dev *dev);
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2012-02-11 16:18:30 +08:00
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void pci_free_cap_save_buffers(struct pci_dev *dev);
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2009-01-17 04:54:43 +08:00
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2010-12-29 20:21:23 +08:00
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static inline void pci_wakeup_event(struct pci_dev *dev)
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{
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/* Wait 100 ms before the system can be put into a sleep state. */
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pm_wakeup_event(&dev->dev, 100);
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}
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2009-01-17 04:54:43 +08:00
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static inline bool pci_is_bridge(struct pci_dev *pci_dev)
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{
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return !!(pci_dev->subordinate);
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}
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2005-03-19 13:15:48 +08:00
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2008-03-06 00:52:39 +08:00
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struct pci_vpd_ops {
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2008-12-19 01:17:16 +08:00
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ssize_t (*read)(struct pci_dev *dev, loff_t pos, size_t count, void *buf);
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ssize_t (*write)(struct pci_dev *dev, loff_t pos, size_t count, const void *buf);
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2008-03-06 00:52:39 +08:00
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void (*release)(struct pci_dev *dev);
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};
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struct pci_vpd {
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2008-07-03 01:59:04 +08:00
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unsigned int len;
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2008-12-19 01:17:16 +08:00
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const struct pci_vpd_ops *ops;
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2008-03-06 00:52:39 +08:00
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struct bin_attribute *attr; /* descriptor for sysfs VPD entry */
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};
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extern int pci_vpd_pci22_init(struct pci_dev *dev);
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static inline void pci_vpd_release(struct pci_dev *dev)
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{
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if (dev->vpd)
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dev->vpd->ops->release(dev);
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}
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2005-04-17 06:20:36 +08:00
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/* PCI /proc functions */
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#ifdef CONFIG_PROC_FS
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extern int pci_proc_attach_device(struct pci_dev *dev);
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extern int pci_proc_detach_device(struct pci_dev *dev);
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extern int pci_proc_detach_bus(struct pci_bus *bus);
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#else
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static inline int pci_proc_attach_device(struct pci_dev *dev) { return 0; }
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static inline int pci_proc_detach_device(struct pci_dev *dev) { return 0; }
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static inline int pci_proc_detach_bus(struct pci_bus *bus) { return 0; }
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#endif
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/* Functions for PCI Hotplug drivers to use */
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2012-05-19 03:46:34 +08:00
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int pci_hp_add_bridge(struct pci_dev *dev);
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2005-04-17 06:20:36 +08:00
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2008-10-03 17:49:32 +08:00
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#ifdef HAVE_PCI_LEGACY
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extern void pci_create_legacy_files(struct pci_bus *bus);
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2005-04-17 06:20:36 +08:00
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extern void pci_remove_legacy_files(struct pci_bus *bus);
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2008-10-03 17:49:32 +08:00
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#else
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static inline void pci_create_legacy_files(struct pci_bus *bus) { return; }
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static inline void pci_remove_legacy_files(struct pci_bus *bus) { return; }
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#endif
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2005-04-17 06:20:36 +08:00
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/* Lock for read/write access to pci device and bus lists */
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2006-06-02 12:35:43 +08:00
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extern struct rw_semaphore pci_bus_sem;
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2005-04-17 06:20:36 +08:00
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2011-11-04 16:46:00 +08:00
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extern raw_spinlock_t pci_lock;
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2006-07-12 23:59:00 +08:00
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extern unsigned int pci_pm_d3_delay;
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2007-01-25 16:34:07 +08:00
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2005-08-17 06:16:05 +08:00
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#ifdef CONFIG_PCI_MSI
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2006-03-06 13:33:34 +08:00
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void pci_no_msi(void);
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2007-04-05 15:19:10 +08:00
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extern void pci_msi_init_pci_dev(struct pci_dev *dev);
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2005-08-17 06:16:05 +08:00
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#else
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2006-03-06 13:33:34 +08:00
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static inline void pci_no_msi(void) { }
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2007-04-05 15:19:10 +08:00
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static inline void pci_msi_init_pci_dev(struct pci_dev *dev) { }
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2005-08-17 06:16:05 +08:00
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#endif
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2007-01-25 16:34:08 +08:00
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2012-02-24 11:23:30 +08:00
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void pci_realloc_get_opt(char *);
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2011-07-08 02:19:10 +08:00
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2006-07-12 23:59:00 +08:00
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static inline int pci_no_d1d2(struct pci_dev *dev)
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{
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unsigned int parent_dstates = 0;
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2005-08-17 06:16:05 +08:00
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2006-07-12 23:59:00 +08:00
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if (dev->bus->self)
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parent_dstates = dev->bus->self->no_d1d2;
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return (dev->no_d1d2 || parent_dstates);
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}
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2005-04-17 06:20:36 +08:00
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extern struct device_attribute pci_dev_attrs[];
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2011-05-13 08:11:39 +08:00
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extern struct device_attribute pcibus_dev_attrs[];
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2009-03-21 04:56:31 +08:00
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#ifdef CONFIG_HOTPLUG
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extern struct bus_attribute pci_bus_attrs[];
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#else
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#define pci_bus_attrs NULL
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#endif
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2005-04-17 06:20:36 +08:00
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/**
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* pci_match_one_device - Tell if a PCI device structure has a matching
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* PCI device id structure
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* @id: single PCI device id structure to match
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* @dev: the PCI device structure to match against
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2008-01-31 07:21:33 +08:00
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*
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2005-04-17 06:20:36 +08:00
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* Returns the matching pci_device_id structure or %NULL if there is no match.
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*/
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static inline const struct pci_device_id *
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pci_match_one_device(const struct pci_device_id *id, const struct pci_dev *dev)
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{
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if ((id->vendor == PCI_ANY_ID || id->vendor == dev->vendor) &&
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(id->device == PCI_ANY_ID || id->device == dev->device) &&
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(id->subvendor == PCI_ANY_ID || id->subvendor == dev->subsystem_vendor) &&
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(id->subdevice == PCI_ANY_ID || id->subdevice == dev->subsystem_device) &&
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!((id->class ^ dev->class) & id->class_mask))
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return id;
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return NULL;
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}
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2008-06-11 05:28:50 +08:00
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/* PCI slot sysfs helper code */
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#define to_pci_slot(s) container_of(s, struct pci_slot, kobj)
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extern struct kset *pci_slots_kset;
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struct pci_slot_attribute {
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struct attribute attr;
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ssize_t (*show)(struct pci_slot *, char *);
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ssize_t (*store)(struct pci_slot *, const char *, size_t);
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};
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#define to_pci_slot_attr(s) container_of(s, struct pci_slot_attribute, attr)
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2008-11-22 02:40:40 +08:00
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enum pci_bar_type {
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pci_bar_unknown, /* Standard PCI BAR probe */
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pci_bar_io, /* An io port BAR */
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pci_bar_mem32, /* A 32-bit memory BAR */
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pci_bar_mem64, /* A 64-bit memory BAR */
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};
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2012-01-28 02:55:10 +08:00
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bool pci_bus_read_dev_vendor_id(struct pci_bus *bus, int devfn, u32 *pl,
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int crs_timeout);
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2009-03-20 11:25:14 +08:00
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extern int pci_setup_device(struct pci_dev *dev);
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2008-11-22 02:40:40 +08:00
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extern int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
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struct resource *res, unsigned int reg);
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2008-11-22 02:41:27 +08:00
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extern int pci_resource_bar(struct pci_dev *dev, int resno,
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enum pci_bar_type *type);
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2008-11-22 02:42:35 +08:00
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extern int pci_bus_add_child(struct pci_bus *bus);
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2008-10-14 14:02:53 +08:00
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extern void pci_enable_ari(struct pci_dev *dev);
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/**
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* pci_ari_enabled - query ARI forwarding status
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2008-11-22 02:38:21 +08:00
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* @bus: the PCI bus
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2008-10-14 14:02:53 +08:00
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*
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* Returns 1 if ARI forwarding is enabled, or 0 if not enabled;
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*/
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2008-11-22 02:38:21 +08:00
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static inline int pci_ari_enabled(struct pci_bus *bus)
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2008-10-14 14:02:53 +08:00
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{
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2008-11-22 02:38:21 +08:00
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return bus->self && bus->self->ari_enabled;
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2008-10-14 14:02:53 +08:00
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}
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2012-02-16 13:40:31 +08:00
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void pci_reassigndev_resource_alignment(struct pci_dev *dev);
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2009-03-16 16:13:39 +08:00
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extern void pci_disable_bridge_window(struct pci_dev *dev);
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2009-03-20 11:25:11 +08:00
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/* Single Root I/O Virtualization */
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struct pci_sriov {
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int pos; /* capability position */
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int nres; /* number of resources */
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u32 cap; /* SR-IOV Capabilities */
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u16 ctrl; /* SR-IOV Control */
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u16 total; /* total VFs associated with the PF */
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2009-03-20 11:25:15 +08:00
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u16 initial; /* initial VFs associated with the PF */
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u16 nr_virtfn; /* number of VFs available */
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2009-03-20 11:25:11 +08:00
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u16 offset; /* first VF Routing ID offset */
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u16 stride; /* following VF stride */
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u32 pgsz; /* page size for BAR alignment */
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u8 link; /* Function Dependency Link */
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struct pci_dev *dev; /* lowest numbered PF */
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struct pci_dev *self; /* this PF */
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struct mutex lock; /* lock for VF bus */
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2009-03-20 11:25:16 +08:00
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struct work_struct mtask; /* VF Migration task */
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u8 __iomem *mstate; /* VF Migration State Array */
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2009-03-20 11:25:11 +08:00
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};
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2011-12-17 21:24:40 +08:00
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#ifdef CONFIG_PCI_ATS
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extern void pci_restore_ats_state(struct pci_dev *dev);
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#else
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static inline void pci_restore_ats_state(struct pci_dev *dev)
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{
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}
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#endif /* CONFIG_PCI_ATS */
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2009-03-20 11:25:11 +08:00
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#ifdef CONFIG_PCI_IOV
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extern int pci_iov_init(struct pci_dev *dev);
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extern void pci_iov_release(struct pci_dev *dev);
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extern int pci_iov_resource_bar(struct pci_dev *dev, int resno,
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enum pci_bar_type *type);
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2010-09-08 08:25:20 +08:00
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extern resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev,
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int resno);
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2009-03-20 11:25:12 +08:00
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extern void pci_restore_iov_state(struct pci_dev *dev);
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2009-03-20 11:25:13 +08:00
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extern int pci_iov_bus_range(struct pci_bus *bus);
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2009-05-18 13:51:32 +08:00
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2009-03-20 11:25:11 +08:00
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#else
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static inline int pci_iov_init(struct pci_dev *dev)
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{
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return -ENODEV;
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}
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static inline void pci_iov_release(struct pci_dev *dev)
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{
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}
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static inline int pci_iov_resource_bar(struct pci_dev *dev, int resno,
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enum pci_bar_type *type)
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{
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return 0;
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}
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2009-03-20 11:25:12 +08:00
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static inline void pci_restore_iov_state(struct pci_dev *dev)
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{
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}
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2009-03-20 11:25:13 +08:00
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static inline int pci_iov_bus_range(struct pci_bus *bus)
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{
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return 0;
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}
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2009-05-18 13:51:32 +08:00
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2009-03-20 11:25:11 +08:00
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#endif /* CONFIG_PCI_IOV */
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2011-07-26 04:08:41 +08:00
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extern unsigned long pci_cardbus_resource_alignment(struct resource *);
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2010-09-08 08:25:20 +08:00
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static inline resource_size_t pci_resource_alignment(struct pci_dev *dev,
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2009-08-29 04:00:06 +08:00
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struct resource *res)
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{
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#ifdef CONFIG_PCI_IOV
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int resno = res - dev->resource;
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if (resno >= PCI_IOV_RESOURCES && resno <= PCI_IOV_RESOURCE_END)
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return pci_sriov_resource_alignment(dev, resno);
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#endif
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2011-07-26 04:08:41 +08:00
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if (dev->class >> 8 == PCI_CLASS_BRIDGE_CARDBUS)
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return pci_cardbus_resource_alignment(res);
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2009-08-29 04:00:06 +08:00
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return resource_alignment(res);
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}
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2009-10-08 01:27:17 +08:00
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extern void pci_enable_acs(struct pci_dev *dev);
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2009-12-07 13:03:21 +08:00
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struct pci_dev_reset_methods {
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u16 vendor;
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u16 device;
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int (*reset)(struct pci_dev *dev, int probe);
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};
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2010-01-03 05:57:24 +08:00
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#ifdef CONFIG_PCI_QUIRKS
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2010-01-01 02:06:35 +08:00
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extern int pci_dev_specific_reset(struct pci_dev *dev, int probe);
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2010-01-03 05:57:24 +08:00
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#else
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static inline int pci_dev_specific_reset(struct pci_dev *dev, int probe)
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{
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return -ENOTTY;
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}
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#endif
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2009-12-07 13:03:21 +08:00
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2008-10-13 19:18:07 +08:00
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#endif /* DRIVERS_PCI_H */
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