2005-07-11 02:58:15 +08:00
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/*
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* linux/arch/arm/plat-omap/mcbsp.c
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*
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* Copyright (C) 2004 Nokia Corporation
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* Author: Samuel Ortiz <samuel.ortiz@nokia.com>
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*
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Multichannel mode not supported.
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/device.h>
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2008-07-03 17:24:39 +08:00
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#include <linux/platform_device.h>
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2005-07-11 02:58:15 +08:00
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#include <linux/interrupt.h>
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#include <linux/err.h>
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2006-01-08 00:15:52 +08:00
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#include <linux/clk.h>
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2007-02-13 02:50:53 +08:00
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#include <linux/delay.h>
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2008-07-03 17:24:39 +08:00
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#include <linux/io.h>
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include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-24 16:04:11 +08:00
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#include <linux/slab.h>
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2005-07-11 02:58:15 +08:00
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2009-10-21 00:40:47 +08:00
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#include <plat/mcbsp.h>
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2011-02-24 17:46:53 +08:00
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#include <plat/omap_device.h>
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2011-02-24 17:46:54 +08:00
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#include <linux/pm_runtime.h>
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2005-07-11 02:58:15 +08:00
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2010-12-22 06:30:55 +08:00
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/* XXX These "sideways" includes are a sign that something is wrong */
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#include "../mach-omap2/cm2xxx_3xxx.h"
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2010-02-22 20:21:11 +08:00
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#include "../mach-omap2/cm-regbits-34xx.h"
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2008-10-08 15:01:39 +08:00
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struct omap_mcbsp **mcbsp_ptr;
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2010-02-16 02:03:33 +08:00
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int omap_mcbsp_count, omap_mcbsp_cache_size;
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2008-07-03 17:24:39 +08:00
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2010-10-09 01:00:19 +08:00
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static void omap_mcbsp_write(struct omap_mcbsp *mcbsp, u16 reg, u32 val)
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2008-10-08 15:01:39 +08:00
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{
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2010-02-16 02:03:33 +08:00
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if (cpu_class_is_omap1()) {
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((u16 *)mcbsp->reg_cache)[reg / sizeof(u16)] = (u16)val;
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2010-02-16 02:03:32 +08:00
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__raw_writew((u16)val, mcbsp->io_base + reg);
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2010-02-16 02:03:33 +08:00
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} else if (cpu_is_omap2420()) {
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((u16 *)mcbsp->reg_cache)[reg / sizeof(u32)] = (u16)val;
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__raw_writew((u16)val, mcbsp->io_base + reg);
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} else {
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((u32 *)mcbsp->reg_cache)[reg / sizeof(u32)] = val;
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2010-02-16 02:03:32 +08:00
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__raw_writel(val, mcbsp->io_base + reg);
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2010-02-16 02:03:33 +08:00
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}
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2008-10-08 15:01:39 +08:00
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}
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2010-10-09 01:00:19 +08:00
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static int omap_mcbsp_read(struct omap_mcbsp *mcbsp, u16 reg, bool from_cache)
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2008-10-08 15:01:39 +08:00
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{
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2010-02-16 02:03:33 +08:00
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if (cpu_class_is_omap1()) {
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return !from_cache ? __raw_readw(mcbsp->io_base + reg) :
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((u16 *)mcbsp->reg_cache)[reg / sizeof(u16)];
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} else if (cpu_is_omap2420()) {
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return !from_cache ? __raw_readw(mcbsp->io_base + reg) :
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((u16 *)mcbsp->reg_cache)[reg / sizeof(u32)];
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} else {
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return !from_cache ? __raw_readl(mcbsp->io_base + reg) :
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((u32 *)mcbsp->reg_cache)[reg / sizeof(u32)];
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}
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2008-10-08 15:01:39 +08:00
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}
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2010-02-22 20:21:11 +08:00
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#ifdef CONFIG_ARCH_OMAP3
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2010-10-09 01:00:19 +08:00
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static void omap_mcbsp_st_write(struct omap_mcbsp *mcbsp, u16 reg, u32 val)
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2010-02-22 20:21:11 +08:00
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{
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__raw_writel(val, mcbsp->st_data->io_base_st + reg);
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}
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2010-10-09 01:00:19 +08:00
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static int omap_mcbsp_st_read(struct omap_mcbsp *mcbsp, u16 reg)
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2010-02-22 20:21:11 +08:00
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{
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return __raw_readl(mcbsp->st_data->io_base_st + reg);
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}
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#endif
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2010-02-16 02:03:32 +08:00
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#define MCBSP_READ(mcbsp, reg) \
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2010-02-16 02:03:33 +08:00
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omap_mcbsp_read(mcbsp, OMAP_MCBSP_REG_##reg, 0)
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2010-02-16 02:03:32 +08:00
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#define MCBSP_WRITE(mcbsp, reg, val) \
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omap_mcbsp_write(mcbsp, OMAP_MCBSP_REG_##reg, val)
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2010-02-16 02:03:33 +08:00
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#define MCBSP_READ_CACHE(mcbsp, reg) \
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omap_mcbsp_read(mcbsp, OMAP_MCBSP_REG_##reg, 1)
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2008-10-08 15:01:39 +08:00
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2010-02-22 20:21:11 +08:00
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#define MCBSP_ST_READ(mcbsp, reg) \
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omap_mcbsp_st_read(mcbsp, OMAP_ST_REG_##reg)
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#define MCBSP_ST_WRITE(mcbsp, reg, val) \
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omap_mcbsp_st_write(mcbsp, OMAP_ST_REG_##reg, val)
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2005-07-11 02:58:15 +08:00
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static void omap_mcbsp_dump_reg(u8 id)
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{
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2008-10-08 15:01:39 +08:00
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struct omap_mcbsp *mcbsp = id_to_mcbsp_ptr(id);
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dev_dbg(mcbsp->dev, "**** McBSP%d regs ****\n", mcbsp->id);
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dev_dbg(mcbsp->dev, "DRR2: 0x%04x\n",
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2010-02-16 02:03:32 +08:00
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MCBSP_READ(mcbsp, DRR2));
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2008-10-08 15:01:39 +08:00
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dev_dbg(mcbsp->dev, "DRR1: 0x%04x\n",
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2010-02-16 02:03:32 +08:00
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MCBSP_READ(mcbsp, DRR1));
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2008-10-08 15:01:39 +08:00
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dev_dbg(mcbsp->dev, "DXR2: 0x%04x\n",
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2010-02-16 02:03:32 +08:00
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MCBSP_READ(mcbsp, DXR2));
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2008-10-08 15:01:39 +08:00
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dev_dbg(mcbsp->dev, "DXR1: 0x%04x\n",
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2010-02-16 02:03:32 +08:00
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MCBSP_READ(mcbsp, DXR1));
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2008-10-08 15:01:39 +08:00
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dev_dbg(mcbsp->dev, "SPCR2: 0x%04x\n",
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2010-02-16 02:03:32 +08:00
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MCBSP_READ(mcbsp, SPCR2));
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2008-10-08 15:01:39 +08:00
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dev_dbg(mcbsp->dev, "SPCR1: 0x%04x\n",
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2010-02-16 02:03:32 +08:00
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MCBSP_READ(mcbsp, SPCR1));
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2008-10-08 15:01:39 +08:00
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dev_dbg(mcbsp->dev, "RCR2: 0x%04x\n",
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2010-02-16 02:03:32 +08:00
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MCBSP_READ(mcbsp, RCR2));
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2008-10-08 15:01:39 +08:00
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dev_dbg(mcbsp->dev, "RCR1: 0x%04x\n",
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2010-02-16 02:03:32 +08:00
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MCBSP_READ(mcbsp, RCR1));
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2008-10-08 15:01:39 +08:00
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dev_dbg(mcbsp->dev, "XCR2: 0x%04x\n",
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2010-02-16 02:03:32 +08:00
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MCBSP_READ(mcbsp, XCR2));
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2008-10-08 15:01:39 +08:00
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dev_dbg(mcbsp->dev, "XCR1: 0x%04x\n",
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2010-02-16 02:03:32 +08:00
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MCBSP_READ(mcbsp, XCR1));
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2008-10-08 15:01:39 +08:00
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dev_dbg(mcbsp->dev, "SRGR2: 0x%04x\n",
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2010-02-16 02:03:32 +08:00
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MCBSP_READ(mcbsp, SRGR2));
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2008-10-08 15:01:39 +08:00
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dev_dbg(mcbsp->dev, "SRGR1: 0x%04x\n",
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2010-02-16 02:03:32 +08:00
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MCBSP_READ(mcbsp, SRGR1));
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2008-10-08 15:01:39 +08:00
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dev_dbg(mcbsp->dev, "PCR0: 0x%04x\n",
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2010-02-16 02:03:32 +08:00
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MCBSP_READ(mcbsp, PCR0));
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2008-10-08 15:01:39 +08:00
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dev_dbg(mcbsp->dev, "***********************\n");
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2005-07-11 02:58:15 +08:00
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}
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2006-10-07 01:53:39 +08:00
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static irqreturn_t omap_mcbsp_tx_irq_handler(int irq, void *dev_id)
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2005-07-11 02:58:15 +08:00
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{
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2007-10-26 17:40:25 +08:00
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struct omap_mcbsp *mcbsp_tx = dev_id;
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2009-05-26 02:08:42 +08:00
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u16 irqst_spcr2;
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2005-07-11 02:58:15 +08:00
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2010-02-16 02:03:32 +08:00
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irqst_spcr2 = MCBSP_READ(mcbsp_tx, SPCR2);
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2009-05-26 02:08:42 +08:00
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dev_dbg(mcbsp_tx->dev, "TX IRQ callback : 0x%x\n", irqst_spcr2);
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2005-07-11 02:58:15 +08:00
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2009-05-26 02:08:42 +08:00
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if (irqst_spcr2 & XSYNC_ERR) {
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dev_err(mcbsp_tx->dev, "TX Frame Sync Error! : 0x%x\n",
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irqst_spcr2);
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/* Writing zero to XSYNC_ERR clears the IRQ */
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2010-02-23 23:50:38 +08:00
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MCBSP_WRITE(mcbsp_tx, SPCR2, MCBSP_READ_CACHE(mcbsp_tx, SPCR2));
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2009-05-26 02:08:42 +08:00
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}
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2008-07-03 17:24:39 +08:00
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2005-07-11 02:58:15 +08:00
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return IRQ_HANDLED;
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}
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2006-10-07 01:53:39 +08:00
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static irqreturn_t omap_mcbsp_rx_irq_handler(int irq, void *dev_id)
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2005-07-11 02:58:15 +08:00
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{
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2007-10-26 17:40:25 +08:00
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struct omap_mcbsp *mcbsp_rx = dev_id;
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2009-05-26 02:08:42 +08:00
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u16 irqst_spcr1;
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2010-02-16 02:03:32 +08:00
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irqst_spcr1 = MCBSP_READ(mcbsp_rx, SPCR1);
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2009-05-26 02:08:42 +08:00
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dev_dbg(mcbsp_rx->dev, "RX IRQ callback : 0x%x\n", irqst_spcr1);
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if (irqst_spcr1 & RSYNC_ERR) {
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dev_err(mcbsp_rx->dev, "RX Frame Sync Error! : 0x%x\n",
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irqst_spcr1);
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/* Writing zero to RSYNC_ERR clears the IRQ */
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2010-02-23 23:50:38 +08:00
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MCBSP_WRITE(mcbsp_rx, SPCR1, MCBSP_READ_CACHE(mcbsp_rx, SPCR1));
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2009-05-26 02:08:42 +08:00
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}
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2008-07-03 17:24:39 +08:00
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2005-07-11 02:58:15 +08:00
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return IRQ_HANDLED;
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}
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/*
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* omap_mcbsp_config simply write a config to the
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* appropriate McBSP.
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* You either call this function or set the McBSP registers
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* by yourself before calling omap_mcbsp_start().
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*/
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2008-07-03 17:24:39 +08:00
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void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg *config)
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2005-07-11 02:58:15 +08:00
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{
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2008-10-08 15:01:39 +08:00
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struct omap_mcbsp *mcbsp;
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2005-07-11 02:58:15 +08:00
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2008-07-03 17:24:39 +08:00
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if (!omap_mcbsp_check_valid_id(id)) {
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printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
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return;
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}
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2008-10-08 15:01:39 +08:00
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mcbsp = id_to_mcbsp_ptr(id);
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2008-07-03 17:24:39 +08:00
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2008-10-08 15:01:39 +08:00
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dev_dbg(mcbsp->dev, "Configuring McBSP%d phys_base: 0x%08lx\n",
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mcbsp->id, mcbsp->phys_base);
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2005-07-11 02:58:15 +08:00
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/* We write the given config */
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2010-02-16 02:03:32 +08:00
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MCBSP_WRITE(mcbsp, SPCR2, config->spcr2);
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MCBSP_WRITE(mcbsp, SPCR1, config->spcr1);
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MCBSP_WRITE(mcbsp, RCR2, config->rcr2);
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MCBSP_WRITE(mcbsp, RCR1, config->rcr1);
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MCBSP_WRITE(mcbsp, XCR2, config->xcr2);
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MCBSP_WRITE(mcbsp, XCR1, config->xcr1);
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MCBSP_WRITE(mcbsp, SRGR2, config->srgr2);
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MCBSP_WRITE(mcbsp, SRGR1, config->srgr1);
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MCBSP_WRITE(mcbsp, MCR2, config->mcr2);
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MCBSP_WRITE(mcbsp, MCR1, config->mcr1);
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MCBSP_WRITE(mcbsp, PCR0, config->pcr0);
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2009-07-28 21:27:10 +08:00
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if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
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2010-02-16 02:03:32 +08:00
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MCBSP_WRITE(mcbsp, XCCR, config->xccr);
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MCBSP_WRITE(mcbsp, RCCR, config->rccr);
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2009-01-15 19:09:54 +08:00
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}
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2005-07-11 02:58:15 +08:00
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}
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2008-07-03 17:24:39 +08:00
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EXPORT_SYMBOL(omap_mcbsp_config);
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2005-07-11 02:58:15 +08:00
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2011-02-24 17:46:55 +08:00
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/**
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* omap_mcbsp_dma_params - returns the dma channel number
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* @id - mcbsp id
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|
|
* @stream - indicates the direction of data flow (rx or tx)
|
|
|
|
*
|
|
|
|
* Returns the dma channel number for the rx channel or tx channel
|
|
|
|
* based on the value of @stream for the requested mcbsp given by @id
|
|
|
|
*/
|
|
|
|
int omap_mcbsp_dma_ch_params(unsigned int id, unsigned int stream)
|
|
|
|
{
|
|
|
|
struct omap_mcbsp *mcbsp;
|
|
|
|
|
|
|
|
if (!omap_mcbsp_check_valid_id(id)) {
|
|
|
|
printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
|
|
|
|
return -ENODEV;
|
|
|
|
}
|
|
|
|
mcbsp = id_to_mcbsp_ptr(id);
|
|
|
|
|
|
|
|
if (stream)
|
|
|
|
return mcbsp->dma_rx_sync;
|
|
|
|
else
|
|
|
|
return mcbsp->dma_tx_sync;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(omap_mcbsp_dma_ch_params);
|
|
|
|
|
|
|
|
/**
|
|
|
|
* omap_mcbsp_dma_reg_params - returns the address of mcbsp data register
|
|
|
|
* @id - mcbsp id
|
|
|
|
* @stream - indicates the direction of data flow (rx or tx)
|
|
|
|
*
|
|
|
|
* Returns the address of mcbsp data transmit register or data receive register
|
|
|
|
* to be used by DMA for transferring/receiving data based on the value of
|
|
|
|
* @stream for the requested mcbsp given by @id
|
|
|
|
*/
|
|
|
|
int omap_mcbsp_dma_reg_params(unsigned int id, unsigned int stream)
|
|
|
|
{
|
|
|
|
struct omap_mcbsp *mcbsp;
|
|
|
|
int data_reg;
|
|
|
|
|
|
|
|
if (!omap_mcbsp_check_valid_id(id)) {
|
|
|
|
printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
|
|
|
|
return -ENODEV;
|
|
|
|
}
|
|
|
|
mcbsp = id_to_mcbsp_ptr(id);
|
|
|
|
|
|
|
|
data_reg = mcbsp->phys_dma_base;
|
|
|
|
|
|
|
|
if (mcbsp->mcbsp_config_type < MCBSP_CONFIG_TYPE2) {
|
|
|
|
if (stream)
|
|
|
|
data_reg += OMAP_MCBSP_REG_DRR1;
|
|
|
|
else
|
|
|
|
data_reg += OMAP_MCBSP_REG_DXR1;
|
|
|
|
} else {
|
|
|
|
if (stream)
|
|
|
|
data_reg += OMAP_MCBSP_REG_DRR;
|
|
|
|
else
|
|
|
|
data_reg += OMAP_MCBSP_REG_DXR;
|
|
|
|
}
|
|
|
|
|
|
|
|
return data_reg;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(omap_mcbsp_dma_reg_params);
|
|
|
|
|
2010-02-13 04:26:48 +08:00
|
|
|
#ifdef CONFIG_ARCH_OMAP3
|
2011-02-24 17:46:53 +08:00
|
|
|
static struct omap_device *find_omap_device_by_dev(struct device *dev)
|
|
|
|
{
|
|
|
|
struct platform_device *pdev = container_of(dev,
|
|
|
|
struct platform_device, dev);
|
|
|
|
return container_of(pdev, struct omap_device, pdev);
|
|
|
|
}
|
|
|
|
|
2010-02-22 20:21:11 +08:00
|
|
|
static void omap_st_on(struct omap_mcbsp *mcbsp)
|
|
|
|
{
|
|
|
|
unsigned int w;
|
2011-02-24 17:46:53 +08:00
|
|
|
struct omap_device *od;
|
|
|
|
|
|
|
|
od = find_omap_device_by_dev(mcbsp->dev);
|
2010-02-22 20:21:11 +08:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Sidetone uses McBSP ICLK - which must not idle when sidetones
|
|
|
|
* are enabled or sidetones start sounding ugly.
|
|
|
|
*/
|
2010-12-22 12:05:14 +08:00
|
|
|
w = omap2_cm_read_mod_reg(OMAP3430_PER_MOD, CM_AUTOIDLE);
|
2010-02-22 20:21:11 +08:00
|
|
|
w &= ~(1 << (mcbsp->id - 2));
|
2010-12-22 12:05:14 +08:00
|
|
|
omap2_cm_write_mod_reg(w, OMAP3430_PER_MOD, CM_AUTOIDLE);
|
2010-02-22 20:21:11 +08:00
|
|
|
|
|
|
|
/* Enable McBSP Sidetone */
|
|
|
|
w = MCBSP_READ(mcbsp, SSELCR);
|
|
|
|
MCBSP_WRITE(mcbsp, SSELCR, w | SIDETONEEN);
|
|
|
|
|
|
|
|
/* Enable Sidetone from Sidetone Core */
|
|
|
|
w = MCBSP_ST_READ(mcbsp, SSELCR);
|
|
|
|
MCBSP_ST_WRITE(mcbsp, SSELCR, w | ST_SIDETONEEN);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void omap_st_off(struct omap_mcbsp *mcbsp)
|
|
|
|
{
|
|
|
|
unsigned int w;
|
2011-02-24 17:46:53 +08:00
|
|
|
struct omap_device *od;
|
|
|
|
|
|
|
|
od = find_omap_device_by_dev(mcbsp->dev);
|
2010-02-22 20:21:11 +08:00
|
|
|
|
|
|
|
w = MCBSP_ST_READ(mcbsp, SSELCR);
|
|
|
|
MCBSP_ST_WRITE(mcbsp, SSELCR, w & ~(ST_SIDETONEEN));
|
|
|
|
|
|
|
|
w = MCBSP_READ(mcbsp, SSELCR);
|
|
|
|
MCBSP_WRITE(mcbsp, SSELCR, w & ~(SIDETONEEN));
|
|
|
|
|
2010-12-22 12:05:14 +08:00
|
|
|
w = omap2_cm_read_mod_reg(OMAP3430_PER_MOD, CM_AUTOIDLE);
|
2010-02-22 20:21:11 +08:00
|
|
|
w |= 1 << (mcbsp->id - 2);
|
2010-12-22 12:05:14 +08:00
|
|
|
omap2_cm_write_mod_reg(w, OMAP3430_PER_MOD, CM_AUTOIDLE);
|
2010-02-22 20:21:11 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
static void omap_st_fir_write(struct omap_mcbsp *mcbsp, s16 *fir)
|
|
|
|
{
|
|
|
|
u16 val, i;
|
2011-02-24 17:46:53 +08:00
|
|
|
struct omap_device *od;
|
2010-02-22 20:21:11 +08:00
|
|
|
|
2011-02-24 17:46:53 +08:00
|
|
|
od = find_omap_device_by_dev(mcbsp->dev);
|
2010-02-22 20:21:11 +08:00
|
|
|
|
|
|
|
val = MCBSP_ST_READ(mcbsp, SSELCR);
|
|
|
|
|
|
|
|
if (val & ST_COEFFWREN)
|
|
|
|
MCBSP_ST_WRITE(mcbsp, SSELCR, val & ~(ST_COEFFWREN));
|
|
|
|
|
|
|
|
MCBSP_ST_WRITE(mcbsp, SSELCR, val | ST_COEFFWREN);
|
|
|
|
|
|
|
|
for (i = 0; i < 128; i++)
|
|
|
|
MCBSP_ST_WRITE(mcbsp, SFIRCR, fir[i]);
|
|
|
|
|
|
|
|
i = 0;
|
|
|
|
|
|
|
|
val = MCBSP_ST_READ(mcbsp, SSELCR);
|
|
|
|
while (!(val & ST_COEFFWRDONE) && (++i < 1000))
|
|
|
|
val = MCBSP_ST_READ(mcbsp, SSELCR);
|
|
|
|
|
|
|
|
MCBSP_ST_WRITE(mcbsp, SSELCR, val & ~(ST_COEFFWREN));
|
|
|
|
|
|
|
|
if (i == 1000)
|
|
|
|
dev_err(mcbsp->dev, "McBSP FIR load error!\n");
|
|
|
|
}
|
|
|
|
|
|
|
|
static void omap_st_chgain(struct omap_mcbsp *mcbsp)
|
|
|
|
{
|
|
|
|
u16 w;
|
|
|
|
struct omap_mcbsp_st_data *st_data = mcbsp->st_data;
|
2011-02-24 17:46:53 +08:00
|
|
|
struct omap_device *od;
|
2010-02-22 20:21:11 +08:00
|
|
|
|
2011-02-24 17:46:53 +08:00
|
|
|
od = find_omap_device_by_dev(mcbsp->dev);
|
2010-02-22 20:21:11 +08:00
|
|
|
|
|
|
|
w = MCBSP_ST_READ(mcbsp, SSELCR);
|
|
|
|
|
|
|
|
MCBSP_ST_WRITE(mcbsp, SGAINCR, ST_CH0GAIN(st_data->ch0gain) | \
|
|
|
|
ST_CH1GAIN(st_data->ch1gain));
|
|
|
|
}
|
|
|
|
|
|
|
|
int omap_st_set_chgain(unsigned int id, int channel, s16 chgain)
|
|
|
|
{
|
|
|
|
struct omap_mcbsp *mcbsp;
|
|
|
|
struct omap_mcbsp_st_data *st_data;
|
|
|
|
int ret = 0;
|
|
|
|
|
|
|
|
if (!omap_mcbsp_check_valid_id(id)) {
|
|
|
|
printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
|
|
|
|
return -ENODEV;
|
|
|
|
}
|
|
|
|
|
|
|
|
mcbsp = id_to_mcbsp_ptr(id);
|
|
|
|
st_data = mcbsp->st_data;
|
|
|
|
|
|
|
|
if (!st_data)
|
|
|
|
return -ENOENT;
|
|
|
|
|
|
|
|
spin_lock_irq(&mcbsp->lock);
|
|
|
|
if (channel == 0)
|
|
|
|
st_data->ch0gain = chgain;
|
|
|
|
else if (channel == 1)
|
|
|
|
st_data->ch1gain = chgain;
|
|
|
|
else
|
|
|
|
ret = -EINVAL;
|
|
|
|
|
|
|
|
if (st_data->enabled)
|
|
|
|
omap_st_chgain(mcbsp);
|
|
|
|
spin_unlock_irq(&mcbsp->lock);
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(omap_st_set_chgain);
|
|
|
|
|
|
|
|
int omap_st_get_chgain(unsigned int id, int channel, s16 *chgain)
|
|
|
|
{
|
|
|
|
struct omap_mcbsp *mcbsp;
|
|
|
|
struct omap_mcbsp_st_data *st_data;
|
|
|
|
int ret = 0;
|
|
|
|
|
|
|
|
if (!omap_mcbsp_check_valid_id(id)) {
|
|
|
|
printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
|
|
|
|
return -ENODEV;
|
|
|
|
}
|
|
|
|
|
|
|
|
mcbsp = id_to_mcbsp_ptr(id);
|
|
|
|
st_data = mcbsp->st_data;
|
|
|
|
|
|
|
|
if (!st_data)
|
|
|
|
return -ENOENT;
|
|
|
|
|
|
|
|
spin_lock_irq(&mcbsp->lock);
|
|
|
|
if (channel == 0)
|
|
|
|
*chgain = st_data->ch0gain;
|
|
|
|
else if (channel == 1)
|
|
|
|
*chgain = st_data->ch1gain;
|
|
|
|
else
|
|
|
|
ret = -EINVAL;
|
|
|
|
spin_unlock_irq(&mcbsp->lock);
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(omap_st_get_chgain);
|
|
|
|
|
|
|
|
static int omap_st_start(struct omap_mcbsp *mcbsp)
|
|
|
|
{
|
|
|
|
struct omap_mcbsp_st_data *st_data = mcbsp->st_data;
|
|
|
|
|
|
|
|
if (st_data && st_data->enabled && !st_data->running) {
|
|
|
|
omap_st_fir_write(mcbsp, st_data->taps);
|
|
|
|
omap_st_chgain(mcbsp);
|
|
|
|
|
|
|
|
if (!mcbsp->free) {
|
|
|
|
omap_st_on(mcbsp);
|
|
|
|
st_data->running = 1;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
int omap_st_enable(unsigned int id)
|
|
|
|
{
|
|
|
|
struct omap_mcbsp *mcbsp;
|
|
|
|
struct omap_mcbsp_st_data *st_data;
|
|
|
|
|
|
|
|
if (!omap_mcbsp_check_valid_id(id)) {
|
|
|
|
printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
|
|
|
|
return -ENODEV;
|
|
|
|
}
|
|
|
|
|
|
|
|
mcbsp = id_to_mcbsp_ptr(id);
|
|
|
|
st_data = mcbsp->st_data;
|
|
|
|
|
|
|
|
if (!st_data)
|
|
|
|
return -ENODEV;
|
|
|
|
|
|
|
|
spin_lock_irq(&mcbsp->lock);
|
|
|
|
st_data->enabled = 1;
|
|
|
|
omap_st_start(mcbsp);
|
|
|
|
spin_unlock_irq(&mcbsp->lock);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(omap_st_enable);
|
|
|
|
|
|
|
|
static int omap_st_stop(struct omap_mcbsp *mcbsp)
|
|
|
|
{
|
|
|
|
struct omap_mcbsp_st_data *st_data = mcbsp->st_data;
|
|
|
|
|
|
|
|
if (st_data && st_data->running) {
|
|
|
|
if (!mcbsp->free) {
|
|
|
|
omap_st_off(mcbsp);
|
|
|
|
st_data->running = 0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
int omap_st_disable(unsigned int id)
|
|
|
|
{
|
|
|
|
struct omap_mcbsp *mcbsp;
|
|
|
|
struct omap_mcbsp_st_data *st_data;
|
|
|
|
int ret = 0;
|
|
|
|
|
|
|
|
if (!omap_mcbsp_check_valid_id(id)) {
|
|
|
|
printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
|
|
|
|
return -ENODEV;
|
|
|
|
}
|
|
|
|
|
|
|
|
mcbsp = id_to_mcbsp_ptr(id);
|
|
|
|
st_data = mcbsp->st_data;
|
|
|
|
|
|
|
|
if (!st_data)
|
|
|
|
return -ENODEV;
|
|
|
|
|
|
|
|
spin_lock_irq(&mcbsp->lock);
|
|
|
|
omap_st_stop(mcbsp);
|
|
|
|
st_data->enabled = 0;
|
|
|
|
spin_unlock_irq(&mcbsp->lock);
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(omap_st_disable);
|
|
|
|
|
|
|
|
int omap_st_is_enabled(unsigned int id)
|
|
|
|
{
|
|
|
|
struct omap_mcbsp *mcbsp;
|
|
|
|
struct omap_mcbsp_st_data *st_data;
|
|
|
|
|
|
|
|
if (!omap_mcbsp_check_valid_id(id)) {
|
|
|
|
printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
|
|
|
|
return -ENODEV;
|
|
|
|
}
|
|
|
|
|
|
|
|
mcbsp = id_to_mcbsp_ptr(id);
|
|
|
|
st_data = mcbsp->st_data;
|
|
|
|
|
|
|
|
if (!st_data)
|
|
|
|
return -ENODEV;
|
|
|
|
|
|
|
|
|
|
|
|
return st_data->enabled;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(omap_st_is_enabled);
|
|
|
|
|
2009-08-20 21:18:10 +08:00
|
|
|
/*
|
2010-06-03 12:39:33 +08:00
|
|
|
* omap_mcbsp_set_rx_threshold configures the transmit threshold in words.
|
|
|
|
* The threshold parameter is 1 based, and it is converted (threshold - 1)
|
|
|
|
* for the THRSH2 register.
|
2009-08-20 21:18:10 +08:00
|
|
|
*/
|
|
|
|
void omap_mcbsp_set_tx_threshold(unsigned int id, u16 threshold)
|
|
|
|
{
|
|
|
|
struct omap_mcbsp *mcbsp;
|
|
|
|
|
2010-05-13 01:18:40 +08:00
|
|
|
if (!cpu_is_omap34xx() && !cpu_is_omap44xx())
|
2009-08-20 21:18:10 +08:00
|
|
|
return;
|
|
|
|
|
|
|
|
if (!omap_mcbsp_check_valid_id(id)) {
|
|
|
|
printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
mcbsp = id_to_mcbsp_ptr(id);
|
|
|
|
|
2010-06-03 12:39:33 +08:00
|
|
|
if (threshold && threshold <= mcbsp->max_tx_thres)
|
|
|
|
MCBSP_WRITE(mcbsp, THRSH2, threshold - 1);
|
2009-08-20 21:18:10 +08:00
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(omap_mcbsp_set_tx_threshold);
|
|
|
|
|
|
|
|
/*
|
2010-06-03 12:39:33 +08:00
|
|
|
* omap_mcbsp_set_rx_threshold configures the receive threshold in words.
|
|
|
|
* The threshold parameter is 1 based, and it is converted (threshold - 1)
|
|
|
|
* for the THRSH1 register.
|
2009-08-20 21:18:10 +08:00
|
|
|
*/
|
|
|
|
void omap_mcbsp_set_rx_threshold(unsigned int id, u16 threshold)
|
|
|
|
{
|
|
|
|
struct omap_mcbsp *mcbsp;
|
|
|
|
|
2010-05-13 01:18:40 +08:00
|
|
|
if (!cpu_is_omap34xx() && !cpu_is_omap44xx())
|
2009-08-20 21:18:10 +08:00
|
|
|
return;
|
|
|
|
|
|
|
|
if (!omap_mcbsp_check_valid_id(id)) {
|
|
|
|
printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
mcbsp = id_to_mcbsp_ptr(id);
|
|
|
|
|
2010-06-03 12:39:33 +08:00
|
|
|
if (threshold && threshold <= mcbsp->max_rx_thres)
|
|
|
|
MCBSP_WRITE(mcbsp, THRSH1, threshold - 1);
|
2009-08-20 21:18:10 +08:00
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(omap_mcbsp_set_rx_threshold);
|
2009-08-20 21:18:11 +08:00
|
|
|
|
|
|
|
/*
|
|
|
|
* omap_mcbsp_get_max_tx_thres just return the current configured
|
|
|
|
* maximum threshold for transmission
|
|
|
|
*/
|
|
|
|
u16 omap_mcbsp_get_max_tx_threshold(unsigned int id)
|
|
|
|
{
|
|
|
|
struct omap_mcbsp *mcbsp;
|
|
|
|
|
|
|
|
if (!omap_mcbsp_check_valid_id(id)) {
|
|
|
|
printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
|
|
|
|
return -ENODEV;
|
|
|
|
}
|
|
|
|
mcbsp = id_to_mcbsp_ptr(id);
|
|
|
|
|
|
|
|
return mcbsp->max_tx_thres;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(omap_mcbsp_get_max_tx_threshold);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* omap_mcbsp_get_max_rx_thres just return the current configured
|
|
|
|
* maximum threshold for reception
|
|
|
|
*/
|
|
|
|
u16 omap_mcbsp_get_max_rx_threshold(unsigned int id)
|
|
|
|
{
|
|
|
|
struct omap_mcbsp *mcbsp;
|
|
|
|
|
|
|
|
if (!omap_mcbsp_check_valid_id(id)) {
|
|
|
|
printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
|
|
|
|
return -ENODEV;
|
|
|
|
}
|
|
|
|
mcbsp = id_to_mcbsp_ptr(id);
|
|
|
|
|
|
|
|
return mcbsp->max_rx_thres;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(omap_mcbsp_get_max_rx_threshold);
|
2009-08-20 21:18:14 +08:00
|
|
|
|
2010-06-03 12:39:32 +08:00
|
|
|
u16 omap_mcbsp_get_fifo_size(unsigned int id)
|
|
|
|
{
|
|
|
|
struct omap_mcbsp *mcbsp;
|
|
|
|
|
|
|
|
if (!omap_mcbsp_check_valid_id(id)) {
|
|
|
|
printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
|
|
|
|
return -ENODEV;
|
|
|
|
}
|
|
|
|
mcbsp = id_to_mcbsp_ptr(id);
|
|
|
|
|
|
|
|
return mcbsp->pdata->buffer_size;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(omap_mcbsp_get_fifo_size);
|
|
|
|
|
2010-03-03 21:08:08 +08:00
|
|
|
/*
|
|
|
|
* omap_mcbsp_get_tx_delay returns the number of used slots in the McBSP FIFO
|
|
|
|
*/
|
|
|
|
u16 omap_mcbsp_get_tx_delay(unsigned int id)
|
|
|
|
{
|
|
|
|
struct omap_mcbsp *mcbsp;
|
|
|
|
u16 buffstat;
|
|
|
|
|
|
|
|
if (!omap_mcbsp_check_valid_id(id)) {
|
|
|
|
printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
|
|
|
|
return -ENODEV;
|
|
|
|
}
|
|
|
|
mcbsp = id_to_mcbsp_ptr(id);
|
|
|
|
|
|
|
|
/* Returns the number of free locations in the buffer */
|
|
|
|
buffstat = MCBSP_READ(mcbsp, XBUFFSTAT);
|
|
|
|
|
|
|
|
/* Number of slots are different in McBSP ports */
|
2010-06-03 12:39:34 +08:00
|
|
|
return mcbsp->pdata->buffer_size - buffstat;
|
2010-03-03 21:08:08 +08:00
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(omap_mcbsp_get_tx_delay);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* omap_mcbsp_get_rx_delay returns the number of free slots in the McBSP FIFO
|
|
|
|
* to reach the threshold value (when the DMA will be triggered to read it)
|
|
|
|
*/
|
|
|
|
u16 omap_mcbsp_get_rx_delay(unsigned int id)
|
|
|
|
{
|
|
|
|
struct omap_mcbsp *mcbsp;
|
|
|
|
u16 buffstat, threshold;
|
|
|
|
|
|
|
|
if (!omap_mcbsp_check_valid_id(id)) {
|
|
|
|
printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
|
|
|
|
return -ENODEV;
|
|
|
|
}
|
|
|
|
mcbsp = id_to_mcbsp_ptr(id);
|
|
|
|
|
|
|
|
/* Returns the number of used locations in the buffer */
|
|
|
|
buffstat = MCBSP_READ(mcbsp, RBUFFSTAT);
|
|
|
|
/* RX threshold */
|
|
|
|
threshold = MCBSP_READ(mcbsp, THRSH1);
|
|
|
|
|
|
|
|
/* Return the number of location till we reach the threshold limit */
|
|
|
|
if (threshold <= buffstat)
|
|
|
|
return 0;
|
|
|
|
else
|
|
|
|
return threshold - buffstat;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(omap_mcbsp_get_rx_delay);
|
|
|
|
|
2009-08-20 21:18:14 +08:00
|
|
|
/*
|
|
|
|
* omap_mcbsp_get_dma_op_mode just return the current configured
|
|
|
|
* operating mode for the mcbsp channel
|
|
|
|
*/
|
|
|
|
int omap_mcbsp_get_dma_op_mode(unsigned int id)
|
|
|
|
{
|
|
|
|
struct omap_mcbsp *mcbsp;
|
|
|
|
int dma_op_mode;
|
|
|
|
|
|
|
|
if (!omap_mcbsp_check_valid_id(id)) {
|
|
|
|
printk(KERN_ERR "%s: Invalid id (%u)\n", __func__, id + 1);
|
|
|
|
return -ENODEV;
|
|
|
|
}
|
|
|
|
mcbsp = id_to_mcbsp_ptr(id);
|
|
|
|
|
|
|
|
dma_op_mode = mcbsp->dma_op_mode;
|
|
|
|
|
|
|
|
return dma_op_mode;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(omap_mcbsp_get_dma_op_mode);
|
2009-08-20 21:18:15 +08:00
|
|
|
|
|
|
|
static inline void omap34xx_mcbsp_request(struct omap_mcbsp *mcbsp)
|
|
|
|
{
|
2011-02-24 17:46:53 +08:00
|
|
|
struct omap_device *od;
|
|
|
|
|
|
|
|
od = find_omap_device_by_dev(mcbsp->dev);
|
2009-08-20 21:18:15 +08:00
|
|
|
/*
|
|
|
|
* Enable wakup behavior, smart idle and all wakeups
|
|
|
|
* REVISIT: some wakeups may be unnecessary
|
|
|
|
*/
|
2010-05-13 01:18:40 +08:00
|
|
|
if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
|
2011-02-24 17:46:53 +08:00
|
|
|
MCBSP_WRITE(mcbsp, WAKEUPEN, XRDYEN | RRDYEN);
|
2009-08-20 21:18:15 +08:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void omap34xx_mcbsp_free(struct omap_mcbsp *mcbsp)
|
|
|
|
{
|
2011-02-24 17:46:53 +08:00
|
|
|
struct omap_device *od;
|
|
|
|
|
|
|
|
od = find_omap_device_by_dev(mcbsp->dev);
|
|
|
|
|
2009-08-20 21:18:15 +08:00
|
|
|
/*
|
|
|
|
* Disable wakup behavior, smart idle and all wakeups
|
|
|
|
*/
|
2010-05-13 01:18:40 +08:00
|
|
|
if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
|
2009-08-20 21:18:20 +08:00
|
|
|
/*
|
|
|
|
* HW bug workaround - If no_idle mode is taken, we need to
|
|
|
|
* go to smart_idle before going to always_idle, or the
|
|
|
|
* device will not hit retention anymore.
|
|
|
|
*/
|
2009-08-20 21:18:15 +08:00
|
|
|
|
2010-02-16 02:03:32 +08:00
|
|
|
MCBSP_WRITE(mcbsp, WAKEUPEN, 0);
|
2009-08-20 21:18:15 +08:00
|
|
|
}
|
|
|
|
}
|
|
|
|
#else
|
|
|
|
static inline void omap34xx_mcbsp_request(struct omap_mcbsp *mcbsp) {}
|
|
|
|
static inline void omap34xx_mcbsp_free(struct omap_mcbsp *mcbsp) {}
|
2010-02-22 20:21:11 +08:00
|
|
|
static inline void omap_st_start(struct omap_mcbsp *mcbsp) {}
|
|
|
|
static inline void omap_st_stop(struct omap_mcbsp *mcbsp) {}
|
2009-08-20 21:18:10 +08:00
|
|
|
#endif
|
|
|
|
|
2005-07-11 02:58:15 +08:00
|
|
|
int omap_mcbsp_request(unsigned int id)
|
|
|
|
{
|
2008-10-08 15:01:39 +08:00
|
|
|
struct omap_mcbsp *mcbsp;
|
2010-02-16 02:03:33 +08:00
|
|
|
void *reg_cache;
|
2005-07-11 02:58:15 +08:00
|
|
|
int err;
|
|
|
|
|
2008-07-03 17:24:39 +08:00
|
|
|
if (!omap_mcbsp_check_valid_id(id)) {
|
|
|
|
printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
|
|
|
|
return -ENODEV;
|
2006-04-03 00:46:27 +08:00
|
|
|
}
|
2008-10-08 15:01:39 +08:00
|
|
|
mcbsp = id_to_mcbsp_ptr(id);
|
2008-07-03 17:24:39 +08:00
|
|
|
|
2010-02-16 02:03:33 +08:00
|
|
|
reg_cache = kzalloc(omap_mcbsp_cache_size, GFP_KERNEL);
|
|
|
|
if (!reg_cache) {
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
|
2008-10-08 15:01:39 +08:00
|
|
|
spin_lock(&mcbsp->lock);
|
|
|
|
if (!mcbsp->free) {
|
|
|
|
dev_err(mcbsp->dev, "McBSP%d is currently in use\n",
|
|
|
|
mcbsp->id);
|
2010-02-16 02:03:33 +08:00
|
|
|
err = -EBUSY;
|
|
|
|
goto err_kfree;
|
2005-07-11 02:58:15 +08:00
|
|
|
}
|
|
|
|
|
2010-12-08 08:25:41 +08:00
|
|
|
mcbsp->free = false;
|
2010-02-16 02:03:33 +08:00
|
|
|
mcbsp->reg_cache = reg_cache;
|
2008-10-08 15:01:39 +08:00
|
|
|
spin_unlock(&mcbsp->lock);
|
2005-07-11 02:58:15 +08:00
|
|
|
|
2009-01-23 18:26:46 +08:00
|
|
|
if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->request)
|
|
|
|
mcbsp->pdata->ops->request(id);
|
|
|
|
|
2011-02-24 17:46:54 +08:00
|
|
|
pm_runtime_get_sync(mcbsp->dev);
|
2009-01-23 18:26:46 +08:00
|
|
|
|
2009-08-20 21:18:15 +08:00
|
|
|
/* Do procedure specific to omap34xx arch, if applicable */
|
|
|
|
omap34xx_mcbsp_request(mcbsp);
|
|
|
|
|
2008-10-08 15:01:41 +08:00
|
|
|
/*
|
|
|
|
* Make sure that transmitter, receiver and sample-rate generator are
|
|
|
|
* not running before activating IRQs.
|
|
|
|
*/
|
2010-02-16 02:03:32 +08:00
|
|
|
MCBSP_WRITE(mcbsp, SPCR1, 0);
|
|
|
|
MCBSP_WRITE(mcbsp, SPCR2, 0);
|
2008-10-08 15:01:41 +08:00
|
|
|
|
2011-06-14 19:23:52 +08:00
|
|
|
err = request_irq(mcbsp->tx_irq, omap_mcbsp_tx_irq_handler,
|
|
|
|
0, "McBSP", (void *)mcbsp);
|
|
|
|
if (err != 0) {
|
|
|
|
dev_err(mcbsp->dev, "Unable to request TX IRQ %d "
|
|
|
|
"for McBSP%d\n", mcbsp->tx_irq,
|
|
|
|
mcbsp->id);
|
|
|
|
goto err_clk_disable;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (mcbsp->rx_irq) {
|
|
|
|
err = request_irq(mcbsp->rx_irq,
|
|
|
|
omap_mcbsp_rx_irq_handler,
|
|
|
|
0, "McBSP", (void *)mcbsp);
|
2006-04-03 00:46:27 +08:00
|
|
|
if (err != 0) {
|
2011-06-14 19:23:52 +08:00
|
|
|
dev_err(mcbsp->dev, "Unable to request RX IRQ %d "
|
|
|
|
"for McBSP%d\n", mcbsp->rx_irq,
|
2008-10-08 15:01:39 +08:00
|
|
|
mcbsp->id);
|
2011-06-14 19:23:52 +08:00
|
|
|
goto err_free_irq;
|
2006-04-03 00:46:27 +08:00
|
|
|
}
|
2005-07-11 02:58:15 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
2010-02-16 02:03:33 +08:00
|
|
|
err_free_irq:
|
2010-01-09 02:29:04 +08:00
|
|
|
free_irq(mcbsp->tx_irq, (void *)mcbsp);
|
2010-02-16 02:03:33 +08:00
|
|
|
err_clk_disable:
|
2010-01-09 02:29:04 +08:00
|
|
|
if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->free)
|
2010-02-16 02:03:33 +08:00
|
|
|
mcbsp->pdata->ops->free(id);
|
2010-01-09 02:29:04 +08:00
|
|
|
|
|
|
|
/* Do procedure specific to omap34xx arch, if applicable */
|
|
|
|
omap34xx_mcbsp_free(mcbsp);
|
|
|
|
|
2011-02-24 17:46:54 +08:00
|
|
|
pm_runtime_put_sync(mcbsp->dev);
|
2010-01-09 02:29:04 +08:00
|
|
|
|
2010-02-16 02:03:33 +08:00
|
|
|
spin_lock(&mcbsp->lock);
|
2010-12-08 08:25:41 +08:00
|
|
|
mcbsp->free = true;
|
2010-02-16 02:03:33 +08:00
|
|
|
mcbsp->reg_cache = NULL;
|
|
|
|
err_kfree:
|
|
|
|
spin_unlock(&mcbsp->lock);
|
|
|
|
kfree(reg_cache);
|
2010-01-09 02:29:04 +08:00
|
|
|
|
|
|
|
return err;
|
2005-07-11 02:58:15 +08:00
|
|
|
}
|
2008-07-03 17:24:39 +08:00
|
|
|
EXPORT_SYMBOL(omap_mcbsp_request);
|
2005-07-11 02:58:15 +08:00
|
|
|
|
|
|
|
void omap_mcbsp_free(unsigned int id)
|
|
|
|
{
|
2008-10-08 15:01:39 +08:00
|
|
|
struct omap_mcbsp *mcbsp;
|
2010-02-16 02:03:33 +08:00
|
|
|
void *reg_cache;
|
2008-10-08 15:01:39 +08:00
|
|
|
|
2008-07-03 17:24:39 +08:00
|
|
|
if (!omap_mcbsp_check_valid_id(id)) {
|
|
|
|
printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
|
2005-07-11 02:58:15 +08:00
|
|
|
return;
|
2006-04-03 00:46:27 +08:00
|
|
|
}
|
2008-10-08 15:01:39 +08:00
|
|
|
mcbsp = id_to_mcbsp_ptr(id);
|
2008-07-03 17:24:39 +08:00
|
|
|
|
2008-10-08 15:01:39 +08:00
|
|
|
if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->free)
|
|
|
|
mcbsp->pdata->ops->free(id);
|
2008-07-03 17:24:39 +08:00
|
|
|
|
2009-08-20 21:18:15 +08:00
|
|
|
/* Do procedure specific to omap34xx arch, if applicable */
|
|
|
|
omap34xx_mcbsp_free(mcbsp);
|
|
|
|
|
2011-02-24 17:46:54 +08:00
|
|
|
pm_runtime_put_sync(mcbsp->dev);
|
2009-01-23 18:26:46 +08:00
|
|
|
|
2011-06-14 19:23:52 +08:00
|
|
|
if (mcbsp->rx_irq)
|
|
|
|
free_irq(mcbsp->rx_irq, (void *)mcbsp);
|
|
|
|
free_irq(mcbsp->tx_irq, (void *)mcbsp);
|
2005-07-11 02:58:15 +08:00
|
|
|
|
2010-02-16 02:03:33 +08:00
|
|
|
reg_cache = mcbsp->reg_cache;
|
2005-07-11 02:58:15 +08:00
|
|
|
|
2010-02-16 02:03:33 +08:00
|
|
|
spin_lock(&mcbsp->lock);
|
|
|
|
if (mcbsp->free)
|
|
|
|
dev_err(mcbsp->dev, "McBSP%d was not reserved\n", mcbsp->id);
|
|
|
|
else
|
2010-12-08 08:25:41 +08:00
|
|
|
mcbsp->free = true;
|
2010-02-16 02:03:33 +08:00
|
|
|
mcbsp->reg_cache = NULL;
|
2008-10-08 15:01:39 +08:00
|
|
|
spin_unlock(&mcbsp->lock);
|
2010-02-16 02:03:33 +08:00
|
|
|
|
|
|
|
if (reg_cache)
|
|
|
|
kfree(reg_cache);
|
2005-07-11 02:58:15 +08:00
|
|
|
}
|
2008-07-03 17:24:39 +08:00
|
|
|
EXPORT_SYMBOL(omap_mcbsp_free);
|
2005-07-11 02:58:15 +08:00
|
|
|
|
|
|
|
/*
|
2009-08-07 14:59:47 +08:00
|
|
|
* Here we start the McBSP, by enabling transmitter, receiver or both.
|
|
|
|
* If no transmitter or receiver is active prior calling, then sample-rate
|
|
|
|
* generator and frame sync are started.
|
2005-07-11 02:58:15 +08:00
|
|
|
*/
|
2009-08-07 14:59:47 +08:00
|
|
|
void omap_mcbsp_start(unsigned int id, int tx, int rx)
|
2005-07-11 02:58:15 +08:00
|
|
|
{
|
2008-10-08 15:01:39 +08:00
|
|
|
struct omap_mcbsp *mcbsp;
|
2010-08-31 16:11:44 +08:00
|
|
|
int enable_srg = 0;
|
2005-07-11 02:58:15 +08:00
|
|
|
u16 w;
|
|
|
|
|
2008-07-03 17:24:39 +08:00
|
|
|
if (!omap_mcbsp_check_valid_id(id)) {
|
|
|
|
printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
|
2005-07-11 02:58:15 +08:00
|
|
|
return;
|
2008-07-03 17:24:39 +08:00
|
|
|
}
|
2008-10-08 15:01:39 +08:00
|
|
|
mcbsp = id_to_mcbsp_ptr(id);
|
2005-07-11 02:58:15 +08:00
|
|
|
|
2010-02-22 20:21:11 +08:00
|
|
|
if (cpu_is_omap34xx())
|
|
|
|
omap_st_start(mcbsp);
|
|
|
|
|
2010-08-31 16:11:44 +08:00
|
|
|
/* Only enable SRG, if McBSP is master */
|
|
|
|
w = MCBSP_READ_CACHE(mcbsp, PCR0);
|
|
|
|
if (w & (FSXM | FSRM | CLKXM | CLKRM))
|
|
|
|
enable_srg = !((MCBSP_READ_CACHE(mcbsp, SPCR2) |
|
|
|
|
MCBSP_READ_CACHE(mcbsp, SPCR1)) & 1);
|
2009-08-07 14:59:47 +08:00
|
|
|
|
2010-08-31 16:11:44 +08:00
|
|
|
if (enable_srg) {
|
2009-08-07 14:59:47 +08:00
|
|
|
/* Start the sample generator */
|
omap: McBSP: Use cache when modifying individual register bits
Change the way McBSP registers are updated: use cached values instead of
relying upon those read back from the device.
With this patch, I have finally managed to get rid of all random
playback/recording hangups on my OMAP1510 based Amstrad Delta hardware. Before
that, values read back from McBSP registers to be used for updating them
happened to be errornous.
From the hardware side, the issue appeared to be caused by a relatively high
power requirements of an external USB adapter connected to the board's printer
dedicated USB port.
I think there is one important point that makes this patch worth of applying,
apart from my hardware quality. With the current code, if it ever happens to
any machine, no matter if OMAP1510 or newer, to read incorrect value from a
McBSP register, this wrong value will get written back without any checking.
That can lead to hardware damage if, for example, an input pin is turned into
output as a result.
Applies on top of patch 3 from this series:
[PATCH v9 3/4] OMAP: McBSP: Introduce caching in register write operations
Tested on OMAP1510 based Amstrad Delta using linux-omap for-next, commit
fb7380d70e041e4b3892f6b19dff7efb609d15a4 (2.6.33-rc3+ dated 2010-01-11).
Compile-tested with omap_3430sdp_defconfig.
Signed-off-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>
Acked-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Acked-by: Jarkko Nikula <jhnikula@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-02-16 02:03:33 +08:00
|
|
|
w = MCBSP_READ_CACHE(mcbsp, SPCR2);
|
2010-02-16 02:03:32 +08:00
|
|
|
MCBSP_WRITE(mcbsp, SPCR2, w | (1 << 6));
|
2009-08-07 14:59:47 +08:00
|
|
|
}
|
2005-07-11 02:58:15 +08:00
|
|
|
|
|
|
|
/* Enable transmitter and receiver */
|
2009-08-23 17:24:27 +08:00
|
|
|
tx &= 1;
|
omap: McBSP: Use cache when modifying individual register bits
Change the way McBSP registers are updated: use cached values instead of
relying upon those read back from the device.
With this patch, I have finally managed to get rid of all random
playback/recording hangups on my OMAP1510 based Amstrad Delta hardware. Before
that, values read back from McBSP registers to be used for updating them
happened to be errornous.
From the hardware side, the issue appeared to be caused by a relatively high
power requirements of an external USB adapter connected to the board's printer
dedicated USB port.
I think there is one important point that makes this patch worth of applying,
apart from my hardware quality. With the current code, if it ever happens to
any machine, no matter if OMAP1510 or newer, to read incorrect value from a
McBSP register, this wrong value will get written back without any checking.
That can lead to hardware damage if, for example, an input pin is turned into
output as a result.
Applies on top of patch 3 from this series:
[PATCH v9 3/4] OMAP: McBSP: Introduce caching in register write operations
Tested on OMAP1510 based Amstrad Delta using linux-omap for-next, commit
fb7380d70e041e4b3892f6b19dff7efb609d15a4 (2.6.33-rc3+ dated 2010-01-11).
Compile-tested with omap_3430sdp_defconfig.
Signed-off-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>
Acked-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Acked-by: Jarkko Nikula <jhnikula@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-02-16 02:03:33 +08:00
|
|
|
w = MCBSP_READ_CACHE(mcbsp, SPCR2);
|
2010-02-16 02:03:32 +08:00
|
|
|
MCBSP_WRITE(mcbsp, SPCR2, w | tx);
|
2005-07-11 02:58:15 +08:00
|
|
|
|
2009-08-23 17:24:27 +08:00
|
|
|
rx &= 1;
|
omap: McBSP: Use cache when modifying individual register bits
Change the way McBSP registers are updated: use cached values instead of
relying upon those read back from the device.
With this patch, I have finally managed to get rid of all random
playback/recording hangups on my OMAP1510 based Amstrad Delta hardware. Before
that, values read back from McBSP registers to be used for updating them
happened to be errornous.
From the hardware side, the issue appeared to be caused by a relatively high
power requirements of an external USB adapter connected to the board's printer
dedicated USB port.
I think there is one important point that makes this patch worth of applying,
apart from my hardware quality. With the current code, if it ever happens to
any machine, no matter if OMAP1510 or newer, to read incorrect value from a
McBSP register, this wrong value will get written back without any checking.
That can lead to hardware damage if, for example, an input pin is turned into
output as a result.
Applies on top of patch 3 from this series:
[PATCH v9 3/4] OMAP: McBSP: Introduce caching in register write operations
Tested on OMAP1510 based Amstrad Delta using linux-omap for-next, commit
fb7380d70e041e4b3892f6b19dff7efb609d15a4 (2.6.33-rc3+ dated 2010-01-11).
Compile-tested with omap_3430sdp_defconfig.
Signed-off-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>
Acked-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Acked-by: Jarkko Nikula <jhnikula@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-02-16 02:03:33 +08:00
|
|
|
w = MCBSP_READ_CACHE(mcbsp, SPCR1);
|
2010-02-16 02:03:32 +08:00
|
|
|
MCBSP_WRITE(mcbsp, SPCR1, w | rx);
|
2005-07-11 02:58:15 +08:00
|
|
|
|
2009-08-20 21:18:09 +08:00
|
|
|
/*
|
|
|
|
* Worst case: CLKSRG*2 = 8000khz: (1/8000) * 2 * 2 usec
|
|
|
|
* REVISIT: 100us may give enough time for two CLKSRG, however
|
|
|
|
* due to some unknown PM related, clock gating etc. reason it
|
|
|
|
* is now at 500us.
|
|
|
|
*/
|
|
|
|
udelay(500);
|
2005-07-11 02:58:15 +08:00
|
|
|
|
2010-08-31 16:11:44 +08:00
|
|
|
if (enable_srg) {
|
2009-08-07 14:59:47 +08:00
|
|
|
/* Start frame sync */
|
omap: McBSP: Use cache when modifying individual register bits
Change the way McBSP registers are updated: use cached values instead of
relying upon those read back from the device.
With this patch, I have finally managed to get rid of all random
playback/recording hangups on my OMAP1510 based Amstrad Delta hardware. Before
that, values read back from McBSP registers to be used for updating them
happened to be errornous.
From the hardware side, the issue appeared to be caused by a relatively high
power requirements of an external USB adapter connected to the board's printer
dedicated USB port.
I think there is one important point that makes this patch worth of applying,
apart from my hardware quality. With the current code, if it ever happens to
any machine, no matter if OMAP1510 or newer, to read incorrect value from a
McBSP register, this wrong value will get written back without any checking.
That can lead to hardware damage if, for example, an input pin is turned into
output as a result.
Applies on top of patch 3 from this series:
[PATCH v9 3/4] OMAP: McBSP: Introduce caching in register write operations
Tested on OMAP1510 based Amstrad Delta using linux-omap for-next, commit
fb7380d70e041e4b3892f6b19dff7efb609d15a4 (2.6.33-rc3+ dated 2010-01-11).
Compile-tested with omap_3430sdp_defconfig.
Signed-off-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>
Acked-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Acked-by: Jarkko Nikula <jhnikula@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-02-16 02:03:33 +08:00
|
|
|
w = MCBSP_READ_CACHE(mcbsp, SPCR2);
|
2010-02-16 02:03:32 +08:00
|
|
|
MCBSP_WRITE(mcbsp, SPCR2, w | (1 << 7));
|
2009-08-07 14:59:47 +08:00
|
|
|
}
|
2005-07-11 02:58:15 +08:00
|
|
|
|
2010-05-13 01:18:40 +08:00
|
|
|
if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
|
2009-08-23 17:24:27 +08:00
|
|
|
/* Release the transmitter and receiver */
|
omap: McBSP: Use cache when modifying individual register bits
Change the way McBSP registers are updated: use cached values instead of
relying upon those read back from the device.
With this patch, I have finally managed to get rid of all random
playback/recording hangups on my OMAP1510 based Amstrad Delta hardware. Before
that, values read back from McBSP registers to be used for updating them
happened to be errornous.
From the hardware side, the issue appeared to be caused by a relatively high
power requirements of an external USB adapter connected to the board's printer
dedicated USB port.
I think there is one important point that makes this patch worth of applying,
apart from my hardware quality. With the current code, if it ever happens to
any machine, no matter if OMAP1510 or newer, to read incorrect value from a
McBSP register, this wrong value will get written back without any checking.
That can lead to hardware damage if, for example, an input pin is turned into
output as a result.
Applies on top of patch 3 from this series:
[PATCH v9 3/4] OMAP: McBSP: Introduce caching in register write operations
Tested on OMAP1510 based Amstrad Delta using linux-omap for-next, commit
fb7380d70e041e4b3892f6b19dff7efb609d15a4 (2.6.33-rc3+ dated 2010-01-11).
Compile-tested with omap_3430sdp_defconfig.
Signed-off-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>
Acked-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Acked-by: Jarkko Nikula <jhnikula@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-02-16 02:03:33 +08:00
|
|
|
w = MCBSP_READ_CACHE(mcbsp, XCCR);
|
2009-08-23 17:24:27 +08:00
|
|
|
w &= ~(tx ? XDISABLE : 0);
|
2010-02-16 02:03:32 +08:00
|
|
|
MCBSP_WRITE(mcbsp, XCCR, w);
|
omap: McBSP: Use cache when modifying individual register bits
Change the way McBSP registers are updated: use cached values instead of
relying upon those read back from the device.
With this patch, I have finally managed to get rid of all random
playback/recording hangups on my OMAP1510 based Amstrad Delta hardware. Before
that, values read back from McBSP registers to be used for updating them
happened to be errornous.
From the hardware side, the issue appeared to be caused by a relatively high
power requirements of an external USB adapter connected to the board's printer
dedicated USB port.
I think there is one important point that makes this patch worth of applying,
apart from my hardware quality. With the current code, if it ever happens to
any machine, no matter if OMAP1510 or newer, to read incorrect value from a
McBSP register, this wrong value will get written back without any checking.
That can lead to hardware damage if, for example, an input pin is turned into
output as a result.
Applies on top of patch 3 from this series:
[PATCH v9 3/4] OMAP: McBSP: Introduce caching in register write operations
Tested on OMAP1510 based Amstrad Delta using linux-omap for-next, commit
fb7380d70e041e4b3892f6b19dff7efb609d15a4 (2.6.33-rc3+ dated 2010-01-11).
Compile-tested with omap_3430sdp_defconfig.
Signed-off-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>
Acked-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Acked-by: Jarkko Nikula <jhnikula@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-02-16 02:03:33 +08:00
|
|
|
w = MCBSP_READ_CACHE(mcbsp, RCCR);
|
2009-08-23 17:24:27 +08:00
|
|
|
w &= ~(rx ? RDISABLE : 0);
|
2010-02-16 02:03:32 +08:00
|
|
|
MCBSP_WRITE(mcbsp, RCCR, w);
|
2009-08-23 17:24:27 +08:00
|
|
|
}
|
|
|
|
|
2005-07-11 02:58:15 +08:00
|
|
|
/* Dump McBSP Regs */
|
|
|
|
omap_mcbsp_dump_reg(id);
|
|
|
|
}
|
2008-07-03 17:24:39 +08:00
|
|
|
EXPORT_SYMBOL(omap_mcbsp_start);
|
2005-07-11 02:58:15 +08:00
|
|
|
|
2009-08-07 14:59:47 +08:00
|
|
|
void omap_mcbsp_stop(unsigned int id, int tx, int rx)
|
2005-07-11 02:58:15 +08:00
|
|
|
{
|
2008-10-08 15:01:39 +08:00
|
|
|
struct omap_mcbsp *mcbsp;
|
2009-08-07 14:59:47 +08:00
|
|
|
int idle;
|
2005-07-11 02:58:15 +08:00
|
|
|
u16 w;
|
|
|
|
|
2008-07-03 17:24:39 +08:00
|
|
|
if (!omap_mcbsp_check_valid_id(id)) {
|
|
|
|
printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
|
2005-07-11 02:58:15 +08:00
|
|
|
return;
|
2008-07-03 17:24:39 +08:00
|
|
|
}
|
2005-07-11 02:58:15 +08:00
|
|
|
|
2008-10-08 15:01:39 +08:00
|
|
|
mcbsp = id_to_mcbsp_ptr(id);
|
2005-07-11 02:58:15 +08:00
|
|
|
|
2008-07-03 17:24:39 +08:00
|
|
|
/* Reset transmitter */
|
2009-08-23 17:24:27 +08:00
|
|
|
tx &= 1;
|
2010-05-13 01:18:40 +08:00
|
|
|
if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
|
omap: McBSP: Use cache when modifying individual register bits
Change the way McBSP registers are updated: use cached values instead of
relying upon those read back from the device.
With this patch, I have finally managed to get rid of all random
playback/recording hangups on my OMAP1510 based Amstrad Delta hardware. Before
that, values read back from McBSP registers to be used for updating them
happened to be errornous.
From the hardware side, the issue appeared to be caused by a relatively high
power requirements of an external USB adapter connected to the board's printer
dedicated USB port.
I think there is one important point that makes this patch worth of applying,
apart from my hardware quality. With the current code, if it ever happens to
any machine, no matter if OMAP1510 or newer, to read incorrect value from a
McBSP register, this wrong value will get written back without any checking.
That can lead to hardware damage if, for example, an input pin is turned into
output as a result.
Applies on top of patch 3 from this series:
[PATCH v9 3/4] OMAP: McBSP: Introduce caching in register write operations
Tested on OMAP1510 based Amstrad Delta using linux-omap for-next, commit
fb7380d70e041e4b3892f6b19dff7efb609d15a4 (2.6.33-rc3+ dated 2010-01-11).
Compile-tested with omap_3430sdp_defconfig.
Signed-off-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>
Acked-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Acked-by: Jarkko Nikula <jhnikula@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-02-16 02:03:33 +08:00
|
|
|
w = MCBSP_READ_CACHE(mcbsp, XCCR);
|
2009-08-23 17:24:27 +08:00
|
|
|
w |= (tx ? XDISABLE : 0);
|
2010-02-16 02:03:32 +08:00
|
|
|
MCBSP_WRITE(mcbsp, XCCR, w);
|
2009-08-23 17:24:27 +08:00
|
|
|
}
|
omap: McBSP: Use cache when modifying individual register bits
Change the way McBSP registers are updated: use cached values instead of
relying upon those read back from the device.
With this patch, I have finally managed to get rid of all random
playback/recording hangups on my OMAP1510 based Amstrad Delta hardware. Before
that, values read back from McBSP registers to be used for updating them
happened to be errornous.
From the hardware side, the issue appeared to be caused by a relatively high
power requirements of an external USB adapter connected to the board's printer
dedicated USB port.
I think there is one important point that makes this patch worth of applying,
apart from my hardware quality. With the current code, if it ever happens to
any machine, no matter if OMAP1510 or newer, to read incorrect value from a
McBSP register, this wrong value will get written back without any checking.
That can lead to hardware damage if, for example, an input pin is turned into
output as a result.
Applies on top of patch 3 from this series:
[PATCH v9 3/4] OMAP: McBSP: Introduce caching in register write operations
Tested on OMAP1510 based Amstrad Delta using linux-omap for-next, commit
fb7380d70e041e4b3892f6b19dff7efb609d15a4 (2.6.33-rc3+ dated 2010-01-11).
Compile-tested with omap_3430sdp_defconfig.
Signed-off-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>
Acked-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Acked-by: Jarkko Nikula <jhnikula@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-02-16 02:03:33 +08:00
|
|
|
w = MCBSP_READ_CACHE(mcbsp, SPCR2);
|
2010-02-16 02:03:32 +08:00
|
|
|
MCBSP_WRITE(mcbsp, SPCR2, w & ~tx);
|
2005-07-11 02:58:15 +08:00
|
|
|
|
|
|
|
/* Reset receiver */
|
2009-08-23 17:24:27 +08:00
|
|
|
rx &= 1;
|
2010-05-13 01:18:40 +08:00
|
|
|
if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
|
omap: McBSP: Use cache when modifying individual register bits
Change the way McBSP registers are updated: use cached values instead of
relying upon those read back from the device.
With this patch, I have finally managed to get rid of all random
playback/recording hangups on my OMAP1510 based Amstrad Delta hardware. Before
that, values read back from McBSP registers to be used for updating them
happened to be errornous.
From the hardware side, the issue appeared to be caused by a relatively high
power requirements of an external USB adapter connected to the board's printer
dedicated USB port.
I think there is one important point that makes this patch worth of applying,
apart from my hardware quality. With the current code, if it ever happens to
any machine, no matter if OMAP1510 or newer, to read incorrect value from a
McBSP register, this wrong value will get written back without any checking.
That can lead to hardware damage if, for example, an input pin is turned into
output as a result.
Applies on top of patch 3 from this series:
[PATCH v9 3/4] OMAP: McBSP: Introduce caching in register write operations
Tested on OMAP1510 based Amstrad Delta using linux-omap for-next, commit
fb7380d70e041e4b3892f6b19dff7efb609d15a4 (2.6.33-rc3+ dated 2010-01-11).
Compile-tested with omap_3430sdp_defconfig.
Signed-off-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>
Acked-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Acked-by: Jarkko Nikula <jhnikula@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-02-16 02:03:33 +08:00
|
|
|
w = MCBSP_READ_CACHE(mcbsp, RCCR);
|
2009-10-15 00:56:35 +08:00
|
|
|
w |= (rx ? RDISABLE : 0);
|
2010-02-16 02:03:32 +08:00
|
|
|
MCBSP_WRITE(mcbsp, RCCR, w);
|
2009-08-23 17:24:27 +08:00
|
|
|
}
|
omap: McBSP: Use cache when modifying individual register bits
Change the way McBSP registers are updated: use cached values instead of
relying upon those read back from the device.
With this patch, I have finally managed to get rid of all random
playback/recording hangups on my OMAP1510 based Amstrad Delta hardware. Before
that, values read back from McBSP registers to be used for updating them
happened to be errornous.
From the hardware side, the issue appeared to be caused by a relatively high
power requirements of an external USB adapter connected to the board's printer
dedicated USB port.
I think there is one important point that makes this patch worth of applying,
apart from my hardware quality. With the current code, if it ever happens to
any machine, no matter if OMAP1510 or newer, to read incorrect value from a
McBSP register, this wrong value will get written back without any checking.
That can lead to hardware damage if, for example, an input pin is turned into
output as a result.
Applies on top of patch 3 from this series:
[PATCH v9 3/4] OMAP: McBSP: Introduce caching in register write operations
Tested on OMAP1510 based Amstrad Delta using linux-omap for-next, commit
fb7380d70e041e4b3892f6b19dff7efb609d15a4 (2.6.33-rc3+ dated 2010-01-11).
Compile-tested with omap_3430sdp_defconfig.
Signed-off-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>
Acked-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Acked-by: Jarkko Nikula <jhnikula@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-02-16 02:03:33 +08:00
|
|
|
w = MCBSP_READ_CACHE(mcbsp, SPCR1);
|
2010-02-16 02:03:32 +08:00
|
|
|
MCBSP_WRITE(mcbsp, SPCR1, w & ~rx);
|
2005-07-11 02:58:15 +08:00
|
|
|
|
omap: McBSP: Use cache when modifying individual register bits
Change the way McBSP registers are updated: use cached values instead of
relying upon those read back from the device.
With this patch, I have finally managed to get rid of all random
playback/recording hangups on my OMAP1510 based Amstrad Delta hardware. Before
that, values read back from McBSP registers to be used for updating them
happened to be errornous.
From the hardware side, the issue appeared to be caused by a relatively high
power requirements of an external USB adapter connected to the board's printer
dedicated USB port.
I think there is one important point that makes this patch worth of applying,
apart from my hardware quality. With the current code, if it ever happens to
any machine, no matter if OMAP1510 or newer, to read incorrect value from a
McBSP register, this wrong value will get written back without any checking.
That can lead to hardware damage if, for example, an input pin is turned into
output as a result.
Applies on top of patch 3 from this series:
[PATCH v9 3/4] OMAP: McBSP: Introduce caching in register write operations
Tested on OMAP1510 based Amstrad Delta using linux-omap for-next, commit
fb7380d70e041e4b3892f6b19dff7efb609d15a4 (2.6.33-rc3+ dated 2010-01-11).
Compile-tested with omap_3430sdp_defconfig.
Signed-off-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>
Acked-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Acked-by: Jarkko Nikula <jhnikula@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-02-16 02:03:33 +08:00
|
|
|
idle = !((MCBSP_READ_CACHE(mcbsp, SPCR2) |
|
|
|
|
MCBSP_READ_CACHE(mcbsp, SPCR1)) & 1);
|
2009-08-07 14:59:47 +08:00
|
|
|
|
|
|
|
if (idle) {
|
|
|
|
/* Reset the sample rate generator */
|
omap: McBSP: Use cache when modifying individual register bits
Change the way McBSP registers are updated: use cached values instead of
relying upon those read back from the device.
With this patch, I have finally managed to get rid of all random
playback/recording hangups on my OMAP1510 based Amstrad Delta hardware. Before
that, values read back from McBSP registers to be used for updating them
happened to be errornous.
From the hardware side, the issue appeared to be caused by a relatively high
power requirements of an external USB adapter connected to the board's printer
dedicated USB port.
I think there is one important point that makes this patch worth of applying,
apart from my hardware quality. With the current code, if it ever happens to
any machine, no matter if OMAP1510 or newer, to read incorrect value from a
McBSP register, this wrong value will get written back without any checking.
That can lead to hardware damage if, for example, an input pin is turned into
output as a result.
Applies on top of patch 3 from this series:
[PATCH v9 3/4] OMAP: McBSP: Introduce caching in register write operations
Tested on OMAP1510 based Amstrad Delta using linux-omap for-next, commit
fb7380d70e041e4b3892f6b19dff7efb609d15a4 (2.6.33-rc3+ dated 2010-01-11).
Compile-tested with omap_3430sdp_defconfig.
Signed-off-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>
Acked-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Acked-by: Jarkko Nikula <jhnikula@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-02-16 02:03:33 +08:00
|
|
|
w = MCBSP_READ_CACHE(mcbsp, SPCR2);
|
2010-02-16 02:03:32 +08:00
|
|
|
MCBSP_WRITE(mcbsp, SPCR2, w & ~(1 << 6));
|
2009-08-07 14:59:47 +08:00
|
|
|
}
|
2010-02-22 20:21:11 +08:00
|
|
|
|
|
|
|
if (cpu_is_omap34xx())
|
|
|
|
omap_st_stop(mcbsp);
|
2005-07-11 02:58:15 +08:00
|
|
|
}
|
2008-07-03 17:24:39 +08:00
|
|
|
EXPORT_SYMBOL(omap_mcbsp_stop);
|
2005-07-11 02:58:15 +08:00
|
|
|
|
2011-07-01 16:52:25 +08:00
|
|
|
/*
|
|
|
|
* The following functions are only required on an OMAP1-only build.
|
|
|
|
* mach-omap2/mcbsp.c contains the real functions
|
|
|
|
*/
|
|
|
|
#ifndef CONFIG_ARCH_OMAP2PLUS
|
|
|
|
int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id)
|
|
|
|
{
|
|
|
|
WARN(1, "%s: should never be called on an OMAP1-only kernel\n",
|
|
|
|
__func__);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
void omap2_mcbsp1_mux_clkr_src(u8 mux)
|
|
|
|
{
|
|
|
|
WARN(1, "%s: should never be called on an OMAP1-only kernel\n",
|
|
|
|
__func__);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
void omap2_mcbsp1_mux_fsr_src(u8 mux)
|
|
|
|
{
|
|
|
|
WARN(1, "%s: should never be called on an OMAP1-only kernel\n",
|
|
|
|
__func__);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2010-02-13 04:26:48 +08:00
|
|
|
#ifdef CONFIG_ARCH_OMAP3
|
2009-08-20 21:18:11 +08:00
|
|
|
#define max_thres(m) (mcbsp->pdata->buffer_size)
|
|
|
|
#define valid_threshold(m, val) ((val) <= max_thres(m))
|
|
|
|
#define THRESHOLD_PROP_BUILDER(prop) \
|
|
|
|
static ssize_t prop##_show(struct device *dev, \
|
|
|
|
struct device_attribute *attr, char *buf) \
|
|
|
|
{ \
|
|
|
|
struct omap_mcbsp *mcbsp = dev_get_drvdata(dev); \
|
|
|
|
\
|
|
|
|
return sprintf(buf, "%u\n", mcbsp->prop); \
|
|
|
|
} \
|
|
|
|
\
|
|
|
|
static ssize_t prop##_store(struct device *dev, \
|
|
|
|
struct device_attribute *attr, \
|
|
|
|
const char *buf, size_t size) \
|
|
|
|
{ \
|
|
|
|
struct omap_mcbsp *mcbsp = dev_get_drvdata(dev); \
|
|
|
|
unsigned long val; \
|
|
|
|
int status; \
|
|
|
|
\
|
|
|
|
status = strict_strtoul(buf, 0, &val); \
|
|
|
|
if (status) \
|
|
|
|
return status; \
|
|
|
|
\
|
|
|
|
if (!valid_threshold(mcbsp, val)) \
|
|
|
|
return -EDOM; \
|
|
|
|
\
|
|
|
|
mcbsp->prop = val; \
|
|
|
|
return size; \
|
|
|
|
} \
|
|
|
|
\
|
|
|
|
static DEVICE_ATTR(prop, 0644, prop##_show, prop##_store);
|
|
|
|
|
|
|
|
THRESHOLD_PROP_BUILDER(max_tx_thres);
|
|
|
|
THRESHOLD_PROP_BUILDER(max_rx_thres);
|
|
|
|
|
2009-08-24 22:45:50 +08:00
|
|
|
static const char *dma_op_modes[] = {
|
|
|
|
"element", "threshold", "frame",
|
|
|
|
};
|
|
|
|
|
2009-08-20 21:18:14 +08:00
|
|
|
static ssize_t dma_op_mode_show(struct device *dev,
|
|
|
|
struct device_attribute *attr, char *buf)
|
|
|
|
{
|
|
|
|
struct omap_mcbsp *mcbsp = dev_get_drvdata(dev);
|
2009-08-24 22:45:50 +08:00
|
|
|
int dma_op_mode, i = 0;
|
|
|
|
ssize_t len = 0;
|
|
|
|
const char * const *s;
|
2009-08-20 21:18:14 +08:00
|
|
|
|
|
|
|
dma_op_mode = mcbsp->dma_op_mode;
|
|
|
|
|
2009-08-24 22:45:50 +08:00
|
|
|
for (s = &dma_op_modes[i]; i < ARRAY_SIZE(dma_op_modes); s++, i++) {
|
|
|
|
if (dma_op_mode == i)
|
|
|
|
len += sprintf(buf + len, "[%s] ", *s);
|
|
|
|
else
|
|
|
|
len += sprintf(buf + len, "%s ", *s);
|
|
|
|
}
|
|
|
|
len += sprintf(buf + len, "\n");
|
|
|
|
|
|
|
|
return len;
|
2009-08-20 21:18:14 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
static ssize_t dma_op_mode_store(struct device *dev,
|
|
|
|
struct device_attribute *attr,
|
|
|
|
const char *buf, size_t size)
|
|
|
|
{
|
|
|
|
struct omap_mcbsp *mcbsp = dev_get_drvdata(dev);
|
2009-08-24 22:45:50 +08:00
|
|
|
const char * const *s;
|
|
|
|
int i = 0;
|
2009-08-20 21:18:14 +08:00
|
|
|
|
2009-08-24 22:45:50 +08:00
|
|
|
for (s = &dma_op_modes[i]; i < ARRAY_SIZE(dma_op_modes); s++, i++)
|
|
|
|
if (sysfs_streq(buf, *s))
|
|
|
|
break;
|
2009-08-20 21:18:14 +08:00
|
|
|
|
2009-08-24 22:45:50 +08:00
|
|
|
if (i == ARRAY_SIZE(dma_op_modes))
|
|
|
|
return -EINVAL;
|
2009-08-20 21:18:14 +08:00
|
|
|
|
2009-08-24 22:45:50 +08:00
|
|
|
spin_lock_irq(&mcbsp->lock);
|
2009-08-20 21:18:14 +08:00
|
|
|
if (!mcbsp->free) {
|
|
|
|
size = -EBUSY;
|
|
|
|
goto unlock;
|
|
|
|
}
|
2009-08-24 22:45:50 +08:00
|
|
|
mcbsp->dma_op_mode = i;
|
2009-08-20 21:18:14 +08:00
|
|
|
|
|
|
|
unlock:
|
|
|
|
spin_unlock_irq(&mcbsp->lock);
|
|
|
|
|
|
|
|
return size;
|
|
|
|
}
|
|
|
|
|
|
|
|
static DEVICE_ATTR(dma_op_mode, 0644, dma_op_mode_show, dma_op_mode_store);
|
|
|
|
|
2010-02-22 20:21:11 +08:00
|
|
|
static ssize_t st_taps_show(struct device *dev,
|
|
|
|
struct device_attribute *attr, char *buf)
|
|
|
|
{
|
|
|
|
struct omap_mcbsp *mcbsp = dev_get_drvdata(dev);
|
|
|
|
struct omap_mcbsp_st_data *st_data = mcbsp->st_data;
|
|
|
|
ssize_t status = 0;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
spin_lock_irq(&mcbsp->lock);
|
|
|
|
for (i = 0; i < st_data->nr_taps; i++)
|
|
|
|
status += sprintf(&buf[status], (i ? ", %d" : "%d"),
|
|
|
|
st_data->taps[i]);
|
|
|
|
if (i)
|
|
|
|
status += sprintf(&buf[status], "\n");
|
|
|
|
spin_unlock_irq(&mcbsp->lock);
|
|
|
|
|
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
|
|
|
static ssize_t st_taps_store(struct device *dev,
|
|
|
|
struct device_attribute *attr,
|
|
|
|
const char *buf, size_t size)
|
|
|
|
{
|
|
|
|
struct omap_mcbsp *mcbsp = dev_get_drvdata(dev);
|
|
|
|
struct omap_mcbsp_st_data *st_data = mcbsp->st_data;
|
|
|
|
int val, tmp, status, i = 0;
|
|
|
|
|
|
|
|
spin_lock_irq(&mcbsp->lock);
|
|
|
|
memset(st_data->taps, 0, sizeof(st_data->taps));
|
|
|
|
st_data->nr_taps = 0;
|
|
|
|
|
|
|
|
do {
|
|
|
|
status = sscanf(buf, "%d%n", &val, &tmp);
|
|
|
|
if (status < 0 || status == 0) {
|
|
|
|
size = -EINVAL;
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
if (val < -32768 || val > 32767) {
|
|
|
|
size = -EINVAL;
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
st_data->taps[i++] = val;
|
|
|
|
buf += tmp;
|
|
|
|
if (*buf != ',')
|
|
|
|
break;
|
|
|
|
buf++;
|
|
|
|
} while (1);
|
|
|
|
|
|
|
|
st_data->nr_taps = i;
|
|
|
|
|
|
|
|
out:
|
|
|
|
spin_unlock_irq(&mcbsp->lock);
|
|
|
|
|
|
|
|
return size;
|
|
|
|
}
|
|
|
|
|
|
|
|
static DEVICE_ATTR(st_taps, 0644, st_taps_show, st_taps_store);
|
|
|
|
|
2009-08-20 21:18:13 +08:00
|
|
|
static const struct attribute *additional_attrs[] = {
|
2009-08-20 21:18:11 +08:00
|
|
|
&dev_attr_max_tx_thres.attr,
|
|
|
|
&dev_attr_max_rx_thres.attr,
|
2009-08-20 21:18:14 +08:00
|
|
|
&dev_attr_dma_op_mode.attr,
|
2009-08-20 21:18:11 +08:00
|
|
|
NULL,
|
|
|
|
};
|
|
|
|
|
2009-08-20 21:18:13 +08:00
|
|
|
static const struct attribute_group additional_attr_group = {
|
|
|
|
.attrs = (struct attribute **)additional_attrs,
|
2009-08-20 21:18:11 +08:00
|
|
|
};
|
|
|
|
|
2009-08-20 21:18:13 +08:00
|
|
|
static inline int __devinit omap_additional_add(struct device *dev)
|
2009-08-20 21:18:11 +08:00
|
|
|
{
|
2009-08-20 21:18:13 +08:00
|
|
|
return sysfs_create_group(&dev->kobj, &additional_attr_group);
|
2009-08-20 21:18:11 +08:00
|
|
|
}
|
|
|
|
|
2009-08-20 21:18:13 +08:00
|
|
|
static inline void __devexit omap_additional_remove(struct device *dev)
|
2009-08-20 21:18:11 +08:00
|
|
|
{
|
2009-08-20 21:18:13 +08:00
|
|
|
sysfs_remove_group(&dev->kobj, &additional_attr_group);
|
2009-08-20 21:18:11 +08:00
|
|
|
}
|
|
|
|
|
2010-02-22 20:21:11 +08:00
|
|
|
static const struct attribute *sidetone_attrs[] = {
|
|
|
|
&dev_attr_st_taps.attr,
|
|
|
|
NULL,
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct attribute_group sidetone_attr_group = {
|
|
|
|
.attrs = (struct attribute **)sidetone_attrs,
|
|
|
|
};
|
|
|
|
|
2010-10-09 01:00:19 +08:00
|
|
|
static int __devinit omap_st_add(struct omap_mcbsp *mcbsp)
|
2010-02-22 20:21:11 +08:00
|
|
|
{
|
2011-02-25 04:51:45 +08:00
|
|
|
struct platform_device *pdev;
|
|
|
|
struct resource *res;
|
2010-02-22 20:21:11 +08:00
|
|
|
struct omap_mcbsp_st_data *st_data;
|
|
|
|
int err;
|
|
|
|
|
|
|
|
st_data = kzalloc(sizeof(*mcbsp->st_data), GFP_KERNEL);
|
|
|
|
if (!st_data) {
|
|
|
|
err = -ENOMEM;
|
|
|
|
goto err1;
|
|
|
|
}
|
|
|
|
|
2011-02-25 04:51:45 +08:00
|
|
|
pdev = container_of(mcbsp->dev, struct platform_device, dev);
|
|
|
|
|
|
|
|
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "sidetone");
|
|
|
|
st_data->io_base_st = ioremap(res->start, resource_size(res));
|
2010-02-22 20:21:11 +08:00
|
|
|
if (!st_data->io_base_st) {
|
|
|
|
err = -ENOMEM;
|
|
|
|
goto err2;
|
|
|
|
}
|
|
|
|
|
|
|
|
err = sysfs_create_group(&mcbsp->dev->kobj, &sidetone_attr_group);
|
|
|
|
if (err)
|
|
|
|
goto err3;
|
|
|
|
|
|
|
|
mcbsp->st_data = st_data;
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
err3:
|
|
|
|
iounmap(st_data->io_base_st);
|
|
|
|
err2:
|
|
|
|
kfree(st_data);
|
|
|
|
err1:
|
|
|
|
return err;
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
static void __devexit omap_st_remove(struct omap_mcbsp *mcbsp)
|
|
|
|
{
|
|
|
|
struct omap_mcbsp_st_data *st_data = mcbsp->st_data;
|
|
|
|
|
|
|
|
if (st_data) {
|
|
|
|
sysfs_remove_group(&mcbsp->dev->kobj, &sidetone_attr_group);
|
|
|
|
iounmap(st_data->io_base_st);
|
|
|
|
kfree(st_data);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2009-08-20 21:18:11 +08:00
|
|
|
static inline void __devinit omap34xx_device_init(struct omap_mcbsp *mcbsp)
|
|
|
|
{
|
2009-08-20 21:18:14 +08:00
|
|
|
mcbsp->dma_op_mode = MCBSP_DMA_MODE_ELEMENT;
|
2009-08-20 21:18:11 +08:00
|
|
|
if (cpu_is_omap34xx()) {
|
2010-06-03 12:39:33 +08:00
|
|
|
/*
|
|
|
|
* Initially configure the maximum thresholds to a safe value.
|
|
|
|
* The McBSP FIFO usage with these values should not go under
|
|
|
|
* 16 locations.
|
|
|
|
* If the whole FIFO without safety buffer is used, than there
|
|
|
|
* is a possibility that the DMA will be not able to push the
|
|
|
|
* new data on time, causing channel shifts in runtime.
|
|
|
|
*/
|
|
|
|
mcbsp->max_tx_thres = max_thres(mcbsp) - 0x10;
|
|
|
|
mcbsp->max_rx_thres = max_thres(mcbsp) - 0x10;
|
2009-08-20 21:18:14 +08:00
|
|
|
/*
|
|
|
|
* REVISIT: Set dmap_op_mode to THRESHOLD as default
|
|
|
|
* for mcbsp2 instances.
|
|
|
|
*/
|
2009-08-20 21:18:13 +08:00
|
|
|
if (omap_additional_add(mcbsp->dev))
|
2009-08-20 21:18:11 +08:00
|
|
|
dev_warn(mcbsp->dev,
|
2009-08-20 21:18:13 +08:00
|
|
|
"Unable to create additional controls\n");
|
2010-02-22 20:21:11 +08:00
|
|
|
|
|
|
|
if (mcbsp->id == 2 || mcbsp->id == 3)
|
|
|
|
if (omap_st_add(mcbsp))
|
|
|
|
dev_warn(mcbsp->dev,
|
|
|
|
"Unable to create sidetone controls\n");
|
|
|
|
|
2009-08-20 21:18:11 +08:00
|
|
|
} else {
|
|
|
|
mcbsp->max_tx_thres = -EINVAL;
|
|
|
|
mcbsp->max_rx_thres = -EINVAL;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void __devexit omap34xx_device_exit(struct omap_mcbsp *mcbsp)
|
|
|
|
{
|
2010-02-22 20:21:11 +08:00
|
|
|
if (cpu_is_omap34xx()) {
|
2009-08-20 21:18:13 +08:00
|
|
|
omap_additional_remove(mcbsp->dev);
|
2010-02-22 20:21:11 +08:00
|
|
|
|
|
|
|
if (mcbsp->id == 2 || mcbsp->id == 3)
|
|
|
|
omap_st_remove(mcbsp);
|
|
|
|
}
|
2009-08-20 21:18:11 +08:00
|
|
|
}
|
|
|
|
#else
|
|
|
|
static inline void __devinit omap34xx_device_init(struct omap_mcbsp *mcbsp) {}
|
|
|
|
static inline void __devexit omap34xx_device_exit(struct omap_mcbsp *mcbsp) {}
|
2010-02-13 04:26:48 +08:00
|
|
|
#endif /* CONFIG_ARCH_OMAP3 */
|
2009-08-20 21:18:11 +08:00
|
|
|
|
2005-07-11 02:58:15 +08:00
|
|
|
/*
|
|
|
|
* McBSP1 and McBSP3 are directly mapped on 1610 and 1510.
|
|
|
|
* 730 has only 2 McBSP, and both of them are MPU peripherals.
|
|
|
|
*/
|
2008-10-08 15:01:39 +08:00
|
|
|
static int __devinit omap_mcbsp_probe(struct platform_device *pdev)
|
2008-07-03 17:24:39 +08:00
|
|
|
{
|
|
|
|
struct omap_mcbsp_platform_data *pdata = pdev->dev.platform_data;
|
2008-10-08 15:01:39 +08:00
|
|
|
struct omap_mcbsp *mcbsp;
|
2008-07-03 17:24:39 +08:00
|
|
|
int id = pdev->id - 1;
|
2011-02-25 04:51:45 +08:00
|
|
|
struct resource *res;
|
2008-07-03 17:24:39 +08:00
|
|
|
int ret = 0;
|
2005-07-11 02:58:15 +08:00
|
|
|
|
2008-07-03 17:24:39 +08:00
|
|
|
if (!pdata) {
|
|
|
|
dev_err(&pdev->dev, "McBSP device initialized without"
|
|
|
|
"platform data\n");
|
|
|
|
ret = -EINVAL;
|
|
|
|
goto exit;
|
|
|
|
}
|
|
|
|
|
|
|
|
dev_dbg(&pdev->dev, "Initializing OMAP McBSP (%d).\n", pdev->id);
|
|
|
|
|
2008-10-08 15:01:39 +08:00
|
|
|
if (id >= omap_mcbsp_count) {
|
2008-07-03 17:24:39 +08:00
|
|
|
dev_err(&pdev->dev, "Invalid McBSP device id (%d)\n", id);
|
|
|
|
ret = -EINVAL;
|
|
|
|
goto exit;
|
|
|
|
}
|
|
|
|
|
2008-10-08 15:01:39 +08:00
|
|
|
mcbsp = kzalloc(sizeof(struct omap_mcbsp), GFP_KERNEL);
|
|
|
|
if (!mcbsp) {
|
|
|
|
ret = -ENOMEM;
|
|
|
|
goto exit;
|
|
|
|
}
|
|
|
|
|
|
|
|
spin_lock_init(&mcbsp->lock);
|
|
|
|
mcbsp->id = id + 1;
|
2010-12-08 08:25:41 +08:00
|
|
|
mcbsp->free = true;
|
2008-07-03 17:24:39 +08:00
|
|
|
|
2011-02-25 04:51:45 +08:00
|
|
|
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mpu");
|
|
|
|
if (!res) {
|
|
|
|
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
|
|
if (!res) {
|
|
|
|
dev_err(&pdev->dev, "%s:mcbsp%d has invalid memory"
|
|
|
|
"resource\n", __func__, pdev->id);
|
|
|
|
ret = -ENOMEM;
|
|
|
|
goto exit;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
mcbsp->phys_base = res->start;
|
|
|
|
omap_mcbsp_cache_size = resource_size(res);
|
|
|
|
mcbsp->io_base = ioremap(res->start, resource_size(res));
|
2008-10-08 15:01:39 +08:00
|
|
|
if (!mcbsp->io_base) {
|
2008-09-04 21:25:42 +08:00
|
|
|
ret = -ENOMEM;
|
|
|
|
goto err_ioremap;
|
|
|
|
}
|
|
|
|
|
2011-02-25 04:51:45 +08:00
|
|
|
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dma");
|
|
|
|
if (!res)
|
|
|
|
mcbsp->phys_dma_base = mcbsp->phys_base;
|
|
|
|
else
|
|
|
|
mcbsp->phys_dma_base = res->start;
|
|
|
|
|
|
|
|
mcbsp->tx_irq = platform_get_irq_byname(pdev, "tx");
|
|
|
|
mcbsp->rx_irq = platform_get_irq_byname(pdev, "rx");
|
|
|
|
|
2011-02-24 17:46:50 +08:00
|
|
|
/* From OMAP4 there will be a single irq line */
|
|
|
|
if (mcbsp->tx_irq == -ENXIO)
|
|
|
|
mcbsp->tx_irq = platform_get_irq(pdev, 0);
|
|
|
|
|
2011-02-25 04:51:45 +08:00
|
|
|
res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "rx");
|
|
|
|
if (!res) {
|
|
|
|
dev_err(&pdev->dev, "%s:mcbsp%d has invalid rx DMA channel\n",
|
|
|
|
__func__, pdev->id);
|
|
|
|
ret = -ENODEV;
|
|
|
|
goto err_res;
|
|
|
|
}
|
|
|
|
mcbsp->dma_rx_sync = res->start;
|
|
|
|
|
|
|
|
res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "tx");
|
|
|
|
if (!res) {
|
|
|
|
dev_err(&pdev->dev, "%s:mcbsp%d has invalid tx DMA channel\n",
|
|
|
|
__func__, pdev->id);
|
|
|
|
ret = -ENODEV;
|
|
|
|
goto err_res;
|
|
|
|
}
|
|
|
|
mcbsp->dma_tx_sync = res->start;
|
2008-07-03 17:24:39 +08:00
|
|
|
|
2009-01-23 18:26:46 +08:00
|
|
|
mcbsp->fclk = clk_get(&pdev->dev, "fck");
|
|
|
|
if (IS_ERR(mcbsp->fclk)) {
|
|
|
|
ret = PTR_ERR(mcbsp->fclk);
|
|
|
|
dev_err(&pdev->dev, "unable to get fck: %d\n", ret);
|
2011-02-24 17:46:54 +08:00
|
|
|
goto err_res;
|
2008-07-03 17:24:39 +08:00
|
|
|
}
|
|
|
|
|
2008-10-08 15:01:39 +08:00
|
|
|
mcbsp->pdata = pdata;
|
|
|
|
mcbsp->dev = &pdev->dev;
|
2009-01-23 18:26:46 +08:00
|
|
|
mcbsp_ptr[id] = mcbsp;
|
2011-02-24 17:46:55 +08:00
|
|
|
mcbsp->mcbsp_config_type = pdata->mcbsp_config_type;
|
2008-10-08 15:01:39 +08:00
|
|
|
platform_set_drvdata(pdev, mcbsp);
|
2011-02-24 17:46:54 +08:00
|
|
|
pm_runtime_enable(mcbsp->dev);
|
2009-08-20 21:18:11 +08:00
|
|
|
|
|
|
|
/* Initialize mcbsp properties for OMAP34XX if needed / applicable */
|
|
|
|
omap34xx_device_init(mcbsp);
|
|
|
|
|
2008-09-04 21:25:42 +08:00
|
|
|
return 0;
|
2008-07-03 17:24:39 +08:00
|
|
|
|
2011-02-25 04:51:45 +08:00
|
|
|
err_res:
|
2008-10-08 15:01:39 +08:00
|
|
|
iounmap(mcbsp->io_base);
|
2008-09-04 21:25:42 +08:00
|
|
|
err_ioremap:
|
2009-01-23 18:26:46 +08:00
|
|
|
kfree(mcbsp);
|
2008-07-03 17:24:39 +08:00
|
|
|
exit:
|
|
|
|
return ret;
|
|
|
|
}
|
2006-04-03 00:46:27 +08:00
|
|
|
|
2008-10-08 15:01:39 +08:00
|
|
|
static int __devexit omap_mcbsp_remove(struct platform_device *pdev)
|
2005-07-11 02:58:15 +08:00
|
|
|
{
|
2008-07-03 17:24:39 +08:00
|
|
|
struct omap_mcbsp *mcbsp = platform_get_drvdata(pdev);
|
2005-07-11 02:58:15 +08:00
|
|
|
|
2008-07-03 17:24:39 +08:00
|
|
|
platform_set_drvdata(pdev, NULL);
|
|
|
|
if (mcbsp) {
|
2005-07-11 02:58:15 +08:00
|
|
|
|
2008-07-03 17:24:39 +08:00
|
|
|
if (mcbsp->pdata && mcbsp->pdata->ops &&
|
|
|
|
mcbsp->pdata->ops->free)
|
|
|
|
mcbsp->pdata->ops->free(mcbsp->id);
|
2005-07-11 02:58:15 +08:00
|
|
|
|
2009-08-20 21:18:11 +08:00
|
|
|
omap34xx_device_exit(mcbsp);
|
|
|
|
|
2009-01-23 18:26:46 +08:00
|
|
|
clk_put(mcbsp->fclk);
|
2008-07-03 17:24:39 +08:00
|
|
|
|
2008-09-04 21:25:42 +08:00
|
|
|
iounmap(mcbsp->io_base);
|
2010-12-08 08:25:40 +08:00
|
|
|
kfree(mcbsp);
|
2005-07-11 02:58:15 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2008-07-03 17:24:39 +08:00
|
|
|
static struct platform_driver omap_mcbsp_driver = {
|
|
|
|
.probe = omap_mcbsp_probe,
|
2008-10-08 15:01:39 +08:00
|
|
|
.remove = __devexit_p(omap_mcbsp_remove),
|
2008-07-03 17:24:39 +08:00
|
|
|
.driver = {
|
|
|
|
.name = "omap-mcbsp",
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
int __init omap_mcbsp_init(void)
|
|
|
|
{
|
|
|
|
/* Register the McBSP driver */
|
|
|
|
return platform_driver_register(&omap_mcbsp_driver);
|
|
|
|
}
|