Added support for Xiaomi MIX3 (perseus)

This commit is contained in:
BigfootACA 2021-01-15 23:16:35 +08:00
parent 6acebc3619
commit 34002b789b
65 changed files with 27997 additions and 0 deletions

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@ -7,6 +7,7 @@ DEVICES=(
polaris
akari
beryllium
perseus
)
#####################################
function _help(){

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// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (c) 2021, BigfootACA <bigfoot@classfun.cn>
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
#include "sdm845.dtsi"
#include "pm8998.dtsi"
#include "pmi8998.dtsi"
#include "pm8005.dtsi"
/ {
model = "Xiaomi MIX3";
compatible = "xiaomi,dipper", "qcom,sdm845";
/* required for bootloader to select correct board */
qcom,board-id = <0x63 0x0>;
qcom,msm-id = <0x141 0x20001>;
aliases {
serial0 = &uart9;
hsuart0 = &uart6;
};
chosen {
#address-cells = <2>;
#size-cells = <2>;
ranges;
// For simplefb hack
stdout-path = "display0";
/* hack: use framebuffer setup by bootloader.
* the address is taken from the bootloader config (strings xbl.img | grep "Display Reserved")
*/
framebuffer0: framebuffer@9d400000 {
compatible = "simple-framebuffer";
reg = <0 0x9D400000 0 0x02400000>;
width = <1080>;
height = <2340>;
stride = <(1080 * 4)>;
format = "a8r8g8b8";
status = "okay";
};
};
vph_pwr: vph-pwr-regulator {
compatible = "regulator-fixed";
regulator-name = "vph_pwr";
regulator-min-microvolt = <3700000>;
regulator-max-microvolt = <3700000>;
};
vbat: vbat-regulator {
compatible = "regulator-fixed";
regulator-name = "VBAT";
vin-supply = <&vph_pwr>;
regulator-min-microvolt = <4200000>;
regulator-max-microvolt = <4200000>;
regulator-always-on;
};
vbat_som: vbat-som-regulator {
compatible = "regulator-fixed";
regulator-name = "VBAT_SOM";
vin-supply = <&vph_pwr>;
regulator-min-microvolt = <4200000>;
regulator-max-microvolt = <4200000>;
regulator-always-on;
};
vdc_3v3: vdc-3v3-regulator {
compatible = "regulator-fixed";
regulator-name = "VDC_3V3";
vin-supply = <&vph_pwr>;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vdc_5v: vdc-5v-regulator {
compatible = "regulator-fixed";
regulator-name = "VDC_5V";
vin-supply = <&vph_pwr>;
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <500000>;
regulator-always-on;
};
/*
* Apparently RPMh does not provide support for PM8998 S4 because it
* is always-on; model it as a fixed regulator.
*/
vreg_s4a_1p8: pm8998-smps4 {
compatible = "regulator-fixed";
regulator-name = "vreg_s4a_1p8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
vin-supply = <&vph_pwr>;
};
gpio_keys {
compatible = "gpio-keys";
autorepeat;
pinctrl-names = "default";
pinctrl-0 = <&vol_up_pin_a>;
vol-up {
label = "Volume Up";
linux,code = <KEY_VOLUMEUP>;
gpios = <&pm8998_gpio 6 GPIO_ACTIVE_LOW>;
};
};
};
&adsp_pas {
status = "okay";
firmware-name = "qcom/adsp.mbn";
};
&apps_rsc {
pm8998-rpmh-regulators {
compatible = "qcom,pm8998-rpmh-regulators";
qcom,pmic-id = "a";
vdd-s1-supply = <&vph_pwr>;
vdd-s2-supply = <&vph_pwr>;
vdd-s3-supply = <&vph_pwr>;
vdd-s4-supply = <&vph_pwr>;
vdd-s5-supply = <&vph_pwr>;
vdd-s6-supply = <&vph_pwr>;
vdd-s7-supply = <&vph_pwr>;
vdd-s8-supply = <&vph_pwr>;
vdd-s9-supply = <&vph_pwr>;
vdd-s10-supply = <&vph_pwr>;
vdd-s11-supply = <&vph_pwr>;
vdd-s12-supply = <&vph_pwr>;
vdd-s13-supply = <&vph_pwr>;
vdd-l1-l27-supply = <&vreg_s7a_1p025>;
vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>;
vdd-l3-l11-supply = <&vreg_s7a_1p025>;
vdd-l4-l5-supply = <&vreg_s7a_1p025>;
vdd-l6-supply = <&vph_pwr>;
vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>;
vdd-l9-supply = <&vreg_bob>;
vdd-l10-l23-l25-supply = <&vreg_bob>;
vdd-l13-l19-l21-supply = <&vreg_bob>;
vdd-l16-l28-supply = <&vreg_bob>;
vdd-l18-l22-supply = <&vreg_bob>;
vdd-l20-l24-supply = <&vreg_bob>;
vdd-l26-supply = <&vreg_s3a_1p35>;
vin-lvs-1-2-supply = <&vreg_s4a_1p8>;
vreg_s2a_1p1: smps2 {
regulator-always-on;
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
};
vreg_s3a_1p35: smps3 {
regulator-min-microvolt = <1352000>;
regulator-max-microvolt = <1352000>;
};
// vreg_s4a_1p8: smps4 {
// regulator-min-microvolt = <1800000>;
// regulator-max-microvolt = <1800000>;
// };
vreg_s5a_2p04: smps5 {
regulator-always-on;
regulator-min-microvolt = <1904000>;
regulator-max-microvolt = <2040000>;
};
vreg_s7a_1p025: smps7 {
regulator-always-on;
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <1028000>;
};
vdda_ufs1_core:
vreg_l1a_0p875: ldo1 {
regulator-min-microvolt = <880000>;
regulator-max-microvolt = <880000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
// vreg_l2a_0p875: ldo2 {
// regulator-min-microvolt = <1200000>;
// regulator-max-microvolt = <1200000>;
// regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
// regulator-always-on;
// };
// vreg_l3a_0p875: ldo3 {
// regulator-min-microvolt = <1000000>;
// regulator-max-microvolt = <1000000>;
// regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
// };
vreg_l5a_0p8: ldo5 {
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <800000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
// vreg_l6a_1p8: ldo6 {
// regulator-min-microvolt = <1856000>;
// regulator-max-microvolt = <1856000>;
// regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
// };
vreg_l7a_1p8: ldo7 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
// vreg_l8a_1p2: ldo8 {
// regulator-min-microvolt = <1200000>;
// regulator-max-microvolt = <1248000>;
// regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
// };
// vreg_l9a_2p95: ldo9 {
// regulator-min-microvolt = <1704000>;
// regulator-max-microvolt = <2928000>;
// regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
// };
// vreg_l10a_2p95: ldo10 {
// regulator-min-microvolt = <1704000>;
// regulator-max-microvolt = <2928000>;
// regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
// };
// vreg_l11a_1p05: ldo11 {
// regulator-min-microvolt = <1000000>;
// regulator-max-microvolt = <1048000>;
// regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
// };
vreg_l12a_1p8: ldo12 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
// vreg_l13a_2p95: ldo13 {
// regulator-min-microvolt = <1800000>;
// regulator-max-microvolt = <2960000>;
// regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
// };
// dsi and touchscreen maybe
vreg_l14a_1p8: ldo14 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1880000>;
regulator-always-on;
regulator-boot-on;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
// vreg_l15a_1p8: ldo15 {
// regulator-min-microvolt = <1800000>;
// regulator-max-microvolt = <1800000>;
// regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
// };
// vreg_l16a_2p7: ldo16 {
// regulator-min-microvolt = <2704000>;
// regulator-max-microvolt = <2704000>;
// regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
// };
vreg_l17a_1p3: ldo17 {
regulator-always-on;
regulator-min-microvolt = <1304000>;
regulator-max-microvolt = <1304000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
// vreg_l18a_2p9: ldo18 {
// regulator-min-microvolt = <2704000>;
// regulator-max-microvolt = <2960000>;
// regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
// };
// vreg_l19a_3p1: ldo19 {
// regulator-min-microvolt = <2856000>;
// regulator-max-microvolt = <3104000>;
// regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
// };
vreg_l20a_2p95: ldo20 {
regulator-min-microvolt = <2704000>;
regulator-max-microvolt = <2960000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
// vreg_l21a_2p95: ldo21 {
// regulator-min-microvolt = <2704000>;
// regulator-max-microvolt = <2960000>;
// regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
// };
// vreg_l22a_3p3: ldo22 {
// regulator-min-microvolt = <2864000>;
// regulator-max-microvolt = <3312000>;
// regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
// };
// vreg_l23a_3p3: ldo23 {
// regulator-min-microvolt = <3000000>;
// regulator-max-microvolt = <3312000>;
// regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
// };
vreg_l24a_3p075: ldo24 {
regulator-min-microvolt = <3088000>;
regulator-max-microvolt = <3088000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l25a_3p3: ldo25 {
regulator-always-on;
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3312000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vdda_ufs1_1p2:
vreg_l26a_1p2: ldo26 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_lvs1a_1p8: lvs1 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
vreg_lvs2a_1p8: lvs2 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
};
pmi8998-rpmh-regulators {
compatible = "qcom,pmi8998-rpmh-regulators";
qcom,pmic-id = "b";
vdd-bob-supply = <&vph_pwr>;
vreg_bob: bob {
regulator-min-microvolt = <3312000>;
regulator-max-microvolt = <3600000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
regulator-allow-bypass;
};
};
pm8005-rpmh-regulators {
compatible = "qcom,pm8005-rpmh-regulators";
qcom,pmic-id = "c";
vreg_smp3c_0p6: smps3 {
regulator-always-on;
regulator-min-microvolt = <600000>;
regulator-max-microvolt = <600000>;
};
};
};
&apps_smmu {
/* Enable this when upstream smmu driver gets patched */
status = "okay";
};
&cdsp_pas {
status = "okay";
firmware-name = "qcom/cdsp.mbn";
};
// vreg_l14a_1p8
// &dsi0 {
// status = "okay";
// vdda-supply = <&vreg_l26a_1p2>;
// #address-cells = <1>;
// #size-cells = <0>;
// display_panel: panel@0 {
// status = "disabled";
// port {
// panel_in: endpoint {
// remote-endpoint = <&dsi0_out>;
// };
// };
// };
// };
// &dsi0_out {
// remote-endpoint = <&panel_in>;
// data-lanes = <0 1 2 3>;
// };
// &dsi0_phy {
// status = "okay";
// vdds-supply = <&vreg_l1a_0p875>;
// };
// &display_panel {
// compatible = "visionox,fhd-r66455";
// status = "okay";
// #address-cells = <1>;
// #size-cells = <0>;
// reg = <0>;
// vddio-supply = <&vreg_l14a_1p8>;
// reset-gpios = <&tlmm 6 GPIO_ACTIVE_HIGH>;
// pinctrl-names = "default";
// pinctrl-0 = <&panel_reset_pins &panel_te_pin>;
// };
&gcc {
protected-clocks = <GCC_QSPI_CORE_CLK>,
<GCC_QSPI_CORE_CLK_SRC>,
<GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
<GCC_LPASS_Q6_AXI_CLK>,
<GCC_LPASS_SWAY_CLK>;
};
&gpu {
/*
* note: the amd,imageon compatible makes it possible
* to use the drm/msm driver without the display node,
* make sure to remove it when display node is added
*/
compatible = "qcom,adreno-630.2",
"qcom,adreno",
"amd,imageon";
zap-shader {
memory-region = <&gpu_mem>;
firmware-name = "qcom/a630_zap.mbn";
};
};
&ipa {
status = "okay";
modem-init;
memory-region = <&ipa_fw_mem>;
};
/* NFC */
&i2c3 {
status = "okay";
clock-frequency = <400000>;
};
/* Audio Amplifier tas2557 */
&i2c5 {
status = "okay";
clock-frequency = <400000>;
};
/* smb1355 and lm3644 LED */
&i2c10 {
status = "okay";
clock-frequency = <400000>;
};
/* fts touchscreen */
&i2c14 {
status = "okay";
clock-frequency = <400000>;
};
// &mdss {
// status = "okay";
// };
// &mdss_mdp {
// status = "okay";
// };
&mss_pil {
status = "okay";
firmware-name = "qcom/mba.mbn", "qcom/modem.mbn";
};
&pm8998_gpio {
vol_up_pin_a: vol-up-active {
pins = "gpio6";
function = "normal";
input-enable;
bias-pull-up;
qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
};
};
&pm8998_pon {
resin {
compatible = "qcom,pm8941-resin";
interrupts = <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>;
debounce = <15625>;
bias-pull-up;
linux,code = <KEY_VOLUMEDOWN>;
};
};
&qupv3_id_0 {
status = "okay";
};
&qupv3_id_1 {
status = "okay";
};
&tlmm {
gpio-reserved-ranges = <0 4>, <81 4>;
panel_reset_pins: panel-reset {
mux {
pins = "gpio6", "gpio52";
function = "gpio";
};
config {
pins = "gpio6", "gpio52";
drive-strength = <8>;
bias-disable = <0>;
};
};
panel_te_pin: panel-te {
mux {
pins = "gpio10";
function = "mdp_vsync";
};
config {
pins = "gpio10";
drive-strength = <2>;
bias-disable;
input-enable;
};
};
};
&uart6 {
status = "okay";
bluetooth {
compatible = "qcom,wcn3990-bt";
vddio-supply = <&vreg_s4a_1p8>;
vddxo-supply = <&vreg_l7a_1p8>;
vddrf-supply = <&vreg_l17a_1p3>;
vddch0-supply = <&vreg_l25a_3p3>;
max-speed = <3200000>;
};
};
&usb_1 {
status = "okay";
/* We'll use this as USB 2.0 only */
qcom,select-utmi-as-pipe-clk;
};
&usb_1_dwc3 {
dr_mode = "peripheral";
/* fastest mode for USB 2 */
maximum-speed = "high-speed";
/* Remove USB3 phy */
phys = <&usb_1_hsphy>;
phy-names = "usb2-phy";
};
&usb_1_hsphy {
status = "okay";
vdd-supply = <&vreg_l1a_0p875>;
vdda-pll-supply = <&vreg_l12a_1p8>;
vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
qcom,imp-res-offset-value = <8>;
qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
};
&usb_1_qmpphy {
status = "okay";
vdda-phy-supply = <&vreg_l26a_1p2>;
vdda-pll-supply = <&vreg_l1a_0p875>;
};
&ufs_mem_hc {
status = "okay";
reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
vcc-supply = <&vreg_l20a_2p95>;
vcc-max-microamp = <800000>;
};
&ufs_mem_phy {
status = "okay";
vdda-phy-supply = <&vdda_ufs1_core>;
vdda-pll-supply = <&vdda_ufs1_1p2>;
};
&wifi {
status = "okay";
vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
qcom,snoc-host-cap-8bit-quirk;
};
/* PINCTRL - additions to nodes defined in sdm845.dtsi */
&qup_uart6_default {
pinmux {
pins = "gpio45", "gpio46", "gpio47", "gpio48";
function = "qup6";
};
cts {
pins = "gpio45";
bias-disable;
};
rts-tx {
pins = "gpio46", "gpio47";
drive-strength = <2>;
bias-disable;
};
rx {
pins = "gpio48";
bias-pull-up;
};
};
/* Reserved memory changes */
/*
* The memory regions related to the modem have to be changed
* according to the adresses in downstream as
* the modem is hard-coded to expect these regions to be at those adresses.
*
*/
/delete-node/ &rmtfs_mem;
/delete-node/ &adsp_mem;
/delete-node/ &wlan_msa_mem;
/delete-node/ &mpss_region;
/delete-node/ &venus_mem;
/delete-node/ &cdsp_mem;
/delete-node/ &mba_region;
/delete-node/ &slpi_mem;
/delete-node/ &spss_mem;
/ {
reserved-memory {
rmtfs_mem: memory@f6301000 {
compatible = "qcom,rmtfs-mem";
reg = <0 0xf6301000 0 0x200000>;
no-map;
qcom,client-id = <1>;
qcom,vmid = <15>;
};
adsp_mem: memory@8c500000 {
reg = <0 0x8c500000 0 0x1e00000>;
no-map;
};
wlan_msa_mem: memory@8e300000 {
reg = <0 0x8e300000 0 0x100000>;
no-map;
};
mpss_region: memory@8e400000 {
reg = <0 0x8e400000 0 0x7800000>;
no-map;
};
venus_mem: memory@95c00000 {
reg = <0 0x95c00000 0 0x500000>;
no-map;
};
cdsp_mem: memory@96100000 {
reg = <0 0x96100000 0 0x800000>;
no-map;
};
mba_region: memory@96900000 {
reg = <0 0x96900000 0 0x200000>;
no-map;
};
slpi_mem: memory@96b00000 {
reg = <0 0x96b00000 0 0x1400000>;
no-map;
};
spss_mem: memory@97f00000 {
reg = <0 0x97f00000 0 0x100000>;
no-map;
};
/* hack: bootloader framebuffer */
cont_splash_region: memory@9d400000 {
compatible = "removed-dma-pool";
reg = <0 0x9D400000 0 0x02400000>;
no-map;
};
ramoops: ramoops@b0000000 {
compatible = "ramoops";
reg = <0 0xb0000000 0 0x00400000>;
record-size = <0x40000>; /*256x1024*/
console-size = <0x40000>;
ftrace-size = <0x40000>;
pmsg-size = <0x200000>;
ecc-size = <0x0>;
};
};
};

19
sdm845Pkg/perseus.dsc Normal file
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[Defines]
PLATFORM_NAME = sdm845Pkg
PLATFORM_GUID = 28f1a3bf-193a-47e3-a7b9-5a435eaab2ee
PLATFORM_VERSION = 0.1
DSC_SPECIFICATION = 0x00010019
OUTPUT_DIRECTORY = Build/$(PLATFORM_NAME)
SUPPORTED_ARCHITECTURES = AARCH64
BUILD_TARGETS = DEBUG|RELEASE
SKUID_IDENTIFIER = DEFAULT
FLASH_DEFINITION = sdm845Pkg/perseus.fdf
!include sdm845Pkg/sdm845Pkg.dsc
[PcdsFixedAtBuild.common]
# System Memory (5GB)
gArmTokenSpaceGuid.PcdSystemMemorySize|0x140000000
gsdm845PkgTokenSpaceGuid.PcdMipiFrameBufferWidth|1080
gsdm845PkgTokenSpaceGuid.PcdMipiFrameBufferHeight|2340

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sdm845Pkg/perseus.fdf Normal file
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#
# Copyright (c) 2018, Linaro Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
################################################################################
#
# FD Section
# The [FD] Section is made up of the definition statements and a
# description of what goes into the Flash Device Image. Each FD section
# defines one flash "device" image. A flash device image may be one of
# the following: Removable media bootable image (like a boot floppy
# image,) an Option ROM image (that would be "flashed" into an add-in
# card,) a System "Flash" image (that would be burned into a system's
# flash) or an Update ("Capsule") image that will be used to update and
# existing system flash.
#
################################################################################
[FD.sdm845Pkg_UEFI]
BaseAddress = 0xd0000000|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in NOR Flash.
Size = 0x00200000|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the FLASH Device
ErasePolarity = 1
# This one is tricky, it must be: BlockSize * NumBlocks = Size
BlockSize = 0x00001000
NumBlocks = 0x200
################################################################################
#
# Following are lists of FD Region layout which correspond to the locations of different
# images within the flash device.
#
# Regions must be defined in ascending order and may not overlap.
#
# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
# the pipe "|" character, followed by the size of the region, also in hex with the leading
# "0x" characters. Like:
# Offset|Size
# PcdOffsetCName|PcdSizeCName
# RegionType <FV, DATA, or FILE>
#
################################################################################
# from ArmVirtPkg/ArmVirtQemuKernel.fdf
#
# Implement the Linux kernel header layout so that the loader will identify
# it as something bootable, and execute it with a FDT pointer in x0 or r2.
#
0x00000000|0x00008000
DATA = {
0x01, 0x00, 0x00, 0x10, # code0: adr x1, .
0xff, 0x1f, 0x00, 0x14, # code1: b 0x8000
0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, # text_offset: 512 KB
0x00, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, # image_size: 2 MB
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, # flags
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, # res2
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, # res3
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, # res4
0x41, 0x52, 0x4d, 0x64, # magic: "ARM\x64"
0x00, 0x00, 0x00, 0x00 # res5
}
0x00008000|0x001f8000
gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize
FV = FVMAIN_COMPACT
################################################################################
#
# FV Section
#
# [FV] section is used to define what components or modules are placed within a flash
# device file. This section also defines order the components and modules are positioned
# within the image. The [FV] section consists of define statements, set statements and
# module statements.
#
################################################################################
[FV.FvMain]
BlockSize = 0x40
NumBlocks = 0 # This FV gets compressed so make it just big enough
FvAlignment = 8 # FV alignment and FV attributes setting.
ERASE_POLARITY = 1
MEMORY_MAPPED = TRUE
STICKY_WRITE = TRUE
LOCK_CAP = TRUE
LOCK_STATUS = TRUE
WRITE_DISABLED_CAP = TRUE
WRITE_ENABLED_CAP = TRUE
WRITE_STATUS = TRUE
WRITE_LOCK_CAP = TRUE
WRITE_LOCK_STATUS = TRUE
READ_DISABLED_CAP = TRUE
READ_ENABLED_CAP = TRUE
READ_STATUS = TRUE
READ_LOCK_CAP = TRUE
READ_LOCK_STATUS = TRUE
APRIORI DXE {
INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
}
INF MdeModulePkg/Core/Dxe/DxeMain.inf
#
# PI DXE Drivers producing Architectural Protocols (EFI Services)
#
INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf
INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
INF EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf
INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf
INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
FILE DRIVER = af9763a2-033b-4109-8e17-56a98d380c92 {
SECTION DXE_DEPEX = sdm845Pkg/Binary/perseus/HWIODxeDriver/HWIODxeDriver.depex
SECTION PE32 = sdm845Pkg/Binary/perseus/HWIODxeDriver/HWIODxeDriver.efi
SECTION UI = "HWIODxeDriver"
}
FILE DRIVER = 4db5dea6-5302-4d1a-8a82-677a683b0d29 {
SECTION DXE_DEPEX = sdm845Pkg/Binary/perseus/ClockDxe/ClockDxe.depex
SECTION PE32 = sdm845Pkg/Binary/perseus/ClockDxe/ClockDxe.efi
SECTION UI = "ClockDxe"
}
FILE DRIVER = 5776232e-082d-4b75-9a0e-fe1d13f7a5d9 {
SECTION DXE_DEPEX = sdm845Pkg/Binary/perseus/PmicDxe/PmicDxe.depex
SECTION PE32 = sdm845Pkg/Binary/perseus/PmicDxe/PmicDxe.efi
SECTION UI = "PmicDxe"
}
FILE DRIVER = 5bd181db-0487-4f1a-ae73-820e165611b3 {
SECTION DXE_DEPEX = sdm845Pkg/Binary/perseus/ButtonsDxe/ButtonsDxe.depex
SECTION PE32 = sdm845Pkg/Binary/perseus/ButtonsDxe/ButtonsDxe.efi
SECTION UI = "ButtonsDxe"
}
#
# Multiple Console IO support
#
INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
FILE DRIVER = 3299a266-15f0-4346-8318-716336736d3e {
SECTION DXE_DEPEX = sdm845Pkg/Binary/perseus/UsbDeviceDxe/UsbDeviceDxe.depex
SECTION PE32 = sdm845Pkg/Binary/perseus/UsbDeviceDxe/UsbDeviceDxe.efi
SECTION UI = "UsbDeviceDxe"
}
FILE DRIVER = 11faed4c-b21f-4d88-8e48-c4c28a1e50df {
SECTION DXE_DEPEX = sdm845Pkg/Binary/perseus/UsbPwrCtrlDxe/UsbPwrCtrlDxe.depex
SECTION PE32 = sdm845Pkg/Binary/perseus/UsbPwrCtrlDxe/UsbPwrCtrlDxe.efi
SECTION UI = "UsbPwrCtrlDxe"
}
FILE DRIVER = 5af77f10-90df-4e7e-8325-a17ec09d5443 {
SECTION DXE_DEPEX = sdm845Pkg/Binary/perseus/UsbMsdDxe/UsbMsdDxe.depex
SECTION PE32 = sdm845Pkg/Binary/perseus/UsbMsdDxe/UsbMsdDxe.efi
SECTION UI = "UsbMsdDxe"
}
FILE DRIVER = 94f8a6a7-dc34-4101-88c1-99179cceae83 {
SECTION DXE_DEPEX = sdm845Pkg/Binary/perseus/UsbfnDwc3Dxe/UsbfnDwc3Dxe.depex
SECTION PE32 = sdm845Pkg/Binary/perseus/UsbfnDwc3Dxe/UsbfnDwc3Dxe.efi
SECTION UI = "UsbfnDwc3Dxe"
}
FILE DRIVER = cd823a4d-7dec-4531-ae5d-4134fa4127b8 {
SECTION DXE_DEPEX = sdm845Pkg/Binary/perseus/UsbConfigDxe/UsbConfigDxe.depex
SECTION PE32 = sdm845Pkg/Binary/perseus/UsbConfigDxe/UsbConfigDxe.efi
SECTION UI = "UsbConfigDxe"
}
#
# GPIO
#
#
# Virtual Keyboard
#
INF EmbeddedPkg/Drivers/VirtualKeyboardDxe/VirtualKeyboardDxe.inf
INF sdm845Pkg/sdm845Dxe/sdm845Dxe.inf
INF sdm845Pkg/SimpleFbDxe/SimpleFbDxe.inf
FILE DRIVER = 0d35cd8e-97ea-4f9a-96af-0f0d89f76567 {
SECTION DXE_DEPEX = sdm845Pkg/Binary/perseus/UFSDxe/UFSDxe.depex
SECTION PE32 = sdm845Pkg/Binary/perseus/UFSDxe/UFSDxe.efi
SECTION UI = "UFSDxe"
}
FILE DRIVER = 2a7b4bef-80cd-49e1-b473-374ba4d673fc {
SECTION DXE_DEPEX = sdm845Pkg/Binary/perseus/SPMI/SPMI.depex
SECTION PE32 = sdm845Pkg/Binary/perseus/SPMI/SPMI.efi
SECTION UI = "SPMI"
}
FILE DRIVER = f541d663-4a48-40aa-aabf-ff158ccae34c {
SECTION DXE_DEPEX = sdm845Pkg/Binary/perseus/SmemDxe/SmemDxe.depex
SECTION PE32 = sdm845Pkg/Binary/perseus/SmemDxe/SmemDxe.efi
SECTION UI = "SmemDxe"
}
FILE DRIVER = 10e193df-9966-44e7-b17c-59dd831e20fc {
SECTION DXE_DEPEX = sdm845Pkg/Binary/perseus/ChipInfo/ChipInfo.depex
SECTION PE32 = sdm845Pkg/Binary/perseus/ChipInfo/ChipInfo.efi
SECTION UI = "ChipInfo"
}
# FILE DRIVER = 7a32bd23-f735-4f57-aa1a-447d2fe3be0d {
# SECTION DXE_DEPEX = sdm845Pkg/Binary/perseus/SPI/SPI.depex
# SECTION PE32 = sdm845Pkg/Binary/perseus/SPI/SPI.efi
# SECTION UI = "SPI"
# }
#
# USB Host Support
#
INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf
#
# USB Mass Storage Support
#
INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
#
# USB Peripheral Support
#
INF EmbeddedPkg/Drivers/AndroidFastbootTransportUsbDxe/FastbootTransportUsbDxe.inf
#
# Fastboot
#
INF EmbeddedPkg/Application/AndroidFastboot/AndroidFastbootApp.inf
#
# FAT filesystem + GPT/MBR partitioning
#
INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
INF FatPkg/EnhancedFatDxe/Fat.inf
INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
#
# ACPI Support
#
INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
INF MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf
INF MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf
# INF RuleOverride = ACPITABLE sdm845Pkg/AcpiTables/AcpiTables.inf
FILE FREEFORM = 7E374E25-8E01-4FEE-87F2-390C23C606CD {
SECTION RAW = sdm845Pkg/AcpiTables/testing/CSRT.aml
SECTION RAW = sdm845Pkg/AcpiTables/testing/DBG2.aml
SECTION RAW = sdm845Pkg/AcpiTables/testing/DSDT.aml
SECTION RAW = sdm845Pkg/AcpiTables/testing/FACS.aml
SECTION RAW = sdm845Pkg/AcpiTables/testing/FADT.aml
SECTION RAW = sdm845Pkg/AcpiTables/testing/GTDT.aml
SECTION RAW = sdm845Pkg/AcpiTables/testing/IORT.aml
SECTION RAW = sdm845Pkg/AcpiTables/testing/MADT.aml
SECTION RAW = sdm845Pkg/AcpiTables/testing/MCFG.aml
SECTION RAW = sdm845Pkg/AcpiTables/testing/PPTT.aml
SECTION RAW = sdm845Pkg/AcpiTables/testing/TPM2.aml
# SECTION RAW = sdm845Pkg/AcpiTables/test2/CSRT.aml
# SECTION RAW = sdm845Pkg/AcpiTables/test2/DBG2.aml
# SECTION RAW = sdm845Pkg/AcpiTables/test2/DSDT.aml
# SECTION RAW = sdm845Pkg/AcpiTables/test2/FACS.aml
# SECTION RAW = sdm845Pkg/AcpiTables/test2/FADT.aml
# SECTION RAW = sdm845Pkg/AcpiTables/test2/GTDT.aml
# SECTION RAW = sdm845Pkg/AcpiTables/test2/IORT.aml
# SECTION RAW = sdm845Pkg/AcpiTables/test2/MADT.aml
# SECTION RAW = sdm845Pkg/AcpiTables/test2/MCFG.aml
# SECTION RAW = sdm845Pkg/AcpiTables/test2/PPTT.aml
SECTION UI = "AcpiTables"
}
#
# FDT support
#
INF EmbeddedPkg/Drivers/DtPlatformDxe/DtPlatformDxe.inf
FILE FREEFORM = 25462CDA-221F-47DF-AC1D-259CFAA4E326 {
SECTION RAW = sdm845Pkg/FdtBlob/sdm845-xiaomi-perseus.dtb
}
#
# SMBIOS Support
#
INF sdm845Pkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
#
# UEFI applications
#
INF ShellPkg/Application/Shell/Shell.inf
!ifdef $(INCLUDE_TFTP_COMMAND)
INF ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf
!endif #$(INCLUDE_TFTP_COMMAND)
#
# Bds
#
INF MdeModulePkg/Universal/PrintDxe/PrintDxe.inf
INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
INF MdeModulePkg/Universal/DriverHealthManagerDxe/DriverHealthManagerDxe.inf
INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
INF MdeModulePkg/Application/UiApp/UiApp.inf
INF sdm845Pkg/Drivers/LogoDxe/LogoDxe.inf
[FV.FVMAIN_COMPACT]
FvAlignment = 8
ERASE_POLARITY = 1
MEMORY_MAPPED = TRUE
STICKY_WRITE = TRUE
LOCK_CAP = TRUE
LOCK_STATUS = TRUE
WRITE_DISABLED_CAP = TRUE
WRITE_ENABLED_CAP = TRUE
WRITE_STATUS = TRUE
WRITE_LOCK_CAP = TRUE
WRITE_LOCK_STATUS = TRUE
READ_DISABLED_CAP = TRUE
READ_ENABLED_CAP = TRUE
READ_STATUS = TRUE
READ_LOCK_CAP = TRUE
READ_LOCK_STATUS = TRUE
INF ArmPlatformPkg/PrePi/PeiUniCore.inf
FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
SECTION FV_IMAGE = FVMAIN
}
}
!include sdm845Pkg/CommonFdf.fdf.inc