diff --git a/.gitignore b/.gitignore index 6ca6ee1..e6be9f0 100644 --- a/.gitignore +++ b/.gitignore @@ -6,4 +6,5 @@ uefi-*.img.gz-dtb workspace *.dll ramdisk -sdm845Pkg/Drivers/LogoDxe/Logo.bmp \ No newline at end of file +sdm845Pkg/Drivers/LogoDxe/Logo.bmp +.vscode \ No newline at end of file diff --git a/build.sh b/build.sh index aa9f0fb..437a654 100755 --- a/build.sh +++ b/build.sh @@ -33,10 +33,12 @@ function _build(){ make -C "${_EDK2}/BaseTools" -j "$(nproc)"||exit "$?" # based on the instructions from edk2-platform rm -f "boot_${DEVICE}.img" uefi_img "uefi-${DEVICE}.img.gz" "uefi-${DEVICE}.img.gz-dtb" - build -s -n 0 -a AARCH64 -t GCC5 -p "sdm845Pkg/${DEVICE}.dsc"||return "$?" + build -s -n 0 -a AARCH64 -t GCC5 -p "sdm845Pkg/Devices/${DEVICE}.dsc"||return "$?" gzip -c < workspace/Build/sdm845Pkg/DEBUG_GCC5/FV/SDM845PKG_UEFI.fd > "uefi-${DEVICE}.img.gz"||return "$?" cat "uefi-${DEVICE}.img.gz" "device_specific/${DEVICE}.dtb" > "uefi-${DEVICE}.img.gz-dtb"||return "$?" abootimg --create "boot-${DEVICE}.img" -k "uefi-${DEVICE}.img.gz-dtb" -r ramdisk||return "$?" + mv "uefi-${DEVICE}.img.gz" "workspace/" + mv "uefi-${DEVICE}.img.gz-dtb" "workspace/" echo "Build done: boot-${DEVICE}.img" set +x } diff --git a/device_specific/generic.dtb b/device_specific/generic.dtb new file mode 100644 index 0000000..938179b --- /dev/null +++ b/device_specific/generic.dtb @@ -0,0 +1 @@ +Dummy \ No newline at end of file diff --git a/sdm845Pkg/AcpiTables/845/DSDT.aml b/sdm845Pkg/AcpiTables/845/DSDT.aml new file mode 100644 index 0000000..1e28071 Binary files /dev/null and b/sdm845Pkg/AcpiTables/845/DSDT.aml differ diff --git a/sdm845Pkg/AcpiTables/845/DSDT.dsl b/sdm845Pkg/AcpiTables/845/DSDT.dsl new file mode 100644 index 0000000..abcc73c --- /dev/null +++ b/sdm845Pkg/AcpiTables/845/DSDT.dsl @@ -0,0 +1,74642 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20180105 (64-bit version) + * Copyright (c) 2000 - 2018 Intel Corporation + * + * Disassembling to symbolic ASL+ operators + * + * Disassembly of dsdt_850.aml, Sat Mar 9 21:03:12 2019 + * + * Original Table Header: + * Signature "DSDT" + * Length 0x000443A2 (279458) + * Revision 0x02 + * Checksum 0x0D + * OEM ID "QCOMM " + * OEM Table ID "SDM850 " + * OEM Revision 0x00000003 (3) + * Compiler ID "MSFT" + * Compiler Version 0x05000000 (83886080) + */ + +DefinitionBlock ("", "DSDT", 2, "QCOMM ", "SDM850 ", 0x00000003) +{ + External (_SB_.TZ98, UnknownObj) + External (_SB_.TZ98._PSV, IntObj) + External (_SB_.TZ98._TC1, IntObj) + External (_SB_.TZ98._TC2, IntObj) + External (_SB_.TZ98._TSP, IntObj) + External (_SB_.TZ98.TPSV, UnknownObj) + External (_SB_.TZ98.TTC1, UnknownObj) + External (_SB_.TZ98.TTC2, UnknownObj) + External (_SB_.TZ98.TTSP, UnknownObj) + External (BFCC, IntObj) + External (BOCP, IntObj) + External (CUST, IntObj) + External (DCMA, IntObj) + External (EMPT, IntObj) + External (IFGD, IntObj) + External (PCT1, UnknownObj) + External (PCT2, UnknownObj) + External (RID2, IntObj) + External (RID3, IntObj) + External (TRUU, UnknownObj) + External (VFGD, IntObj) + External (VLOW, IntObj) + External (VNOM, IntObj) + + Scope (\_SB) + { + Name (PSUB, "C153144D") + Name (SOID, 0xFFFFFFFF) // Holds the Chip Id + Name (SIDS, "899800000000000") // Holds the Chip ID translated to a string + Name (SIDV, 0xFFFFFFFF) // Holds the Chip Version as (major<<16)|(minor&0xffff) + Name (SVMJ, 0xFFFF) // Holds the major Chip Version + Name (SVMI, 0xFFFF) // Holds the minor Chip Version + Name (SDFE, 0xFFFF) // Holds the Chip Family enum + Name (SFES, "899800000000000") // Holds the Chip Family translated to a string + Name (SIDM, 0x0000000FFFFFFFFF) // Holds the Modem Support bit field + Name (SOSN, 0xAAAAAAAABBBBBBBB) + Name (RMTB, 0x99500000) + Name (RMTX, 0x00A00000) + Name (RFMB, 0x99F00000) + Name (RFMS, 0x00010000) + Name (RFAB, 0x99F10000) + Name (RFAS, 0x00010000) + Name (TCMA, 0x8B500000) + Name (TCML, 0x00A00000) + Name (SOSI, 0xDEADBEEFFFFFFFFF) + Name (MDID, 0xFFFFFFFF) + Device (UFS0) + { + Name (_DEP, Package (One) // _DEP: Dependencies + { + \_SB.PEP0 + }) + //Name (_HID, "NOPE1234") // _HID: Hardware ID + Name (_HID, "QCOM24A5") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + Name (_CID, "ACPIQCOM24A5") // _CID: Compatible ID + //Name (_CID, "ACPINOPE1234") // _CID: Compatible ID + Name (_UID, Zero) // _UID: Unique ID + Name (_CCA, Zero) // _CCA: Cache Coherency Attribute + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + Memory32Fixed (ReadWrite, + 0x01D84000, // Address Base + 0x00014000, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000129, + } + }) + Return (RBUF) /* \_SB_.UFS0._CRS.RBUF */ + } + + Device (DEV0) + { + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + Return (0x08) + } + + Method (_RMV, 0, NotSerialized) // _RMV: Removal Status + { + Return (Zero) + } + } + } + +#if 0 + Device (SDC2) + { + Name (_DEP, Package (0x02) // _DEP: Dependencies + { + \_SB.PEP0, + \_SB.GIO0 + }) + Name (_HID, "QCOM2466") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + Name (_CID, "ACPIQCOM2466") // _CID: Compatible ID + Name (_UID, One) // _UID: Unique ID + Name (_CCA, Zero) // _CCA: Cache Coherency Attribute + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + Memory32Fixed (ReadWrite, + 0x08804000, // Address Base + 0x00001000, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x000000EC, + } + GpioInt (Edge, ActiveBoth, SharedAndWake, PullUp, 0x7530, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x00C0 + } + GpioIo (Shared, PullUp, 0x0000, 0x0000, IoRestrictionNone, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x007E + } + }) + Return (RBUF) /* \_SB_.SDC2._CRS.RBUF */ + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0F) + } + } +#endif + + Device (ABD) + { + Name (_DEP, Package (One) // _DEP: Dependencies + { + \_SB.PEP0 + }) + Name (_HID, "QCOM0242") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + Name (_UID, Zero) // _UID: Unique ID + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0B) + } + + OperationRegion (ROP1, GenericSerialBus, Zero, 0x0100) + Name (AVBL, Zero) + Method (_REG, 2, NotSerialized) // _REG: Region Availability + { + If ((Arg0 == 0x09)) + { + AVBL = Arg1 + } + } + } + + Name (ESNL, 0x14) // Exsoc name limit 20 characters + Name (DBFL, 0x17) // buffer Length, should be ESNL+3 + Device (PMIC) + { + Name (_DEP, Package (One) // _DEP: Dependencies + { + \_SB.SPMI + }) + Name (_HID, "QCOM0266") // _HID: Hardware ID + Name (_CID, "PNP0CA3") // _CID: Compatible ID + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0B) + } + + Method (PMCF, 0, NotSerialized) + { + Name (CFG0, Package (0x04) + { + // PMIC Info + 0x03, // Number of PMICs, must match the number of info packages + Package (0x02) + { + Zero, + One + }, + + Package (0x02) + { + 0x02, + 0x03 + }, + + Package (0x02) + { + 0x04, + 0x05 + } + }) + Return (CFG0) /* \_SB_.PMIC.PMCF.CFG0 */ + } + } + + Device (PM01) + { + Name (_HID, "QCOM0269") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + Name (_UID, One) // _UID: Unique ID + Name (_DEP, Package (One) // _DEP: Dependencies + { + \_SB.PMIC + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0B) + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + // + // QGIC Interrupt Resource + // + // Register for SPMI interrupt 513 + // + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000201, + } + }) + Return (RBUF) /* \_SB_.PM01._CRS.RBUF */ + } + + // _DSM method to mark PM01's ActiveBoth interrupts + Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method + { + While (One) + { + Name (_T_0, Buffer (0x01) // _T_x: Emitted by ASL Compiler + { + 0x00 // . + }) + CopyObject (ToBuffer (Arg0), _T_0) /* \_SB_.PM01._DSM._T_0 */ + If ((_T_0 == ToUUID ("4f248f40-d5e2-499f-834c-27758ea1cd3f") /* GPIO Controller */)) + { + While (One) + { + Name (_T_1, 0x00) // _T_x: Emitted by ASL Compiler + _T_1 = ToInteger (Arg2) + If ((_T_1 == Zero)) + { + Return (Buffer (One) + { + 0x03 // . + }) + } + ElseIf ((_T_1 == One)) + { + Return (Package (0x02) + { + Zero, + One + }) + } + Else + { + } + + Break + } + } + Else + { + Return (Buffer (One) + { + 0x00 // . + }) + } + + Break + } + } + } + + // + // PMIC Apps Driver + // + Device (PMAP) + { + Name (_HID, "QCOM0268") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + Name (_DEP, Package (0x03) // _DEP: Dependencies + { + \_SB.PMIC, + \_SB.ABD, + \_SB.SCM0 + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0B) + } + + //PMAP is dependent on ABD for operation region access + + // Get pseudo SPB controller port which is used to handle the ACPI operation region access + Method (GEPT, 0, NotSerialized) + { + Name (BUFF, Buffer (0x04){}) + CreateByteField (BUFF, Zero, STAT) + CreateWordField (BUFF, 0x02, DATA) + DATA = 0x02 + Return (DATA) /* \_SB_.PMAP.GEPT.DATA */ + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, Buffer (0x02) + { + 0x79, 0x00 // y. + }) + Return (RBUF) /* \_SB_.PMAP._CRS.RBUF */ + } + } + + Device (PRTC) + { + Name (_HID, "ACPI000E" /* Time and Alarm Device */) // _HID: Hardware ID + /*Name (_DEP, Package (0x01) // _DEP: Dependencies + { + \_SB.PMAP // PRTC is dependent on PMAP which implements the RTC Functions + })*/ + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0B) + } + + //Get the capabilities of the time and alarm device + Method (_GCP, 0, NotSerialized) // _GCP: Get Capabilities + { + Return (0x04) + } + + /*Field (\_SB.ABD.ROP1, BufferAcc, NoLock, Preserve) + { + Connection ( + I2cSerialBusV2 (0x0002, ControllerInitiated, 0x00000000, + AddressingMode7Bit, "\\_SB.ABD", + 0x00, ResourceConsumer, , Exclusive, + ) + ), + AccessAs (BufferAcc, AttribRawBytes (0x18)), + FLD0, 192 + }*/ + + Method (_GRT, 0, Serialized) // _GRT: Get Real Time + { + /*Name (BUFF, Buffer (0x1A){}) + CreateField (BUFF, 0x10, 0x80, TME1) + CreateField (BUFF, 0x90, 0x20, ACT1) + CreateField (BUFF, 0xB0, 0x20, ACW1) + BUFF = FLD0 /* \_SB_.PRTC.FLD0 * / + Return (TME1) /* \_SB_.PRTC._GRT.TME1 */ + + Local1 = Buffer(16){} + CreateWordField (Local1, Zero, TYEA) + CreateByteField (Local1, 0x02, TMNT) + CreateByteField (Local1, 0x03, TDAY) + CreateByteField (Local1, 0x04, THOU) + CreateByteField (Local1, 0x05, TMIN) + CreateByteField (Local1, 0x06, TSEC) + CreateByteField (Local1, 0x07, TISO) + CreateWordField (Local1, 0x08, TMIL) + CreateWordField (Local1, 0x0A, TTMZ) + CreateByteField (Local1, 0x0C, TDAS) + + TYEA = 2020 + TMNT = 9 + TDAY = 28 + THOU = 0 + TMIN = 0 + TSEC = 0 + TISO = 1 + TMIL = 0 + TTMZ = 2047 + TDAS = 0 + + return (Local1) + } + + Method (_SRT, 1, NotSerialized) // _SRT: Set Real Time + { + /*Name (BUFF, Buffer (0x32){}) + CreateByteField (BUFF, Zero, STAT) + CreateField (BUFF, 0x10, 0x80, TME1) + CreateField (BUFF, 0x90, 0x20, ACT1) + CreateField (BUFF, 0xB0, 0x20, ACW1) + ACT1 = Zero + TME1 = Arg0 + ACW1 = Zero + BUFF = FLD0 = BUFF /* \_SB_.PRTC._SRT.BUFF * / + If ((STAT != Zero)) + { + Return (One) + }*/ + + Return (Zero) + } + } + +#if 0 + Device (PM3P) + { + Name (_HID, "SAM0606") // _HID: Hardware ID + Name (_SUB, "C153144D") // _SUB: Subsystem ID + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0F) + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, Buffer (0x02) + { + 0x79, 0x00 // y. + }) + Return (RBUF) /* \_SB_.PM3P._CRS.RBUF */ + } + + Method (PMCF, 0, NotSerialized) + { + Name (CFG0, Package (0x04) + { + Zero, + 0x02, + One, + 0x02 + }) + Return (CFG0) /* \_SB_.PM3P.PMCF.CFG0 */ + } + + Name (BSTP, Package (0x08) + { + Zero, + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + Zero, + Zero, + 0xFFFFFFFF, + 0xFFFFFFFF + }) + Method (GBST, 0, NotSerialized) + { + If ((\_SB.EMEC.AVBL == One)) + { + BSTP [Zero] = \_SB.EMEC.CHST + BSTP [One] = \_SB.EMEC.CHGC + BSTP [0x02] = \_SB.EMEC.SOC + BSTP [0x03] = \_SB.EMEC.VOLT + BSTP [0x04] = \_SB.EMEC.CHTY + } + Else + { + ADBG ("EMECNotReady") + } + + Return (BSTP) /* \_SB_.PM3P.BSTP */ + } + } +#endif + + //****************************************** + //Configs for Battery Manager Device: PMBT + //****************************************** + //-------------------- + //PMBT: Method(BBAT) + //-------------------- + Name (BFCC, 0x4150) //* (mWh), Full Charge Capacity + Name (PCT1, 0x05) //* (% of FCC), Default Alert 1 + Name (PCT2, 0x09) //* (% of FCC), Default Alert 2 + //-------------------- + //PMBT: Method(BMNR) + //-------------------- + Name (CUST, "850_HAN") //* cust file identifier + //-------------------- + //PMBT: Method(BPLT) + //-------------------- + Name (VNOM, 0x0ED8) //* (mV), Nominal Battery Voltage + Name (VLOW, 0x0CE4) //* (mV), Low Battery Voltage + Name (EMPT, 0x0C80) //* (mV), VCutOff + Name (DCMA, 0x0384) //* (mA), DC Current + Name (BOCP, 0x1194) //* (mA), OCP current used in BCL + Name (BVLO, 0x0BB8) //* (mV), BCL low Vbatt + Name (BLOP, 0x14) //* (%), BCL Low batt percent notification + Name (BNOP, 0x16) //* (%), BCL normal batt percent notification + Name (IFGD, Zero) + Name (VFGD, Zero) + Name (VDD1, 0x10FE) + Name (FCC1, 0x0BEA) + Name (HCLI, 0x0A) + Name (SCLI, 0x14) + Name (SHLI, 0x2D) + Name (HHLI, 0x3A) + Name (FVC1, Zero) + Name (FVH1, 0xC8) + Name (CCC1, 0x0352) + //-------------------- + //PMBT: Method(CTMC) + //-------------------- + Name (RID2, 0x3A98) //* (Ohm), min RID for NORMAL category: 15K + Name (RID3, 0x000222E0) //* (Ohm), max RID for NORMAL category: 140K + +#if 0 + //PMIC EIC + // + Device (PEIC) + { + Name (_HID, "QCOM02D3") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + I2cSerialBusV2 (0x0055, ControllerInitiated, 0x00061A80, + AddressingMode7Bit, "\\_SB.I2C4", + 0x00, ResourceConsumer, , Exclusive, + ) + }) + Return (RBUF) /* \_SB_.PEIC._CRS.RBUF */ + } + + Method (PMCF, 0, NotSerialized) + { + Name (CFG0, Package (0x04) + { + // Charger Info + 0xFF, + Zero, + Zero, + 0x02 + }) + Return (CFG0) /* \_SB_.PEIC.PMCF.CFG0 */ + } + } +#endif + + Device (BCL1) + { + Name (_HID, "QCOM02D6") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + Name (_DEP, Package (One) // _DEP: Dependencies + { + \_SB.PMIC + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (Zero) + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + GpioInt (Edge, ActiveHigh, Shared, PullUp, 0x0000, + "\\_SB.PM01", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0040 + } + GpioInt (Edge, ActiveHigh, Shared, PullUp, 0x0000, + "\\_SB.PM01", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0041 + } + GpioInt (Edge, ActiveHigh, Shared, PullUp, 0x0000, + "\\_SB.PM01", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0042 + } + GpioInt (Edge, ActiveHigh, Shared, PullUp, 0x0000, + "\\_SB.PM01", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0043 + } + GpioInt (Edge, ActiveHigh, Shared, PullUp, 0x0000, + "\\_SB.PM01", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0044 + } + GpioInt (Edge, ActiveHigh, Shared, PullUp, 0x0000, + "\\_SB.PM01", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x004B + } + GpioInt (Edge, ActiveHigh, Shared, PullUp, 0x0000, + "\\_SB.PM01", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0150 + } + GpioInt (Edge, ActiveHigh, Shared, PullUp, 0x0000, + "\\_SB.PM01", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0151 + } + GpioInt (Edge, ActiveHigh, Shared, PullUp, 0x0000, + "\\_SB.PM01", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0153 + } + GpioInt (Edge, ActiveHigh, Shared, PullUp, 0x0000, + "\\_SB.PM01", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0154 + } + GpioInt (Edge, ActiveHigh, Shared, PullUp, 0x0000, + "\\_SB.PM01", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0144 + } + GpioInt (Edge, ActiveHigh, Shared, PullUp, 0x0000, + "\\_SB.PM01", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0146 + } + GpioInt (Edge, ActiveBoth, Shared, PullUp, 0x0000, + "\\_SB.PM01", 0x00, ResourceConsumer, , + RawDataBuffer (0x01) // Vendor Data + { + 0x08 + }) + { // Pin list + 0x0158 + } + GpioInt (Edge, ActiveBoth, Shared, PullUp, 0x0000, + "\\_SB.PM01", 0x00, ResourceConsumer, , + RawDataBuffer (0x01) // Vendor Data + { + 0x08 + }) + { // Pin list + 0x0159 + } + GpioInt (Edge, ActiveBoth, Shared, PullUp, 0x0000, + "\\_SB.PM01", 0x00, ResourceConsumer, , + RawDataBuffer (0x01) // Vendor Data + { + 0x08 + }) + { // Pin list + 0x015A + } + }) + Return (RBUF) /* \_SB_.BCL1._CRS.RBUF */ + } + + Method (BCLS, 0, NotSerialized) + { + Name (CFG0, Package (0x0B) + { + 0x02, + One, + 0x1388, + 0x50, + 0x5A, + 0x0CE4, + 0x0A28, + 0x0C80, + 0x0ABE, + 0x09C4, + 0x0A + }) + Return (CFG0) /* \_SB_.BCL1.BCLS.CFG0 */ + } + + Method (BCLQ, 0, NotSerialized) + { + Name (CFG0, Package (0x06) + { + "VCOMP_LOW0", + "VCOMP_LOW1", + "VCOMP_LOW2", + "VCOMP_HI", + "SYS_OK", + "BAN_ALARM" + }) + Return (CFG0) /* \_SB_.BCL1.BCLQ.CFG0 */ + } + } + + Device (PTCC) + { + Name (_HID, "QCOM02E6") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + Name (_DEP, Package (One) // _DEP: Dependencies + { + \_SB.PMIC//, + //\_SB.PMBT + }) + /*Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (Zero) + }*/ + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + GpioInt (Edge, ActiveHigh, SharedAndWake, PullNone, 0x0000, + "\\_SB.PM01", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x00EF + } + GpioInt (Edge, ActiveHigh, SharedAndWake, PullNone, 0x0000, + "\\_SB.PM01", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x010E + } + GpioInt (Edge, ActiveHigh, SharedAndWake, PullNone, 0x0000, + "\\_SB.PM01", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x010D + } + GpioInt (Edge, ActiveHigh, SharedAndWake, PullNone, 0x0000, + "\\_SB.PM01", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x010C + } + GpioInt (Edge, ActiveHigh, SharedAndWake, PullNone, 0x0000, + "\\_SB.PM01", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x010B + } + GpioInt (Edge, ActiveHigh, SharedAndWake, PullNone, 0x0000, + "\\_SB.PM01", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x010A + } + GpioInt (Edge, ActiveHigh, SharedAndWake, PullNone, 0x0000, + "\\_SB.PM01", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0109 + } + GpioInt (Edge, ActiveHigh, SharedAndWake, PullNone, 0x0000, + "\\_SB.PM01", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0108 + } + GpioInt (Edge, ActiveHigh, Exclusive, PullUp, 0x0000, + "\\_SB.PM01", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x00D9 + } + GpioInt (Edge, ActiveBoth, Exclusive, PullUp, 0x0000, + "\\_SB.PM01", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0107 + } + GpioInt (Edge, ActiveHigh, Exclusive, PullUp, 0x0000, + "\\_SB.PM01", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x00EB + } + GpioIo (Exclusive, PullUp, 0x0000, 0x0000, IoRestrictionNone, + "\\_SB.PM01", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x01ED + } + }) + Return (RBUF) /* \_SB_.PTCC._CRS.RBUF */ + } + } + +#if 0 + // + //PMIC Battery Manger Driver + // + Device (PMBT) + { + Name (_HID, "QCOM0264") // _HID: Hardware ID + Name (_DEP, Package (2) // _DEP: Dependencies + { + \_SB.PMIC, + \_SB.OP3P + }) + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + GpioInt (Edge, ActiveHigh, Exclusive, PullUp, 0x0000, + "\\_SB.PM01", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x00EB + } + }) + Return (RBUF) /* \_SB_.PMBT._CRS.RBUF */ + } + + //ACPI methods for Battery Manager Device + Method (BMNR, 0, NotSerialized) + { + Name (CFG0, Package (0x04) + { + 2, //* 0: Select Platform: 0- No HW, 1- SMChg+FGGge, 2- SMB3pChg+SMB3pGge, 3- LBChg+VMBMS + Zero, //* 1: Error State Handling: 0- Don’t Shutdown, 1- Shutdown + One, //* 2: Listen to BatteryClass: 0- No 1- Yes + Zero //* 3: Test Mode Charger Current: 0- No current drawn, 1- Current drawn + }) + Return (CFG0) /* \_SB_.PMBT.BMNR.CFG0 */ + } + + //ACPI methods for Timer + Method (BTIM, 0, NotSerialized) + { + Name (CFG0, Package (0x08) + { + 0x2710, // Charging Heartbeat Timer + 0x2710, // Charging Tolerable Delay + 0x000493E0, // Discharging Heartbeat Timer + 0x0001D4C0, // Discharging Tolerable Delay + Zero, // Poll Timer , 0=Timer not used. + Zero, // Poll Tolerable Delay + 0x01AC7780, //Charging Timeout (TDone) Timer + Zero //Charging Timeout(TDone) Tolerable Delay + }) + Name (CFG1, Package (0x08) + { + 0x7530, + 0x2710, + 0x000493E0, + 0x0001D4C0, + Zero, + Zero, + 0x01AC7780, + Zero + }) + Name (HWID, Zero) + Return (CFG0) /* \_SB_.PMBT.BTIM.CFG0 */ + } + + //ACPI methods for Battery Info + Method (BBAT, 0, NotSerialized) + { + Name (CFG0, Package (0x0D) + { + One, //* 0: Battery Technology + 0x4C494F4E, //* 1: Battery Chemistry: hex(LION) + 0x2CEC, //* 2: BFCC: (mWh), Design Capacity + 0x2CEC, //* 3: BFCC: (mWh), Full Charge Capacity + 0x023F, //* 4: PCT1: (% of FCC), Default Alert 1 + 0x040B, //* 5: PCT2: (% of FCC), Default Alert 2 + "QCOMBATT01", //* 6: Device Name + "Qualcomm", //* 7: Manufacture Name + "QCOMBAT01_07012011", //* 8: Battery Unique ID + "07012011", //* 9: Battery Serial Number + 0x13, //* 10: Battery Manufacture Date + 0x04, //* 11: Battery Manufacture Month + 0x07DE //* 12: Battery Manufacture Year + }) + Return (CFG0) /* \_SB_.PMBT.BBAT.CFG0 */ + } + + //ACPI methods for Proprietary chargers + Method (BPCH, 0, NotSerialized) + { + Name (CFG0, Package (0x02) + { + 0x05DC, // charger current = 1500mA + 0x05DC + }) + Return (CFG0) /* \_SB_.PMBT.BPCH.CFG0 */ + } + + //ACPI methods for coin cell charger + Method (BCCC, 0, NotSerialized) + { + Name (CFG0, Package (0x03) + { + One, //Enable coin cell charger; 1 = enable, 0 = disable + Zero, // RSET, 0=2K1, 1=1K7, 2=1K2, 3 = 0K8 + Zero // VSET, 0=2V5, 1=3V2, 2=3V1, 3=3V0 + }) + Return (CFG0) /* \_SB_.PMBT.BCCC.CFG0 */ + } + + //ACPI methods for Recharge/Maintenance Mode + Method (BRCH, 0, NotSerialized) + { + Name (CFG0, Package (0x02) + { + 0x64, // Delta V Recharge threshold = 100mV + Zero // Delta V Recharge Reduction below Normal= 0mV + }) + Return (CFG0) /* \_SB_.PMBT.BRCH.CFG0 */ + } + + Method (_BQI, 0, NotSerialized) + { + Name (CFG0, Package (0x01) + { + Zero + }) + Return (CFG0) /* \_SB_.PMBT._BQI.CFG0 */ + } + + //ACPI methods for Interrupt Name + Method (BIRQ, 0, NotSerialized) + { + Name (CFG0, Package () + { + "SmbStatIrq" + }) + Return (CFG0) /* \_SB_.PMBT.BIRQ.CFG0 */ + } + + //ACPI methods for Platform File + Method (BPLT, 0, NotSerialized) + { + Name (CFG0, Package (0x25) + { + 0x03FC, //* 0: ACPI Version + 0x0ED8, //* 1: VNOM: (mV), Nominal Battery Voltage + 0x0DAC, //* 2: VLOW: (mV), Low Battery Voltage + 0x0D48, //* 3: EMPT: (mV), VcutOff + 0x0384, //* 4: DCMA: (mA), DC Current + One, //* 5: ChargePath Priority: Select 0 for DC, 1 for USB + 0x32, //* 6: RSLOW for maxFlashCurrentPrediction + 0x32, //* 7: RPARA for maxFlashCurrentPrediction + 0x1388, //* 8: VINFLASH for maxFlashCurrentPrediction + 0x08, //* 9: FlashParam for maxFlashCurrentPrediction + One, //* 10: AFP Mode Supported + 0x50, //* 11: AFP Trigger Max Battery Temp (+80 deg C) + 0xFFFFFFEC, //* 12: AFP Trigger Min Battery Temp (-20 deg C) + 0x48, //* 13: Watchdog timer in secs + 0x64, //* 14: Charger iterm 100 mA for now + 0x1E, //* 15: SRAM logging timer + 0x05, //* 16: VBATT average Window Size + 0x06, //* 17: Emergency Shutdown Initial SOC + 0x01F4, //* 18: SoC convergent point + 0x7E, //* 19: LM_Threshold + 0x0190, //* 20: MH_Threshold + 0x1194, + 0x0BB8, + 0x012C, + 0x01F4, + 0x05DC, + 0x0F, + 0x11, + 0x02EE, + 0x08, + One, + 0x1004, + 0x32, + One, + Zero, + Zero, + One + }) + Name (CFG1, Package (0x25) + { + 0x03FC, + 0x0ED8, + 0x0DAC, + 0x0D48, + 0x0384, + One, + 0x32, + 0x32, + 0x1388, + 0x08, + One, + 0x50, + 0xFFFFFFEC, + 0x48, + 0x64, + 0x1E, + 0x05, + 0x06, + 0x01F4, + 0x7E, + 0x0190, + 0x1194, + 0x0BB8, + 0x012C, + 0x01F4, + 0x05DC, + 0x0F, + 0x11, + 0x02EE, + One, + One, + 0x1004, + 0x32, + Zero, + Zero, + Zero, + One + }) + Return (CFG0) /* \_SB_.PMBT.BPLT.CFG0 */ + } + + //ACPI methods for Platform File + Method (BPTM, 0, NotSerialized) + { + Name (CFG0, Package (0x02) + { + 0x3A98, + Zero + }) + Return (CFG0) /* \_SB_.PMBT.BPTM.CFG0 */ + } + + //ACPI methods for JEITA + Method (BJTA, 0, NotSerialized) + { + Name (CFG0, Package (0x11) + { + One, + 0x10FE, + 0x0834, + Zero, + 0x3C, + 0x02, + 0x04, + 0x02, + 0x10FE, + 0x041A, + 0x0A, + 0x1097, + 0x0834, + 0x2D, + 0x1064, + 0x0834, + 0x32 + }) + Return (CFG0) /* \_SB_.PMBT.BJTA.CFG0 */ + } + + //ACPI methods for Thermal + Method (BTHM, 0, NotSerialized) + { + Name (CFG0, Package (0x07) + { + 0x0BB8, // IUSBMax (mA),maximum USB input current for the HW platform + 0x03E8, // IWLCMax (mA), maximum DC input current for the HW platform + 0x46, // %,Thermal mitigation perc at which HVDCP voltage reduces from 9V to 5V + 0x50, // %,Thermal mitigation perc at which HVDCP voltage increases from 5V to 9V + 0x01F4, // Ibat_therm (mA), IBAt_THERM value to which it drops during thermal mitigation. + 0x31, // %, Thermal mitigation perc at which Ibat reduces from Ibat_Max to Ibat_therm + 0x36 // %, Thermal mitigation perc at which Ibat increases from Ibat_therm to Ibat_Max + }) + Return (CFG0) /* \_SB_.PMBT.BTHM.CFG0 */ + } + + //ACPI methods for Battery Error Handling + Method (BEHC, 0, NotSerialized) + { + //Actions for Battery Error Handling + // 0x0 - Do Nothing + // 0x1 - Reload Charge Table + // 0x2 - Error Shutdown + // 0x4 - Emergency Shutdown + // 0x8 - Enter Test Mode + Name (CFG0, Package (0x08) + { + One, + 0x08, + One, + One, + One, + 0x04, + 0x02, + 0x04 + }) + Name (CFG1, Package (0x08) + { + One, + 0x08, + One, + One, + One, + 0x04, + 0x02, + 0x04 + }) + Name (HWID, Zero) + Return (CFG0) /* \_SB_.PMBT.BEHC.CFG0 */ + } + + //ACPI methods for Charge Table Management Configuration + Method (CTMC, 0, NotSerialized) + { + Name (CFG0, Package (0x07) + { + Zero, //* 0: min RID for DEBUG category: 0K + 0x36B0, //* 1: max RID for DEBUG category: + 0x4A38, //* 2: RID2: min RID for NORMAL category: + 0x000222E0, //* 3: RID3: max RID for NORMAL category: + 0x0003A980, //* 4: min RID for SMART category: + 0x0006DDD0, //* 5: max RID for SMART category: + One //* 6: Number of charging table + }) + Return (CFG0) /* \_SB_.PMBT.CTMC.CFG0 */ + } + + //ACPI methods for Battery Charge Tables #1 + Method (BCT1, 0, NotSerialized) + { + Name (CFG0, Package (0x15) + { + Zero, //* 0: Battery Category: 0-NORMAL, 1-SMART + 0xFFFFFFEC, //* 1: min operating battery temp (-20 deg C) + 0x50, //* 2: max operating battery temp (+80 deg C) + Package (0x04) + { + Zero, + Zero, + Zero, + Zero + }, //* 3: 128-bit battery info for future expansion + + One, + 0x10FE, + 0x0834, + Zero, + 0x3C, + 0x02, + 0x04, + 0x02, + 0x10FE, + 0x03E8, + 0x0A, + 0x1090, + 0x0834, + 0x2D, + 0x1054, + 0x0834, + 0x32 + }) + Return (CFG0) /* \_SB_.PMBT.BCT1.CFG0 */ + } + } +#endif + + Device (PMBT) { + Name (_HID, "QCOM0264") + Name (_DEP, Package(0x2) { + \_SB_.PMIC, + \_SB_.OP3P + }) + + Alias (\_SB.PSUB, _SUB) + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0B) + } + + Method (_CRS, 0x0, NotSerialized) { + Name (RBUF, ResourceTemplate () + { + //GpioInt(Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.PM01",,,,) {58} // STAT Interrupt + }) + Return (RBUF) + } + + //ACPI methods for Battery Manager Device + Method (BMNR) { + Name (CFG0, + Package(){ + 2, // Select Platform: 0- No HW, 1- SMChg+FGGge, 2- SMB3pChg+SMB3pGge, 3- LBChg+VMBMS + 0, // Error State Handling: 0- Don't Shutdown, 1- Shutdown + 1, // Listen to BatteryClass: 0- No 1- Yes + 0 // Test Mode Charger Current: 0- No current drawn, 1- Current drawn + }) + Return (CFG0) + } + + //ACPI methods for Timer + Method (BTIM) { + Name (CFG0, + Package(){ + 20000, // Charging Heartbeat Timer + 10000, // Charging Tolerable Delay + 300000, // Discharging Heartbeat Timer + 120000, // Discharging Tolerable Delay + 0, // Poll Timer , 0=Timer not used. + 0, // Poll Tolerable Delay + 28080000, //Charging Timeout (TDone) Timer + 0, //Charging Timeout(TDone) Tolerable Delay + }) + Return (CFG0) + } + + + //ACPI methods for Battery Info + Method (BBAT) { + Name (CFG0, + Package(){ + 1, // Battery Technology + 0x4C494F4E, // Battery Chemistry: hex(LION) + 9500, //8360, // (mWh), Design Capacity + 9500, //8360, // (mWh), Full Charge Capacity + 475, // Default Alert 1 (5% of full capacity) + 855, //Default Alert 2 (9% of full capacity) + "QCOMBATT01", //Device Name + "Qualcomm", // Manufacture Name + "QCOMBAT01_07012011", // Battery Unique ID + "07012011", // Battery Serial Number + 02, // Battery Manufacture Date + 07, // Battery Manufacture Month + 2015 // Battery Manufacture Year + }) + Return (CFG0) + } + + //ACPI methods for Proprietary chargers + Method (BPCH) { + Name (CFG0, + Package(){ + 0, // HVDCP charger not supported + 500 // Invalid Wall charger current = 500mA + }) + Return (CFG0) + } + + //ACPI methods for coin cell charger + Method (BCCC) { + Name (CFG0, + Package(){ + 1, //Enable coin cell charger; 1 = enable, 0 = disable + 0, // RSET, 0=2K1, 1=1K7, 2=1K2, 3 = 0K8 + 0 // VSET, 0=2V5, 1=3V2, 2=3V1, 3=3V0 + }) + Return (CFG0) + } + + //ACPI methods for Interrupt Name + Method (BIRQ) { + Name (CFG0, + Package(){ + //"SmbStatIrq" //SMB interrupt + }) + Return (CFG0) + } + + //ACPI methods for Platform File + Method (BPLT) { + Name (CFG0, + Package(){ + 1005, // ACPI Version + 3800, // (mV), Nominal Battery Voltage + 3500, // (mV), Low Battery Voltage + 3400, // (mV), Empty Battery Voltage + 100, // (mA), Termination Current + 500, // (per mil), Convergent SOC + 0, // Min Battery ID + 1800, // Max Battery ID + 34522, // Thermistor c1 coefficient (=0x86DB default) + 33422, // cc to soc coefficient (=0x8372: for 2200mAh) + 750 //soc (75%) below which no soc linearization even in CV charging + }) + Return (CFG0) + } + + //ACPI methods for Platform File + Method (BPTM) { + Name (CFG0, + Package(){ + 50000, // Emergency Timer + 10000, // Emergency Tolerable Delay + }) + Return (CFG0) + } + + //ACPI methods for JEITA + //No JEITA + Method (BJTA) { + Name (CFG0, + Package(){ + 1, // Select JEITA Configuration: 0- No JEITA, 1- SW JEITA, 2- HW JEITA + 4350, // Max Battery Voltage (mV) for Standard Zone + 1500, // Max Battery Current (mA) for Standard Zone + 0, // Safe Min Temperature(in deg C) eg. -2 for 0xFFFFFFFE (2's complement in case of -ve number) + 60, // Safe Max Temperature(in deg C) + 1, // Temperature Hysteresis (in deg C) + // SW Jeita Entries + 4, // Total Zones (Standard Zone + 3 Jeita Zone) + 2, // Standard Zone # + 4350, // Voltage Zone 1, 4200 mV + 750, // Current Zone 1, 750 mA + 10, // Temperature Zone 1, 10 deg C + 4350, // Voltage Zone 3, 4150 mV + 1500, // Current Zone 3, 1500 mA + 45, // Temperature Zone 3, 45 deg C + 4100, // Voltage Zone 4, 4100 mV + 750, // Current Zone 4, 1500 mA + 50 // Temperature Zone 4, 50 deg C + }) + Return (CFG0) + } + + //ACPI methods for Recharge/Maintenance Mode + Method (BRCH) { + Name (CFG0, + Package(){ + 100, // Delta V Recharge threshold = 100mV + 0 // Delta V Recharge Reduction below Normal= 0mV + }) + Return (CFG0) + } + Method (BEHC) + { + //Actions for Battery Error Handling + // 0x0 - Do Nothing + // 0x1 - Reload Charge Table + // 0x2 - Error Shutdown + // 0x4 - Emergency Shutdown + // 0x8 - Enter Test Mode + Name (CFG0, + Package(){ + 1, //1-Feature Enable, 0-Feature Disable + 0x8, //Action(s) for DEBUG state -> Enter Test Mode + 0x1, //Action(s) for NORMAL state -> Reload Charge Table + 0x1, //Action(s) for SMART_AUTHENTICATED state -> Reload Charge Table + 0x2, //Action(s) for UNKNOWN state -> Error Shutdown + 0x2, //Action(s) for NOT_PRESENT state -> Error Shutdown + 0x2, //Action(s) for INVALID state -> Error Shutdown + 0x2 //Action(s) for OUT_OP_RANGE state -> Error Shutdown + }) + Return (CFG0) + } + //ACPI methods for Charge Table Management Configuration + Method (CTMC) + { + Name (CFG0, + Package(){ + 1800, //min BATT_ID Voltage(mV) for DEBUG category: 1800 mV (debug board support disabled since BAT_ID is grounded) + 1800, //max BATT_ID Voltage(mV) for DEBUG category: 1800 mV (debug board support disabled since BAT_ID is grounded) + 0, //min BATT_ID Voltage(mV) for NORMAL category: 0 mV (maximize BAT_ID range for NORMAL battery ) + 1800, //max BATT_ID Voltage(mV) for NORMAL category: 1800 mV(maximize BAT_ID range for NORMAL battery ) + 1800, //min BATT_ID Voltage(mV) for SMART category: 1800 mV (smart battery support disabled since BAT_ID is grounded) + 1800, //max BATT_ID Voltage(mV) for SMART category: 1800 mV (smart battery support disabled since BAT_ID is grounded) + 1, //Number of charging table + }) + Return (CFG0) + } + //ACPI methods for Battery Charge Tables #1 + Method (BCT1) + { + Name (CFG0, + Package(){ + 0, //Battery Category: 0-NORMAL, 1-SMART + 0xFFFFFFEC, //min operating battery temp (-20 deg C) + 70, //max operating battery temp (+70 deg C) + Package(4){0,0,0,0},//128-bit battery info for future expansion + //Jeita Settings + 1, // Select JEITA Configuration: 0- No JEITA, 1- SW JEITA, 2- HW JEITA + 4200, // Max Battery Voltage (mV) for Standard Zone + 1500, // Max Battery Current (mA) for Standard Zone + 0, // Safe Min Temperature(in deg C) eg. -2 for 0xFFFFFFFE (2's complement in case of -ve number) + 60, // Safe Max Temperature(in deg C) + 2, // Temperature Hysteresis (in deg C) + // SW Jeita Entries + 4, // Total Zones (Standard Zone + 3 Jeita Zone) + 2, // Standard Zone # + 4200, // Voltage Zone 1, 4200 mV + 750, // Current Zone 1, 750 mA + 10, // Temperature Zone 1, 10 deg C + 4150, // Voltage Zone 3, 4150 mV + 1500, // Current Zone 3, 1500 mA + 45, // Temperature Zone 3, 45 deg C + 4100, // Voltage Zone 4, 4100 mV + 1500, // Current Zone 4, 1500 mA + 50 // Temperature Zone 4, 50 deg C + }) + Return (CFG0) + } + } + + + // + //PMIC Battery Miniclass Driver + // + Device (PMBM) + { + Name (_HID, "QCOM0263") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + Name (_DEP, Package (One) // _DEP: Dependencies + { + \_SB.PMBT + }) + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, Buffer (0x02) + { + 0x79, 0x00 // y. + }) + Return (RBUF) /* \_SB_.PMBM._CRS.RBUF */ + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0B) + } + } + + Device (PEP0) + { + Name (_HID, "QCOM0237") // _HID: Hardware ID + Name (_CID, "PNP0D80" /* Windows-compatible System Power Management Controller */) // _CID: Compatible ID + Method (THTZ, 4, NotSerialized) + { + While (One) + { + Name (_T_0, 0x00) // _T_x: Emitted by ASL Compiler + _T_0 = ToInteger (Arg0) + If ((_T_0 == One)) + { + While (One) + { + Name (_T_1, 0x00) // _T_x: Emitted by ASL Compiler + _T_1 = ToInteger (Arg3) + If ((_T_1 == Zero)) + { + If (Arg2) + { + \_SB.TZ1.TPSV = Arg1 + Notify (\_SB.TZ1, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ1._PSV ()) + } + ElseIf ((_T_1 == 0x02)) + { + If (Arg2) + { + \_SB.TZ1.TTSP = Arg1 + Notify (\_SB.TZ1, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ1._TSP ()) + } + ElseIf ((_T_1 == 0x03)) + { + If (Arg2) + { + \_SB.TZ1.TTC1 = Arg1 + Notify (\_SB.TZ1, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ1._TC1 ()) + } + ElseIf ((_T_1 == 0x04)) + { + If (Arg2) + { + \_SB.TZ1.TTC2 = Arg1 + Notify (\_SB.TZ1, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ1._TC2 ()) + } + Else + { + Return (0xFFFF) + } + + Break + } + } + ElseIf ((_T_0 == 0x03)) + { + While (One) + { + Name (_T_2, 0x00) // _T_x: Emitted by ASL Compiler + _T_2 = ToInteger (Arg3) + If ((_T_2 == Zero)) + { + If (Arg2) + { + \_SB.TZ3.TPSV = Arg1 + Notify (\_SB.TZ3, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ3._PSV ()) + } + ElseIf ((_T_2 == 0x02)) + { + If (Arg2) + { + \_SB.TZ3.TTSP = Arg1 + Notify (\_SB.TZ3, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ3._TSP ()) + } + ElseIf ((_T_2 == 0x03)) + { + If (Arg2) + { + \_SB.TZ3.TTC1 = Arg1 + Notify (\_SB.TZ3, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ3._TC1 ()) + } + ElseIf ((_T_2 == 0x04)) + { + If (Arg2) + { + \_SB.TZ3.TTC2 = Arg1 + Notify (\_SB.TZ3, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ3._TC2 ()) + } + Else + { + Return (0xFFFF) + } + + Break + } + } + ElseIf ((_T_0 == 0x04)) + { + While (One) + { + Name (_T_3, 0x00) // _T_x: Emitted by ASL Compiler + _T_3 = ToInteger (Arg3) + If ((_T_3 == Zero)) + { + If (Arg2) + { + \_SB.TZ4.TPSV = Arg1 + Notify (\_SB.TZ4, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ4._PSV ()) + } + ElseIf ((_T_3 == 0x02)) + { + If (Arg2) + { + \_SB.TZ4.TTSP = Arg1 + Notify (\_SB.TZ4, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ4._TSP ()) + } + ElseIf ((_T_3 == 0x03)) + { + If (Arg2) + { + \_SB.TZ4.TTC1 = Arg1 + Notify (\_SB.TZ4, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ4._TC1 ()) + } + ElseIf ((_T_3 == 0x04)) + { + If (Arg2) + { + \_SB.TZ4.TTC2 = Arg1 + Notify (\_SB.TZ4, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ4._TC2 ()) + } + Else + { + Return (0xFFFF) + } + + Break + } + } + ElseIf ((_T_0 == 0x05)) + { + While (One) + { + Name (_T_4, 0x00) // _T_x: Emitted by ASL Compiler + _T_4 = ToInteger (Arg3) + If ((_T_4 == Zero)) + { + If (Arg2) + { + \_SB.TZ5.TPSV = Arg1 + Notify (\_SB.TZ5, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ5._PSV ()) + } + ElseIf ((_T_4 == 0x02)) + { + If (Arg2) + { + \_SB.TZ5.TTSP = Arg1 + Notify (\_SB.TZ5, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ5._TSP ()) + } + ElseIf ((_T_4 == 0x03)) + { + If (Arg2) + { + \_SB.TZ5.TTC1 = Arg1 + Notify (\_SB.TZ5, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ3._TC1 ()) + } + ElseIf ((_T_4 == 0x04)) + { + If (Arg2) + { + \_SB.TZ5.TTC2 = Arg1 + Notify (\_SB.TZ5, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ5._TC2 ()) + } + Else + { + Return (0xFFFF) + } + + Break + } + } + ElseIf ((_T_0 == 0x06)) + { + While (One) + { + Name (_T_5, 0x00) // _T_x: Emitted by ASL Compiler + _T_5 = ToInteger (Arg3) + If ((_T_5 == Zero)) + { + If (Arg2) + { + \_SB.TZ6.TPSV = Arg1 + Notify (\_SB.TZ6, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ6._PSV ()) + } + ElseIf ((_T_5 == 0x02)) + { + If (Arg2) + { + \_SB.TZ6.TTSP = Arg1 + Notify (\_SB.TZ6, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ6._TSP ()) + } + ElseIf ((_T_5 == 0x03)) + { + If (Arg2) + { + \_SB.TZ6.TTC1 = Arg1 + Notify (\_SB.TZ6, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ6._TC1 ()) + } + ElseIf ((_T_5 == 0x04)) + { + If (Arg2) + { + \_SB.TZ6.TTC2 = Arg1 + Notify (\_SB.TZ6, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ6._TC2 ()) + } + Else + { + Return (0xFFFF) + } + + Break + } + } + ElseIf ((_T_0 == 0x07)) + { + While (One) + { + Name (_T_6, 0x00) // _T_x: Emitted by ASL Compiler + _T_6 = ToInteger (Arg3) + If ((_T_6 == Zero)) + { + If (Arg2) + { + \_SB.TZ7.TPSV = Arg1 + Notify (\_SB.TZ7, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ7._PSV ()) + } + ElseIf ((_T_6 == One)) + { + If (Arg2) + { + \_SB.TZ7.TCRT = Arg1 + Notify (\_SB.TZ7, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ7._CRT ()) + } + ElseIf ((_T_6 == 0x02)) + { + If (Arg2) + { + \_SB.TZ7.TTSP = Arg1 + Notify (\_SB.TZ7, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ7._TSP ()) + } + ElseIf ((_T_6 == 0x03)) + { + If (Arg2) + { + \_SB.TZ7.TTC1 = Arg1 + Notify (\_SB.TZ7, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ7._TC1 ()) + } + ElseIf ((_T_6 == 0x04)) + { + If (Arg2) + { + \_SB.TZ7.TTC2 = Arg1 + Notify (\_SB.TZ7, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ7._TC2 ()) + } + Else + { + Return (0xFFFF) + } + + Break + } + } + ElseIf ((_T_0 == 0x08)) + { + While (One) + { + Name (_T_7, 0x00) // _T_x: Emitted by ASL Compiler + _T_7 = ToInteger (Arg3) + If ((_T_7 == Zero)) + { + If (Arg2) + { + \_SB.TZ8.TPSV = Arg1 + Notify (\_SB.TZ8, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ8._PSV ()) + } + ElseIf ((_T_7 == 0x02)) + { + If (Arg2) + { + \_SB.TZ8.TTSP = Arg1 + Notify (\_SB.TZ8, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ8._TSP ()) + } + ElseIf ((_T_7 == 0x03)) + { + If (Arg2) + { + \_SB.TZ8.TTC1 = Arg1 + Notify (\_SB.TZ8, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ8._TC1 ()) + } + ElseIf ((_T_7 == 0x04)) + { + If (Arg2) + { + \_SB.TZ8.TTC2 = Arg1 + Notify (\_SB.TZ8, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ8._TC2 ()) + } + Else + { + Return (0xFFFF) + } + + Break + } + } + ElseIf ((_T_0 == 0x09)) + { + While (One) + { + Name (_T_8, 0x00) // _T_x: Emitted by ASL Compiler + _T_8 = ToInteger (Arg3) + If ((_T_8 == Zero)) + { + If (Arg2) + { + \_SB.TZ9.TPSV = Arg1 + Notify (\_SB.TZ9, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ9._PSV ()) + } + ElseIf ((_T_8 == 0x02)) + { + If (Arg2) + { + \_SB.TZ9.TTSP = Arg1 + Notify (\_SB.TZ9, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ9._TSP ()) + } + ElseIf ((_T_8 == 0x03)) + { + If (Arg2) + { + \_SB.TZ9.TTC1 = Arg1 + Notify (\_SB.TZ9, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ9._TC1 ()) + } + ElseIf ((_T_8 == 0x04)) + { + If (Arg2) + { + \_SB.TZ9.TTC2 = Arg1 + Notify (\_SB.TZ9, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ9._TC2 ()) + } + Else + { + Return (0xFFFF) + } + + Break + } + } + ElseIf ((_T_0 == 0x14)) + { + While (One) + { + Name (_T_9, 0x00) // _T_x: Emitted by ASL Compiler + _T_9 = ToInteger (Arg3) + If ((_T_9 == Zero)) + { + If (Arg2) + { + \_SB.TZ20.TPSV = Arg1 + Notify (\_SB.TZ20, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ20._PSV ()) + } + ElseIf ((_T_9 == 0x02)) + { + If (Arg2) + { + \_SB.TZ20.TTSP = Arg1 + Notify (\_SB.TZ20, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ20._TSP ()) + } + ElseIf ((_T_9 == 0x03)) + { + If (Arg2) + { + \_SB.TZ20.TTC1 = Arg1 + Notify (\_SB.TZ20, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ20._TC1 ()) + } + ElseIf ((_T_9 == 0x04)) + { + If (Arg2) + { + \_SB.TZ20.TTC2 = Arg1 + Notify (\_SB.TZ20, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ20._TC2 ()) + } + Else + { + Return (0xFFFF) + } + + Break + } + } + ElseIf ((_T_0 == 0x15)) + { + While (One) + { + Name (_T_A, 0x00) // _T_x: Emitted by ASL Compiler + _T_A = ToInteger (Arg3) + If ((_T_A == Zero)) + { + If (Arg2) + { + \_SB.TZ21.TPSV = Arg1 + Notify (\_SB.TZ21, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ21._PSV ()) + } + ElseIf ((_T_A == 0x02)) + { + If (Arg2) + { + \_SB.TZ21.TTSP = Arg1 + Notify (\_SB.TZ21, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ21._TSP ()) + } + ElseIf ((_T_A == 0x03)) + { + If (Arg2) + { + \_SB.TZ21.TTC1 = Arg1 + Notify (\_SB.TZ21, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ21._TC1 ()) + } + ElseIf ((_T_A == 0x04)) + { + If (Arg2) + { + \_SB.TZ21.TTC2 = Arg1 + Notify (\_SB.TZ21, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ21._TC2 ()) + } + Else + { + Return (0xFFFF) + } + + Break + } + } + ElseIf ((_T_0 == 0x21)) + { + While (One) + { + Name (_T_B, 0x00) // _T_x: Emitted by ASL Compiler + _T_B = ToInteger (Arg3) + If ((_T_B == Zero)) + { + If (Arg2) + { + \_SB.TZ33.TPSV = Arg1 + Notify (\_SB.TZ33, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ33._PSV ()) + } + ElseIf ((_T_B == 0x02)) + { + If (Arg2) + { + \_SB.TZ33.TTSP = Arg1 + Notify (\_SB.TZ33, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ33._TSP ()) + } + ElseIf ((_T_B == 0x03)) + { + If (Arg2) + { + \_SB.TZ33.TTC1 = Arg1 + Notify (\_SB.TZ33, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ33._TC1 ()) + } + ElseIf ((_T_B == 0x04)) + { + If (Arg2) + { + \_SB.TZ33.TTC2 = Arg1 + Notify (\_SB.TZ33, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ33._TC2 ()) + } + Else + { + Return (0xFFFF) + } + + Break + } + } + ElseIf ((_T_0 == 0x24)) + { + While (One) + { + Name (_T_C, 0x00) // _T_x: Emitted by ASL Compiler + _T_C = ToInteger (Arg3) + If ((_T_C == Zero)) + { + If (Arg2) + { + \_SB.TZ36.TPSV = Arg1 + Notify (\_SB.TZ36, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ36._PSV ()) + } + ElseIf ((_T_C == 0x02)) + { + If (Arg2) + { + \_SB.TZ36.TTSP = Arg1 + Notify (\_SB.TZ36, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ36._TSP ()) + } + ElseIf ((_T_C == 0x03)) + { + If (Arg2) + { + \_SB.TZ36.TTC1 = Arg1 + Notify (\_SB.TZ36, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ36._TC1 ()) + } + ElseIf ((_T_C == 0x04)) + { + If (Arg2) + { + \_SB.TZ36.TTC2 = Arg1 + Notify (\_SB.TZ36, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ36._TC2 ()) + } + Else + { + Return (0xFFFF) + } + + Break + } + } + ElseIf ((_T_0 == 0x25)) + { + While (One) + { + Name (_T_D, 0x00) // _T_x: Emitted by ASL Compiler + _T_D = ToInteger (Arg3) + If ((_T_D == Zero)) + { + If (Arg2) + { + \_SB.TZ37.TPSV = Arg1 + Notify (\_SB.TZ37, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ37._PSV ()) + } + ElseIf ((_T_D == One)) + { + If (Arg2) + { + \_SB.TZ37.TCRT = Arg1 + Notify (\_SB.TZ37, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ37._CRT ()) + } + ElseIf ((_T_D == 0x02)) + { + If (Arg2) + { + \_SB.TZ37.TTSP = Arg1 + Notify (\_SB.TZ37, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ37._TSP ()) + } + ElseIf ((_T_D == 0x03)) + { + If (Arg2) + { + \_SB.TZ37.TTC1 = Arg1 + Notify (\_SB.TZ37, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ37._TC1 ()) + } + ElseIf ((_T_D == 0x04)) + { + If (Arg2) + { + \_SB.TZ37.TTC2 = Arg1 + Notify (\_SB.TZ37, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ37._TC2 ()) + } + Else + { + Return (0xFFFF) + } + + Break + } + } + ElseIf ((_T_0 == 0x26)) + { + While (One) + { + Name (_T_E, 0x00) // _T_x: Emitted by ASL Compiler + _T_E = ToInteger (Arg3) + If ((_T_E == Zero)) + { + If (Arg2) + { + \_SB.TZ38.TPSV = Arg1 + Notify (\_SB.TZ38, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ38._PSV ()) + } + Else + { + Return (0xFFFF) + } + + Break + } + } + ElseIf ((_T_0 == 0x28)) + { + While (One) + { + Name (_T_F, 0x00) // _T_x: Emitted by ASL Compiler + _T_F = ToInteger (Arg3) + If ((_T_F == Zero)) + { + If (Arg2) + { + \_SB.TZ40.TPSV = Arg1 + Notify (\_SB.TZ40, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ40._PSV ()) + } + ElseIf ((_T_F == 0x02)) + { + If (Arg2) + { + \_SB.TZ40.TTSP = Arg1 + Notify (\_SB.TZ40, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ40._TSP ()) + } + ElseIf ((_T_F == 0x03)) + { + If (Arg2) + { + \_SB.TZ40.TTC1 = Arg1 + Notify (\_SB.TZ40, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ40._TC1 ()) + } + ElseIf ((_T_F == 0x04)) + { + If (Arg2) + { + \_SB.TZ40.TTC2 = Arg1 + Notify (\_SB.TZ40, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ40._TC2 ()) + } + Else + { + Return (0xFFFF) + } + + Break + } + } + ElseIf ((_T_0 == 0x2C)) + { + While (One) + { + Name (_T_G, 0x00) // _T_x: Emitted by ASL Compiler + _T_G = ToInteger (Arg3) + If ((_T_G == Zero)) + { + If (Arg2) + { + \_SB.TZ44.TPSV = Arg1 + Notify (\_SB.TZ44, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ44._PSV ()) + } + ElseIf ((_T_G == 0x02)) + { + If (Arg2) + { + \_SB.TZ44.TTSP = Arg1 + Notify (\_SB.TZ44, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ44._TSP ()) + } + ElseIf ((_T_G == 0x03)) + { + If (Arg2) + { + \_SB.TZ44.TTC1 = Arg1 + Notify (\_SB.TZ44, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ44._TC1 ()) + } + ElseIf ((_T_G == 0x04)) + { + If (Arg2) + { + \_SB.TZ44.TTC2 = Arg1 + Notify (\_SB.TZ44, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ44._TC2 ()) + } + Else + { + Return (0xFFFF) + } + + Break + } + } + ElseIf ((_T_0 == 0x62)) + { + While (One) + { + Name (_T_H, 0x00) // _T_x: Emitted by ASL Compiler + _T_H = ToInteger (Arg3) + If ((_T_H == Zero)) + { + If (Arg2) + { + \_SB.TZ98.TPSV = Arg1 + Notify (\_SB.TZ98, 0x81) // Information Change + } + + Return (\_SB.TZ98._PSV) /* External reference */ + } + ElseIf ((_T_H == 0x02)) + { + If (Arg2) + { + \_SB.TZ98.TTSP = Arg1 + Notify (\_SB.TZ98, 0x81) // Information Change + } + + Return (\_SB.TZ98._TSP) /* External reference */ + } + ElseIf ((_T_H == 0x03)) + { + If (Arg2) + { + \_SB.TZ98.TTC1 = Arg1 + Notify (\_SB.TZ98, 0x81) // Information Change + } + + Return (\_SB.TZ98._TC1) /* External reference */ + } + ElseIf ((_T_H == 0x04)) + { + If (Arg2) + { + \_SB.TZ98.TTC2 = Arg1 + Notify (\_SB.TZ98, 0x81) // Information Change + } + + Return (\_SB.TZ98._TC2) /* External reference */ + } + Else + { + Return (0xFFFF) + } + + Break + } + } + ElseIf ((_T_0 == 0x63)) + { + While (One) + { + Name (_T_I, 0x00) // _T_x: Emitted by ASL Compiler + _T_I = ToInteger (Arg3) + If ((_T_I == One)) + { + If (Arg2) + { + \_SB.TZ99.TCRT = Arg1 + Notify (\_SB.TZ99, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ99._CRT ()) + } + ElseIf ((_T_I == 0x02)) + { + If (Arg2) + { + \_SB.TZ99.TTSP = Arg1 + Notify (\_SB.TZ99, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ99._TSP ()) + } + ElseIf ((_T_I == 0x03)) + { + If (Arg2) + { + \_SB.TZ99.TTC1 = Arg1 + Notify (\_SB.TZ99, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ99._TC1 ()) + } + ElseIf ((_T_I == 0x04)) + { + If (Arg2) + { + \_SB.TZ99.TTC2 = Arg1 + Notify (\_SB.TZ99, 0x81) // Thermal Trip Point Change + } + + Return (\_SB.TZ99._TC2 ()) + } + Else + { + Return (0xFFFF) + } + + Break + } + } + Else + { + Return (0xFFFF) + } + + Break + } + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (ResourceTemplate () + { + // List interrupt resources in the order they are used in PEP_Driver.c + Interrupt (ResourceConsumer, Level, ActiveHigh, ExclusiveAndWake, ,, ) + { + 0x0000021A, + } + Interrupt (ResourceConsumer, Level, ActiveHigh, ExclusiveAndWake, ,, ) + { + 0x0000021C, + } + Interrupt (ResourceConsumer, Level, ActiveHigh, ExclusiveAndWake, ,, ) + { + 0x0000021B, + } + Interrupt (ResourceConsumer, Level, ActiveHigh, ExclusiveAndWake, ,, ) + { + 0x0000021D, + } + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000025, + } + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x000000A1, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x000001A5, + } + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000040, + } + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000041, + } + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000265, + } + }) + } + + // need 20 char and 1 D state info + Field (\_SB.ABD.ROP1, BufferAcc, NoLock, Preserve) + { + /* Connection Object - 0x007C is the unique identifier */ + Connection ( + I2cSerialBusV2 (0x0001, ControllerInitiated, 0x00000000, + AddressingMode7Bit, "\\_SB.ABD", + 0x00, ResourceConsumer, , Exclusive, + ) + ), + AccessAs (BufferAcc, AttribRawBytes (0x15)), + FLD0, 168 + } + + //Get port to connect to + Method (GEPT, 0, NotSerialized) + { + Name (BUFF, Buffer (0x04){}) + CreateByteField (BUFF, Zero, STAT) + CreateWordField (BUFF, 0x02, DATA) + DATA = One //in this example we will connect to ABDO + Return (DATA) /* \_SB_.PEP0.GEPT.DATA */ + } + + Name (ROST, Zero) + // Number of CPUs to Park + Method (NPUR, 1, NotSerialized) + { + \_SB.AGR0._PUR [One] = Arg0 + Notify (\_SB.AGR0, 0x80) // Status Change + } + + // ACPI method to return intr descriptor + Method (INTR, 0, NotSerialized) + { + Name (RBUF, Package (0x18) + { + // Version + 0x02, + // Number of hosts + One, + // number of memory regions + 0x03, + // number of IPC registers + One, + + 0x06, + 0x17911008, + One, + Zero, + + // Shared memory + // Start address + 0x86000000, + // Size + 0x00200000, + // Reserved + Zero, + // Reserved + Zero, + + // AOSS QMP + // Start address + 0x0C300000, + 0x1000, + Zero, + Zero, + + 0x01FD4000, + 0x08, + Zero, + Zero, + + // apss shared + 0x1799000C, + Zero, + Zero, + Zero + }) + Return (RBUF) /* \_SB_.PEP0.INTR.RBUF */ + } + + Method (CRTC, 0, NotSerialized) + { + Return (CTRX) /* \_SB_.PEP0.CTRX */ + } + + Name (CTRX, Package (0x0B) + { + // Methods (names are reversed) that are critical to + // system boot + + "NSTC", + "HLCB", + "MMVD", // Discrete Vreg Mapping Package + "DSGP", //System Default Configuration, SDFR + "CCGP", // CPU Configuration + "MTPS", //Read the speaker calibration related parameters + "CPGP", // CPU cap for DCVS Package + "DMPP", // PEP resources (usually dummy devices required for power mgmt) + "VRDL", + "GBDL", // Debugger configuration -- must be below DSGP (reading SDFR) + "SRDL" // Default resources -- must be below DSGP (reading SDFR) + }) + Method (STND, 0, NotSerialized) + { + Return (STNX) /* \_SB_.PEP0.STNX */ + } + + Name (STNX, Package (0x19) + { + // Power resources for devices + // Names are reversed (so method OCMD becomes DMCO) + // + // Following format must be followed for name: + // DMxx -- Exists on QCOM SoC. Will use normal PoFX for power mgmt + // XMxx -- Exists off QCOM SoC and uses legacy power mgmt (_PS1, _PS2, etc) + // + // The files where these methods are declared must be included + // at the bottom of this file and must exists inside the scope: \_SB.PEP0 + "DMPO", + "DMSB", + "DMQP", + "DMMS", + "DMPA", + "DMPC", + "DMPB", + "DM0G", + "DM1G", + "DM2G", + "DM3G", + "DM4G", + "DM5G", + "DM6G", + "DM7G", + "DM8G", + "DM9G", + "DMPS", + "DMPL", + "DMDQ", + "DMPI", + "DMWE", + "XMPC", + "XMPL", + "DMEP" + }) + // + // Core topology + // + Method (CTPM, 0, NotSerialized) + { + Name (CTPN, Package (0x02) + { + "CORE_TOPOLOGY", + 0x08 + }) + Return (CTPN) /* \_SB_.PEP0.CTPM.CTPN */ + } + + // CPU/Core Configurations Packages + Name (CCFG, Package (0x08) + { + Package (0x02) + { + "\\_SB.SYSM.CLUS.CPU0", + 0x10 + }, + + Package (0x02) + { + "\\_SB.SYSM.CLUS.CPU1", + 0x11 + }, + + Package (0x02) + { + "\\_SB.SYSM.CLUS.CPU2", + 0x12 + }, + + Package (0x02) + { + "\\_SB.SYSM.CLUS.CPU3", + 0x13 + }, + + Package (0x02) + { + "\\_SB.SYSM.CLUS.CPU4", + 0x14 + }, + + Package (0x02) + { + "\\_SB.SYSM.CLUS.CPU5", + 0x15 + }, + + Package (0x02) + { + "\\_SB.SYSM.CLUS.CPU6", + 0x16 + }, + + Package (0x02) + { + "\\_SB.SYSM.CLUS.CPU7", + 0x17 + } + }) + // Method to return CPU configuration packages + // PEP Get CPU Configuration + Method (PGCC, 0, NotSerialized) + { + Return (CCFG) /* \_SB_.PEP0.CCFG */ + } + + Name (DRVC, Package (0x02) + { + Package (0x03) + { + "HLOS_DRV", + 0x02, + "/icb/arbiter" + }, + + Package (0x03) + { + "DISPLAY_DRV", + 0x09, + "/icb/arbiter/display" + } + }) + Method (LDRV, 0, NotSerialized) + { + Return (DRVC) /* \_SB_.PEP0.DRVC */ + } + + // CPU cap for DCVS Packages + Name (DCVS, Zero) + + // Method to return CPU cap for DCVS Package + Method (PGDS, 0, NotSerialized) + { + Return (DCVS) /* \_SB_.PEP0.DCVS */ + } + + // PPP Supported Resources Package + Name (PPPP, Package (0x32) + { + Package (0x03) + { + "PPP_RESOURCE_ID_SMPS1_A", // Resource ID + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", // Set Interface Type + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF" // Get Interface Type + }, + + Package (0x03) + { + "PPP_RESOURCE_ID_SMPS2_A", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF" + }, + + Package (0x03) + { + "PPP_RESOURCE_ID_SMPS3_A", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF" + }, + + Package (0x03) + { + "PPP_RESOURCE_ID_SMPS4_A", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF" + }, + + Package (0x03) + { + "PPP_RESOURCE_ID_SMPS5_A", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF" + }, + + Package (0x03) + { + "PPP_RESOURCE_ID_SMPS6_A", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF" + }, + + Package (0x03) + { + "PPP_RESOURCE_ID_SMPS7_A", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF" + }, + + Package (0x03) + { + "PPP_RESOURCE_ID_SMPS9_A", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF" + }, + + Package (0x03) + { + "PPP_RESOURCE_ID_SMPS1_C", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF" + }, + + Package (0x03) + { + "PPP_RESOURCE_ID_SMPS2_C", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF" + }, + + Package (0x03) + { + "PPP_RESOURCE_ID_SMPS3_C", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF" + }, + + Package (0x03) + { + "PPP_RESOURCE_ID_LDO1_A", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF" + }, + + Package (0x03) + { + "PPP_RESOURCE_ID_LDO2_A", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF" + }, + + Package (0x03) + { + "PPP_RESOURCE_ID_LDO3_A", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF" + }, + + Package (0x03) + { + "PPP_RESOURCE_ID_LDO4_A", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF" + }, + + Package (0x03) + { + "PPP_RESOURCE_ID_LDO5_A", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF" + }, + + Package (0x03) + { + "PPP_RESOURCE_ID_LDO6_A", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF" + }, + + Package (0x03) + { + "PPP_RESOURCE_ID_LDO7_A", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF" + }, + + Package (0x03) + { + "PPP_RESOURCE_ID_LDO8_A", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF" + }, + + Package (0x03) + { + "PPP_RESOURCE_ID_LDO9_A", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF" + }, + + Package (0x03) + { + "PPP_RESOURCE_ID_LDO10_A", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF" + }, + + Package (0x03) + { + "PPP_RESOURCE_ID_LDO11_A", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF" + }, + + Package (0x03) + { + "PPP_RESOURCE_ID_LDO12_A", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF" + }, + + Package (0x03) + { + "PPP_RESOURCE_ID_LDO13_A", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF" + }, + + Package (0x03) + { + "PPP_RESOURCE_ID_LDO14_A", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF" + }, + + Package (0x03) + { + "PPP_RESOURCE_ID_LDO15_A", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF" + }, + + Package (0x03) + { + "PPP_RESOURCE_ID_LDO16_A", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF" + }, + + Package (0x03) + { + "PPP_RESOURCE_ID_LDO17_A", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF" + }, + + Package (0x03) + { + "PPP_RESOURCE_ID_LDO18_A", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF" + }, + + Package (0x03) + { + "PPP_RESOURCE_ID_LDO19_A", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF" + }, + + Package (0x03) + { + "PPP_RESOURCE_ID_LDO20_A", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF" + }, + + Package (0x03) + { + "PPP_RESOURCE_ID_LDO21_A", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF" + }, + + Package (0x03) + { + "PPP_RESOURCE_ID_LDO22_A", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF" + }, + + Package (0x03) + { + "PPP_RESOURCE_ID_LDO23_A", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF" + }, + + Package (0x03) + { + "PPP_RESOURCE_ID_LDO24_A", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF" + }, + + Package (0x03) + { + "PPP_RESOURCE_ID_LDO25_A", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF" + }, + + Package (0x03) + { + "PPP_RESOURCE_ID_LDO26_A", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF" + }, + + Package (0x03) + { + "PPP_RESOURCE_ID_LDO27_A", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF" + }, + + Package (0x03) + { + "PPP_RESOURCE_ID_LDO28_A", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF" + }, + + Package (0x03) + { + "PPP_RESOURCE_ID_LVS1_A", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF" + }, + + Package (0x03) + { + "PPP_RESOURCE_ID_LVS2_A", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF" + }, + + Package (0x03) + { + "PPP_RESOURCE_ID_CXO_BUFFERS_BBCLK2_A", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF" + }, + + Package (0x03) + { + "PPP_RESOURCE_ID_CXO_BUFFERS_BBCLK3_A", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF" + }, + + Package (0x03) + { + "PPP_RESOURCE_ID_CXO_BUFFERS_RFCLK1_A", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF" + }, + + Package (0x03) + { + "PPP_RESOURCE_ID_CXO_BUFFERS_RFCLK2_A", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF" + }, + + Package (0x03) + { + "PPP_RESOURCE_ID_CXO_BUFFERS_RFCLK3_A", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF" + }, + + Package (0x03) + { + "PPP_RESOURCE_ID_CXO_BUFFERS_DIVCLK1_A", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF" + }, + + Package (0x03) + { + "PPP_RESOURCE_ID_CXO_BUFFERS_DIVCLK2_A", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF" + }, + + Package (0x03) + { + "PPP_RESOURCE_ID_CXO_BUFFERS_DIVCLK3_A", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF" + }, + + Package (0x03) + { + "PPP_RESOURCE_ID_BUCK_BOOST1_B", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", + "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF" + } + }) + // Method to return PPP Package + Method (PPPM, 0, NotSerialized) + { + Return (PPPP) /* \_SB_.PEP0.PPPP */ + } + + // Method to return System Default config packages + Name (PRRP, Package (0x12) + { + "PPP_RESOURCE_RANGE_INFO_SMPS_A", // Resource type range + "PPP_RESOURCE_ID_SMPS1_A", // Initial supported resource + "PPP_RESOURCE_ID_SMPS13_A", // Last supported resource + "PPP_RESOURCE_RANGE_INFO_SMPS_C", + "PPP_RESOURCE_ID_SMPS1_C", + "PPP_RESOURCE_ID_SMPS4_C", + "PPP_RESOURCE_RANGE_INFO_LDO_A", + "PPP_RESOURCE_ID_LDO1_A", + "PPP_RESOURCE_ID_LDO28_A", + "PPP_RESOURCE_RANGE_INFO_LVS_A", + "PPP_RESOURCE_ID_LVS1_A", + "PPP_RESOURCE_ID_LVS2_A", + "PPP_RESOURCE_RANGE_INFO_CXO_BUFFERS_A", + "PPP_RESOURCE_ID_CXO_BUFFERS_BBCLK2_A", + "PPP_RESOURCE_ID_CXO_BUFFERS_DIVCLK3_A", + "PPP_RESOURCE_RANGE_INFO_BUCK_BOOST_B", + "PPP_RESOURCE_ID_BUCK_BOOST1_B", + "PPP_RESOURCE_ID_BUCK_BOOST1_B" + }) + // Method to return Pep Ppp Resource Range Package + Method (PPRR, 0, NotSerialized) + { + Return (PRRP) /* \_SB_.PEP0.PRRP */ + } + + // Method to return System Default config packages + // PEP Get System Default package + Method (PGSD, 0, NotSerialized) + { + Return (SDFR) /* \_SB_.PEP0.SDFR */ + } + + // Full PEP Device Package + Name (FPDP, Zero) + // Method to return Full PEP Managed Device List Package + Method (FPMD, 0, NotSerialized) + { + Return (FPDP) /* \_SB_.PEP0.FPDP */ + } + + // + // PEP Processor Performance configuration + // CPU cap for DCVS Packages + Name (PPPC, Zero) + // Method to return CPU cap for DCVS Package + Method (PGPC, 0, NotSerialized) + { + Return (PPPC) /* \_SB_.PEP0.PPPC */ + } + + Method (DPRF, 0, NotSerialized) + { + Return (\_SB.DPP0) + } +/* + Method (DMRF, 0, NotSerialized) + { + Return (\_SB.DPP1) + }*/ + } + + Scope (\_SB.PEP0) + { + Method (LPDC, 0, NotSerialized) + { + Return (NPDC) /* \_SB_.PEP0.NPDC */ + } + + Name (NPDC, Package (0x01) + { + Package (0x02) + { + "INTERRUPT_CONFIG", + Package (0x0D) + { + Package (0x04) + { + Zero, + 0x021A, + Zero, + One + }, + + Package (0x04) + { + One, + 0x021B, + Zero, + One + }, + + Package (0x04) + { + 0x02, + 0x021C, + Zero, + One + }, + + Package (0x04) + { + 0x03, + 0x021D, + Zero, + One + }, + + Package (0x04) + { + 0x04, + 0x0218, + Zero, + One + }, + + Package (0x04) + { + 0x05, + 0x0219, + Zero, + One + }, + + Package (0x04) + { + 0x06, + 0x0206, + Zero, + One + }, + + Package (0x04) + { + 0x07, + 0x0207, + Zero, + One + }, + + Package (0x05) + { + 0x08, + 0x0208, + Zero, + One, + 0x08 + }, + + Package (0x05) + { + 0x09, + 0x0209, + Zero, + One, + 0x08 + }, + + Package (0x05) + { + 0x0A, + 0x020A, + Zero, + One, + 0x08 + }, + + Package (0x05) + { + 0x0B, + 0x020B, + Zero, + One, + 0x08 + }, + + Package (0x04) + { + 0x0C, + 0x0201, + Zero, + 0x04 + } + } + } + }) + } + + Scope (\_SB.PEP0) + { + Method (LPCU, 0, NotSerialized) + { + Return (NPCU) /* \_SB_.PEP0.NPCU */ + } + + Name (NPCU, Package (0x05) + { + "PCU_CONFIG", + 0x09, + One, + Package (0x02) + { + "PCU_CLUSTER_CONFIG", + 0x09 + }, + + Package (0x0A) + { + "PCU_PHYS_CONFIG", + 0x17E00040, + 0x17E10040, + 0x17E20040, + 0x17E30040, + 0x17E40040, + 0x17E50040, + 0x17E60040, + 0x17E70040, + 0x17810104 + } + }) + } + + Scope (\_SB.PEP0) + { + Method (LVDD, 0, NotSerialized) + { + Return (NVDD) /* \_SB_.PEP0.NVDD */ + } + + Name (NVDD, Package (0x06) + { + Package (0x02) + { + "/arc/client/rail_cx", + "RAIL_VOLTAGE_LEVEL_NOMINAL" + }, + + Package (0x02) + { + "/arc/client/display/rail_cx", + "RAIL_VOLTAGE_LEVEL_OFF" + }, + + Package (0x02) + { + "/arc/client/rail_mx", + "RAIL_VOLTAGE_LEVEL_NOMINAL" + }, + + Package (0x02) + { + "/arc/client/display/rail_mx", + "RAIL_VOLTAGE_LEVEL_OFF" + }, + + Package (0x02) + { + "/arc/client/rail_xo", + "XO_LEVEL_ON" + }, + + Package (0x02) + { + "/arc/client/display/rail_xo", + "XO_LEVEL_CRYSTAL_OFF" + } + }) + } + + Scope (\_SB.PEP0) + { + Method (LLMH, 0, NotSerialized) + { + Return (NLMH) /* \_SB_.PEP0.NLMH */ + } + + Name (NLMH, Package (0x01) + { + Package (0x03) + { + "PEP_LMH_CFG", + Package (0x06) + { + Zero, + Zero, + 0x002DB400, + 0x0D02, + 0x0DF7, + 0x0DFC + }, + + Package (0x06) + { + One, + Zero, + 0x002DB400, + 0x0D02, + 0x0DF7, + 0x0DFC + } + } + }) + } + + Scope (\_SB.PEP0) + { + // Discrete Vreg Mapping Package + Name (DVMP, Package (0x02) + { + // Virtual regulator to aggregate GPIO pin control of CHIP_PWD_L + // CHIP_PWD_L must be deasserted for BT to share a clock with AR6004 + // BT and WLAN devices will take a vote on this virtual regulator to + // control the shared GPIO pin + Package (0x04) + { + "PPP_RESOURCE_ID_PMIC_GPIO_DV1", // Discrete Vreg ID + "PPP_RESOURCE_TYPE_DISCRETE_PMIC_GPIO", // Vreg type + Package (0x02) + { + "PM_DISCRETE_VREG_STATE_ON", // Mapping for VREG ON + Package (0x0A) + { + Zero, // pmic_number (PM8994) - must match pmic.asl + 0x08, // gpio_id - GPIO #9 + Zero, // Mode - GPIO configured as output - 0, 1 for input + Zero, // voltage_source - PM_GPIO_VIN0 + One, // source - PM_GPIO_SOURCE_1 (drive logic HIGH) + Zero, // out_buffer_config - PM_GPIO_OUT_BUFFER_CONFIG_CMOS + One, // out_buffer_strength - PM_GPIO_OUT_BUFFER_LOW + Zero, // inversion ďż˝ no invert + One, // External pin enable - PM_GPIO_PERPH_EN_ENABLE + 0x05 // PM_GPIO_I_SOURCE_PULL_NO_PULL, ignored for Output mode. + } + }, + + Package (0x02) + { + "PM_DISCRETE_VREG_STATE_OFF", // Mapping for VREG OFF + Package (0x0A) + { + Zero, // pmic_number 0 + 0x08, // gpio_id - GPIO #9 + Zero, // Mode - GPIO configured as output - 0, 1 for input + Zero, // voltage_source - PM_GPIO_VIN0 + Zero, // source - PM_GPIO_SOURCE_0 (drive logic LOW) + Zero, // out_buffer_config - PM_GPIO_OUT_BUFFER_CONFIG_CMOS + One, // out_buffer_strength - PM_GPIO_OUT_BUFFER_LOW + Zero, // inversion ďż˝ no invert + One, // External pin enable - PM_GPIO_PERPH_EN_ENABLE + 0x05 // PM_GPIO_I_SOURCE_PULL_NO_PULL, ignored for Output mode. + } + } + }, + + //discrete vreg vote for MPP4 + Package (0x04) + { + "PPP_RESOURCE_ID_PMIC_MPP_DV1", // Discrete Vreg ID + "PPP_RESOURCE_TYPE_DISCRETE_PMIC_MPP", // Vreg type + Package (0x02) + { + "PM_DISCRETE_VREG_STATE_ON", // Mapping for VREG ON + Package (0x06) + { + Zero, // PMIC number + 0x03, // MPP index (mpp #4) + Zero, // Direction, 0 - output + 0x02, // VIO_2 + One, // PM_MPP__DLOGIC__OUT_CTRL_HIGH + Zero // PM_MPP__DLOGIC__DBUS_NONE + } + }, + + Package (0x02) + { + "PM_DISCRETE_VREG_STATE_OFF", // Mapping for VREG OFF + Package (0x06) + { + Zero, // PMIC number + 0x03, // MPP index (mpp #4) + Zero, // Direction, 0 - output + 0x02, // VIO_2 + Zero, // PM_MPP__DLOGIC__OUT_CTRL_LOW + Zero // PM_MPP__DLOGIC__DBUS_NONE + } + } + } + }) + // Method to return Discrete Vreg Mapping Package + Method (DVMM, 0, NotSerialized) + { + Return (DVMP) /* \_SB_.PEP0.DVMP */ + } + } + + Scope (\_SB.PEP0) + { + Method (LDBG, 0, NotSerialized) + { + Return (NDBG) /* \_SB_.PEP0.NDBG */ + } + + Name (NDBG, + /** + * The debuggers package is used by PEP to detect when a debugger is connected, + * turn on the required power resources for a debugger and to turn off all + * debugger related resources when not in use (this logic is encompassed in PEP). + * + * The expected hiearchy of this package: + * DEBUGGERS + * TYPE + * String = SERIAL, USB2.0, USB3.0 + * INSTANCES + * The instancepath of the drivers which the debugger impersonates + * DEBUG_ON + * The resources that need to be turned on for the debugger to work + * for the given controller type (SERIAL/USB2.0/USB3.0) + * DEBUG_OFF + * The resources to turn off when no debugger is connected for this + * debugger type and no HLOS driver is loaded for any one of the given + * HLOS types. The implementation for this feature is documented within + * PEP. + * + */ + Package (0x04) + { + "DEBUGGERS", + Package (0x05) + { + "TYPE", + "SERIAL", + Package (0x02) + { + "INSTANCES", + "\\_SB.UARD" + }, + + Package (0x0C) + { + "DEBUG_ON", + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap_1_m_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x03) + { + "gcc_qupv3_wrap_1_m_ahb_clk", + 0x09, + 0x08 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x03) + { + "gcc_qupv3_wrap_1_m_ahb_clk", + 0x09, + 0x0C + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap_1_s_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x03) + { + "gcc_qupv3_wrap_1_s_ahb_clk", + 0x09, + 0x08 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x03) + { + "gcc_qupv3_wrap_1_s_ahb_clk", + 0x09, + 0x0C + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap1_s1_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x03) + { + "gcc_qupv3_wrap1_s1_clk", + 0x09, + 0x08 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x03) + { + "gcc_qupv3_wrap1_s1_clk", + 0x09, + 0x0C + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x07) + { + 0x03, + "ICBID_MASTER_BLSP_2", + "ICBID_SLAVE_EBI1", + 0x00989680, + 0x0682, + "HLOS_DRV", + "SUPPRESSIBLE" + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x07) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_BLSP_2", + 0x00989680, + 0x004C4B40, + "HLOS_DRV", + "SUPPRESSIBLE" + } + } + }, + + Package (0x01) + { + "DEBUG_OFF" + } + }, + + Package (0x05) + { + "TYPE", + "USB2.0", + Package (0x02) + { + "INSTANCES", + "\\_SB.USB1" + }, + + Package (0x1E) + { + "DEBUG_ON", + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO12_A", + One, + 0x001B7740, + One, + 0x07, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO24_A", + One, + 0x002EEBB8, + One, + 0x07, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO26_A", + One, + 0x00124F80, + One, + 0x07, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO1_A", + One, + 0x000D6D80, + One, + 0x07, + Zero + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "usb30_sec_gdsc", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x03) + { + "gcc_usb30_sec_sleep_clk", + 0x09, + 0x08 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x03) + { + "gcc_usb30_sec_sleep_clk", + 0x09, + 0x0C + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_usb30_sec_sleep_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x03) + { + "gcc_usb3_sec_phy_pipe_clk", + 0x09, + 0x08 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x03) + { + "gcc_usb3_sec_phy_pipe_clk", + 0x09, + 0x0C + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_usb3_sec_phy_pipe_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x03) + { + "gcc_aggre_usb3_sec_axi_clk", + 0x09, + 0x08 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x03) + { + "gcc_aggre_usb3_sec_axi_clk", + 0x09, + 0x0C + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "gcc_aggre_usb3_sec_axi_clk", + 0x08, + 0x78, + 0x09 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x03) + { + "gcc_cfg_noc_usb3_sec_axi_clk", + 0x09, + 0x08 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x03) + { + "gcc_cfg_noc_usb3_sec_axi_clk", + 0x09, + 0x0C + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "gcc_cfg_noc_usb3_sec_axi_clk", + 0x08, + 0x78, + 0x09 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x03) + { + "gcc_usb30_sec_master_clk", + 0x09, + 0x08 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x03) + { + "gcc_usb30_sec_master_clk", + 0x09, + 0x0C + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "gcc_usb30_sec_master_clk", + 0x08, + 0x78, + 0x09 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x03) + { + "gcc_usb3_sec_phy_aux_clk", + 0x09, + 0x08 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x03) + { + "gcc_usb3_sec_phy_aux_clk", + 0x09, + 0x0C + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "gcc_usb3_sec_phy_aux_clk", + 0x08, + 0x04B0, + 0x07 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x03) + { + "gcc_usb_phy_cfg_ahb2phy_clk", + 0x09, + 0x08 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x03) + { + "gcc_usb_phy_cfg_ahb2phy_clk", + 0x09, + 0x0C + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_usb_phy_cfg_ahb2phy_clk", + One + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x07) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_USB3_1", + 0x17D78400, + Zero, + "HLOS_DRV", + "SUPPRESSIBLE" + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x07) + { + 0x03, + "ICBID_MASTER_USB3_1", + "ICBID_SLAVE_EBI1", + 0x28000000, + 0x28000000, + "HLOS_DRV", + "SUPPRESSIBLE" + } + }, + + Package (0x02) + { + "NPARESOURCE", + Package (0x04) + { + One, + "/arc/client/rail_cx", + 0x0100, + "SUPPRESSIBLE" + } + } + }, + + Package (0x01) + { + "DEBUG_OFF" + } + }, + + Package (0x05) + { + "TYPE", + "USB3.0", + Package (0x02) + { + "INSTANCES", + "\\_SB.URS0" + }, + + Package (0x1E) + { + "DEBUG_ON", + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO12_A", + One, + 0x001B7740, + One, + 0x07, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO24_A", + One, + 0x002EEBB8, + One, + 0x07, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO26_A", + One, + 0x00124F80, + One, + 0x07, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO1_A", + One, + 0x000D6D80, + One, + 0x07, + Zero + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "usb30_prim_gdsc", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_usb30_prim_sleep_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x03) + { + "gcc_usb30_prim_sleep_clk", + 0x09, + 0x08 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x03) + { + "gcc_usb30_prim_sleep_clk", + 0x09, + 0x0C + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_usb3_prim_phy_pipe_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x03) + { + "gcc_usb3_prim_phy_pipe_clk", + 0x09, + 0x08 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x03) + { + "gcc_usb3_prim_phy_pipe_clk", + 0x09, + 0x0C + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x03) + { + "gcc_aggre_usb3_prim_axi_clk", + 0x09, + 0x08 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x03) + { + "gcc_aggre_usb3_prim_axi_clk", + 0x09, + 0x0C + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "gcc_aggre_usb3_prim_axi_clk", + 0x08, + 0x78, + 0x09 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x03) + { + "gcc_cfg_noc_usb3_prim_axi_clk", + 0x09, + 0x08 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x03) + { + "gcc_cfg_noc_usb3_prim_axi_clk", + 0x09, + 0x0C + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "gcc_cfg_noc_usb3_prim_axi_clk", + 0x08, + 0x78, + 0x09 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x03) + { + "gcc_usb30_prim_master_clk", + 0x09, + 0x08 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x03) + { + "gcc_usb30_prim_master_clk", + 0x09, + 0x0C + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "gcc_usb30_prim_master_clk", + 0x08, + 0x78, + 0x09 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x03) + { + "gcc_usb3_prim_phy_aux_clk", + 0x09, + 0x08 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x03) + { + "gcc_usb3_prim_phy_aux_clk", + 0x09, + 0x0C + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "gcc_usb3_prim_phy_aux_clk", + 0x08, + 0x04B0, + 0x07 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x03) + { + "gcc_usb_phy_cfg_ahb2phy_clk", + 0x09, + 0x08 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x03) + { + "gcc_usb_phy_cfg_ahb2phy_clk", + 0x09, + 0x0C + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_usb_phy_cfg_ahb2phy_clk", + One + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x07) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_USB3_0", + 0x17D78400, + Zero, + "HLOS_DRV", + "SUPPRESSIBLE" + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x07) + { + 0x03, + "ICBID_MASTER_USB3_0", + "ICBID_SLAVE_EBI1", + 0x28000000, + 0x28000000, + "HLOS_DRV", + "SUPPRESSIBLE" + } + }, + + Package (0x02) + { + "NPARESOURCE", + Package (0x04) + { + One, + "/arc/client/rail_cx", + 0x0100, + "SUPPRESSIBLE" + } + } + }, + + Package (0x01) + { + "DEBUG_OFF" + } + } + }) + } + + // default resource information + Scope (\_SB.PEP0) + { + Method (LDRS, 0, NotSerialized) + { + Return (NDRS) /* \_SB_.PEP0.NDRS */ + } + + Name (NDRS, + /** + * The default resources package is used by PEP to handle system default resources. + * Rather than having to declare them all in the SDF declaration, you define resources + * separately and annotate them by functionality. At runtime, the parsed resources + * will be placed into separate components within the SDF device node. + * + * The expected hiearchy of this package: + * DEFAULT_RESOURCES + * (WORKAROUND|OPTIMIZATION) + * String = Name + * For debugging and querying -- keep it short + * String = "BOOT", "SCREENON", "DEMAND" + * When to activate these resources + * RESOURCES + * The list of resources to activate for this set workaround / optimization + * + */ + Package (0x03) + { + "DEFAULT_RESOURCES", + Package (0x04) + { + "OPTIMIZATION", + "CPU_CNOC_VOTE", + "BOOT", + Package (0x02) + { + "RESOURCES", + Package (0x02) + { + "BUSARB", + Package (0x06) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_CLK_CTL", + One, + One, + "SUPPRESSIBLE" + } + } + } + }, + + Package (0x04) + { + "WORKAROUND", + "USB1_GPIO_VOTE", + "BOOT", + Package (0x05) + { + "RESOURCES", + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x2C, + One, + Zero, + One, + Zero, + Zero + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_disp_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x03) + { + "gcc_disp_ahb_clk", + 0x09, + 0x08 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x03) + { + "gcc_disp_ahb_clk", + 0x09, + 0x0C + } + } + } + } + }) + } + + Scope (\_SB.PEP0) + { + Method (UIDL, 0, NotSerialized) + { + Return (NIDL) /* \_SB_.PEP0.NIDL */ + } + + Name (NIDL, Package (0x0E) + { + "MICROPEP_IDLE", + One, + Package (0x08) + { + "LPR", + "KryoSilver0", // LPR Name + Zero, // LPR Core Mask (0xFFFFFFFF is coordinated) + Zero, //LastMan Adder + Package (0x07) + { + "MODE", + "C1", + Zero, + Zero, + Zero, + Zero, + Zero + }, + + Package (0x07) + { + "MODE", + "C2d", + 0x03E8, + 0x0FA0, + Zero, + Zero, + 0x02 + }, + + Package (0x07) + { + "MODE", + "C3", // Mode name + 0x0BB8, + 0x1194, + 0x03, + Zero, + 0x40000003 // Mode PSCI Flags + }, + + Package (0x07) + { + "MODE", + "C3_NI", + 0x0BB8, + 0x1194, + 0x13, + Zero, + 0x40000004 + } + }, + + Package (0x08) + { + "LPR", + "KryoSilver1", + One, + Zero, + Package (0x07) + { + "MODE", + "C1", + Zero, + Zero, + Zero, + Zero, + Zero + }, + + Package (0x07) + { + "MODE", + "C2d", + 0x03E8, + 0x0FA0, + Zero, + Zero, + 0x02 + }, + + Package (0x07) + { + "MODE", + "C3", + 0x0BB8, + 0x1194, + 0x03, + Zero, + 0x40000003 + }, + + Package (0x07) + { + "MODE", + "C3_NI", + 0x0BB8, + 0x1194, + 0x13, + Zero, + 0x40000004 + } + }, + + Package (0x08) + { + "LPR", + "KryoSilver2", + 0x02, + Zero, + Package (0x07) + { + "MODE", + "C1", + Zero, + Zero, + Zero, + Zero, + Zero + }, + + Package (0x07) + { + "MODE", + "C2d", + 0x03E8, + 0x0FA0, + Zero, + Zero, + 0x02 + }, + + Package (0x07) + { + "MODE", + "C3", + 0x0BB8, + 0x1194, + 0x03, + Zero, + 0x40000003 + }, + + Package (0x07) + { + "MODE", + "C3_NI", + 0x0BB8, + 0x1194, + 0x13, + Zero, + 0x40000004 + } + }, + + Package (0x08) + { + "LPR", + "KryoSilver3", + 0x03, + Zero, + Package (0x07) + { + "MODE", + "C1", + Zero, + Zero, + Zero, + Zero, + Zero + }, + + Package (0x07) + { + "MODE", + "C2d", + 0x03E8, + 0x0FA0, + Zero, + Zero, + 0x02 + }, + + Package (0x07) + { + "MODE", + "C3", + 0x0BB8, + 0x1194, + 0x03, + Zero, + 0x40000003 + }, + + Package (0x07) + { + "MODE", + "C3_NI", + 0x0BB8, + 0x1194, + 0x13, + Zero, + 0x40000004 + } + }, + + Package (0x08) + { + "LPR", + "KryoGold0", + 0x04, + Zero, + Package (0x07) + { + "MODE", + "C1", + Zero, + Zero, + Zero, + Zero, + Zero + }, + + Package (0x07) + { + "MODE", + "C2d", + 0x0320, + 0x1770, + 0x10, + Zero, + 0x02 + }, + + Package (0x07) + { + "MODE", + "C3", + 0x0384, + 0x00011170, + 0x13, + Zero, + 0x40000003 + }, + + Package (0x07) + { + "MODE", + "C3_NI", + 0x0384, + 0x00011170, + 0x13, + Zero, + 0x40000004 + } + }, + + Package (0x08) + { + "LPR", + "KryoGold1", + 0x05, + Zero, + Package (0x07) + { + "MODE", + "C1", + Zero, + Zero, + Zero, + Zero, + Zero + }, + + Package (0x07) + { + "MODE", + "C2d", + 0x0320, + 0x1770, + 0x10, + Zero, + 0x02 + }, + + Package (0x07) + { + "MODE", + "C3", + 0x0384, + 0x00011170, + 0x13, + Zero, + 0x40000003 + }, + + Package (0x07) + { + "MODE", + "C3_NI", + 0x0384, + 0x00011170, + 0x13, + Zero, + 0x40000004 + } + }, + + Package (0x08) + { + "LPR", + "KryoGold2", + 0x06, + Zero, + Package (0x07) + { + "MODE", + "C1", + Zero, + Zero, + Zero, + Zero, + Zero + }, + + Package (0x07) + { + "MODE", + "C2d", + 0x0320, + 0x1770, + 0x10, + Zero, + 0x02 + }, + + Package (0x07) + { + "MODE", + "C3", + 0x0384, + 0x00011170, + 0x13, + Zero, + 0x40000003 + }, + + Package (0x07) + { + "MODE", + "C3_NI", + 0x0384, + 0x00011170, + 0x13, + Zero, + 0x40000004 + } + }, + + Package (0x08) + { + "LPR", + "KryoGold3", + 0x07, + Zero, + Package (0x07) + { + "MODE", + "C1", + Zero, + Zero, + Zero, + Zero, + Zero + }, + + Package (0x07) + { + "MODE", + "C2d", + 0x0320, + 0x1770, + 0x10, + Zero, + 0x02 + }, + + Package (0x07) + { + "MODE", + "C3", + 0x0384, + 0x00011170, + 0x13, + Zero, + 0x40000003 + }, + + Package (0x07) + { + "MODE", + "C3_NI", + 0x0384, + 0x00011170, + 0x13, + Zero, + 0x40000004 + } + }, + + Package (0x07) + { + "LPR", + "L2_Silver", + 0xFFFFFFFF, + 0x01000000, + Package (0x0B) + { + "MODE", + "D2d", + 0x0514, + 0x0BB8, + 0x10, + Zero, + 0x20, + Package (0x05) + { + "DEPENDENCY_CONTAINER", + Package (0x04) + { + "DEPENDENCY", + "KryoSilver0", + "C1", + 0x07 + }, + + Package (0x04) + { + "DEPENDENCY", + "KryoSilver0", + "C2d", + 0x07 + }, + + Package (0x04) + { + "DEPENDENCY", + "KryoSilver0", + "C3", + 0x07 + }, + + Package (0x04) + { + "DEPENDENCY", + "KryoSilver0", + "C3_NI", + 0x07 + } + }, + + Package (0x05) + { + "DEPENDENCY_CONTAINER", + Package (0x04) + { + "DEPENDENCY", + "KryoSilver1", + "C1", + 0x07 + }, + + Package (0x04) + { + "DEPENDENCY", + "KryoSilver1", + "C2d", + 0x07 + }, + + Package (0x04) + { + "DEPENDENCY", + "KryoSilver1", + "C3", + 0x07 + }, + + Package (0x04) + { + "DEPENDENCY", + "KryoSilver1", + "C3_NI", + 0x07 + } + }, + + Package (0x05) + { + "DEPENDENCY_CONTAINER", + Package (0x04) + { + "DEPENDENCY", + "KryoSilver2", + "C1", + 0x07 + }, + + Package (0x04) + { + "DEPENDENCY", + "KryoSilver2", + "C2d", + 0x07 + }, + + Package (0x04) + { + "DEPENDENCY", + "KryoSilver2", + "C3", + 0x07 + }, + + Package (0x04) + { + "DEPENDENCY", + "KryoSilver2", + "C3_NI", + 0x07 + } + }, + + Package (0x05) + { + "DEPENDENCY_CONTAINER", + Package (0x04) + { + "DEPENDENCY", + "KryoSilver3", + "C1", + 0x07 + }, + + Package (0x04) + { + "DEPENDENCY", + "KryoSilver3", + "C2d", + 0x07 + }, + + Package (0x04) + { + "DEPENDENCY", + "KryoSilver3", + "C3", + 0x07 + }, + + Package (0x04) + { + "DEPENDENCY", + "KryoSilver3", + "C3_NI", + 0x07 + } + } + }, + + Package (0x0B) + { + "MODE", + "D2e", + 0x05DC, + 0x0DAC, + 0x10, + Zero, + 0x30, + Package (0x03) + { + "DEPENDENCY_CONTAINER", + Package (0x04) + { + "DEPENDENCY", + "KryoSilver0", + "C3", + 0x07 + }, + + Package (0x04) + { + "DEPENDENCY", + "KryoSilver0", + "C3_NI", + 0x07 + } + }, + + Package (0x03) + { + "DEPENDENCY_CONTAINER", + Package (0x04) + { + "DEPENDENCY", + "KryoSilver1", + "C3", + 0x07 + }, + + Package (0x04) + { + "DEPENDENCY", + "KryoSilver1", + "C3_NI", + 0x07 + } + }, + + Package (0x03) + { + "DEPENDENCY_CONTAINER", + Package (0x04) + { + "DEPENDENCY", + "KryoSilver2", + "C3", + 0x07 + }, + + Package (0x04) + { + "DEPENDENCY", + "KryoSilver2", + "C3_NI", + 0x07 + } + }, + + Package (0x03) + { + "DEPENDENCY_CONTAINER", + Package (0x04) + { + "DEPENDENCY", + "KryoSilver3", + "C3", + 0x07 + }, + + Package (0x04) + { + "DEPENDENCY", + "KryoSilver3", + "C3_NI", + 0x07 + } + } + }, + + Package (0x0B) + { + "MODE", + "D4", + 0x2328, + 0xFA00, + 0x10, + Zero, + 0x40, + Package (0x03) + { + "DEPENDENCY_CONTAINER", + Package (0x04) + { + "DEPENDENCY", + "KryoSilver0", + "C3", + 0x07 + }, + + Package (0x04) + { + "DEPENDENCY", + "KryoSilver0", + "C3_NI", + 0x07 + } + }, + + Package (0x03) + { + "DEPENDENCY_CONTAINER", + Package (0x04) + { + "DEPENDENCY", + "KryoSilver1", + "C3", + 0x07 + }, + + Package (0x04) + { + "DEPENDENCY", + "KryoSilver1", + "C3_NI", + 0x07 + } + }, + + Package (0x03) + { + "DEPENDENCY_CONTAINER", + Package (0x04) + { + "DEPENDENCY", + "KryoSilver2", + "C3", + 0x07 + }, + + Package (0x04) + { + "DEPENDENCY", + "KryoSilver2", + "C3_NI", + 0x07 + } + }, + + Package (0x03) + { + "DEPENDENCY_CONTAINER", + Package (0x04) + { + "DEPENDENCY", + "KryoSilver3", + "C3", + 0x07 + }, + + Package (0x04) + { + "DEPENDENCY", + "KryoSilver3", + "C3_NI", + 0x07 + } + } + } + }, + + Package (0x07) + { + "LPR", + "L2_Gold", + 0xFFFFFFFF, + 0x01000000, + Package (0x0B) + { + "MODE", + "D2d", + 0x07D0, + 0x2328, + 0x10, + Zero, + 0x20, + Package (0x05) + { + "DEPENDENCY_CONTAINER", + Package (0x04) + { + "DEPENDENCY", + "KryoGold0", + "C1", + 0x07 + }, + + Package (0x04) + { + "DEPENDENCY", + "KryoGold0", + "C2d", + 0x07 + }, + + Package (0x04) + { + "DEPENDENCY", + "KryoGold0", + "C3", + 0x07 + }, + + Package (0x04) + { + "DEPENDENCY", + "KryoGold0", + "C3_NI", + 0x07 + } + }, + + Package (0x05) + { + "DEPENDENCY_CONTAINER", + Package (0x04) + { + "DEPENDENCY", + "KryoGold1", + "C1", + 0x07 + }, + + Package (0x04) + { + "DEPENDENCY", + "KryoGold0", + "C2d", + 0x07 + }, + + Package (0x04) + { + "DEPENDENCY", + "KryoGold1", + "C3", + 0x07 + }, + + Package (0x04) + { + "DEPENDENCY", + "KryoGold1", + "C3_NI", + 0x07 + } + }, + + Package (0x05) + { + "DEPENDENCY_CONTAINER", + Package (0x04) + { + "DEPENDENCY", + "KryoGold2", + "C1", + 0x07 + }, + + Package (0x04) + { + "DEPENDENCY", + "KryoGold0", + "C2d", + 0x07 + }, + + Package (0x04) + { + "DEPENDENCY", + "KryoGold2", + "C3", + 0x07 + }, + + Package (0x04) + { + "DEPENDENCY", + "KryoGold2", + "C3_NI", + 0x07 + } + }, + + Package (0x05) + { + "DEPENDENCY_CONTAINER", + Package (0x04) + { + "DEPENDENCY", + "KryoGold3", + "C1", + 0x07 + }, + + Package (0x04) + { + "DEPENDENCY", + "KryoGold0", + "C2d", + 0x07 + }, + + Package (0x04) + { + "DEPENDENCY", + "KryoGold3", + "C3", + 0x07 + }, + + Package (0x04) + { + "DEPENDENCY", + "KryoGold3", + "C3_NI", + 0x07 + } + } + }, + + Package (0x0B) + { + "MODE", + "D2e", + 0x0FA0, + 0x2710, + 0x10, + Zero, + 0x30, + Package (0x03) + { + "DEPENDENCY_CONTAINER", + Package (0x04) + { + "DEPENDENCY", + "KryoGold0", + "C3", + 0x07 + }, + + Package (0x04) + { + "DEPENDENCY", + "KryoGold0", + "C3_NI", + 0x07 + } + }, + + Package (0x03) + { + "DEPENDENCY_CONTAINER", + Package (0x04) + { + "DEPENDENCY", + "KryoGold1", + "C3", + 0x07 + }, + + Package (0x04) + { + "DEPENDENCY", + "KryoGold1", + "C3_NI", + 0x07 + } + }, + + Package (0x03) + { + "DEPENDENCY_CONTAINER", + Package (0x04) + { + "DEPENDENCY", + "KryoGold2", + "C3", + 0x07 + }, + + Package (0x04) + { + "DEPENDENCY", + "KryoGold2", + "C3_NI", + 0x07 + } + }, + + Package (0x03) + { + "DEPENDENCY_CONTAINER", + Package (0x04) + { + "DEPENDENCY", + "KryoGold3", + "C3", + 0x07 + }, + + Package (0x04) + { + "DEPENDENCY", + "KryoGold3", + "C3_NI", + 0x07 + } + } + }, + + Package (0x0B) + { + "MODE", + "D4", + 0x2EE0, + 0xEA60, + 0x10, + Zero, + 0x40, + Package (0x03) + { + "DEPENDENCY_CONTAINER", + Package (0x04) + { + "DEPENDENCY", + "KryoGold0", + "C3", + 0x07 + }, + + Package (0x04) + { + "DEPENDENCY", + "KryoGold0", + "C3_NI", + 0x07 + } + }, + + Package (0x03) + { + "DEPENDENCY_CONTAINER", + Package (0x04) + { + "DEPENDENCY", + "KryoGold1", + "C3", + 0x07 + }, + + Package (0x04) + { + "DEPENDENCY", + "KryoGold1", + "C3_NI", + 0x07 + } + }, + + Package (0x03) + { + "DEPENDENCY_CONTAINER", + Package (0x04) + { + "DEPENDENCY", + "KryoGold2", + "C3", + 0x07 + }, + + Package (0x04) + { + "DEPENDENCY", + "KryoGold2", + "C3_NI", + 0x07 + } + }, + + Package (0x03) + { + "DEPENDENCY_CONTAINER", + Package (0x04) + { + "DEPENDENCY", + "KryoGold3", + "C3", + 0x07 + }, + + Package (0x04) + { + "DEPENDENCY", + "KryoGold3", + "C3_NI", + 0x07 + } + } + } + }, + + Package (0x07) + { + "LPR", + "CCI", + 0xFFFFFFFF, + 0x02000000, + Package (0x09) + { + "MODE", + "E1", + 0x1388, + 0x6590, + 0x10, + Zero, + 0x0100, + Package (0x03) + { + "DEPENDENCY_CONTAINER", + Package (0x04) + { + "DEPENDENCY", + "L2_Silver", + "D2e", + 0x07 + }, + + Package (0x04) + { + "DEPENDENCY", + "L2_Silver", + "D4", + 0x07 + } + }, + + Package (0x03) + { + "DEPENDENCY_CONTAINER", + Package (0x04) + { + "DEPENDENCY", + "L2_Gold", + "D2e", + 0x07 + }, + + Package (0x04) + { + "DEPENDENCY", + "L2_Gold", + "D4", + 0x07 + } + } + }, + + Package (0x09) + { + "MODE", + "E3", + 0x2AF8, + 0x7530, + 0x10, + Zero, + 0x0400, + Package (0x02) + { + "DEPENDENCY_CONTAINER", + Package (0x04) + { + "DEPENDENCY", + "L2_Silver", + "D4", + 0x07 + } + }, + + Package (0x02) + { + "DEPENDENCY_CONTAINER", + Package (0x04) + { + "DEPENDENCY", + "L2_Gold", + "D4", + 0x07 + } + } + }, + + Package (0x09) + { + "MODE", + "E3+RPM", + 0x2CEC, + 0x88B8, + 0x10, + Zero, + 0x0500, + Package (0x02) + { + "DEPENDENCY_CONTAINER", + Package (0x04) + { + "DEPENDENCY", + "L2_Silver", + "D4", + 0x07 + } + }, + + Package (0x02) + { + "DEPENDENCY_CONTAINER", + Package (0x04) + { + "DEPENDENCY", + "L2_Gold", + "D4", + 0x07 + } + } + } + }, + + Package (0x05) + { + "LPR", + "platform", + 0xFFFFFFFF, + Zero, + Package (0x08) + { + "MODE", + "xo", + 0x1388, + 0x00050910, + 0x20, + 0x10, + 0xFFFFFE00, + Package (0x02) + { + "DEPENDENCY_CONTAINER", + Package (0x04) + { + "DEPENDENCY", + "CCI", + "E3+RPM", + 0x07 + } + } + } + } + }) + } + + Scope (\_SB.PEP0) + { + Method (CPRZ, 0, NotSerialized) + { + Return (CPRH) /* \_SB_.PEP0.CPRH */ + } + + Name (CPRH, Package (0x06) + { + "CPRH_SW_SETTING", + Zero, + Package (0x05) + { + "CPRH_CHIP_INFO", + 0x0141, + One, + Package (0x36) + { + "CPRH_SW_CONTROLLER_SETTING", + Zero, + "APC0", + 0x17DC0000, + 0x4000, + Zero, + 0x14, + 0x0F, + 0x0C, + 0x0B, + One, + 0x08, + 0xF0, + Zero, + Zero, + 0x00017700, + 0x0190, + 0x04, + 0x04, + 0x05, + Zero, + One, + 0x05, + One, + One, + One, + One, + 0x17, + 0x4B00, + Zero, + 0x04, + One, + 0x04, + One, + Zero, + Zero, + "", + Zero, + Zero, + Zero, + Zero, + Zero, + Zero, + Zero, + 0x17840800, + 0x0400, + One, + One, + Zero, + One, + One, + One, + Package (0x07) + { + "CPRH_SW_THREAD_SETTING", + Zero, + "L3", + 0x02, + 0x02, + Zero, + Zero + }, + + Package (0x07) + { + "CPRH_SW_THREAD_SETTING", + One, + "Silver", + 0x02, + 0x02, + Zero, + Zero + } + }, + + Package (0x35) + { + "CPRH_SW_CONTROLLER_SETTING", + One, + "APC1", + 0x17DB0000, + 0x4000, + Zero, + 0x14, + 0x0F, + 0x0E, + 0x09, + One, + 0x0E, + Zero, + Zero, + Zero, + 0x00017700, + 0x0190, + 0x04, + 0x04, + 0x05, + Zero, + 0x06, + 0x0A, + One, + One, + Zero, + Zero, + 0x17, + 0x4B00, + Zero, + 0x04, + One, + 0x04, + One, + Zero, + Zero, + "", + Zero, + Zero, + Zero, + Zero, + Zero, + Zero, + Zero, + 0x17830800, + 0x0400, + One, + One, + Zero, + One, + One, + One, + Package (0x07) + { + "CPRH_SW_THREAD_SETTING", + Zero, + "Gold", + 0x02, + 0x02, + Zero, + 0x02 + } + } + }, + + Package (0x05) + { + "CPRH_CHIP_INFO", + 0x0141, + 0x02, + Package (0x36) + { + "CPRH_SW_CONTROLLER_SETTING", + Zero, + "APC0", + 0x17DC0000, + 0x4000, + Zero, + 0x14, + 0x0F, + 0x0C, + 0x0B, + One, + 0x08, + 0xF0, + Zero, + Zero, + 0x00017700, + 0x0190, + 0x04, + 0x04, + 0x05, + Zero, + One, + 0x05, + One, + One, + One, + One, + 0x17, + 0x4B00, + Zero, + 0x04, + One, + 0x04, + One, + Zero, + Zero, + "", + Zero, + Zero, + Zero, + Zero, + Zero, + Zero, + Zero, + 0x17840800, + 0x0400, + One, + One, + Zero, + One, + One, + One, + Package (0x07) + { + "CPRH_SW_THREAD_SETTING", + Zero, + "L3", + 0x02, + 0x02, + Zero, + Zero + }, + + Package (0x07) + { + "CPRH_SW_THREAD_SETTING", + One, + "Silver", + 0x02, + 0x02, + Zero, + Zero + } + }, + + Package (0x35) + { + "CPRH_SW_CONTROLLER_SETTING", + One, + "APC1", + 0x17DB0000, + 0x4000, + Zero, + 0x14, + 0x0F, + 0x0E, + 0x09, + One, + 0x0E, + Zero, + Zero, + Zero, + 0x00017700, + 0x0190, + 0x04, + 0x04, + 0x05, + Zero, + 0x06, + 0x0A, + One, + One, + Zero, + Zero, + 0x17, + 0x4B00, + Zero, + 0x04, + One, + 0x04, + One, + Zero, + Zero, + "", + Zero, + Zero, + Zero, + Zero, + Zero, + Zero, + Zero, + 0x17830800, + 0x0400, + One, + One, + Zero, + One, + One, + One, + Package (0x07) + { + "CPRH_SW_THREAD_SETTING", + Zero, + "Gold", + 0x02, + 0x02, + Zero, + 0x02 + } + } + }, + + Package (0x05) + { + "CPRH_CHIP_INFO", + 0x0155, + One, + Package (0x36) + { + "CPRH_SW_CONTROLLER_SETTING", + Zero, + "APC0", + 0x17DC0000, + 0x4000, + Zero, + 0x14, + 0x0F, + 0x0C, + 0x0B, + One, + 0x08, + 0xF0, + Zero, + Zero, + 0x00017700, + 0x0190, + 0x04, + 0x04, + 0x05, + Zero, + One, + 0x05, + One, + One, + One, + One, + 0x17, + 0x4B00, + Zero, + 0x04, + One, + 0x04, + One, + Zero, + Zero, + "", + Zero, + Zero, + Zero, + Zero, + Zero, + Zero, + Zero, + 0x17840800, + 0x0400, + One, + One, + Zero, + One, + One, + One, + Package (0x07) + { + "CPRH_SW_THREAD_SETTING", + Zero, + "Silver", + 0x02, + 0x02, + Zero, + Zero + }, + + Package (0x07) + { + "CPRH_SW_THREAD_SETTING", + One, + "L3", + 0x02, + 0x02, + Zero, + Zero + } + }, + + Package (0x35) + { + "CPRH_SW_CONTROLLER_SETTING", + One, + "APC1", + 0x17DB0000, + 0x4000, + Zero, + 0x14, + 0x0F, + 0x0E, + 0x09, + One, + 0x0E, + Zero, + Zero, + Zero, + 0x00017700, + 0x0190, + 0x04, + 0x04, + 0x05, + Zero, + 0x06, + 0x0A, + One, + One, + Zero, + Zero, + 0x17, + 0x4B00, + Zero, + 0x04, + One, + 0x04, + One, + Zero, + Zero, + "", + Zero, + Zero, + Zero, + Zero, + Zero, + Zero, + Zero, + 0x17830800, + 0x0400, + One, + One, + Zero, + One, + One, + One, + Package (0x07) + { + "CPRH_SW_THREAD_SETTING", + Zero, + "Gold", + 0x02, + 0x02, + Zero, + 0x02 + } + } + }, + + Package (0x05) + { + "CPRH_CHIP_INFO", + 0x0155, + 0x02, + Package (0x36) + { + "CPRH_SW_CONTROLLER_SETTING", + Zero, + "APC0", + 0x17DC0000, + 0x4000, + Zero, + 0x14, + 0x0F, + 0x0C, + 0x0B, + One, + 0x08, + 0xF0, + Zero, + Zero, + 0x00017700, + 0x0190, + 0x04, + 0x04, + 0x05, + Zero, + One, + 0x05, + One, + One, + One, + One, + 0x17, + 0x4B00, + Zero, + 0x04, + One, + 0x04, + One, + Zero, + Zero, + "", + Zero, + Zero, + Zero, + Zero, + Zero, + Zero, + Zero, + 0x17840800, + 0x0400, + One, + One, + Zero, + One, + One, + One, + Package (0x07) + { + "CPRH_SW_THREAD_SETTING", + Zero, + "Silver", + 0x02, + 0x02, + Zero, + Zero + }, + + Package (0x07) + { + "CPRH_SW_THREAD_SETTING", + One, + "L3", + 0x02, + 0x02, + Zero, + Zero + } + }, + + Package (0x35) + { + "CPRH_SW_CONTROLLER_SETTING", + One, + "APC1", + 0x17DB0000, + 0x4000, + Zero, + 0x14, + 0x0F, + 0x0E, + 0x09, + One, + 0x0E, + Zero, + Zero, + Zero, + 0x00017700, + 0x0190, + 0x04, + 0x04, + 0x05, + Zero, + 0x06, + 0x0A, + One, + One, + Zero, + Zero, + 0x17, + 0x4B00, + Zero, + 0x04, + One, + 0x04, + One, + Zero, + Zero, + "", + Zero, + Zero, + Zero, + Zero, + Zero, + Zero, + Zero, + 0x17830800, + 0x0400, + One, + One, + Zero, + One, + One, + One, + Package (0x07) + { + "CPRH_SW_THREAD_SETTING", + Zero, + "Gold", + 0x02, + 0x02, + Zero, + 0x02 + } + } + } + }) + } + + Scope (\_SB.PEP0) + { + Name (NDCV, Package (0x05) + { + Package (0x08) + { + "CHIP_INFO", + 0x0141, + One, + Zero, + 0x02, + Package (0x06) + { + "BIG", + 0x04, + "apcs_gold_sysleaf_clk", + Package (0x03) + { + 0x012C, + 0x040D, + 0x0626 + }, + + 0x03, + Package (0x03) + { + Zero, + 0x09, + 0x10 + } + }, + + Package (0x06) + { + "LITTLE", + 0x04, + "apcs_silver_sysleaf_clk", + Package (0x03) + { + 0x012C, + 0x04BA, + 0x063A + }, + + 0x03, + Package (0x03) + { + Zero, + 0x0B, + 0x10 + } + }, + + Package (0x02) + { + "L3_CACHE", + "apcs_l3_sysleaf_clk" + } + }, + + Package (0x08) + { + "CHIP_INFO", + 0x0141, + 0x02, + Zero, + 0x02, + Package (0x06) + { + "BIG", + 0x04, + "apcs_gold_sysleaf_clk", + Package (0x03) + { + 0x033A, + 0x0553, + 0x05B4 + }, + + 0x03, + Package (0x03) + { + Zero, + 0x07, + 0x0F + } + }, + + Package (0x06) + { + "LITTLE", + 0x04, + "apcs_silver_sysleaf_clk", + Package (0x03) + { + 0x012C, + 0x04CD, + 0x052D + }, + + 0x03, + Package (0x03) + { + Zero, + 0x0B, + 0x0F + } + }, + + Package (0x02) + { + "L3_CACHE", + "apcs_l3_sysleaf_clk" + } + }, + + Package (0x08) + { + "CHIP_INFO", + 0x0155, + One, + Zero, + 0x02, + Package (0x06) + { + "BIG", + 0x04, + "apcs_gold_sysleaf_clk", + Package (0x03) + { + 0x012C, + 0x040D, + 0x0626 + }, + + 0x03, + Package (0x03) + { + Zero, + 0x09, + 0x10 + } + }, + + Package (0x06) + { + "LITTLE", + 0x04, + "apcs_silver_sysleaf_clk", + Package (0x03) + { + 0x012C, + 0x04BA, + 0x063A + }, + + 0x03, + Package (0x03) + { + Zero, + 0x0B, + 0x10 + } + }, + + Package (0x02) + { + "L3_CACHE", + "apcs_l3_sysleaf_clk" + } + }, + + Package (0x08) + { + "CHIP_INFO", + 0x0155, + 0x02, + Zero, + 0x02, + Package (0x06) + { + "BIG", + 0x04, + "apcs_gold_sysleaf_clk", + Package (0x03) + { + 0x033A, + 0x0553, + 0x05B4 + }, + + 0x03, + Package (0x03) + { + Zero, + 0x07, + 0x0F + } + }, + + Package (0x06) + { + "LITTLE", + 0x04, + "apcs_silver_sysleaf_clk", + Package (0x03) + { + 0x012C, + 0x04CD, + 0x052D + }, + + 0x03, + Package (0x03) + { + Zero, + 0x0B, + 0x0F + } + }, + + Package (0x02) + { + "L3_CACHE", + "apcs_l3_sysleaf_clk" + } + }, + + Package (0x08) + { + "CHIP_INFO", + 0x015C, + 0x02, + Zero, + 0x02, + Package (0x06) + { + "BIG", + 0x04, + "apcs_gold_sysleaf_clk", + Package (0x03) + { + 0x033A, + 0x0553, + 0x05B4 + }, + + 0x03, + Package (0x03) + { + Zero, + 0x07, + 0x0F + } + }, + + Package (0x06) + { + "LITTLE", + 0x04, + "apcs_silver_sysleaf_clk", + Package (0x03) + { + 0x012C, + 0x04CD, + 0x052D + }, + + 0x03, + Package (0x03) + { + Zero, + 0x0B, + 0x0F + } + }, + + Package (0x02) + { + "L3_CACHE", + "apcs_l3_sysleaf_clk" + } + } + }) + Method (LDCV, 0, NotSerialized) + { + Return (NDCV) /* \_SB_.PEP0.NDCV */ + } + } + + Scope (\_SB.PEP0) + { + Method (CTSN, 0, NotSerialized) + { + Return (THSD) /* \_SB_.PEP0.THSD */ + } + + Method (PEPH, 0, NotSerialized) + { + Return (Package (0x01) + { + "ACPI\\VEN_QCOM&DEV_0237" + }) + } + + Method (BCLH, 0, NotSerialized) + { + Return (Package (0x01) + { + "ACPI\\VEN_QCOM&DEV_0294" + }) + } + + Name (THSD, Package (0x07) + { + Package (0x16) + { + 0x15, + Package (0x02) + { + "ACPI\\VEN_QCOM&DEV_027F", + Zero + }, + + Package (0x02) + { + "ACPI\\VEN_QCOM&DEV_0280", + One + }, + + Package (0x02) + { + "ACPI\\VEN_QCOM&DEV_0281", + 0x02 + }, + + Package (0x02) + { + "ACPI\\VEN_QCOM&DEV_0282", + 0x03 + }, + + Package (0x02) + { + "ACPI\\VEN_QCOM&DEV_0283", + 0x04 + }, + + Package (0x02) + { + "ACPI\\VEN_QCOM&DEV_0284", + 0x05 + }, + + Package (0x02) + { + "ACPI\\VEN_QCOM&DEV_0285", + 0x06 + }, + + Package (0x02) + { + "ACPI\\VEN_QCOM&DEV_0286", + 0x07 + }, + + Package (0x02) + { + "ACPI\\VEN_QCOM&DEV_0287", + 0x08 + }, + + Package (0x02) + { + "ACPI\\VEN_QCOM&DEV_0288", + 0x09 + }, + + Package (0x02) + { + "ACPI\\VEN_QCOM&DEV_0289", + 0x0A + }, + + Package (0x02) + { + "ACPI\\VEN_QCOM&DEV_02AB", + 0x0B + }, + + Package (0x02) + { + "ACPI\\VEN_QCOM&DEV_02AC", + 0x0C + }, + + Package (0x02) + { + "ACPI\\VEN_QCOM&DEV_02AD", + 0x0D + }, + + Package (0x02) + { + "ACPI\\VEN_QCOM&DEV_02AE", + 0x0E + }, + + Package (0x02) + { + "ACPI\\VEN_QCOM&DEV_02AF", + 0x0F + }, + + Package (0x02) + { + "ACPI\\VEN_QCOM&DEV_02C8", + 0x10 + }, + + Package (0x02) + { + "ACPI\\VEN_QCOM&DEV_02C9", + 0x11 + }, + + Package (0x02) + { + "ACPI\\VEN_QCOM&DEV_02CA", + 0x12 + }, + + Package (0x02) + { + "ACPI\\VEN_QCOM&DEV_02CB", + 0x13 + }, + + Package (0x02) + { + "ACPI\\VEN_QCOM&DEV_02CC", + 0x14 + } + }, + + Package (0x04) + { + 0x03, + Package (0x04) + { + "ACPI\\VEN_QCOM&DEV_02B0", + 0x15, + 0x05, + Package (0x05) + { + One, + 0x02, + 0x03, + 0x04, + 0x05 + } + }, + + Package (0x04) + { + "ACPI\\VEN_QCOM&DEV_02B1", + 0x16, + 0x05, + Package (0x05) + { + 0x06, + 0x07, + 0x08, + 0x09, + 0x0A + } + }, + + Package (0x04) + { + "ACPI\\VEN_QCOM&DEV_02B2", + 0x17, + 0x15, + Package (0x15) + { + Zero, + One, + 0x02, + 0x03, + 0x04, + 0x05, + 0x06, + 0x07, + 0x08, + 0x09, + 0x0A, + 0x0B, + 0x0C, + 0x0D, + 0x0E, + 0x0F, + 0x10, + 0x11, + 0x12, + 0x13, + 0x14 + } + } + }, + + Package (0x05) + { + 0x04, + Package (0x04) + { + "SYS_THERM1", + "ACPI\\VEN_QCOM&DEV_0299", + Zero, + Zero + }, +#if 0 + Package (0x04) + { + "SYS_THERM2", + "ACPI\\VEN_QCOM&DEV_029A", + One, + Zero + }, +#endif + Package (0x04) + { + "PA_THERM", + "ACPI\\VEN_QCOM&DEV_029B", + 0x01, + Zero + }, + + Package (0x04) + { + "PA_THERM1", + "ACPI\\VEN_QCOM&DEV_029C", + 0x02, + Zero + }, + +#if 0 + Package (0x04) + { + "SYS_THERM3", + "ACPI\\VEN_QCOM&DEV_029D", + 0x04, + Zero + }, +#endif + + Package (0x04) + { + "PMIC_THERM", + "ACPI\\VEN_QCOM&DEV_029E", + 0x03, + Zero + }, +#if 0 + Package (0x04) + { + "BAT_THERM", + "ACPI\\VEN_QCOM&DEV_029F", + 0x04, + Zero + }, + Package (0x04) + { + "RF_THERM", + "ACPI\\VEN_QCOM&DEV_02A0", + 0x05, + Zero + } +#endif + }, + + Package (0x02) + { + One, + Package (0x05) + { + 0x02, + 0x0ADC, + 0x0B0E, + 0x02, + One + } + }, + + Package (0x05) + { + 0x04, + Package (0x03) + { + "cpuv_restriction_cold", + One, + Zero + }, + + Package (0x03) + { + "cpuv_restriction_cold", + One, + One + }, + + Package (0x03) + { + "cpuv_restriction_cold", + One, + 0x43 + }, + + Package (0x03) + { + "cpuv_restriction_cold", + One, + 0x53 + } + }, + + Package (0x01) + { + Zero + }, + + Package (0x08) + { + 0x07, + Package (0x03) + { + Zero, + Zero, + Zero + }, + + Package (0x03) + { + One, + 0x03, + Zero + }, + + Package (0x03) + { + 0x03, + 0x02, + Zero + }, + + Package (0x03) + { + 0x04, + 0x02, + One + }, + + Package (0x03) + { + 0x06, + 0x02, + 0x02 + }, + + Package (0x03) + { + 0x08, + 0x02, + 0x03 + }, + + Package (0x03) + { + 0x02, + 0x04, + Zero + } + } + }) + } + + Scope (\_SB.PEP0) + { + // Defined in pep_common.asl for audio resources under method STND (Name STNX) + Method (APMD, 0, NotSerialized) + { + // We return object named APCC - defined below for audio resources + Return (APCC) /* \_SB_.PEP0.APCC */ + } + + Name (APCC, Package (0x02) + { + Package (0x1A) + { + // These resources are for Codec hardware + "DEVICE", + "\\_SB.ADSP.SLM1.ADCM.AUDD", + Package (0x05) + { + "COMPONENT", + Zero, + Package (0x03) + { + "FSTATE", + Zero, + Package (0x02) + { + "PMICVREGVOTE", + Package (0x03) + { + "PPP_RESOURCE_ID_CXO_BUFFERS_BBCLK2_A", + 0x06, + One + } + } + }, + + Package (0x03) + { + "FSTATE", + One, + Package (0x02) + { + "PMICVREGVOTE", + Package (0x03) + { + "PPP_RESOURCE_ID_CXO_BUFFERS_BBCLK2_A", + 0x06, + Zero + } + } + }, + + Package (0x06) + { + "PSTATE_SET", + Zero, + Package (0x03) + { + "PSTATE", + Zero, + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_SMPS4_A", + 0x02, + 0x001B7740, + One, + Zero, + Zero + } + } + }, + + Package (0x03) + { + "PSTATE", + One, + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_SMPS4_A", + 0x02, + 0x001B7740, + Zero, + Zero, + Zero + } + } + }, + + Package (0x02) + { + "PREPARE_PSTATE", + Zero + }, + + Package (0x02) + { + "ABANDON_PSTATE", + One + } + } + }, + + Package (0x04) + { + "COMPONENT", + One, + Package (0x02) + { + "FSTATE", + Zero + }, + + Package (0x02) + { + "FSTATE", + One + } + }, + + Package (0x04) + { + "COMPONENT", + 0x02, + Package (0x02) + { + "FSTATE", + Zero + }, + + Package (0x02) + { + "FSTATE", + One + } + }, + + Package (0x04) + { + "COMPONENT", + 0x03, + Package (0x02) + { + "FSTATE", + Zero + }, + + Package (0x02) + { + "FSTATE", + One + } + }, + + Package (0x04) + { + "COMPONENT", + 0x04, + Package (0x02) + { + "FSTATE", + Zero + }, + + Package (0x02) + { + "FSTATE", + One + } + }, + + Package (0x04) + { + "COMPONENT", + 0x05, + Package (0x02) + { + "FSTATE", + Zero + }, + + Package (0x02) + { + "FSTATE", + One + } + }, + + Package (0x04) + { + "COMPONENT", + 0x06, + Package (0x02) + { + "FSTATE", + Zero + }, + + Package (0x02) + { + "FSTATE", + One + } + }, + + Package (0x04) + { + "COMPONENT", + 0x07, + Package (0x02) + { + "FSTATE", + Zero + }, + + Package (0x02) + { + "FSTATE", + One + } + }, + + Package (0x04) + { + "COMPONENT", + 0x08, + Package (0x02) + { + "FSTATE", + Zero + }, + + Package (0x02) + { + "FSTATE", + One + } + }, + + Package (0x04) + { + "COMPONENT", + 0x09, + Package (0x02) + { + "FSTATE", + Zero + }, + + Package (0x02) + { + "FSTATE", + One + } + }, + + Package (0x04) + { + "COMPONENT", + 0x0A, + Package (0x02) + { + "FSTATE", + Zero + }, + + Package (0x02) + { + "FSTATE", + One + } + }, + + Package (0x04) + { + "COMPONENT", + 0x0B, + Package (0x02) + { + "FSTATE", + Zero + }, + + Package (0x02) + { + "FSTATE", + One + } + }, + + Package (0x04) + { + "COMPONENT", + 0x0C, + Package (0x02) + { + "FSTATE", + Zero + }, + + Package (0x02) + { + "FSTATE", + One + } + }, + + Package (0x04) + { + "COMPONENT", + 0x0D, + Package (0x02) + { + "FSTATE", + Zero + }, + + Package (0x02) + { + "FSTATE", + One + } + }, + + Package (0x04) + { + "COMPONENT", + 0x0E, + Package (0x02) + { + "FSTATE", + Zero + }, + + Package (0x02) + { + "FSTATE", + One + } + }, + + Package (0x04) + { + "COMPONENT", + 0x0F, + Package (0x02) + { + "FSTATE", + Zero + }, + + Package (0x02) + { + "FSTATE", + One + } + }, + + Package (0x04) + { + "COMPONENT", + 0x10, + Package (0x02) + { + "FSTATE", + Zero + }, + + Package (0x02) + { + "FSTATE", + One + } + }, + + Package (0x04) + { + "COMPONENT", + 0x11, + Package (0x02) + { + "FSTATE", + Zero + }, + + Package (0x02) + { + "FSTATE", + One + } + }, + + Package (0x04) + { + "COMPONENT", + 0x12, + Package (0x02) + { + "FSTATE", + Zero + }, + + Package (0x02) + { + "FSTATE", + One + } + }, + + Package (0x04) + { + "COMPONENT", + 0x13, + Package (0x02) + { + "FSTATE", + Zero + }, + + Package (0x02) + { + "FSTATE", + One + } + }, + + Package (0x04) + { + "COMPONENT", + 0x14, + Package (0x02) + { + "FSTATE", + Zero + }, + + Package (0x02) + { + "FSTATE", + One + } + }, + + Package (0x04) + { + "COMPONENT", + 0x15, + Package (0x02) + { + "FSTATE", + Zero + }, + + Package (0x02) + { + "FSTATE", + One + } + }, + + Package (0x04) + { + "COMPONENT", + 0x16, + Package (0x02) + { + "FSTATE", + Zero + }, + + Package (0x02) + { + "FSTATE", + One + } + }, + + Package (0x04) + { + "COMPONENT", + 0x17, + Package (0x02) + { + "FSTATE", + Zero + }, + + Package (0x02) + { + "FSTATE", + One + } + } + }, + + Package (0x03) + { + "DEVICE", + "\\_SB.ADSP.SLM1.ADCM.AUDD.MBHC", + Package (0x04) + { + "COMPONENT", + Zero, + Package (0x02) + { + "FSTATE", + Zero + }, + + Package (0x02) + { + "FSTATE", + One + } + } + } + }) + } + +//#if 0 + Scope (\_SB.PEP0) + { + //----------------------------------------------------------------------------------------- + // GRAPHICS, DISPLAY, and VIDEO resources + // + // !!WARNING: The below table entries are auto-generated and are part of several + // interdependent ACPI methods that are all auto-generated from a single source. + // These components should NOT be edited by hand, as they must stay in sync + // with all other dependent graphics methods. + //----------------------------------------------------------------------------------------- + // OWNING DRIVER: qcdxkm850.sys + // + // HW CONTROLLED: 3D core + // MDP core + // Internal display circuitry + // HDMI circuitry + // Rotator core + // Video Decode core + // ... + // + // COMPONENTS: + // C0 + // C1 + // C2 + // C3 + // C4 + // C5 + // C6 + // C7 + // C8 + // C9 + //----------------------------------------------------------------------------------------- + // + + //-------------------------------------------------------------------------------------- + // Complete list of individual component methods + //-------------------------------------------------------------------------------------- + // + Method (GPMD, 0, NotSerialized) + { + Name (LIST, Package (0x0B) + { + "METHOD_LIST", + "DM0G", + "DM1G", + "DM2G", + "DM3G", + "DM4G", + "DM5G", + "DM6G", + "DM7G", + "DM8G", + "DM9G" + }) + Return (LIST) /* \_SB_.PEP0.GPMD.LIST */ + } + + Method (G0MD, 0, NotSerialized) + { + Name (GPCC, Package (0x01) + { + Package (0x03) + { + "DEVICE", + "\\_SB.GPU0", + Package (0x0C) + { + "COMPONENT", + Zero, + Package (0x02) + { + "FSTATE", + Zero + }, + + Package (0x04) + { + "FSTATE", + One, + Package (0x12) + { + "ENTER", + Package (0x01) + { + "PSTATE_SAVE" + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + 0x03, + 0x0C + } + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + 0x04, + 0x2A + } + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + 0x02, + 0x04 + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "mdss_core_gdsc", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_disp_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_disp_xo_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "phy_refgen_south", + 0x02 + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x08) + { + "PPP_RESOURCE_ID_LDO1_A", + One, + Zero, + Zero, + Zero, + Zero, + "HLOS_DRV", + "REQUIRED" + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x08) + { + "PPP_RESOURCE_ID_LDO26_A", + One, + Zero, + Zero, + Zero, + Zero, + "HLOS_DRV", + "REQUIRED" + } + }, + + Package (0x02) + { + "PMICGPIO", + Package (0x08) + { + "IOCTL_PM_GPIO_CONFIG_DIGITAL_OUTPUT", + Zero, + 0x11, + Zero, + One, + Zero, + Zero, + Zero + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x60, + Zero, + Zero, + One, + Zero, + Zero + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x7B, + Zero, + Zero, + One, + Zero, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x08) + { + "PPP_RESOURCE_ID_LDO14_A", + One, + Zero, + Zero, + Zero, + Zero, + "HLOS_DRV", + "REQUIRED" + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x08) + { + "PPP_RESOURCE_ID_SMPS6_A", + 0x02, + Zero, + Zero, + Zero, + Zero, + "HLOS_DRV", + "REQUIRED" + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x03) + { + "PPP_RESOURCE_ID_CXO_BUFFERS_DIVCLK3_A", + 0x06, + Zero + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x80, + Zero, + Zero, + One, + Zero, + Zero + } + } + }, + + Package (0x11) + { + "EXIT", + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_disp_xo_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_disp_ahb_clk", + One + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "mdss_core_gdsc", + One + } + }, + + Package (0x01) + { + "PSTATE_RESTORE" + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x08) + { + "PPP_RESOURCE_ID_LDO1_A", + One, + 0x000D6D80, + One, + 0x07, + Zero, + "HLOS_DRV", + "REQUIRED" + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x08) + { + "PPP_RESOURCE_ID_LDO26_A", + One, + 0x00124F80, + One, + 0x07, + Zero, + "HLOS_DRV", + "REQUIRED" + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x08) + { + "PPP_RESOURCE_ID_LDO14_A", + One, + 0x001CAFC0, + One, + 0x07, + Zero, + "HLOS_DRV", + "REQUIRED" + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x08) + { + "PPP_RESOURCE_ID_SMPS6_A", + 0x02, + 0x000C3500, + One, + 0x07, + Zero, + "HLOS_DRV", + "REQUIRED" + } + }, + + Package (0x02) + { + "PMICGPIO", + Package (0x08) + { + "IOCTL_PM_GPIO_CONFIG_DIGITAL_OUTPUT", + Zero, + 0x11, + Zero, + Zero, + One, + One, + 0x04 + } + }, + + Package (0x02) + { + "DELAY", + Package (0x01) + { + 0x0A + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x7B, + One, + Zero, + One, + 0x03, + 0x07 + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x80, + One, + Zero, + One, + 0x03, + 0x07 + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x03) + { + "PPP_RESOURCE_ID_CXO_BUFFERS_DIVCLK3_A", + 0x06, + One + } + }, + + Package (0x02) + { + "PMICGPIO", + Package (0x08) + { + "IOCTL_PM_GPIO_CONFIG_DIGITAL_OUTPUT", + Zero, + 0x0F, + Zero, + Zero, + 0x04, + 0x03, + 0x04 + } + }, + + Package (0x02) + { + "DELAY", + Package (0x01) + { + 0x96 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "phy_refgen_south", + One + } + } + } + }, + + Package (0x02) + { + "INIT_FSTATE", + One + }, + + Package (0x02) + { + "PRELOAD_FSTATE", + Zero + }, + + Package (0x02) + { + "ABANDON_FSTATE", + Zero + }, + + Package (0x07) + { + "PSTATE_SET", + Zero, + Package (0x02) + { + "PSTATE", + Zero + }, + + Package (0x02) + { + "PSTATE", + One + }, + + Package (0x02) + { + "PRELOAD_PSTATE", + Zero + }, + + Package (0x02) + { + "PREPARE_PSTATE", + Zero + }, + + Package (0x02) + { + "ABANDON_PSTATE", + Zero + } + }, + + Package (0x04) + { + "PSTATE_SET", + One, + Package (0x05) + { + "PSTATE", + Zero, + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_disp_xo_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_disp_ahb_clk", + One + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "mdss_core_gdsc", + One + } + } + }, + + Package (0x05) + { + "PSTATE", + One, + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "mdss_core_gdsc", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_disp_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_disp_xo_clk", + 0x02 + } + } + } + }, + + Package (0x0A) + { + "PSTATE_SET", + 0x02, + Package (0x12) + { + "PSTATE", + Zero, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_DISPLAY_CFG", + 0x047868C0, + Zero + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_disp_axi_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_axi_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_mdp_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_vsync_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + 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"ICBID_MASTER_MNOC_HF_MEM_NOC", + "ICBID_SLAVE_EBI1", + 0x2FAF0800, + 0x000000023C346000 + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x0A, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_MNOC_HF_MEM_NOC", + 0x000000023C346000, + 0x00000002245CDC00 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MNOC_HF_MEM_NOC", + "ICBID_SLAVE_EBI1", + 0x2FAF0800, + 0x00000002245CDC00 + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x0B, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_MNOC_HF_MEM_NOC", + 0x000000023C346000, + 0x000000020C855800 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MNOC_HF_MEM_NOC", + "ICBID_SLAVE_EBI1", + 0x2FAF0800, + 0x000000020C855800 + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x0C, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_MNOC_HF_MEM_NOC", + 0x000000023C346000, + 0x00000001F4ADD400 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MNOC_HF_MEM_NOC", + "ICBID_SLAVE_EBI1", + 0x2FAF0800, + 0x00000001F4ADD400 + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x0D, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_MNOC_HF_MEM_NOC", + 0x000000023C346000, + 0x00000001DCD65000 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MNOC_HF_MEM_NOC", + "ICBID_SLAVE_EBI1", + 0x2FAF0800, + 0x00000001DCD65000 + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x0E, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_MNOC_HF_MEM_NOC", + 0x000000023C346000, + 0x00000001C4FECC00 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MNOC_HF_MEM_NOC", + "ICBID_SLAVE_EBI1", + 0x2FAF0800, + 0x00000001C4FECC00 + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x0F, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_MNOC_HF_MEM_NOC", + 0x000000023C346000, + 0x00000001AD274800 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MNOC_HF_MEM_NOC", + "ICBID_SLAVE_EBI1", + 0x2FAF0800, + 0x00000001AD274800 + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x10, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_MNOC_HF_MEM_NOC", + 0x000000023C346000, + 0x00000001954FC400 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MNOC_HF_MEM_NOC", + "ICBID_SLAVE_EBI1", + 0x2FAF0800, + 0x00000001954FC400 + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x11, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_MNOC_HF_MEM_NOC", + 0x000000023C346000, + 0x000000017D784000 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MNOC_HF_MEM_NOC", + "ICBID_SLAVE_EBI1", + 0x2FAF0800, + 0x000000017D784000 + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x12, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_MNOC_HF_MEM_NOC", + 0x000000023C346000, + 0x0000000165A0BC00 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MNOC_HF_MEM_NOC", + "ICBID_SLAVE_EBI1", + 0x2FAF0800, + 0x0000000165A0BC00 + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x13, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_MNOC_HF_MEM_NOC", + 0x000000023C346000, + 0x000000014DC93800 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MNOC_HF_MEM_NOC", + "ICBID_SLAVE_EBI1", + 0x2FAF0800, + 0x000000014DC93800 + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x14, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_MNOC_HF_MEM_NOC", + 0x000000023C346000, + 0x0000000135F1B400 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MNOC_HF_MEM_NOC", + "ICBID_SLAVE_EBI1", + 0x2FAF0800, + 0x0000000135F1B400 + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x15, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_MNOC_HF_MEM_NOC", + 0x000000023C346000, + 0x000000011E1A3000 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MNOC_HF_MEM_NOC", + "ICBID_SLAVE_EBI1", + 0x2FAF0800, + 0x000000011E1A3000 + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x16, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_MNOC_HF_MEM_NOC", + 0x000000023C346000, + 0x000000010642AC00 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MNOC_HF_MEM_NOC", + "ICBID_SLAVE_EBI1", + 0x2FAF0800, + 0x000000010642AC00 + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x17, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_MNOC_HF_MEM_NOC", + 0x000000023C346000, + 0xEE6B2800 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MNOC_HF_MEM_NOC", + "ICBID_SLAVE_EBI1", + 0x2FAF0800, + 0xEE6B2800 + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x18, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_MNOC_HF_MEM_NOC", + 0x000000023C346000, + 0xD693A400 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MNOC_HF_MEM_NOC", + "ICBID_SLAVE_EBI1", + 0x2FAF0800, + 0xD693A400 + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x19, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_MNOC_HF_MEM_NOC", + 0x000000023C346000, + 0xBEBC2000 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MNOC_HF_MEM_NOC", + "ICBID_SLAVE_EBI1", + 0x2FAF0800, + 0xBEBC2000 + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x1A, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_MNOC_HF_MEM_NOC", + 0x00000001F4ADD400, + 0xA6E49C00 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MNOC_HF_MEM_NOC", + "ICBID_SLAVE_EBI1", + 0x2FAF0800, + 0xA6E49C00 + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x1B, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_MNOC_HF_MEM_NOC", + 0x00000001AD274800, + 0x8F0D1800 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MNOC_HF_MEM_NOC", + "ICBID_SLAVE_EBI1", + 0x2FAF0800, + 0x8F0D1800 + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x1C, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_MNOC_HF_MEM_NOC", + 0x0000000165A0BC00, + 0x77359400 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MNOC_HF_MEM_NOC", + "ICBID_SLAVE_EBI1", + 0x2FAF0800, + 0x77359400 + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x1D, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_MNOC_HF_MEM_NOC", + 0x000000011E1A3000, + 0x5F5E1000 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MNOC_HF_MEM_NOC", + "ICBID_SLAVE_EBI1", + 0x2FAF0800, + 0x5F5E1000 + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x1E, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_MNOC_HF_MEM_NOC", + 0x000000011E1A3000, + 0x59682F00 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MNOC_HF_MEM_NOC", + "ICBID_SLAVE_EBI1", + 0x2FAF0800, + 0x59682F00 + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x1F, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_MNOC_HF_MEM_NOC", + 0x000000011E1A3000, + 0x53724E00 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MNOC_HF_MEM_NOC", + "ICBID_SLAVE_EBI1", + 0x2FAF0800, + 0x53724E00 + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x20, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_MNOC_HF_MEM_NOC", + 0x000000011E1A3000, + 0x4D7C6D00 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MNOC_HF_MEM_NOC", + "ICBID_SLAVE_EBI1", + 0x2FAF0800, + 0x4D7C6D00 + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x21, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_MNOC_HF_MEM_NOC", + 0x000000011E1A3000, + 0x47868C00 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MNOC_HF_MEM_NOC", + "ICBID_SLAVE_EBI1", + 0x2FAF0800, + 0x47868C00 + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x22, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_MNOC_HF_MEM_NOC", + 0x000000011E1A3000, + 0x4190AB00 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MNOC_HF_MEM_NOC", + "ICBID_SLAVE_EBI1", + 0x2FAF0800, + 0x4190AB00 + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x23, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_MNOC_HF_MEM_NOC", + 0x000000011E1A3000, + 0x3B9ACA00 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MNOC_HF_MEM_NOC", + "ICBID_SLAVE_EBI1", + 0x2FAF0800, + 0x3B9ACA00 + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x24, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_MNOC_HF_MEM_NOC", + 0x000000011E1A3000, + 0x35A4E900 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MNOC_HF_MEM_NOC", + "ICBID_SLAVE_EBI1", + 0x2FAF0800, + 0x35A4E900 + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x25, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_MNOC_HF_MEM_NOC", + 0x000000011E1A3000, + 0x2FAF0800 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MNOC_HF_MEM_NOC", + "ICBID_SLAVE_EBI1", + 0x2FAF0800, + 0x2FAF0800 + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x26, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_MNOC_HF_MEM_NOC", + 0x000000011E1A3000, + 0x29B92700 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MNOC_HF_MEM_NOC", + "ICBID_SLAVE_EBI1", + 0x2FAF0800, + 0x29B92700 + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x27, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_MNOC_HF_MEM_NOC", + 0x000000011E1A3000, + 0x23C34600 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MNOC_HF_MEM_NOC", + "ICBID_SLAVE_EBI1", + 0x2FAF0800, + 0x23C34600 + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x28, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_MNOC_HF_MEM_NOC", + 0x000000011E1A3000, + 0x1DCD6500 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MNOC_HF_MEM_NOC", + "ICBID_SLAVE_EBI1", + 0x2FAF0800, + 0x1DCD6500 + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x29, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_MNOC_HF_MEM_NOC", + 0x000000011E1A3000, + 0x17D78400 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MNOC_HF_MEM_NOC", + "ICBID_SLAVE_EBI1", + 0x2FAF0800, + 0x17D78400 + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x2A, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_MNOC_HF_MEM_NOC", + Zero, + Zero + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MNOC_HF_MEM_NOC", + "ICBID_SLAVE_EBI1", + Zero, + Zero + } + } + }, + + Package (0x02) + { + "PRELOAD_PSTATE", + 0x1F + }, + + Package (0x02) + { + "PREPARE_PSTATE", + 0x1F + }, + + Package (0x02) + { + "ABANDON_PSTATE", + 0x1F + } + } + } + } + }) + Return (GPCC) /* \_SB_.PEP0.G0MD.GPCC */ + } + + Method (G1MD, 0, NotSerialized) + { + Name (GPCC, Package (0x01) + { + Package (0x03) + { + "DEVICE", + "\\_SB.GPU0", + Package (0x0B) + { + "COMPONENT", + One, + Package (0x03) + { + "FSTATE", + Zero, + Package (0x08) + { + "ENTER", + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + One, + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gpu_cc_cxo_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gpu_cc_cx_gmu_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_gpu_memnoc_gfx_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gpu_cc_gx_gfx3d_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "gpu_cc_cx_gmu_clk", + 0x03, + 0x0BEBC200, + 0x03 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_GFX3D", + "ICBID_SLAVE_EBI1", + One, + Zero + } + } + } + }, + + Package (0x03) + { + "FSTATE", + One, + Package (0x06) + { + "ENTER", + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gpu_cc_gx_gfx3d_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_gpu_memnoc_gfx_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gpu_cc_cx_gmu_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gpu_cc_cxo_clk", + 0x02 + } + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + One, + 0x02 + } + } + } + }, + + Package (0x03) + { + "FSTATE", + 0x02, + Package (0x07) + { + "ENTER", + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_GFX3D", + "ICBID_SLAVE_EBI1", + Zero, + Zero + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gpu_cc_gx_gfx3d_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_gpu_memnoc_gfx_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gpu_cc_cx_gmu_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gpu_cc_cxo_clk", + 0x02 + } + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + One, + 0x02 + } + } + } + }, + + Package (0x02) + { + "INIT_FSTATE", + One + }, + + Package (0x02) + { + "PRELOAD_FSTATE", + One + }, + + Package (0x02) + { + "ABANDON_FSTATE", + One + }, + + Package (0x07) + { + "PSTATE_SET", + Zero, + Package (0x02) + { + "PSTATE", + Zero + }, + + Package (0x05) + { + "PSTATE", + One, + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + One, + 0x02 + } + }, + + Package (0x02) + { + "DELAY", + Package (0x01) + { + One + } + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + One, + One + } + } + }, + + Package (0x02) + { + "PRELOAD_PSTATE", + Zero + }, + + Package (0x02) + { + "PREPARE_PSTATE", + Zero + }, + + Package (0x02) + { + "ABANDON_PSTATE", + Zero + } + }, + + Package (0x08) + { + "PSTATE_SET", + One, + Package (0x02) + { + "PSTATE", + Zero + }, + + Package (0x03) + { + "PSTATE", + One, + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "cx_gdsc", + One + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x02, + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "cx_gdsc", + 0x02 + } + } + }, + + Package (0x02) + { + "PRELOAD_PSTATE", + Zero + }, + + Package (0x02) + { + "PREPARE_PSTATE", + Zero + }, + + Package (0x02) + { + "ABANDON_PSTATE", + Zero + } + }, + + Package (0x07) + { + "PSTATE_SET", + 0x02, + Package (0x02) + { + "PSTATE", + Zero + }, + + Package (0x02) + { + "PSTATE", + One + }, + + Package (0x02) + { + "PRELOAD_PSTATE", + One + }, + + Package (0x02) + { + "PREPARE_PSTATE", + One + }, + + Package (0x02) + { + "ABANDON_PSTATE", + One + } + } + } + } + }) + Return (GPCC) /* \_SB_.PEP0.G1MD.GPCC */ + } + + Method (G2MD, 0, NotSerialized) + { + Name (GPCC, Package (0x01) + { + Package (0x03) + { + "DEVICE", + "\\_SB.GPU0", + Package (0x0C) + { + "COMPONENT", + 0x02, + Package (0x02) + { + "FSTATE", + Zero + }, + + Package (0x04) + { + "FSTATE", + One, + Package (0x0B) + { + "ENTER", + Package (0x01) + { + "PSTATE_SAVE" + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + 0x02, + 0x0C + } + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + 0x03, + 0x31 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_rscc_vsync_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_rscc_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_vsync_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_mdp_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_DISPLAY_CFG", + Zero, + Zero + } + } + }, + + Package (0x09) + { + "EXIT", + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_DISPLAY_CFG", + 0x047868C0, + Zero + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_axi_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_mdp_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_vsync_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_rscc_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_rscc_vsync_clk", + One + } + }, + + Package (0x01) + { + "PSTATE_RESTORE" + } + } + }, + + Package (0x04) + { + "FSTATE", + 0x02, + Package (0x0F) + { + "ENTER", + Package (0x01) + { + "PSTATE_SAVE" + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + 0x02, + 0x0C + } + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + 0x03, + 0x31 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_rscc_vsync_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_rscc_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_vsync_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_mdp_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_disp_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_DISPLAY_CFG", + Zero, + Zero + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "mdss_core_gdsc", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_disp_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_disp_xo_clk", + 0x02 + } + } + }, + + Package (0x0D) + { + "EXIT", + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_disp_xo_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_disp_ahb_clk", + One + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "mdss_core_gdsc", + One + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_DISPLAY_CFG", + 0x047868C0, + Zero + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_disp_axi_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_axi_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_mdp_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_vsync_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_rscc_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_rscc_vsync_clk", + One + } + }, + + Package (0x01) + { + "PSTATE_RESTORE" + } + } + }, + + Package (0x02) + { + "INIT_FSTATE", + Zero + }, + + Package (0x02) + { + "PRELOAD_FSTATE", + 0x02 + }, + + Package (0x02) + { + "ABANDON_FSTATE", + 0x02 + }, + + Package (0x07) + { + "PSTATE_SET", + Zero, + Package (0x02) + { + "PSTATE", + Zero + }, + + Package (0x02) + { + "PSTATE", + One + }, + + Package (0x02) + { + "PRELOAD_PSTATE", + Zero + }, + + Package (0x02) + { + "PREPARE_PSTATE", + Zero + }, + + Package (0x02) + { + "ABANDON_PSTATE", + Zero + } + }, + + Package (0x04) + { + "PSTATE_SET", + One, + Package (0x05) + { + "PSTATE", + Zero, + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_disp_xo_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_disp_ahb_clk", + One + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "mdss_core_gdsc", + One + } + } + }, + + Package (0x05) + { + "PSTATE", + One, + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "mdss_core_gdsc", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_disp_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_disp_xo_clk", + 0x02 + } + } + } + }, + + Package (0x12) + { + "PSTATE_SET", + 0x02, + Package (0x04) + { + "PSTATE", + Zero, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "disp_cc_mdss_mdp_clk", + 0x03, + 0x19A14780, + One + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_DISPLAY_CFG", + 0x11C31E80, + Zero + } + } + }, + + Package (0x04) + { + "PSTATE", + One, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "disp_cc_mdss_mdp_clk", + 0x03, + 0x18964020, + One + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_DISPLAY_CFG", + 0x11C31E80, + Zero + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x02, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "disp_cc_mdss_mdp_clk", + 0x03, + 0x14810600, + One + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_DISPLAY_CFG", + 0x08D24D00, + Zero + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x03, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "disp_cc_mdss_mdp_clk", + 0x03, + 0x11E1A300, + One + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_DISPLAY_CFG", + 0x08D24D00, + Zero + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x04, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "disp_cc_mdss_mdp_clk", + 0x03, + 0x10642AC0, + One + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_DISPLAY_CFG", + 0x08D24D00, + Zero + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x05, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "disp_cc_mdss_mdp_clk", + 0x03, + 0x0BEBC200, + One + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_DISPLAY_CFG", + 0x08D24D00, + Zero + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x06, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "disp_cc_mdss_mdp_clk", + 0x03, + 0x0A37CADB, + One + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_DISPLAY_CFG", + 0x047868C0, + Zero + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x07, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "disp_cc_mdss_mdp_clk", + 0x03, + 0x09D5B340, + One + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_DISPLAY_CFG", + 0x047868C0, + Zero + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x08, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "disp_cc_mdss_mdp_clk", + 0x03, + 0x08F0D180, + One + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_DISPLAY_CFG", + 0x047868C0, + Zero + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x09, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "disp_cc_mdss_mdp_clk", + 0x03, + 0x05F5E100, + One + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_DISPLAY_CFG", + 0x047868C0, + Zero + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x0A, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "disp_cc_mdss_mdp_clk", + 0x03, + 0x051BD4B0, + One + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_DISPLAY_CFG", + 0x047868C0, + Zero + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x0B, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "disp_cc_mdss_mdp_clk", + 0x03, + 0x0124F800, + One + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_DISPLAY_CFG", + 0x047868C0, + Zero + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x0C, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "disp_cc_mdss_mdp_clk", + 0x03, + Zero, + One + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_DISPLAY_CFG", + Zero, + Zero + } + } + }, + + Package (0x02) + { + "PRELOAD_PSTATE", + 0x08 + }, + + Package (0x02) + { + "PREPARE_PSTATE", + 0x08 + }, + + Package (0x02) + { + "ABANDON_PSTATE", + 0x08 + } + }, + + Package (0x34) + { + "PSTATE_SET", + 0x03, + Package (0x03) + { + "PSTATE", + Zero, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_EBI1", + 0x000000031A4A9F80, + 0x000000031A4A9F80 + } + } + }, + + Package (0x03) + { + "PSTATE", + One, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_EBI1", + 0x0000000302731B80, + 0x0000000302731B80 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x02, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_EBI1", + 0x00000002EA9B9780, + 0x00000002EA9B9780 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x03, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_EBI1", + 0x00000002D2C41380, + 0x00000002D2C41380 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x04, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_EBI1", + 0x00000002BAEC8F80, + 0x00000002BAEC8F80 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x05, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_EBI1", + 0x00000002A3150B80, + 0x00000002A3150B80 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x06, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_EBI1", + 0x000000028B3D8780, + 0x000000028B3D8780 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x07, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_EBI1", + 0x0000000273660380, + 0x0000000273660380 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x08, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_EBI1", + 0x000000025B8E7F80, + 0x000000025B8E7F80 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x09, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_EBI1", + 0x0000000243B6FB80, + 0x0000000243B6FB80 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x0A, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_EBI1", + 0x000000022BDF7780, + 0x000000022BDF7780 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x0B, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_EBI1", + 0x000000021407F380, + 0x000000021407F380 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x0C, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_EBI1", + 0x00000001FC306F80, + 0x00000001FC306F80 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x0D, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_EBI1", + 0x00000001E458EB80, + 0x00000001E458EB80 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x0E, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_EBI1", + 0x00000001CC816780, + 0x00000001CC816780 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x0F, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_EBI1", + 0x00000001B4A9E380, + 0x00000001B4A9E380 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x10, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_EBI1", + 0x000000019CD25F80, + 0x000000019CD25F80 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x11, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_EBI1", + 0x0000000184FADB80, + 0x0000000184FADB80 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x12, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_EBI1", + 0x000000016D235780, + 0x000000016D235780 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x13, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_EBI1", + 0x00000001554BD380, + 0x00000001554BD380 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x14, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_EBI1", + 0x000000013D744F80, + 0x000000013D744F80 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x15, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_EBI1", + 0x00000001259CCB80, + 0x00000001259CCB80 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x16, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_EBI1", + 0x000000010DC54780, + 0x000000010DC54780 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x17, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_EBI1", + 0xF5EDC380, + 0xF5EDC380 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x18, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_EBI1", + 0xDE163F80, + 0xDE163F80 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x19, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_EBI1", + 0xC63EBB80, + 0xC63EBB80 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x1A, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_EBI1", + 0xAE673780, + 0xAE673780 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x1B, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_EBI1", + 0x968FB380, + 0x968FB380 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x1C, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_EBI1", + 0x8F0D1800, + 0x8F0D1800 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x1D, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_EBI1", + 0x89173700, + 0x89173700 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x1E, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_EBI1", + 0x83215600, + 0x83215600 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x1F, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_EBI1", + 0x7D2B7500, + 0x7D2B7500 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x20, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_EBI1", + 0x77359400, + 0x77359400 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x21, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_EBI1", + 0x713FB300, + 0x713FB300 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x22, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_EBI1", + 0x6B49D200, + 0x6B49D200 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x23, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_EBI1", + 0x6553F100, + 0x6553F100 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x24, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_EBI1", + 0x5F5E1000, + 0x5F5E1000 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x25, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_EBI1", + 0x59682F00, + 0x59682F00 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x26, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_EBI1", + 0x53724E00, + 0x53724E00 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x27, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_EBI1", + 0x4D7C6D00, + 0x4D7C6D00 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x28, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_EBI1", + 0x47868C00, + 0x47868C00 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x29, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_EBI1", + 0x4190AB00, + 0x4190AB00 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x2A, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_EBI1", + 0x3B9ACA00, + 0x3B9ACA00 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x2B, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_EBI1", + 0x35A4E900, + 0x35A4E900 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x2C, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_EBI1", + 0x2FAF0800, + 0x2FAF0800 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x2D, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_EBI1", + 0x29B92700, + 0x29B92700 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x2E, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_EBI1", + 0x23C34600, + 0x23C34600 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x2F, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_EBI1", + 0x1DCD6500, + 0x1DCD6500 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x30, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_EBI1", + 0x17D78400, + 0x17D78400 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x31, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_EBI1", + Zero, + Zero + } + } + } + } + } + } + }) + Return (GPCC) /* \_SB_.PEP0.G2MD.GPCC */ + } + + Method (G3MD, 0, NotSerialized) + { + Name (GPCC, Package (0x01) + { + Package (0x03) + { + "DEVICE", + "\\_SB.GPU0", + Package (0x0C) + { + "COMPONENT", + 0x03, + Package (0x02) + { + "FSTATE", + Zero + }, + + Package (0x04) + { + "FSTATE", + One, + Package (0x0C) + { + "ENTER", + Package (0x01) + { + "PSTATE_SAVE" + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + 0x02, + 0x07 + } + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + 0x03, + 0x31 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_rscc_vsync_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_rscc_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_vsync_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_mdp_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_rot_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_DISPLAY_CFG", + Zero, + Zero + } + } + }, + + Package (0x0B) + { + "EXIT", + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_DISPLAY_CFG", + 0x047868C0, + Zero + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_axi_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_mdp_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_vsync_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_rscc_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_rscc_vsync_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_rot_clk", + One + } + }, + + Package (0x01) + { + "PSTATE_RESTORE" + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + 0x02, + 0x04 + } + } + } + }, + + Package (0x04) + { + "FSTATE", + 0x02, + Package (0x10) + { + "ENTER", + Package (0x01) + { + "PSTATE_SAVE" + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + 0x02, + 0x07 + } + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + 0x03, + 0x31 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_rscc_vsync_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_rscc_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_vsync_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_mdp_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_disp_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_rot_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_DISPLAY_CFG", + Zero, + Zero + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "mdss_core_gdsc", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_disp_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_disp_xo_clk", + 0x02 + } + } + }, + + Package (0x0F) + { + "EXIT", + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_disp_xo_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_disp_ahb_clk", + One + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "mdss_core_gdsc", + One + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_DISPLAY_CFG", + 0x047868C0, + Zero + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_disp_axi_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_axi_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_mdp_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_vsync_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_rscc_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_rscc_vsync_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_rot_clk", + One + } + }, + + Package (0x01) + { + "PSTATE_RESTORE" + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + 0x02, + 0x04 + } + } + } + }, + + Package (0x02) + { + "INIT_FSTATE", + Zero + }, + + Package (0x02) + { + "PRELOAD_FSTATE", + 0x02 + }, + + Package (0x02) + { + "ABANDON_FSTATE", + 0x02 + }, + + Package (0x07) + { + "PSTATE_SET", + Zero, + Package (0x02) + { + "PSTATE", + Zero + }, + + Package (0x02) + { + "PSTATE", + One + }, + + Package (0x02) + { + "PRELOAD_PSTATE", + Zero + }, + + Package (0x02) + { + "PREPARE_PSTATE", + Zero + }, + + Package (0x02) + { + "ABANDON_PSTATE", + Zero + } + }, + + Package (0x04) + { + "PSTATE_SET", + One, + Package (0x05) + { + "PSTATE", + Zero, + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_disp_xo_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_disp_ahb_clk", + One + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "mdss_core_gdsc", + One + } + } + }, + + Package (0x05) + { + "PSTATE", + One, + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "mdss_core_gdsc", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_disp_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_disp_xo_clk", + 0x02 + } + } + } + }, + + Package (0x0D) + { + "PSTATE_SET", + 0x02, + Package (0x04) + { + "PSTATE", + Zero, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "disp_cc_mdss_rot_clk", + 0x03, + 0x19A14780, + One + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_DISPLAY_CFG", + 0x11C31E80, + Zero + } + } + }, + + Package (0x04) + { + "PSTATE", + One, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "disp_cc_mdss_rot_clk", + 0x03, + 0x18964020, + One + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_DISPLAY_CFG", + 0x11C31E80, + Zero + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x02, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "disp_cc_mdss_rot_clk", + 0x03, + 0x14810600, + One + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_DISPLAY_CFG", + 0x08D24D00, + Zero + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x03, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "disp_cc_mdss_rot_clk", + 0x03, + 0x11E1A300, + One + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_DISPLAY_CFG", + 0x08D24D00, + Zero + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x04, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "disp_cc_mdss_rot_clk", + 0x03, + 0x0A37CADB, + One + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_DISPLAY_CFG", + 0x047868C0, + Zero + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x05, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "disp_cc_mdss_rot_clk", + 0x03, + 0x09D5B340, + One + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_DISPLAY_CFG", + 0x047868C0, + Zero + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x06, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "disp_cc_mdss_rot_clk", + 0x03, + 0x0124F800, + One + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_DISPLAY_CFG", + 0x047868C0, + Zero + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x07, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "disp_cc_mdss_rot_clk", + 0x03, + Zero, + One + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_DISPLAY_CFG", + Zero, + Zero + } + } + }, + + Package (0x02) + { + "PRELOAD_PSTATE", + 0x05 + }, + + Package (0x02) + { + "PREPARE_PSTATE", + 0x05 + }, + + Package (0x02) + { + "ABANDON_PSTATE", + 0x05 + } + }, + + Package (0x34) + { + "PSTATE_SET", + 0x03, + Package (0x03) + { + "PSTATE", + Zero, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP1", + "ICBID_SLAVE_EBI1", + 0x000000031A4A9F80, + 0x000000031A4A9F80 + } + } + }, + + Package (0x03) + { + "PSTATE", + One, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP1", + "ICBID_SLAVE_EBI1", + 0x0000000302731B80, + 0x0000000302731B80 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x02, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP1", + "ICBID_SLAVE_EBI1", + 0x00000002EA9B9780, + 0x00000002EA9B9780 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x03, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP1", + "ICBID_SLAVE_EBI1", + 0x00000002D2C41380, + 0x00000002D2C41380 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x04, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP1", + "ICBID_SLAVE_EBI1", + 0x00000002BAEC8F80, + 0x00000002BAEC8F80 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x05, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP1", + "ICBID_SLAVE_EBI1", + 0x00000002A3150B80, + 0x00000002A3150B80 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x06, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP1", + "ICBID_SLAVE_EBI1", + 0x000000028B3D8780, + 0x000000028B3D8780 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x07, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP1", + "ICBID_SLAVE_EBI1", + 0x0000000273660380, + 0x0000000273660380 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x08, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP1", + "ICBID_SLAVE_EBI1", + 0x000000025B8E7F80, + 0x000000025B8E7F80 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x09, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP1", + "ICBID_SLAVE_EBI1", + 0x0000000243B6FB80, + 0x0000000243B6FB80 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x0A, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP1", + "ICBID_SLAVE_EBI1", + 0x000000022BDF7780, + 0x000000022BDF7780 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x0B, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP1", + "ICBID_SLAVE_EBI1", + 0x000000021407F380, + 0x000000021407F380 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x0C, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP1", + "ICBID_SLAVE_EBI1", + 0x00000001FC306F80, + 0x00000001FC306F80 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x0D, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP1", + "ICBID_SLAVE_EBI1", + 0x00000001E458EB80, + 0x00000001E458EB80 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x0E, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP1", + "ICBID_SLAVE_EBI1", + 0x00000001CC816780, + 0x00000001CC816780 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x0F, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP1", + "ICBID_SLAVE_EBI1", + 0x00000001B4A9E380, + 0x00000001B4A9E380 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x10, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP1", + "ICBID_SLAVE_EBI1", + 0x000000019CD25F80, + 0x000000019CD25F80 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x11, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP1", + "ICBID_SLAVE_EBI1", + 0x0000000184FADB80, + 0x0000000184FADB80 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x12, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP1", + "ICBID_SLAVE_EBI1", + 0x000000016D235780, + 0x000000016D235780 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x13, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP1", + "ICBID_SLAVE_EBI1", + 0x00000001554BD380, + 0x00000001554BD380 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x14, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP1", + "ICBID_SLAVE_EBI1", + 0x000000013D744F80, + 0x000000013D744F80 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x15, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP1", + "ICBID_SLAVE_EBI1", + 0x00000001259CCB80, + 0x00000001259CCB80 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x16, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP1", + "ICBID_SLAVE_EBI1", + 0x000000010DC54780, + 0x000000010DC54780 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x17, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP1", + "ICBID_SLAVE_EBI1", + 0xF5EDC380, + 0xF5EDC380 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x18, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP1", + "ICBID_SLAVE_EBI1", + 0xDE163F80, + 0xDE163F80 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x19, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP1", + "ICBID_SLAVE_EBI1", + 0xC63EBB80, + 0xC63EBB80 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x1A, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP1", + "ICBID_SLAVE_EBI1", + 0xAE673780, + 0xAE673780 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x1B, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP1", + "ICBID_SLAVE_EBI1", + 0x968FB380, + 0x968FB380 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x1C, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP1", + "ICBID_SLAVE_EBI1", + 0x8F0D1800, + 0x8F0D1800 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x1D, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP1", + "ICBID_SLAVE_EBI1", + 0x89173700, + 0x89173700 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x1E, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP1", + "ICBID_SLAVE_EBI1", + 0x83215600, + 0x83215600 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x1F, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP1", + "ICBID_SLAVE_EBI1", + 0x7D2B7500, + 0x7D2B7500 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x20, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP1", + "ICBID_SLAVE_EBI1", + 0x77359400, + 0x77359400 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x21, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP1", + "ICBID_SLAVE_EBI1", + 0x713FB300, + 0x713FB300 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x22, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP1", + "ICBID_SLAVE_EBI1", + 0x6B49D200, + 0x6B49D200 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x23, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP1", + "ICBID_SLAVE_EBI1", + 0x6553F100, + 0x6553F100 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x24, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP1", + "ICBID_SLAVE_EBI1", + 0x5F5E1000, + 0x5F5E1000 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x25, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP1", + "ICBID_SLAVE_EBI1", + 0x59682F00, + 0x59682F00 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x26, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP1", + "ICBID_SLAVE_EBI1", + 0x53724E00, + 0x53724E00 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x27, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP1", + "ICBID_SLAVE_EBI1", + 0x4D7C6D00, + 0x4D7C6D00 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x28, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP1", + "ICBID_SLAVE_EBI1", + 0x47868C00, + 0x47868C00 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x29, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP1", + "ICBID_SLAVE_EBI1", + 0x4190AB00, + 0x4190AB00 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x2A, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP1", + "ICBID_SLAVE_EBI1", + 0x3B9ACA00, + 0x3B9ACA00 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x2B, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP1", + "ICBID_SLAVE_EBI1", + 0x35A4E900, + 0x35A4E900 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x2C, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP1", + "ICBID_SLAVE_EBI1", + 0x2FAF0800, + 0x2FAF0800 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x2D, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP1", + "ICBID_SLAVE_EBI1", + 0x29B92700, + 0x29B92700 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x2E, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP1", + "ICBID_SLAVE_EBI1", + 0x23C34600, + 0x23C34600 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x2F, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP1", + "ICBID_SLAVE_EBI1", + 0x1DCD6500, + 0x1DCD6500 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x30, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP1", + "ICBID_SLAVE_EBI1", + 0x17D78400, + 0x17D78400 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x31, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP1", + "ICBID_SLAVE_EBI1", + Zero, + Zero + } + } + } + } + } + } + }) + Return (GPCC) /* \_SB_.PEP0.G3MD.GPCC */ + } + + Method (G4MD, 0, NotSerialized) + { + Name (GPCC, Package (0x01) + { + Package (0x03) + { + "DEVICE", + "\\_SB.GPU0", + Package (0x0C) + { + "COMPONENT", + 0x04, + Package (0x02) + { + "FSTATE", + Zero + }, + + Package (0x04) + { + "FSTATE", + One, + Package (0x09) + { + "ENTER", + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_vcodec1_core_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_vcodec1_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_vcodec0_core_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_vcodec0_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_venus_ctl_core_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_venus_ctl_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_venus_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_video_ahb_clk", + 0x02 + } + } + }, + + Package (0x09) + { + "EXIT", + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_video_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_venus_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_venus_ctl_axi_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_venus_ctl_core_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_vcodec0_axi_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_vcodec0_core_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_vcodec1_axi_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_vcodec1_core_clk", + One + } + } + } + }, + + Package (0x04) + { + "FSTATE", + 0x02, + Package (0x13) + { + "ENTER", + Package (0x01) + { + "PSTATE_SAVE" + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + 0x02, + 0x06 + } + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + 0x03, + 0x6E + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_vcodec1_core_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_vcodec1_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_vcodec0_core_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_vcodec0_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_venus_ctl_core_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_venus_ctl_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_venus_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "vcodec1_gdsc", + 0x04 + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "vcodec1_gdsc", + 0x02 + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "vcodec0_gdsc", + 0x04 + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "vcodec0_gdsc", + 0x02 + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "venus_gdsc", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_video_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_video_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_video_xo_clk", + 0x02 + } + } + }, + + Package (0x18) + { + "EXIT", + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_video_xo_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_video_axi_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_video_ahb_clk", + One + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "venus_gdsc", + One + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "vcodec0_gdsc", + One + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "vcodec0_gdsc", + 0x03 + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "vcodec1_gdsc", + One + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "vcodec1_gdsc", + 0x03 + } + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + Zero, + Zero + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_venus_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_venus_ctl_axi_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_venus_ctl_core_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_vcodec0_axi_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_vcodec0_core_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_vcodec1_axi_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_vcodec1_core_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x03) + { + "video_cc_vcodec0_core_clk", + 0x09, + 0x12 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x03) + { + "video_cc_vcodec1_core_clk", + 0x09, + 0x12 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x03) + { + "video_cc_venus_ctl_core_clk", + 0x09, + 0x12 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x03) + { + "video_cc_vcodec0_core_clk", + 0x09, + 0x14 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x03) + { + "video_cc_vcodec1_core_clk", + 0x09, + 0x14 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x03) + { + "video_cc_venus_ctl_core_clk", + 0x09, + 0x14 + } + }, + + Package (0x01) + { + "PSTATE_RESTORE" + } + } + }, + + Package (0x02) + { + "INIT_FSTATE", + Zero + }, + + Package (0x02) + { + "PRELOAD_FSTATE", + 0x02 + }, + + Package (0x02) + { + "ABANDON_FSTATE", + 0x02 + }, + + Package (0x07) + { + "PSTATE_SET", + Zero, + Package (0x02) + { + "PSTATE", + Zero + }, + + Package (0x11) + { + "PSTATE", + One, + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_vcodec1_core_clk", + 0x0A + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_vcodec1_axi_clk", + 0x0A + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_vcodec0_core_clk", + 0x0A + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_vcodec0_axi_clk", + 0x0A + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_venus_ctl_core_clk", + 0x0A + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_venus_ctl_axi_clk", + 0x0A + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_venus_ahb_clk", + 0x0A + } + }, + + Package (0x02) + { + "DELAY", + Package (0x01) + { + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_venus_ahb_clk", + 0x0B + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_venus_ctl_axi_clk", + 0x0B + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_venus_ctl_core_clk", + 0x0B + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_vcodec0_axi_clk", + 0x0B + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_vcodec0_core_clk", + 0x0B + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_vcodec1_axi_clk", + 0x0B + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_vcodec1_core_clk", + 0x0B + } + } + }, + + Package (0x02) + { + "PRELOAD_PSTATE", + One + }, + + Package (0x02) + { + "PREPARE_PSTATE", + Zero + }, + + Package (0x02) + { + "ABANDON_PSTATE", + One + } + }, + + Package (0x07) + { + "PSTATE_SET", + One, + Package (0x0A) + { + "PSTATE", + Zero, + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_video_xo_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_video_axi_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_video_ahb_clk", + One + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "venus_gdsc", + One + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "vcodec0_gdsc", + One + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "vcodec0_gdsc", + 0x03 + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "vcodec1_gdsc", + One + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "vcodec1_gdsc", + 0x03 + } + } + }, + + Package (0x0A) + { + "PSTATE", + One, + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "vcodec1_gdsc", + 0x04 + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "vcodec1_gdsc", + 0x02 + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "vcodec0_gdsc", + 0x04 + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "vcodec0_gdsc", + 0x02 + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "venus_gdsc", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_video_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_video_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_video_xo_clk", + 0x02 + } + } + }, + + Package (0x02) + { + "PRELOAD_PSTATE", + One + }, + + Package (0x02) + { + "PREPARE_PSTATE", + One + }, + + Package (0x02) + { + "ABANDON_PSTATE", + One + } + }, + + Package (0x0C) + { + "PSTATE_SET", + 0x02, + Package (0x06) + { + "PSTATE", + Zero, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "video_cc_venus_ctl_core_clk", + 0x03, + 0x1FC4EF40, + 0x03 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "video_cc_vcodec0_core_clk", + 0x03, + 0x1FC4EF40, + 0x03 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "video_cc_vcodec1_core_clk", + 0x03, + 0x1FC4EF40, + 0x03 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_VENUS_CFG", + 0x11E1A300, + Zero + } + } + }, + + Package (0x06) + { + "PSTATE", + One, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "video_cc_venus_ctl_core_clk", + 0x03, + 0x1A76E700, + 0x03 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "video_cc_vcodec0_core_clk", + 0x03, + 0x1A76E700, + 0x03 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "video_cc_vcodec1_core_clk", + 0x03, + 0x1A76E700, + 0x03 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_VENUS_CFG", + 0x11E1A300, + Zero + } + } + }, + + Package (0x06) + { + "PSTATE", + 0x02, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "video_cc_venus_ctl_core_clk", + 0x03, + 0x16A65700, + 0x03 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "video_cc_vcodec0_core_clk", + 0x03, + 0x16A65700, + 0x03 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "video_cc_vcodec1_core_clk", + 0x03, + 0x16A65700, + 0x03 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_VENUS_CFG", + 0x08F0D180, + Zero + } + } + }, + + Package (0x06) + { + "PSTATE", + 0x03, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "video_cc_venus_ctl_core_clk", + 0x03, + 0x1312D000, + 0x03 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "video_cc_vcodec0_core_clk", + 0x03, + 0x1312D000, + 0x03 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "video_cc_vcodec1_core_clk", + 0x03, + 0x1312D000, + 0x03 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_VENUS_CFG", + 0x08F0D180, + Zero + } + } + }, + + Package (0x06) + { + "PSTATE", + 0x04, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "video_cc_venus_ctl_core_clk", + 0x03, + 0x0BEBC200, + 0x03 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "video_cc_vcodec0_core_clk", + 0x03, + 0x0BEBC200, + 0x03 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "video_cc_vcodec1_core_clk", + 0x03, + 0x0BEBC200, + 0x03 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_VENUS_CFG", + 0x047868C0, + Zero + } + } + }, + + Package (0x06) + { + "PSTATE", + 0x05, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "video_cc_venus_ctl_core_clk", + 0x03, + 0x05F5E100, + 0x03 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "video_cc_vcodec0_core_clk", + 0x03, + 0x05F5E100, + 0x03 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "video_cc_vcodec1_core_clk", + 0x03, + 0x05F5E100, + 0x03 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_VENUS_CFG", + 0x047868C0, + Zero + } + } + }, + + Package (0x06) + { + "PSTATE", + 0x06, + Package (0x02) + { + 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0x00000001C4FECC00, + 0x00000001C4FECC00 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x49, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_VIDEO_P0", + "ICBID_SLAVE_EBI1", + 0x00000001B9130A00, + 0x00000001B9130A00 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x4A, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_VIDEO_P0", + "ICBID_SLAVE_EBI1", + 0x00000001AD274800, + 0x00000001AD274800 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x4B, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_VIDEO_P0", + "ICBID_SLAVE_EBI1", + 0x00000001A13B8600, + 0x00000001A13B8600 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x4C, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_VIDEO_P0", + "ICBID_SLAVE_EBI1", + 0x00000001954FC400, + 0x00000001954FC400 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x4D, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_VIDEO_P0", + "ICBID_SLAVE_EBI1", + 0x0000000189640200, + 0x0000000189640200 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x4E, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_VIDEO_P0", + "ICBID_SLAVE_EBI1", + 0x000000017D784000, + 0x000000017D784000 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x4F, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_VIDEO_P0", + "ICBID_SLAVE_EBI1", + 0x00000001718C7E00, + 0x00000001718C7E00 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x50, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_VIDEO_P0", + "ICBID_SLAVE_EBI1", + 0x0000000165A0BC00, + 0x0000000165A0BC00 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x51, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_VIDEO_P0", + "ICBID_SLAVE_EBI1", + 0x0000000159B4FA00, + 0x0000000159B4FA00 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x52, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_VIDEO_P0", + "ICBID_SLAVE_EBI1", + 0x000000014DC93800, + 0x000000014DC93800 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x53, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_VIDEO_P0", + "ICBID_SLAVE_EBI1", + 0x0000000141DD7600, + 0x0000000141DD7600 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x54, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_VIDEO_P0", + "ICBID_SLAVE_EBI1", + 0x0000000135F1B400, + 0x0000000135F1B400 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x55, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_VIDEO_P0", + "ICBID_SLAVE_EBI1", + 0x000000012A05F200, + 0x000000012A05F200 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x56, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_VIDEO_P0", + "ICBID_SLAVE_EBI1", + 0x000000011E1A3000, + 0x000000011E1A3000 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x57, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_VIDEO_P0", + "ICBID_SLAVE_EBI1", + 0x00000001122E6E00, + 0x00000001122E6E00 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x58, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_VIDEO_P0", + "ICBID_SLAVE_EBI1", + 0x000000010642AC00, + 0x000000010642AC00 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x59, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_VIDEO_P0", + "ICBID_SLAVE_EBI1", + 0xFA56EA00, + 0xFA56EA00 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x5A, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_VIDEO_P0", + "ICBID_SLAVE_EBI1", + 0xEE6B2800, + 0xEE6B2800 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x5B, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_VIDEO_P0", + "ICBID_SLAVE_EBI1", + 0xE27F6600, + 0xE27F6600 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x5C, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_VIDEO_P0", + "ICBID_SLAVE_EBI1", + 0xD693A400, + 0xD693A400 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x5D, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_VIDEO_P0", + "ICBID_SLAVE_EBI1", + 0xCAA7E200, + 0xCAA7E200 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x5E, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_VIDEO_P0", + "ICBID_SLAVE_EBI1", + 0xBEBC2000, + 0xBEBC2000 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x5F, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_VIDEO_P0", + "ICBID_SLAVE_EBI1", + 0xB2D05E00, + 0xB2D05E00 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x60, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_VIDEO_P0", + "ICBID_SLAVE_EBI1", + 0xA6E49C00, + 0xA6E49C00 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x61, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_VIDEO_P0", + "ICBID_SLAVE_EBI1", + 0x9AF8DA00, + 0x9AF8DA00 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x62, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_VIDEO_P0", + "ICBID_SLAVE_EBI1", + 0x8F0D1800, + 0x8F0D1800 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x63, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_VIDEO_P0", + "ICBID_SLAVE_EBI1", + 0x83215600, + 0x83215600 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x64, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_VIDEO_P0", + "ICBID_SLAVE_EBI1", + 0x77359400, + 0x77359400 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x65, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_VIDEO_P0", + "ICBID_SLAVE_EBI1", + 0x6B49D200, + 0x6B49D200 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x66, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_VIDEO_P0", + "ICBID_SLAVE_EBI1", + 0x5F5E1000, + 0x5F5E1000 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x67, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_VIDEO_P0", + "ICBID_SLAVE_EBI1", + 0x53724E00, + 0x53724E00 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x68, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_VIDEO_P0", + "ICBID_SLAVE_EBI1", + 0x47868C00, + 0x47868C00 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x69, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_VIDEO_P0", + "ICBID_SLAVE_EBI1", + 0x3B9ACA00, + 0x3B9ACA00 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x6A, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_VIDEO_P0", + "ICBID_SLAVE_EBI1", + 0x2FAF0800, + 0x2FAF0800 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x6B, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_VIDEO_P0", + "ICBID_SLAVE_EBI1", + 0x23C34600, + 0x23C34600 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x6C, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_VIDEO_P0", + "ICBID_SLAVE_EBI1", + 0x17D78400, + 0x17D78400 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x6D, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_VIDEO_P0", + "ICBID_SLAVE_EBI1", + 0x0BEBC200, + 0x0BEBC200 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x6E, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_VIDEO_P0", + "ICBID_SLAVE_EBI1", + Zero, + Zero + } + } + }, + + Package (0x02) + { + "PRELOAD_PSTATE", + 0x6C + }, + + Package (0x02) + { + "PREPARE_PSTATE", + 0x6C + }, + + Package (0x02) + { + "ABANDON_PSTATE", + 0x6C + } + } + } + } + }) + Return (GPCC) /* \_SB_.PEP0.G4MD.GPCC */ + } + + Method (G5MD, 0, NotSerialized) + { + Name (GPCC, Package (0x01) + { + Package (0x03) + { + "DEVICE", + "\\_SB.GPU0", + Package (0x0A) + { + "COMPONENT", + 0x05, + Package (0x02) + { + "FSTATE", + Zero + }, + + Package (0x02) + { + "FSTATE", + One + }, + + Package (0x02) + { + "INIT_FSTATE", + Zero + }, + + Package (0x02) + { + "PRELOAD_FSTATE", + Zero + }, + + Package (0x02) + { + "ABANDON_FSTATE", + Zero + }, + + Package (0x07) + { + "PSTATE_SET", + Zero, + Package (0x02) + { + "PSTATE", + Zero + }, + + Package (0x02) + { + "PSTATE", + One + }, + + Package (0x02) + { + "PRELOAD_PSTATE", + Zero + }, + + Package (0x02) + { + "PREPARE_PSTATE", + Zero + }, + + Package (0x02) + { + "ABANDON_PSTATE", + Zero + } + }, + + Package (0x07) + { + "PSTATE_SET", + One, + Package (0x02) + { + "PSTATE", + Zero + }, + + Package (0x02) + { + "PSTATE", + One + }, + + Package (0x02) + { + "PRELOAD_PSTATE", + Zero + }, + + Package (0x02) + { + "PREPARE_PSTATE", + One + }, + + Package (0x02) + { + "ABANDON_PSTATE", + Zero + } + }, + + Package (0x06) + { + "PSTATE_SET", + 0x02, + Package (0x02) + { + "PSTATE", + Zero + }, + + Package (0x02) + { + "PRELOAD_PSTATE", + Zero + }, + + Package (0x02) + { + "PREPARE_PSTATE", + Zero + }, + + Package (0x02) + { + "ABANDON_PSTATE", + Zero + } + } + } + } + }) + Return (GPCC) /* \_SB_.PEP0.G5MD.GPCC */ + } + + Method (G6MD, 0, NotSerialized) + { + Name (GPCC, Package (0x01) + { + Package (0x03) + { + "DEVICE", + "\\_SB.GPU0", + Package (0x0C) + { + "COMPONENT", + 0x06, + Package (0x02) + { + "FSTATE", + Zero + }, + + Package (0x04) + { + "FSTATE", + One, + Package (0x09) + { + "ENTER", + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_vcodec1_core_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_vcodec1_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_vcodec0_core_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_vcodec0_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_venus_ctl_core_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_venus_ctl_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_venus_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_video_ahb_clk", + 0x02 + } + } + }, + + Package (0x09) + { + "EXIT", + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_video_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_venus_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_venus_ctl_axi_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_venus_ctl_core_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_vcodec0_axi_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_vcodec0_core_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_vcodec1_axi_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_vcodec1_core_clk", + One + } + } + } + }, + + Package (0x04) + { + "FSTATE", + 0x02, + Package (0x13) + { + "ENTER", + Package (0x01) + { + "PSTATE_SAVE" + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + 0x02, + 0x06 + } + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + 0x03, + 0x6E + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_vcodec1_core_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_vcodec1_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_vcodec0_core_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_vcodec0_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_venus_ctl_core_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_venus_ctl_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_venus_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "vcodec1_gdsc", + 0x04 + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "vcodec1_gdsc", + 0x02 + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "vcodec0_gdsc", + 0x04 + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "vcodec0_gdsc", + 0x02 + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "venus_gdsc", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_video_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_video_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_video_xo_clk", + 0x02 + } + } + }, + + Package (0x18) + { + "EXIT", + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_video_xo_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_video_axi_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_video_ahb_clk", + One + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "venus_gdsc", + One + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "vcodec0_gdsc", + One + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "vcodec0_gdsc", + 0x03 + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "vcodec1_gdsc", + One + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "vcodec1_gdsc", + 0x03 + } + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + Zero, + Zero + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_venus_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_venus_ctl_axi_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_venus_ctl_core_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_vcodec0_axi_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_vcodec0_core_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_vcodec1_axi_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "video_cc_vcodec1_core_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x03) + { + "video_cc_vcodec0_core_clk", + 0x09, + 0x12 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x03) + { + "video_cc_vcodec1_core_clk", + 0x09, + 0x12 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x03) + { + "video_cc_venus_ctl_core_clk", + 0x09, + 0x12 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x03) + { + "video_cc_vcodec0_core_clk", + 0x09, + 0x14 + } + }, + + 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+ 0x03, + "ICBID_MASTER_VIDEO_P1", + "ICBID_SLAVE_EBI1", + 0x3B9ACA00, + Zero + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x6A, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_VIDEO_P1", + "ICBID_SLAVE_EBI1", + 0x2FAF0800, + Zero + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x6B, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_VIDEO_P1", + "ICBID_SLAVE_EBI1", + 0x23C34600, + Zero + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x6C, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_VIDEO_P1", + "ICBID_SLAVE_EBI1", + 0x17D78400, + Zero + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x6D, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_VIDEO_P1", + "ICBID_SLAVE_EBI1", + 0x0BEBC200, + Zero + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x6E, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_VIDEO_P1", + "ICBID_SLAVE_EBI1", + Zero, + Zero + } + } + }, + + Package (0x02) + { + "PRELOAD_PSTATE", + 0x6C + }, + + Package (0x02) + { + "PREPARE_PSTATE", + 0x6C + }, + + Package (0x02) + { + "ABANDON_PSTATE", + 0x6C + } + } + } + } + }) + Return (GPCC) /* \_SB_.PEP0.G6MD.GPCC */ + } + + Method (G7MD, 0, NotSerialized) + { + Name (GPCC, Package (0x01) + { + Package (0x03) + { + "DEVICE", + "\\_SB.GPU0", + Package (0x0C) + { + "COMPONENT", + 0x07, + Package (0x02) + { + "FSTATE", + Zero + }, + + Package (0x04) + { + "FSTATE", + One, + Package (0x09) + { + "ENTER", + Package (0x01) + { + "PSTATE_SAVE" + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + 0x03, + 0x0C + } + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + 0x04, + 0x2A + } + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + 0x02, + 0x04 + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "mdss_core_gdsc", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_disp_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_disp_xo_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "phy_refgen_south", + 0x02 + } + } + }, + + Package (0x06) + { + "EXIT", + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_disp_xo_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_disp_ahb_clk", + One + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "mdss_core_gdsc", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "phy_refgen_south", + One + } + }, + + Package (0x01) + { + "PSTATE_RESTORE" + } + } + }, + + Package (0x02) + { + "INIT_FSTATE", + One + }, + + Package (0x02) + { + "PRELOAD_FSTATE", + Zero + }, + + Package (0x02) + { + "ABANDON_FSTATE", + Zero + }, + + Package (0x07) + { + "PSTATE_SET", + Zero, + Package (0x02) + { + "PSTATE", + Zero + }, + + Package (0x02) + { + "PSTATE", + One + }, + + Package (0x02) + { + "PRELOAD_PSTATE", + Zero + }, + + Package (0x02) + { + "PREPARE_PSTATE", + Zero + }, + + Package (0x02) + { + "ABANDON_PSTATE", + Zero + } + }, + + Package (0x04) + { + "PSTATE_SET", + One, + Package (0x05) + { + "PSTATE", + Zero, + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_disp_xo_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_disp_ahb_clk", + One + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "mdss_core_gdsc", + One + } + } + }, + + Package (0x05) + { + "PSTATE", + One, + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "mdss_core_gdsc", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_disp_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_disp_xo_clk", + 0x02 + } + } + } + }, + + Package (0x0A) + { + "PSTATE_SET", + 0x02, + Package (0x12) + { + "PSTATE", + Zero, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_DISPLAY_CFG", + 0x047868C0, + Zero + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_disp_axi_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_axi_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_mdp_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_vsync_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_rscc_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_rscc_vsync_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_pclk0_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_esc0_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_byte0_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_byte0_intf_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_pclk1_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_esc1_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_byte1_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_byte1_intf_clk", + One + } + } + }, + + Package (0x12) + { + "PSTATE", + One, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_DISPLAY_CFG", + 0x047868C0, + Zero + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_disp_axi_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_axi_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_mdp_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_vsync_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_rscc_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_rscc_vsync_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_pclk0_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_esc0_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_byte0_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_byte0_intf_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_pclk1_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_esc1_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_byte1_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_byte1_intf_clk", + One + } + } + }, + + Package (0x12) + { + "PSTATE", + 0x02, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_DISPLAY_CFG", + 0x047868C0, + Zero + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_disp_axi_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_axi_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_mdp_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_vsync_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_rscc_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_rscc_vsync_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_pclk0_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_esc0_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_byte0_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_byte0_intf_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_pclk1_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_esc1_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_byte1_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_byte1_intf_clk", + 0x02 + } + } + }, + + Package (0x12) + { + "PSTATE", + 0x03, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_DISPLAY_CFG", + 0x047868C0, + Zero + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_disp_axi_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_axi_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_mdp_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_vsync_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_rscc_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_rscc_vsync_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_pclk0_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_esc0_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_byte0_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_byte0_intf_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_pclk1_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_esc1_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_byte1_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_byte1_intf_clk", + One + } + } + }, + + Package (0x12) + { + "PSTATE", + 0x04, + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_mdp_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_vsync_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_rscc_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_rscc_vsync_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_pclk0_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_esc0_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_byte0_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_byte0_intf_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_pclk1_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_esc1_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_byte1_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_byte1_intf_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_disp_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_DISPLAY_CFG", + Zero, + Zero + } + } + }, + + Package (0x02) + { + "PRELOAD_PSTATE", + Zero + }, + + Package (0x02) + { + "PREPARE_PSTATE", + Zero + }, + + Package (0x02) + { + "ABANDON_PSTATE", + Zero + } + }, + + Package (0x12) + { + "PSTATE_SET", + 0x03, + Package (0x04) + { + "PSTATE", + Zero, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "disp_cc_mdss_mdp_clk", + 0x03, + 0x19A14780, + One + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_DISPLAY_CFG", + 0x11C31E80, + Zero + } + } + }, + + Package (0x04) + { + "PSTATE", + One, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "disp_cc_mdss_mdp_clk", + 0x03, + 0x18964020, + One + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_DISPLAY_CFG", + 0x11C31E80, + Zero + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x02, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "disp_cc_mdss_mdp_clk", + 0x03, + 0x14810600, + One + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_DISPLAY_CFG", + 0x08D24D00, + Zero + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x03, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "disp_cc_mdss_mdp_clk", + 0x03, + 0x11E1A300, + One + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_DISPLAY_CFG", + 0x08D24D00, + Zero + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x04, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "disp_cc_mdss_mdp_clk", + 0x03, + 0x10642AC0, + One + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_DISPLAY_CFG", + 0x08D24D00, + Zero + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x05, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "disp_cc_mdss_mdp_clk", + 0x03, + 0x0BEBC200, + One + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_DISPLAY_CFG", + 0x08D24D00, + Zero + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x06, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "disp_cc_mdss_mdp_clk", + 0x03, + 0x0A37CADB, + One + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_DISPLAY_CFG", + 0x047868C0, + Zero + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x07, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "disp_cc_mdss_mdp_clk", + 0x03, + 0x09D5B340, + One + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", 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"BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_MNOC_HF_MEM_NOC", + 0x000000011E1A3000, + 0x4D7C6D00 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MNOC_HF_MEM_NOC", + "ICBID_SLAVE_EBI1", + 0x2FAF0800, + 0x4D7C6D00 + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x21, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_MNOC_HF_MEM_NOC", + 0x000000011E1A3000, + 0x47868C00 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MNOC_HF_MEM_NOC", + "ICBID_SLAVE_EBI1", + 0x2FAF0800, + 0x47868C00 + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x22, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_MNOC_HF_MEM_NOC", + 0x000000011E1A3000, + 0x4190AB00 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MNOC_HF_MEM_NOC", + "ICBID_SLAVE_EBI1", + 0x2FAF0800, + 0x4190AB00 + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x23, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_MNOC_HF_MEM_NOC", + 0x000000011E1A3000, + 0x3B9ACA00 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MNOC_HF_MEM_NOC", + "ICBID_SLAVE_EBI1", + 0x2FAF0800, + 0x3B9ACA00 + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x24, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_MNOC_HF_MEM_NOC", + 0x000000011E1A3000, + 0x35A4E900 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MNOC_HF_MEM_NOC", + "ICBID_SLAVE_EBI1", + 0x2FAF0800, + 0x35A4E900 + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x25, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_MNOC_HF_MEM_NOC", + 0x000000011E1A3000, + 0x2FAF0800 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MNOC_HF_MEM_NOC", + "ICBID_SLAVE_EBI1", + 0x2FAF0800, + 0x2FAF0800 + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x26, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_MNOC_HF_MEM_NOC", + 0x000000011E1A3000, + 0x29B92700 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MNOC_HF_MEM_NOC", + "ICBID_SLAVE_EBI1", + 0x2FAF0800, + 0x29B92700 + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x27, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_MNOC_HF_MEM_NOC", + 0x000000011E1A3000, + 0x23C34600 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MNOC_HF_MEM_NOC", + "ICBID_SLAVE_EBI1", + 0x2FAF0800, + 0x23C34600 + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x28, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_MNOC_HF_MEM_NOC", + 0x000000011E1A3000, + 0x1DCD6500 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MNOC_HF_MEM_NOC", + "ICBID_SLAVE_EBI1", + 0x2FAF0800, + 0x1DCD6500 + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x29, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_MNOC_HF_MEM_NOC", + 0x000000011E1A3000, + 0x17D78400 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MNOC_HF_MEM_NOC", + "ICBID_SLAVE_EBI1", + 0x2FAF0800, + 0x17D78400 + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x2A, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_MNOC_HF_MEM_NOC", + Zero, + Zero + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MNOC_HF_MEM_NOC", + "ICBID_SLAVE_EBI1", + Zero, + Zero + } + } + }, + + Package (0x02) + { + "PRELOAD_PSTATE", + 0x1F + }, + + Package (0x02) + { + "PREPARE_PSTATE", + 0x1F + }, + + Package (0x02) + { + "ABANDON_PSTATE", + 0x1F + } + } + } + } + }) + Return (GPCC) /* \_SB_.PEP0.G7MD.GPCC */ + } + + Method (G8MD, 0, NotSerialized) + { + Name (GPCC, Package (0x01) + { + Package (0x03) + { + "DEVICE", + "\\_SB.GPU0", + Package (0x0B) + { + "COMPONENT", + 0x08, + Package (0x02) + { + "FSTATE", + Zero + }, + + Package (0x04) + { + "FSTATE", + One, + Package (0x18) + { + "ENTER", + Package (0x02) + { + "PMICVREGVOTE", + Package (0x08) + { + "PPP_RESOURCE_ID_LDO1_A", + One, + Zero, + Zero, + Zero, + Zero, + "HLOS_DRV", + "REQUIRED" + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x08) + { + "PPP_RESOURCE_ID_LDO24_A", + One, + Zero, + Zero, + Zero, + Zero, + "HLOS_DRV", + "REQUIRED" + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x08) + { + "PPP_RESOURCE_ID_LDO26_A", + One, + Zero, + Zero, + Zero, + Zero, + "HLOS_DRV", + "REQUIRED" + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_mdp_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_vsync_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_rscc_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_rscc_vsync_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_dp_pixel_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_dp_link_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_dp_crypto_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_dp_aux_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_dp_link_intf_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_usb3_prim_clkref_en", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_usb_phy_cfg_ahb2phy_clk", + 0x02 + } + }, + + Package (0x01) + { + "PSTATE_SAVE" + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + 0x02, + 0x0C + } + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + 0x03, + 0x2A + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_DISPLAY_CFG", + Zero, + Zero + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "mdss_core_gdsc", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_disp_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_disp_xo_clk", + 0x02 + } + } + }, + + Package (0x16) + { + "EXIT", + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_disp_xo_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_disp_ahb_clk", + One + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "mdss_core_gdsc", + One + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_DISPLAY_CFG", + 0x047868C0, + Zero + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_usb_phy_cfg_ahb2phy_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_usb3_prim_clkref_en", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_axi_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_mdp_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_vsync_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_rscc_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_rscc_vsync_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_dp_pixel_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_dp_link_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_dp_crypto_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_dp_aux_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "disp_cc_mdss_dp_link_intf_clk", + One + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x08) + { + "PPP_RESOURCE_ID_LDO26_A", + One, + 0x00124F80, + One, + 0x07, + Zero, + "HLOS_DRV", + "REQUIRED" + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x08) + { + "PPP_RESOURCE_ID_LDO24_A", + One, + 0x002EEBB8, + One, + 0x07, + Zero, + "HLOS_DRV", + "REQUIRED" + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x08) + { + "PPP_RESOURCE_ID_LDO1_A", + One, + 0x000D6D80, + One, + 0x07, + Zero, + "HLOS_DRV", + "REQUIRED" + } + }, + + Package (0x01) + { + "PSTATE_RESTORE" + } + } + }, + + Package (0x02) + { + "INIT_FSTATE", + One + }, + + Package (0x02) + { + "PRELOAD_FSTATE", + Zero + }, + + Package (0x02) + { + "ABANDON_FSTATE", + Zero + }, + + Package (0x07) + { + "PSTATE_SET", + Zero, + Package (0x02) + { + "PSTATE", + Zero + }, + + Package (0x02) + { + "PSTATE", + One + }, + + Package (0x02) + { + "PRELOAD_PSTATE", + Zero + }, + + Package (0x02) + { + "PREPARE_PSTATE", + Zero + }, + + Package (0x02) + { + "ABANDON_PSTATE", + Zero + } + }, + + Package (0x04) + { + "PSTATE_SET", + One, + Package (0x05) + { + "PSTATE", + Zero, + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_disp_xo_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_disp_ahb_clk", + One + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "mdss_core_gdsc", + One + } + } + }, + + Package (0x05) + { + "PSTATE", + One, + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "mdss_core_gdsc", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_disp_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_disp_xo_clk", + 0x02 + } + } + } + }, + + Package (0x12) + { + "PSTATE_SET", + 0x02, + Package (0x04) + { + "PSTATE", + Zero, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "disp_cc_mdss_mdp_clk", + 0x03, + 0x19A14780, + One + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_DISPLAY_CFG", + 0x11C31E80, + Zero + } + } + }, + + Package (0x04) + { + "PSTATE", + One, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "disp_cc_mdss_mdp_clk", + 0x03, + 0x18964020, + One + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_DISPLAY_CFG", + 0x11C31E80, + Zero + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x02, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "disp_cc_mdss_mdp_clk", + 0x03, + 0x14810600, + One + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_DISPLAY_CFG", + 0x08D24D00, + Zero + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x03, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "disp_cc_mdss_mdp_clk", + 0x03, + 0x11E1A300, + One + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_DISPLAY_CFG", + 0x08D24D00, + Zero + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x04, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "disp_cc_mdss_mdp_clk", + 0x03, + 0x10642AC0, + One + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_DISPLAY_CFG", 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"ICBID_MASTER_MNOC_HF_MEM_NOC", + "ICBID_SLAVE_EBI1", + 0x2FAF0800, + 0x5F5E1000 + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x1E, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_MNOC_HF_MEM_NOC", + 0x000000011E1A3000, + 0x59682F00 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MNOC_HF_MEM_NOC", + "ICBID_SLAVE_EBI1", + 0x2FAF0800, + 0x59682F00 + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x1F, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_MNOC_HF_MEM_NOC", + 0x000000011E1A3000, + 0x53724E00 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MNOC_HF_MEM_NOC", + "ICBID_SLAVE_EBI1", + 0x2FAF0800, + 0x53724E00 + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x20, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_MNOC_HF_MEM_NOC", + 0x000000011E1A3000, + 0x4D7C6D00 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MNOC_HF_MEM_NOC", + "ICBID_SLAVE_EBI1", + 0x2FAF0800, + 0x4D7C6D00 + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x21, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_MNOC_HF_MEM_NOC", + 0x000000011E1A3000, + 0x47868C00 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MNOC_HF_MEM_NOC", + "ICBID_SLAVE_EBI1", + 0x2FAF0800, + 0x47868C00 + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x22, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_MNOC_HF_MEM_NOC", + 0x000000011E1A3000, + 0x4190AB00 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MNOC_HF_MEM_NOC", + "ICBID_SLAVE_EBI1", + 0x2FAF0800, + 0x4190AB00 + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x23, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_MNOC_HF_MEM_NOC", + 0x000000011E1A3000, + 0x3B9ACA00 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MNOC_HF_MEM_NOC", + "ICBID_SLAVE_EBI1", + 0x2FAF0800, + 0x3B9ACA00 + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x24, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_MNOC_HF_MEM_NOC", + 0x000000011E1A3000, + 0x35A4E900 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MNOC_HF_MEM_NOC", + "ICBID_SLAVE_EBI1", + 0x2FAF0800, + 0x35A4E900 + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x25, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_MNOC_HF_MEM_NOC", + 0x000000011E1A3000, + 0x2FAF0800 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MNOC_HF_MEM_NOC", + "ICBID_SLAVE_EBI1", + 0x2FAF0800, + 0x2FAF0800 + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x26, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_MNOC_HF_MEM_NOC", + 0x000000011E1A3000, + 0x29B92700 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MNOC_HF_MEM_NOC", + "ICBID_SLAVE_EBI1", + 0x2FAF0800, + 0x29B92700 + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x27, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_MNOC_HF_MEM_NOC", + 0x000000011E1A3000, + 0x23C34600 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MNOC_HF_MEM_NOC", + "ICBID_SLAVE_EBI1", + 0x2FAF0800, + 0x23C34600 + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x28, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_MNOC_HF_MEM_NOC", + 0x000000011E1A3000, + 0x1DCD6500 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MNOC_HF_MEM_NOC", + "ICBID_SLAVE_EBI1", + 0x2FAF0800, + 0x1DCD6500 + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x29, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_MNOC_HF_MEM_NOC", + 0x000000011E1A3000, + 0x17D78400 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MNOC_HF_MEM_NOC", + "ICBID_SLAVE_EBI1", + 0x2FAF0800, + 0x17D78400 + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x2A, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MDP0", + "ICBID_SLAVE_MNOC_HF_MEM_NOC", + Zero, + Zero + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_MNOC_HF_MEM_NOC", + "ICBID_SLAVE_EBI1", + Zero, + Zero + } + } + }, + + Package (0x02) + { + "PRELOAD_PSTATE", + 0x1F + }, + + Package (0x02) + { + "PREPARE_PSTATE", + 0x1F + }, + + Package (0x02) + { + "ABANDON_PSTATE", + 0x1F + } + } + } + } + }) + Return (GPCC) /* \_SB_.PEP0.G8MD.GPCC */ + } + + Method (G9MD, 0, NotSerialized) + { + Name (GPCC, Package (0x01) + { + Package (0x03) + { + "DEVICE", + "\\_SB.GPU0", + Package (0x06) + { + "COMPONENT", + 0x09, + Package (0x02) + { + "FSTATE", + Zero + }, + + Package (0x02) + { + "INIT_FSTATE", + Zero + }, + + Package (0x02) + { + "PRELOAD_FSTATE", + Zero + }, + + Package (0x02) + { + "ABANDON_FSTATE", + Zero + } + } + } + }) + Return (GPCC) /* \_SB_.PEP0.G9MD.GPCC */ + } + } + + // BearSmmu + Scope (\_SB.PEP0) + { + // BearSmmu Resources + // + Method (SMMD, 0, NotSerialized) + { + Return (SMMC) /* \_SB_.PEP0.SMMC */ + } + + Name (SMMC, Package (0x02) + { + Package (0x03) + { + "DEVICE", + "\\_SB.MMU0", + Package (0x04) + { + "COMPONENT", + Zero, + Package (0x03) + { + "FSTATE", + Zero, + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_hlos1_vote_mmu_tcu_clk", + One + } + } + }, + + Package (0x03) + { + "FSTATE", + One, + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_hlos1_vote_mmu_tcu_clk", + 0x02 + } + } + } + } + }, + + Package (0x03) + { + "DEVICE", + "\\_SB.MMU1", + Package (0x04) + { + "COMPONENT", + Zero, + Package (0x04) + { + "FSTATE", + Zero, + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "gcc_hlos1_vote_gpu_smmu_gds", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_hlos1_vote_gpu_smmu_clk", + One + } + } + }, + + Package (0x04) + { + "FSTATE", + One, + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_hlos1_vote_gpu_smmu_clk", + 0x02 + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "gcc_hlos1_vote_gpu_smmu_gds", + 0x02 + } + } + } + } + } + }) + } + + // resources needed by oem drivers + Scope (\_SB.PEP0) + { + // OEM + Method (OPMD, 0, NotSerialized) + { + Return (OPCC) /* \_SB_.PEP0.OPCC */ + } + + Name (OPCC, Package (0x04) + { + Package (0x04) + { + "DEVICE", + "\\_SB.PEN1", + Package (0x07) + { + "DSTATE", + Zero, + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x77, + Zero, + Zero, + Zero, + Zero, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO18_A", + One, + 0x001B7740, + One, + One, + Zero + } + }, + + Package (0x02) + { + "DELAY", + Package (0x01) + { + 0x14 + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x15, + One, + Zero, + One, + Zero, + Zero + } + }, + + Package (0x02) + { + "DELAY", + Package (0x01) + { + 0x78 + } + } + }, + + Package (0x06) + { + "DSTATE", + 0x03, + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x15, + Zero, + Zero, + One, + Zero, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO18_A", + One, + Zero, + Zero, + Zero, + Zero + } + }, + + Package (0x02) + { + "DELAY", + Package (0x01) + { + 0x14 + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x77, + Zero, + Zero, + Zero, + Zero, + Zero + } + } + } + }, + + Package (0x04) + { + "DEVICE", + "\\_SB.ACC1", + Package (0x04) + { + "DSTATE", + Zero, + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x0E, + One, + Zero, + One, + Zero, + Zero + } + }, + + Package (0x02) + { + "DELAY", + Package (0x01) + { + 0x0A + } + } + }, + + Package (0x02) + { + "DSTATE", + 0x03 + } + }, + + Package (0x04) + { + "DEVICE", + "\\_SB.ALS1", + Package (0x04) + { + "DSTATE", + Zero, + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x0E, + One, + Zero, + One, + Zero, + Zero + } + }, + + Package (0x02) + { + "DELAY", + Package (0x01) + { + 0x0A + } + } + }, + + Package (0x02) + { + "DSTATE", + 0x03 + } + }, + + Package (0x04) + { + "DEVICE", + "\\_SB.LED1", + Package (0x04) + { + "DSTATE", + Zero, + Package (0x02) + { + "PMICGPIO", + Package (0x08) + { + "IOCTL_PM_GPIO_CONFIG_DIGITAL_OUTPUT", + Zero, + One, + Zero, + Zero, + One, + One, + Zero + } + }, + + Package (0x02) + { + "DELAY", + Package (0x01) + { + 0x0A + } + } + }, + + Package (0x02) + { + "DSTATE", + 0x03 + } + } + }) + } + + // resources needed by subsystem drivers + Scope (\_SB.PEP0) + { + // Subsystem Drivers + Method (SPMD, 0, NotSerialized) + { + Return (SPCC) /* \_SB_.PEP0.SPCC */ + } + + Name (SPCC, Package (0x04) + { + Package (0x05) + { + "DEVICE", + "\\_SB.AMSS", + Package (0x06) + { + "COMPONENT", + Zero, // Component 0. + Package (0x02) + { + "FSTATE", + Zero // f0 state + }, + + Package (0x0D) + { + "PSTATE", + Zero, // P0 state + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_boot_rom_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_mss_cfg_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_mss_q6_memnoc_axi_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_mss_snoc_axi_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_mss_mfab_axis_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_prng_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_mss_axis2_clk", + One + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_SMPS2_C", + 0x02, + 0x000B7980, + One, + Zero, + Zero + } + }, + + Package (0x02) + { + "NPARESOURCE", + Package (0x03) + { + One, + "/arc/client/rail_cx", + 0x0180 + } + }, + + Package (0x02) + { + "NPARESOURCE", + Package (0x03) + { + One, + "/arc/client/rail_mx", + 0x0180 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x06) + { + 0x03, + "ICBID_MASTER_IPA_CORE", + "ICBID_SLAVE_IPA_CORE", + 0x9218, + Zero, + "HLOS_DRV" + } + } + }, + + Package (0x07) + { + "PSTATE", + One, + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_prng_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_SMPS2_C", + 0x02, + Zero, + Zero, + Zero, + Zero + } + }, + + Package (0x02) + { + "NPARESOURCE", + Package (0x03) + { + One, + "/arc/client/rail_cx", + Zero + } + }, + + Package (0x02) + { + "NPARESOURCE", + Package (0x03) + { + One, + "/arc/client/rail_mx", + Zero + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x06) + { + 0x03, + "ICBID_MASTER_IPA_CORE", + "ICBID_SLAVE_IPA_CORE", + Zero, + Zero, + "HLOS_DRV" + } + } + }, + + Package (0x05) + { + "PSTATE", + 0x02, + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_boot_rom_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_prng_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_SMPS2_C", + 0x02, + Zero, + Zero, + Zero, + Zero + } + } + } + }, + + Package (0x02) + { + "DSTATE", + Zero + }, + + Package (0x02) + { + "DSTATE", + 0x03 + } + }, + + Package (0x05) + { + "DEVICE", + "\\_SB.ADSP", + Package (0x05) + { + "COMPONENT", + Zero, + Package (0x02) + { + "FSTATE", + Zero + }, + + Package (0x02) + { + "PSTATE", + Zero + }, + + Package (0x02) + { + "PSTATE", + One + } + }, + + Package (0x02) + { + "DSTATE", + Zero + }, + + Package (0x02) + { + "DSTATE", + 0x03 + } + }, + + Package (0x05) + { + "DEVICE", + "\\_SB.SCSS", + Package (0x06) + { + "COMPONENT", + Zero, + Package (0x02) + { + "FSTATE", + Zero + }, + + Package (0x06) + { + "PSTATE", + Zero, + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x0E, + One, + Zero, + One, + Zero, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO27_A", + One, + Zero, + One, + One, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO4_A", + One, + Zero, + One, + One, + Zero + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_CLK_CTL", + One, + One + } + } + }, + + Package (0x05) + { + "PSTATE", + One, + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO27_A", + One, + Zero, + One, + Zero, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO4_A", + One, + Zero, + One, + Zero, + Zero + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_CLK_CTL", + Zero, + Zero + } + } + }, + + Package (0x05) + { + "PSTATE", + 0x02, + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO27_A", + One, + Zero, + Zero, + Zero, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO4_A", + One, + Zero, + Zero, + Zero, + Zero + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_CLK_CTL", + Zero, + Zero + } + } + } + }, + + Package (0x02) + { + "DSTATE", + Zero + }, + + Package (0x02) + { + "DSTATE", + 0x03 + } + }, + + Package (0x05) + { + "DEVICE", + "\\_SB.CDSP", + Package (0x05) + { + "COMPONENT", + Zero, + Package (0x02) + { + "FSTATE", + Zero + }, + + Package (0x02) + { + "PSTATE", + Zero + }, + + Package (0x02) + { + "PSTATE", + One + } + }, + + Package (0x02) + { + "DSTATE", + Zero + }, + + Package (0x02) + { + "DSTATE", + 0x03 + } + } + }) + } + + // resources needed by pep drivers + Scope (\_SB.PEP0) + { + Method (PPMD, 0, NotSerialized) + { + Return (PPCC) /* \_SB_.PEP0.PPCC */ + } + + Name (PPCC, Package (0x03) + { + Package (0x03) + { + "DEVICE", + "\\_SB.PRXY", + Package (0x03) + { + "COMPONENT", + Zero, + Package (0x02) + { + "FSTATE", + Zero + } + } + }, + + // PEP Stats Driver + Package (0x03) + { + "DEVICE", + "\\_SB.STAT", + Package (0x03) + { + "COMPONENT", + Zero, + Package (0x02) + { + "FSTATE", + Zero + } + } + }, + + Package (0x05) + { + "DEVICE", + 0x81, + "\\_SB.GIO0", + Package (0x03) + { + "COMPONENT", + Zero, + Package (0x02) + { + "FSTATE", + Zero + } + }, + + Package (0x03) + { + "COMPONENT", + One, + Package (0x02) + { + "FSTATE", + Zero + } + } + } + }) +#if 0 + // System Default Resources Packages + Name (SDFR, Package (0x01) + { + Package (0x03) + { + "DEVICE", + "\\_SB.SDFR", + Package (0x06) + { + "COMPONENT", + Zero, + Package (0x02) + { + "FSTATE", + Zero + }, + + Package (0x02) + { + "FSTATE", + One + }, + + Package (0x02) + { + "FSTATE", + 0x02 + }, + + Package (0x02) + { + "FSTATE", + 0x03 + } + } + } + }) +#endif + } +//#endif + Scope (\_SB.PEP0) + { + // System Default Resources Packages + Name (SDFR, Package (0x01) + { + Package (0x03) + { + "DEVICE", + "\\_SB.SDFR", + Package (0x06) + { + "COMPONENT", + Zero, + Package (0x02) + { + "FSTATE", + Zero + }, + + Package (0x02) + { + "FSTATE", + One + }, + + Package (0x02) + { + "FSTATE", + 0x02 + }, + + Package (0x02) + { + "FSTATE", + 0x03 + } + } + } + }) +#if 0 + Method (BPMD, 0, NotSerialized) + { + Return (BPCC) /* \_SB_.PEP0.BPCC */ + } +#endif + + Method (LPMD, 0, NotSerialized) + { + Return (LPCC) /* \_SB_.PEP0.LPCC */ + } + + // resources needed by core BSP drivers + Name (BPCC, Package (0x04) + { + // Storage + Package (0x05) + { + "DEVICE", + "\\_SB.UFS0", + Package (0x07) + { + "COMPONENT", + Zero, + Package (0x05) + { + "FSTATE", + Zero, + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + Zero, + Zero + } + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + One, + Zero + } + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + 0x02, + Zero + } + } + }, + + Package (0x05) + { + "FSTATE", + One, + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + 0x02, + One + } + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + One, + One + } + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + Zero, + One + } + } + }, + + Package (0x04) + { + "PSTATE_SET", + Zero, + Package (0x03) + { + "PSTATE", + Zero, + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "ufs_phy_gdsc", + One + } + } + }, + + Package (0x03) + { + "PSTATE", + One, + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "ufs_phy_gdsc", + 0x02 + } + } + } + }, + + Package (0x04) + { + "PSTATE_SET", + One, + Package (0x0C) + { + "PSTATE", + Zero, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "gcc_ufs_phy_axi_clk", + 0x08, + 0x0BEBC200, + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "gcc_ufs_phy_unipro_core_clk", + 0x08, + 0x08F0D180, + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "gcc_ufs_phy_ice_core_clk", + 0x08, + 0x11E1A300, + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_aggre_ufs_phy_axi_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_ufs_phy_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_ufs_phy_phy_aux_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_ufs_phy_tx_symbol_0_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_ufs_phy_rx_symbol_0_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_ufs_phy_rx_symbol_1_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_ufs_mem_clkref_en", + One + } + } + }, + + Package (0x0C) + { + "PSTATE", + One, + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_aggre_ufs_phy_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_ufs_phy_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_ufs_phy_phy_aux_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_ufs_phy_tx_symbol_0_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_ufs_phy_rx_symbol_0_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_ufs_phy_rx_symbol_1_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_ufs_phy_ice_core_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_ufs_phy_unipro_core_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_ufs_phy_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_ufs_mem_clkref_en", + 0x02 + } + } + } + }, + + Package (0x04) + { + "PSTATE_SET", + 0x02, + Package (0x04) + { + "PSTATE", + Zero, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_UFS_MEM", + "ICBID_SLAVE_EBI1", + 0x35A4E900, + 0x35A4E900 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_UFS_MEM_CFG", + 0x11D260C0, + Zero + } + } + }, + + Package (0x04) + { + "PSTATE", + One, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_UFS_MEM_CFG", + Zero, + Zero + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_UFS_MEM", + "ICBID_SLAVE_EBI1", + Zero, + Zero + } + } + } + } + }, + + Package (0x0B) + { + "DSTATE", + Zero, + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + 0x02, + Zero + } + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + Zero, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO20_A", + One, + 0x002D2A80, + One, + 0x07, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO2_A", + One, + 0x0012C4B0, + One, + 0x07, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_SMPS4_A", + 0x02, + 0x001B7740, + One, + Zero, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO26_A", + One, + 0x00124F80, + One, + 0x07, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO1_A", + One, + 0x000D6D80, + One, + 0x07, + Zero + } + }, + + Package (0x02) + { + "DELAY", + Package (0x01) + { + 0x23 + } + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + One, + Zero + } + } + }, + + Package (0x08) + { + "DSTATE", + 0x03, + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + One, + One + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO1_A", + One, + Zero, + Zero, + Zero, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO26_A", + One, + Zero, + Zero, + Zero, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO20_A", + One, + Zero, + Zero, + Zero, + Zero + } + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + Zero, + One + } + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + 0x02, + One + } + } + } + }, + + Package (0x05) + { + "DEVICE", + "\\_SB.SDC2", + Package (0x09) + { + "COMPONENT", + Zero, + Package (0x02) + { + "FSTATE", + Zero + }, + + Package (0x02) + { + "FSTATE", + One + }, + + Package (0x19) + { + "PSTATE_SET", + Zero, + Package (0x03) + { + "PSTATE", + Zero, + Package (0x02) + { + "DELAY", + Package (0x01) + { + One + } + } + }, + + Package (0x03) + { + "PSTATE", + One, + Package (0x02) + { + "DELAY", + Package (0x01) + { + One + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x02, + Package (0x02) + { + "DELAY", + Package (0x01) + { + One + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x03, + Package (0x02) + { + "DELAY", + Package (0x01) + { + One + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x04, + Package (0x02) + { + "DELAY", + Package (0x01) + { + One + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x05, + Package (0x02) + { + "DELAY", + Package (0x01) + { + One + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x06, + Package (0x02) + { + "DELAY", + Package (0x01) + { + One + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x07, + Package (0x02) + { + "DELAY", + Package (0x01) + { + One + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x08, + Package (0x02) + { + "DELAY", + Package (0x01) + { + One + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x09, + Package (0x02) + { + "DELAY", + Package (0x01) + { + One + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x0B, + Package (0x02) + { + "DELAY", + Package (0x01) + { + One + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x0C, + Package (0x02) + { + "DELAY", + Package (0x01) + { + One + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x0D, + Package (0x02) + { + "DELAY", + Package (0x01) + { + One + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x0E, + Package (0x02) + { + "DELAY", + Package (0x01) + { + One + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x0F, + Package (0x02) + { + "DELAY", + Package (0x01) + { + One + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x10, + Package (0x02) + { + "DELAY", + Package (0x01) + { + One + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x11, + Package (0x02) + { + "DELAY", + Package (0x01) + { + One + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x12, + Package (0x02) + { + "DELAY", + Package (0x01) + { + One + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x13, + Package (0x02) + { + "DELAY", + Package (0x01) + { + One + } + } + }, + + Package (0x08) + { + "PSTATE", + 0x14, + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO21_A", + One, + Zero, + Zero, + Zero, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO13_A", + One, + Zero, + Zero, + Zero, + Zero + } + }, + + Package (0x02) + { + "DELAY", + Package (0x01) + { + 0x23 + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO21_A", + One, + 0x002D2A80, + One, + 0x07, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO13_A", + One, + 0x002D2A80, + One, + 0x07, + Zero + } + }, + + Package (0x02) + { + "DELAY", + Package (0x01) + { + 0x23 + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x15, + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO13_A", + One, + 0x001C3A90, + One, + 0x07, + Zero + } + }, + + Package (0x02) + { + "DELAY", + Package (0x01) + { + 0x23 + } + } + }, + + Package (0x05) + { + "PSTATE", + 0x16, + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO21_A", + One, + 0x002D2A80, + One, + 0x07, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO13_A", + One, + 0x002D2A80, + One, + 0x07, + Zero + } + }, + + Package (0x02) + { + "DELAY", + Package (0x01) + { + 0x23 + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x17, + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO21_A", + One, + Zero, + Zero, + Zero, + Zero + } + }, + + Package (0x02) + { + "DELAY", + Package (0x01) + { + 0x23 + } + } + } + }, + + Package (0x06) + { + "PSTATE_SET", + One, + Package (0x03) + { + "PSTATE", + Zero, + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_sdcc2_apps_clk", + 0x02 + } + } + }, + + Package (0x03) + { + "PSTATE", + One, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "gcc_sdcc2_apps_clk", + 0x08, + 0x01312D00, + 0x02 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x02, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "gcc_sdcc2_apps_clk", + 0x08, + 0x05F5E100, + 0x02 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x03, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "gcc_sdcc2_apps_clk", + 0x08, + 0x0C02A560, + 0x02 + } + } + } + }, + + Package (0x06) + { + "PSTATE_SET", + 0x02, + Package (0x03) + { + "PSTATE", + Zero, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_SDCC_2", + "ICBID_SLAVE_EBI1", + 0x17D78400, + 0x0BEBC200 + } + } + }, + + Package (0x03) + { + "PSTATE", + One, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_SDCC_2", + "ICBID_SLAVE_EBI1", + 0x0BEBC200, + 0x05F5E100 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x02, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_SDCC_2", + "ICBID_SLAVE_EBI1", + 0x02625A00, + 0x01312D00 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x03, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_SDCC_2", + "ICBID_SLAVE_EBI1", + Zero, + Zero + } + } + } + }, + + Package (0x05) + { + "PSTATE_SET", + 0x03, + Package (0x04) + { + "PSTATE", + Zero, + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + One, + 0x03 + } + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + 0x02, + Zero + } + } + }, + + Package (0x04) + { + "PSTATE", + One, + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + One, + 0x02 + } + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + 0x02, + One + } + } + }, + + Package (0x04) + { + "PSTATE", + 0x02, + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + One, + One + } + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + 0x02, + 0x02 + } + } + } + }, + + Package (0x04) + { + "PSTATE_SET", + 0x04, + Package (0x03) + { + "PSTATE", + Zero, + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_sdcc2_ahb_clk", + One + } + } + }, + + Package (0x03) + { + "PSTATE", + One, + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_sdcc2_ahb_clk", + 0x02 + } + } + } + } + }, + + Package (0x07) + { + "DSTATE", + Zero, + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + Zero, + 0x16 + } + }, + + Package (0x02) + { + "TLMMPORT", + Package (0x03) + { + 0x0099A000, + 0x7FFF, + 0x1FE3 + } + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + 0x02, + Zero + } + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + 0x04, + Zero + } + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + One, + 0x03 + } + } + }, + + Package (0x07) + { + "DSTATE", + 0x03, + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + One, + Zero + } + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + 0x04, + One + } + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + 0x02, + 0x03 + } + }, + + Package (0x02) + { + "TLMMPORT", + Package (0x03) + { + 0x0099A000, + 0x7FFF, + 0x0A00 + } + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + Zero, + 0x17 + } + } + } + }, + + Package (0x07) + { + "DEVICE", + "\\_SB.ADSP.SLM1", + Package (0x03) + { + "COMPONENT", + Zero, + Package (0x02) + { + "FSTATE", + Zero + } + }, + + Package (0x02) + { + "DSTATE", + Zero + }, + + Package (0x02) + { + "DSTATE", + One + }, + + Package (0x02) + { + "DSTATE", + 0x02 + }, + + Package (0x02) + { + "DSTATE", + 0x03 + } + }, + + Package (0x07) + { + "DEVICE", + "\\_SB.ADSP.SLM2", + Package (0x03) + { + "COMPONENT", + Zero, + Package (0x02) + { + "FSTATE", + Zero + } + }, + + Package (0x02) + { + "DSTATE", + Zero + }, + + Package (0x02) + { + "DSTATE", + One + }, + + Package (0x02) + { + "DSTATE", + 0x02 + }, + + Package (0x02) + { + "DSTATE", + 0x03 + } + } + }) + Name (LPCC, Package (0x07) + { + Package (0x07) + { + "DEVICE", + "\\_SB.UCP0", + Package (0x05) + { + "COMPONENT", + Zero, + Package (0x02) + { + "FSTATE", + Zero + }, + + Package (0x05) + { + "PSTATE", + Zero, + Package (0x02) + { + "NPARESOURCE", + Package (0x03) + { + One, + "/arc/client/rail_cx", + 0x0100 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_USB3_0", + 0x17D78400, + Zero + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_usb_phy_cfg_ahb2phy_clk", + One + } + } + }, + + Package (0x05) + { + "PSTATE", + One, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_USB3_0", + Zero, + Zero + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_usb_phy_cfg_ahb2phy_clk", + 0x02 + } + }, + + Package (0x02) + { + "NPARESOURCE", + Package (0x03) + { + One, + "/arc/client/rail_cx", + Zero + } + } + } + }, + + Package (0x02) + { + "DSTATE", + Zero + }, + + Package (0x02) + { + "DSTATE", + One + }, + + Package (0x02) + { + "DSTATE", + 0x02 + }, + + Package (0x02) + { + "DSTATE", + 0x03 + } + }, + + Package (0x07) + { + "DEVICE", + "\\_SB.PTCC", + Package (0x05) + { + "COMPONENT", + Zero, + Package (0x02) + { + "FSTATE", + Zero + }, + + Package (0x04) + { + "PSTATE", + Zero, + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO24_A", + One, + 0x002EEBB8, + One, + One, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO12_A", + One, + 0x001B7740, + One, + One, + Zero + } + } + }, + + Package (0x04) + { + "PSTATE", + One, + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO24_A", + One, + Zero, + Zero, + Zero, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO12_A", + One, + Zero, + Zero, + Zero, + Zero + } + } + } + }, + + Package (0x02) + { + "DSTATE", + Zero + }, + + Package (0x02) + { + "DSTATE", + One + }, + + Package (0x02) + { + "DSTATE", + 0x02 + }, + + Package (0x02) + { + "DSTATE", + 0x03 + } + }, + Package (0x07) + { + "DEVICE", + "\\_SB.EMEC", + Package (0x05) + { + "COMPONENT", + Zero, + Package (0x02) + { + "FSTATE", + Zero + }, + + Package (0x05) + { + "PSTATE", + Zero, + Package (0x02) + { + "NPARESOURCE", + Package (0x03) + { + One, + "/arc/client/rail_cx", + 0x0100 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_USB3_0", + 0x17D78400, + Zero + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_usb_phy_cfg_ahb2phy_clk", + One + } + } + + /*Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO28_A", + One, + 0x00325AA0, + One, + 0x07, + Zero + } + }*/ + }, + + Package (0x05) + { + "PSTATE", + One, + Package (0x02) + { + "BUSARB", + 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Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_USB3_0", + "ICBID_SLAVE_EBI1", + Zero, + Zero + } + }, + + Package (0x02) + { + "NPARESOURCE", + Package (0x03) + { + One, + "/arc/client/rail_cx", + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO24_A", + One, + Zero, + Zero, + 0x05, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO12_A", + One, + Zero, + Zero, + 0x05, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO26_A", + One, + Zero, + Zero, + 0x05, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO1_A", + One, + Zero, + Zero, + 0x05, + Zero + } + } + }, + + Package (0x02) + { + "ABANDON_DSTATE", + 0x03 + } + }, + + Package (0x08) + { + "DEVICE", + "\\_SB.USB1", + Package (0x05) + { + "COMPONENT", + Zero, + Package (0x02) + { + "FSTATE", + Zero + }, + + Package (0x07) + { + "PSTATE", + Zero, + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_usb30_sec_sleep_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x03) + { + "gcc_usb30_sec_sleep_clk", + 0x09, + 0x08 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x03) + { + "gcc_usb30_sec_sleep_clk", + 0x09, + 0x0C + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_usb3_sec_phy_pipe_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x03) + { + "gcc_usb3_sec_phy_pipe_clk", + 0x09, + 0x08 + } + } + }, + + Package (0x02) + { + "PRELOAD_PSTATE", + Zero + } + }, + + Package (0x11) + { + "DSTATE", + Zero, + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO12_A", + One, + 0x001B7740, + One, + 0x07, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO24_A", + One, + 0x002EEBB8, + One, + 0x07, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO26_A", + One, + 0x00124F80, + One, + 0x07, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO1_A", + One, + 0x000D6D80, + One, + 0x07, + Zero + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "usb30_sec_gdsc", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "gcc_aggre_usb3_sec_axi_clk", + 0x08, + 0x78, + 0x09 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "gcc_cfg_noc_usb3_sec_axi_clk", + 0x08, + 0x78, + 0x09 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "gcc_usb30_sec_master_clk", + 0x08, + 0x78, + 0x09 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "gcc_usb30_sec_mock_utmi_clk", + 0x08, + 0x4B00, + 0x07 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "gcc_usb3_sec_phy_aux_clk", + 0x08, + 0x04B0, + 0x07 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_USB3_1", + "ICBID_SLAVE_EBI1", + 0x28000000, + 0x28000000 + } + }, + + Package (0x02) + { + "NPARESOURCE", + Package (0x03) + { + One, + "/arc/client/rail_cx", + 0x0100 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_USB3_1", + 0x17D78400, + Zero + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_usb_phy_cfg_ahb2phy_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_usb3_sec_clkref_en", + One + } + } + }, + + Package (0x11) + { + "DSTATE", + One, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "gcc_usb30_sec_master_clk", + 0x03, + 0x2580, + 0x05 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_usb30_sec_master_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_cfg_noc_usb3_sec_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_aggre_usb3_sec_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_usb30_sec_mock_utmi_clk", + 0x02 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_USB3_1", + Zero, + Zero + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_usb_phy_cfg_ahb2phy_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_usb3_sec_phy_aux_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_usb3_sec_clkref_en", + 0x02 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_USB3_1", + "ICBID_SLAVE_EBI1", + Zero, + Zero + } + }, + + Package (0x02) + { + "NPARESOURCE", + Package (0x03) + { + One, + "/arc/client/rail_cx", + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO12_A", + One, + 0x001B7740, + One, + 0x05, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO24_A", + One, + 0x002EEBB8, + One, + 0x05, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO26_A", + One, + 0x00124F80, + One, + 0x05, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO1_A", + One, + 0x000D6D80, + One, + 0x05, + Zero + } + } + }, + + Package (0x12) + { + "DSTATE", + 0x02, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "gcc_usb30_sec_master_clk", + 0x03, + 0x00927C00, + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_usb30_sec_master_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_cfg_noc_usb3_sec_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_aggre_usb3_sec_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_usb30_sec_mock_utmi_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_usb3_sec_phy_aux_clk", + 0x02 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_USB3_1", + Zero, + Zero + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_usb_phy_cfg_ahb2phy_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_usb3_sec_clkref_en", + 0x02 + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "usb30_sec_gdsc", + One + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_USB3_1", + "ICBID_SLAVE_EBI1", + Zero, + Zero + } + }, + + Package (0x02) + { + "NPARESOURCE", + Package (0x03) + { + One, + "/arc/client/rail_cx", + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO12_A", + One, + 0x001B7740, + One, + 0x05, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO24_A", + One, + 0x002EEBB8, + One, + 0x05, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO26_A", + One, + 0x00124F80, + One, + 0x05, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO1_A", + One, + 0x000D6D80, + One, + 0x05, + Zero + } + } + }, + + Package (0x12) + { + "DSTATE", + 0x03, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "gcc_usb30_sec_master_clk", + 0x03, + 0x00927C00, + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_usb30_sec_master_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_cfg_noc_usb3_sec_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_aggre_usb3_sec_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_usb30_sec_mock_utmi_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_usb3_sec_phy_aux_clk", + 0x02 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_USB3_1", + Zero, + Zero + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_usb_phy_cfg_ahb2phy_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_usb3_sec_clkref_en", + 0x02 + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "usb30_sec_gdsc", + 0x02 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_USB3_1", + "ICBID_SLAVE_EBI1", + Zero, + Zero + } + }, + + Package (0x02) + { + "NPARESOURCE", + Package (0x03) + { + One, + "/arc/client/rail_cx", + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO24_A", + One, + Zero, + Zero, + 0x05, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO12_A", + One, + Zero, + Zero, + 0x05, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO26_A", + One, + Zero, + Zero, + 0x05, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO1_A", + One, + Zero, + Zero, + 0x05, + Zero + } + } + }, + + Package (0x02) + { + "ABANDON_DSTATE", + 0x03 + } + } + }) + } + + // resources needed by ipa driver + //=========================================================================== + // Implementation of function states for IPA driver. + // Present implementation has two function states F0 and F1. + // + // F0 = Full power mode. + // F1 = Low power mode. + // + // Resource being managed is /clk/ipa + //=========================================================================== + Scope (\_SB.PEP0) + { + Method (IPMD, 0, NotSerialized) + { + Return (IPSC) /* \_SB_.PEP0.IPSC */ + } + + Name (IPSC, Package (0x01) + { + Package (0x03) + { + "DEVICE", + "\\_SB.IPA", + Package (0x04) + { + "COMPONENT", + Zero, + Package (0x03) + { + "FSTATE", + Zero, + Package (0x02) + { + "BUSARB", + Package (0x06) + { + 0x03, + "ICBID_MASTER_IPA_CORE", + "ICBID_SLAVE_IPA_CORE", + 0x9218, + Zero, + "HLOS_DRV" + } + } + }, + + Package (0x03) + { + "FSTATE", + One, + Package (0x02) + { + "BUSARB", + Package (0x06) + { + 0x03, + "ICBID_MASTER_IPA_CORE", + "ICBID_SLAVE_IPA_CORE", + Zero, + Zero, + "HLOS_DRV" + } + } + } + } + } + }) + } + + Scope (\_SB.PEP0) + { + Method (EWMD, 0, NotSerialized) + { + Return (WBRC) /* \_SB_.PEP0.WBRC */ + } + + Name (WBRC, Package (0x03) + { + Package (0x07) + { + "DEVICE", + "\\_SB.AMSS.QWLN", + Package (0x03) + { + "COMPONENT", + Zero, + Package (0x02) + { + "FSTATE", + Zero + } + }, + + Package (0x07) + { + "DSTATE", + Zero, + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_SMPS7_A", + 0x02, + 0x000FAFA0, + One, + 0x06, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO5_A", + One, + 0x000C3500, + One, + 0x07, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO7_A", + One, + 0x001B7740, + One, + 0x07, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO17_A", + One, + 0x0013E5C0, + One, + 0x07, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO25_A", + One, + 0x002F5D00, + One, + 0x07, + Zero + } + } + }, + + Package (0x07) + { + "DSTATE", + 0x02, + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO25_A", + One, + Zero, + Zero, + 0x05, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO17_A", + One, + Zero, + Zero, + 0x05, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO7_A", + One, + Zero, + Zero, + 0x05, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO5_A", + One, + Zero, + Zero, + 0x05, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_SMPS7_A", + 0x02, + Zero, + Zero, + 0x05, + Zero + } + } + }, + + Package (0x07) + { + "DSTATE", + 0x03, + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO25_A", + One, + Zero, + Zero, + 0x05, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO17_A", + One, + Zero, + Zero, + 0x05, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO7_A", + One, + Zero, + Zero, + 0x05, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO5_A", + One, + Zero, + Zero, + 0x05, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_SMPS7_A", + 0x02, + Zero, + Zero, + 0x05, + Zero + } + } + }, + + Package (0x02) + { + "ABANDON_DSTATE", + 0x02 + } + }, + + Package (0x03) + { + "DEVICE", + "\\_SB.COEX", + Package (0x05) + { + "COMPONENT", + Zero, + Package (0x02) + { + "FSTATE", + Zero + }, + + Package (0x07) + { + "PSTATE", + Zero, + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_SMPS7_A", + 0x02, + 0x000FAFA0, + One, + 0x06, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO5_A", + One, + 0x000C3500, + One, + 0x07, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO7_A", + One, + 0x001B7740, + One, + 0x07, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO17_A", + One, + 0x0013E5C0, + One, + 0x07, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO25_A", + One, + 0x002F5D00, + One, + 0x07, + Zero + } + } + }, + + Package (0x07) + { + "PSTATE", + One, + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO25_A", + One, + Zero, + Zero, + 0x05, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO17_A", + One, + Zero, + Zero, + 0x05, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO7_A", + One, + Zero, + Zero, + 0x05, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO5_A", + One, + Zero, + Zero, + 0x05, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_SMPS7_A", + 0x02, + Zero, + Zero, + 0x05, + Zero + } + } + } + } + }, + + Package (0x05) + { + "DEVICE", + "\\_SB.BTH0", + Package (0x03) + { + "COMPONENT", + Zero, + Package (0x02) + { + "FSTATE", + Zero + } + }, + + Package (0x07) + { + "DSTATE", + Zero, + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_SMPS3_A", + 0x02, + 0x0014A140, + One, + 0x06, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_SMPS5_A", + 0x02, + 0x001F20C0, + One, + 0x06, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO7_A", + One, + 0x001B7740, + One, + 0x07, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO17_A", + One, + 0x0013E5C0, + One, + 0x07, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO25_A", + One, + 0x002F5D00, + One, + 0x07, + Zero + } + } + }, + + Package (0x07) + { + "DSTATE", + 0x03, + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO7_A", + One, + Zero, + Zero, + 0x05, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO17_A", + One, + Zero, + Zero, + 0x05, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO25_A", + One, + Zero, + Zero, + 0x05, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_SMPS3_A", + 0x02, + Zero, + Zero, + 0x05, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_SMPS5_A", + 0x02, + Zero, + Zero, + 0x05, + Zero + } + } + } + } + }) + } + + // power management resources needed by qdss driver + //=========================================================================== + // Description & Possible use cases for Qdss's p-state implementation + // Qdss employs pstate-sets to robustly configure clock and tlmm registers + // pstate-set 0 has pstates for clock frequencies + // pstate-set 1 has pstates for managing tlmm registers for tpiu operation + // TPIU related data sourced from meta build's std_trace_msm8994.cmm; it can also + // be verified through TLMM GPIO assignment in ipcat and TLMM_GPIO_CFGn register + // bit assignments as documented in SWI. + // NOTE: elessar V1 and V2 have different TLMM GPIO pin/function assignments, so + // register values should be updated for V2. + //======================================================== + // Sinks p-states allowed + //-------------------------------------------------------- + // non-TPIU P{0,0} + // P{0,1} + // P{0,2} + // P{0,3} + // TPIU P{0,0} AND (P{1,1} OR P{1,3}) + // P{0,1} AND (P{1,0} OR P{1,2}) + // P{0,2} AND (P{1,0} OR P{1,2}) + // P{0,3} AND (P{1,0} OR P{1,2}) + // + // Description of pstate-sets and corresponding p-states : + // pstate-set-0 is the set with allowed qdss clock frequencies + // under set-0 each p-state holds the following meaning: + // pstate-0 CLOCK OFF (0 Hz) + // pstate-1 SVS CLOCK FREQUENCY (depends on the voltage; ranges 150 to 300 MHz) + // pstate-2 HIGH CLOCK FREQUENCY (300 MHz) + // pstate-3 LOW CLOCK FREQUENCY (150 MHz) + // + // under set-1 each p-state hold the following meaning: + // pstate-0 sets SET-B TLMM registers to make TPIU operational + // pstate-1 clears SET-B TLMM registers to make TPIU operational + // pstate-2 sets SD TLMM registers to make TPIU operational + // pstate-3 clears SD TLMM registers to make TPIU operational + //=========================================================================== + Scope (\_SB.PEP0) + { + Method (QDMD, 0, NotSerialized) + { + Return (QDSC) /* \_SB_.PEP0.QDSC */ + } + + Name (QDSC, Package (0x01) + { + Package (0x03) + { + "DEVICE", + "\\_SB.QDSS", + Package (0x08) + { + "COMPONENT", + Zero, + Package (0x02) + { + "FSTATE", + Zero + }, + + Package (0x03) + { + "FSTATE", + One, + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + Zero, + Zero + } + } + }, + + Package (0x06) + { + "PSTATE_SET", + Zero, + Package (0x03) + { + "PSTATE", + Zero, + Package (0x02) + { + "NPARESOURCE", + Package (0x03) + { + One, + "/clk/qdss", + Zero + } + } + }, + + Package (0x03) + { + "PSTATE", + One, + Package (0x02) + { + "NPARESOURCE", + Package (0x03) + { + One, + "/clk/qdss", + One + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x02, + Package (0x02) + { + "NPARESOURCE", + Package (0x03) + { + One, + "/clk/qdss", + 0x02 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x03, + Package (0x02) + { + "NPARESOURCE", + Package (0x03) + { + One, + "/clk/qdss", + 0x03 + } + } + } + }, + + Package (0x06) + { + "PSTATE_SET", + One, + Package (0x02) + { + "PSTATE", + Zero + }, + + Package (0x02) + { + "PSTATE", + One + }, + + Package (0x02) + { + "PSTATE", + 0x02 + }, + + Package (0x02) + { + "PSTATE", + 0x03 + } + }, + + Package (0x04) + { + "PSTATE_SET", + 0x02, + Package (0x03) + { + "PSTATE", + Zero, + Package (0x02) + { + "NPARESOURCE", + Package (0x03) + { + One, + "/clk/qdss", + One + } + } + }, + + Package (0x03) + { + "PSTATE", + One, + Package (0x02) + { + "NPARESOURCE", + Package (0x03) + { + One, + "/clk/qdss", + Zero + } + } + } + }, + + Package (0x03) + { + "PSTATE_SET", + 0x03, + Package (0x03) + { + "PSTATE", + Zero, + Package (0x02) + { + "TLMMPORT", + Package (0x03) + { + 0x00033000, + 0x07FF, + 0x01C8 + } + } + } + } + } + } + }) + } + + Scope (\_SB.PEP0) + { + Method (PEMD, 0, NotSerialized) + { + Return (PEMC) /* \_SB_.PEP0.PEMC */ + } + + Name (PEMC, Package (0x04) + { + Package (0x07) + { + "DEVICE", + "\\_SB.PCI0", + Package (0x04) + { + "COMPONENT", + Zero, + Package (0x02) + { + "FSTATE", + Zero + }, + + Package (0x02) + { + "FSTATE", + One + } + }, + + Package (0x10) + { + "DSTATE", + Zero, + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO26_A", + One, + 0x00124F80, + One, + One, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO1_A", + One, + 0x000D6D80, + One, + One, + Zero + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "pcie_0_gdsc", + One + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_PCIE_0_CFG", + 0x047868C0, + Zero + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_PCIE_0", + "ICBID_SLAVE_EBI1", + 0x17D78400, + 0x0BEBC200 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_aggre_noc_pcie_tbu_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_pcie_phy_refgen_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_pcie_phy_aux_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_pcie_0_pipe_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_pcie_0_slv_axi_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_pcie_0_slv_q2a_axi_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_pcie_0_mstr_axi_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_pcie_0_cfg_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "gcc_pcie_0_aux_clk", + 0x08, + 0x0124F800, + 0x03 + } + } + }, + + Package (0x02) + { + "DSTATE", + One + }, + + Package (0x02) + { + "DSTATE", + 0x02 + }, + + Package (0x10) + { + "DSTATE", + 0x03, + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_pcie_0_pipe_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_pcie_0_aux_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_pcie_0_slv_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_pcie_0_slv_q2a_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_pcie_0_mstr_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_pcie_0_cfg_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_aggre_noc_pcie_tbu_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_pcie_phy_refgen_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_pcie_phy_aux_clk", + 0x02 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_PCIE_0_CFG", + Zero, + Zero + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_PCIE_0", + "ICBID_SLAVE_EBI1", + Zero, + Zero + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "pcie_0_gdsc", + 0x02 + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO26_A", + One, + Zero, + Zero, + Zero, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO1_A", + One, + Zero, + Zero, + Zero, + Zero + } + } + } + }, + + Package (0x07) + { + "DEVICE", + "\\_SB.PCI0.RP1", + Package (0x04) + { + "COMPONENT", + Zero, + Package (0x02) + { + "FSTATE", + Zero + }, + + Package (0x02) + { + "FSTATE", + One + } + }, + + Package (0x02) + { + "DSTATE", + Zero + }, + + Package (0x02) + { + "DSTATE", + One + }, + + Package (0x02) + { + "DSTATE", + 0x02 + }, + + Package (0x02) + { + "DSTATE", + 0x03 + } + }, + + Package (0x07) + { + "DEVICE", + "\\_SB.PCI1", + Package (0x04) + { + "COMPONENT", + Zero, + Package (0x02) + { + "FSTATE", + Zero + }, + + Package (0x02) + { + "FSTATE", + One + } + }, + + Package (0x10) + { + "DSTATE", + Zero, + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO26_A", + One, + 0x00124F80, + One, + One, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO1_A", + One, + 0x000D6D80, + One, + One, + Zero + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "pcie_1_gdsc", + One + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_PCIE_1_CFG", + 0x047868C0, + Zero + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_PCIE_1", + "ICBID_SLAVE_EBI1", + 0x17D78400, + 0x0BEBC200 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_aggre_noc_pcie_tbu_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_pcie_phy_refgen_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_pcie_phy_aux_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_pcie_1_pipe_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_pcie_1_slv_axi_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_pcie_1_slv_q2a_axi_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_pcie_1_mstr_axi_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_pcie_1_cfg_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "gcc_pcie_1_aux_clk", + 0x08, + 0x0124F800, + 0x03 + } + } + }, + + Package (0x02) + { + "DSTATE", + One + }, + + Package (0x02) + { + "DSTATE", + 0x02 + }, + + Package (0x10) + { + "DSTATE", + 0x03, + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_pcie_1_pipe_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_pcie_1_aux_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_pcie_1_slv_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_pcie_1_slv_q2a_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_pcie_1_mstr_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_pcie_1_cfg_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_aggre_noc_pcie_tbu_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_pcie_phy_refgen_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_pcie_phy_aux_clk", + 0x02 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_PCIE_1_CFG", + Zero, + Zero + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_PCIE_1", + "ICBID_SLAVE_EBI1", + Zero, + Zero + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "pcie_1_gdsc", + 0x02 + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO26_A", + One, + Zero, + Zero, + Zero, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO1_A", + One, + Zero, + Zero, + Zero, + Zero + } + } + } + }, + + Package (0x07) + { + "DEVICE", + "\\_SB.PCI1.RP1", + Package (0x04) + { + "COMPONENT", + Zero, + Package (0x02) + { + "FSTATE", + Zero + }, + + Package (0x02) + { + "FSTATE", + One + } + }, + + Package (0x02) + { + "DSTATE", + Zero + }, + + Package (0x02) + { + "DSTATE", + One + }, + + Package (0x02) + { + "DSTATE", + 0x02 + }, + + Package (0x02) + { + "DSTATE", + 0x03 + } + } + }) + } + + // resources needed by camera drivers + Scope (\_SB.PEP0) + { + Method (CPMX, 0, NotSerialized) + { + Return (CPXC) /* \_SB_.PEP0.CPXC */ + } + + Name (CPXC, Package (0x04) + { + Package (0x05) + { + "DEVICE", + "\\_SB.CAMP", + Package (0x07) + { + "COMPONENT", + Zero, + Package (0x0D) + { + "FSTATE", + Zero, + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_xo_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_ahb_clk", + One + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "titan_top_gdsc", + One + } + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + One, + 0x23 + } + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + 0x02, + 0x23 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_axi_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_soc_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_cpas_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_camnoc_axi_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_cci_clk", + One + } + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + Zero, + Zero + } + } + }, + + Package (0x0C) + { + "FSTATE", + One, + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_cci_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_camnoc_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_cpas_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_soc_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + 0x02, + 0x25 + } + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + One, + 0x25 + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "titan_top_gdsc", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_xo_clk", + 0x02 + } + } + }, + + Package (0x04) + { + "PSTATE_SET", + Zero, + Package (0x03) + { + "PSTATE", + Zero, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "cam_cc_cci_clk", + 0x03, + 0x023C3460, + 0x03 + } + } + }, + + Package (0x03) + { + "PSTATE", + One, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "cam_cc_cci_clk", + 0x03, + 0x0124F800, + 0x03 + } + } + } + }, + + Package (0x28) + { + "PSTATE_SET", + One, + Package (0x03) + { + "PSTATE", + Zero, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_CAMNOC_SF_UNCOMP", + "ICBID_SLAVE_CAMNOC_UNCOMP", + 0x00000002CB417800, + 0x00000002CB417800 + } + } + }, + + Package (0x03) + { + "PSTATE", + One, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + 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{ + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_CAMNOC_SF", + "ICBID_SLAVE_EBI1", + 0x4190AB00, + 0x4190AB00 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x1E, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_CAMNOC_SF", + "ICBID_SLAVE_EBI1", + 0x35A4E900, + 0x35A4E900 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x1F, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_CAMNOC_SF", + "ICBID_SLAVE_EBI1", + 0x29B92700, + 0x29B92700 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x20, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_CAMNOC_SF", + "ICBID_SLAVE_EBI1", + 0x1DCD6500, + 0x1DCD6500 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x21, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_CAMNOC_SF", + "ICBID_SLAVE_EBI1", + 0x17D78400, + 0x17D78400 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x22, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_CAMNOC_SF", + "ICBID_SLAVE_EBI1", + 0x11E1A300, + 0x11E1A300 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x23, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_CAMNOC_SF", + "ICBID_SLAVE_EBI1", + 0x0BEBC200, + 0x0BEBC200 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x24, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_CAMNOC_SF", + "ICBID_SLAVE_EBI1", + 0x05F5E100, + 0x05F5E100 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x25, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_CAMNOC_SF", + "ICBID_SLAVE_EBI1", + Zero, + Zero + } + } + } + } + }, + + Package (0x08) + { + "COMPONENT", + One, + Package (0x0E) + { + "FSTATE", + Zero, + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_xo_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_ahb_clk", + One + } + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + 0x03, + 0x04 + } + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + 0x02, + 0x04 + } + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + One, + 0x04 + } + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + Zero, + 0x04 + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "titan_top_gdsc", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_axi_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_soc_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_cpas_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_camnoc_axi_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_cci_clk", + One + } + } + }, + + Package (0x0E) + { + "FSTATE", + One, + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_cci_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_camnoc_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_cpas_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_soc_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "titan_top_gdsc", + 0x02 + } + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + Zero, + 0x05 + } + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + One, + 0x05 + } + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + 0x02, + 0x05 + } + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + 0x03, + 0x05 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_xo_clk", + 0x02 + } + } + }, + + Package (0x08) + { + "PSTATE_SET", + Zero, + Package (0x03) + { + "PSTATE", + Zero, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_CAMNOC_HF0_UNCOMP", + "ICBID_SLAVE_CAMNOC_UNCOMP", + 0x4190AB00, + 0x4190AB00 + } + } + }, + + Package (0x03) + { + "PSTATE", + One, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_CAMNOC_HF0_UNCOMP", + "ICBID_SLAVE_CAMNOC_UNCOMP", + 0x17D78400, + 0x17D78400 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x02, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_CAMNOC_HF0_UNCOMP", + "ICBID_SLAVE_CAMNOC_UNCOMP", + 0x11E1A300, + 0x11E1A300 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x03, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_CAMNOC_HF0_UNCOMP", + "ICBID_SLAVE_CAMNOC_UNCOMP", + 0x0BEBC200, + 0x0BEBC200 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x04, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_CAMNOC_HF0_UNCOMP", + "ICBID_SLAVE_CAMNOC_UNCOMP", + 0x05F5E100, + 0x05F5E100 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x05, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_CAMNOC_HF0_UNCOMP", + "ICBID_SLAVE_CAMNOC_UNCOMP", + Zero, + Zero + } + } + } + }, + + Package (0x08) + { + "PSTATE_SET", + One, + Package (0x03) + { + "PSTATE", + Zero, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_CAMNOC_HF0", + "ICBID_SLAVE_EBI1", + 0x4190AB00, + 0x4190AB00 + } + } + }, + + Package (0x03) + { + "PSTATE", + One, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_CAMNOC_HF0", + "ICBID_SLAVE_EBI1", + 0x17D78400, + 0x17D78400 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x02, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_CAMNOC_HF0", + "ICBID_SLAVE_EBI1", + 0x11E1A300, + 0x11E1A300 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x03, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_CAMNOC_HF0", + "ICBID_SLAVE_EBI1", + 0x0BEBC200, + 0x0BEBC200 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x04, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_CAMNOC_HF0", + "ICBID_SLAVE_EBI1", + 0x05F5E100, + 0x05F5E100 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x05, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_CAMNOC_HF0", + "ICBID_SLAVE_EBI1", + Zero, + Zero + } + } + } + }, + + Package (0x08) + { + "PSTATE_SET", + 0x02, + Package (0x03) + { + "PSTATE", + Zero, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_CAMNOC_SF_UNCOMP", + "ICBID_SLAVE_CAMNOC_UNCOMP", + 0x4190AB00, + 0x4190AB00 + } + } + }, + + Package (0x03) + { + "PSTATE", + One, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_CAMNOC_SF_UNCOMP", + "ICBID_SLAVE_CAMNOC_UNCOMP", + 0x17D78400, + 0x17D78400 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x02, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_CAMNOC_SF_UNCOMP", + "ICBID_SLAVE_CAMNOC_UNCOMP", + 0x11E1A300, + 0x11E1A300 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x03, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_CAMNOC_SF_UNCOMP", + "ICBID_SLAVE_CAMNOC_UNCOMP", + 0x0BEBC200, + 0x0BEBC200 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x04, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_CAMNOC_SF_UNCOMP", + "ICBID_SLAVE_CAMNOC_UNCOMP", + 0x05F5E100, + 0x05F5E100 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x05, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_CAMNOC_SF_UNCOMP", + "ICBID_SLAVE_CAMNOC_UNCOMP", + Zero, + Zero + } + } + } + }, + + Package (0x08) + { + "PSTATE_SET", + 0x03, + Package (0x03) + { + "PSTATE", + Zero, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_CAMNOC_SF", + "ICBID_SLAVE_EBI1", + 0x4190AB00, + 0x4190AB00 + } + } + }, + + Package (0x03) + { + "PSTATE", + One, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_CAMNOC_SF", + "ICBID_SLAVE_EBI1", + 0x17D78400, + 0x17D78400 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x02, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_CAMNOC_SF", + "ICBID_SLAVE_EBI1", + 0x11E1A300, + 0x11E1A300 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x03, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_CAMNOC_SF", + "ICBID_SLAVE_EBI1", + 0x0BEBC200, + 0x0BEBC200 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x04, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_CAMNOC_SF", + "ICBID_SLAVE_EBI1", + 0x05F5E100, + 0x05F5E100 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x05, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_CAMNOC_SF", + "ICBID_SLAVE_EBI1", + Zero, + Zero + } + } + } + } + }, + + Package (0x04) + { + "COMPONENT", + 0x02, + Package (0x02) + { + "FSTATE", + Zero + }, + + Package (0x02) + { + "FSTATE", + One + } + } + }, + + Package (0x04) + { + "DEVICE", + "\\_SB.CAMS", + Package (0x19) + { + "DSTATE", + Zero, + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_xo_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_ahb_clk", + One + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "titan_top_gdsc", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_axi_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_soc_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_cpas_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_camnoc_axi_clk", + One + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO16_A", + One, + 0x001B7740, + One, + One, + Zero + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x5F, + One, + Zero, + One, + One, + Zero + } + }, + + Package (0x02) + { + "DELAY", + Package (0x01) + { + 0x04 + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x5B, + One, + Zero, + One, + One, + Zero + } + }, + + Package (0x02) + { + "DELAY", + Package (0x01) + { + One + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x04) + { + "PPP_RESOURCE_ID_LVS1_A", + 0x04, + 0x001B7740, + One + } + }, + + Package (0x02) + { + "DELAY", + Package (0x01) + { + One + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x11, + One, + One, + One, + 0x03, + One + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x12, + One, + One, + One, + 0x03, + One + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO19_A", + One, + 0x002AB980, + One, + One, + Zero + } + }, + + Package (0x02) + { + "DELAY", + Package (0x01) + { + One + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x19, + One, + Zero, + One, + One, + Zero + } + }, + + Package (0x02) + { + "DELAY", + Package (0x01) + { + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "cam_cc_mclk0_clk", + 0x08, + 0x016E3600, + 0x03 + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x0D, + One, + One, + One, + Zero, + One + } + }, + + Package (0x02) + { + "DELAY", + Package (0x01) + { + One + } + } + }, + + Package (0x1A) + { + "DSTATE", + 0x03, + Package (0x02) + { + "DELAY", + Package (0x01) + { + One + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x0D, + Zero, + Zero, + One, + One, + Zero + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_mclk0_clk", + 0x02 + } + }, + + Package (0x02) + { + "DELAY", + Package (0x01) + { + One + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO19_A", + One, + Zero, + Zero, + Zero, + Zero + } + }, + + Package (0x02) + { + "DELAY", + Package (0x01) + { + One + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x19, + Zero, + Zero, + One, + One, + Zero + } + }, + + Package (0x02) + { + "DELAY", + Package (0x01) + { + One + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x04) + { + "PPP_RESOURCE_ID_LVS1_A", + 0x04, + Zero, + Zero + } + }, + + Package (0x02) + { + "DELAY", + Package (0x01) + { + One + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x5B, + Zero, + Zero, + One, + One, + Zero + } + }, + + Package (0x02) + { + "DELAY", + Package (0x01) + { + One + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x12, + Zero, + Zero, + Zero, + One, + Zero + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x11, + Zero, + Zero, + Zero, + One, + Zero + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x5F, + Zero, + Zero, + One, + One, + Zero + } + }, + + Package (0x02) + { + "DELAY", + Package (0x01) + { + One + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO16_A", + One, + Zero, + Zero, + Zero, + Zero + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_camnoc_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_cpas_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_soc_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "titan_top_gdsc", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_xo_clk", + 0x02 + } + } + } + }, + + Package (0x04) + { + "DEVICE", + "\\_SB.CAMF", + Package (0x17) + { + "DSTATE", + Zero, + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_xo_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_ahb_clk", + One + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "titan_top_gdsc", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_axi_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_soc_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_cpas_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_camnoc_axi_clk", + One + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO16_A", + One, + 0x001B7740, + One, + One, + Zero + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x81, + One, + Zero, + One, + One, + Zero + } + }, + + Package (0x02) + { + "DELAY", + Package (0x01) + { + One + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x7F, + One, + Zero, + One, + One, + Zero + } + }, + + Package (0x02) + { + "DELAY", + Package (0x01) + { + One + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x13, + One, + One, + One, + 0x03, + One + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x14, + One, + One, + One, + 0x03, + One + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x04) + { + "PPP_RESOURCE_ID_LVS2_A", + 0x04, + 0x001B7740, + One + } + }, + + Package (0x02) + { + "DELAY", + Package (0x01) + { + One + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x0C, + One, + Zero, + One, + One, + Zero + } + }, + + Package (0x02) + { + "DELAY", + Package (0x01) + { + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "cam_cc_mclk2_clk", + 0x08, + 0x016E3600, + 0x03 + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x0F, + One, + One, + One, + Zero, + One + } + }, + + Package (0x02) + { + "DELAY", + Package (0x01) + { + One + } + } + }, + + Package (0x18) + { + "DSTATE", + 0x03, + Package (0x02) + { + "DELAY", + Package (0x01) + { + One + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x0F, + Zero, + Zero, + One, + One, + Zero + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "cam_cc_mclk2_clk", + 0x0C, + Zero, + 0x03 + } + }, + + Package (0x02) + { + "DELAY", + Package (0x01) + { + One + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x0C, + Zero, + Zero, + One, + One, + Zero + } + }, + + Package (0x02) + { + "DELAY", + Package (0x01) + { + One + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x04) + { + "PPP_RESOURCE_ID_LVS2_A", + 0x04, + Zero, + Zero + } + }, + + Package (0x02) + { + "DELAY", + Package (0x01) + { + One + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x7F, + Zero, + Zero, + One, + One, + Zero + } + }, + + Package (0x02) + { + "DELAY", + Package (0x01) + { + One + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x14, + Zero, + Zero, + Zero, + One, + Zero + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x13, + Zero, + Zero, + Zero, + One, + Zero + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x81, + Zero, + Zero, + One, + One, + Zero + } + }, + + Package (0x02) + { + "DELAY", + Package (0x01) + { + One + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO16_A", + One, + Zero, + Zero, + Zero, + Zero + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_camnoc_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_cpas_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_soc_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "titan_top_gdsc", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_xo_clk", + 0x02 + } + } + } + }, + + Package (0x04) + { + "DEVICE", + "\\_SB.CAMI", + Package (0x15) + { + "DSTATE", + Zero, + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_xo_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_ahb_clk", + One + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "titan_top_gdsc", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_axi_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_soc_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_cpas_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_camnoc_axi_clk", + One + } + }, + + Package (0x02) + { + "PMICGPIO", + Package (0x08) + { + "IOCTL_PM_GPIO_CONFIG_DIGITAL_OUTPUT", + Zero, + Zero, + Zero, + One, + One, + 0x03, + Zero + } + }, + + Package (0x02) + { + "DELAY", + Package (0x01) + { + One + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x04) + { + "PPP_RESOURCE_ID_LVS1_A", + 0x04, + 0x001B7740, + One + } + }, + + Package (0x02) + { + "DELAY", + Package (0x01) + { + One + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO22_A", + One, + 0x002AB980, + One, + 0x07, + Zero + } + }, + + Package (0x02) + { + "DELAY", + Package (0x01) + { + One + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x17, + Zero, + Zero, + One, + Zero, + Zero + } + }, + + Package (0x02) + { + "DELAY", + Package (0x01) + { + One + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x17, + One, + Zero, + One, + Zero, + Zero + } + }, + + Package (0x02) + { + "DELAY", + Package (0x01) + { + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "cam_cc_mclk2_clk", + 0x08, + 0x016E3600, + 0x03 + } + }, + + Package (0x02) + { + "DELAY", + Package (0x01) + { + One + } + } + }, + + Package (0x12) + { + "DSTATE", + 0x03, + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_mclk2_clk", + 0x02 + } + }, + + Package (0x02) + { + "DELAY", + Package (0x01) + { + One + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x17, + One, + Zero, + One, + Zero, + Zero + } + }, + + Package (0x02) + { + "DELAY", + Package (0x01) + { + One + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x17, + Zero, + Zero, + One, + Zero, + Zero + } + }, + + Package (0x02) + { + "DELAY", + Package (0x01) + { + One + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO22_A", + One, + Zero, + Zero, + Zero, + Zero + } + }, + + Package (0x02) + { + "PMICVREGVOTE", + Package (0x04) + { + "PPP_RESOURCE_ID_LVS1_A", + 0x04, + Zero, + Zero + } + }, + + Package (0x02) + { + "PMICGPIO", + Package (0x08) + { + "IOCTL_PM_GPIO_CONFIG_DIGITAL_OUTPUT", + Zero, + Zero, + Zero, + One, + Zero, + 0x03, + Zero + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_camnoc_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_cpas_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_soc_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "titan_top_gdsc", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_xo_clk", + 0x02 + } + } + } + } + }) + } + + Scope (\_SB.PEP0) + { + // CAMERA + Method (CPMD, 0, NotSerialized) + { + Return (CPCC) /* \_SB_.PEP0.CPCC */ + } + + Name (CPCC, Package (0x03) + { + Package (0x04) + { + "DEVICE", + "\\_SB.JPGE", + Package (0x05) + { + "COMPONENT", + Zero, + Package (0x0B) + { + "FSTATE", + Zero, + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_xo_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_ahb_clk", + One + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "titan_top_gdsc", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_axi_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_soc_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_cpas_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_camnoc_axi_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_jpeg_clk", + One + } + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + Zero, + 0x02 + } + } + }, + + Package (0x0A) + { + "FSTATE", + One, + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_jpeg_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_camnoc_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_cpas_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_soc_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "titan_top_gdsc", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_xo_clk", + 0x02 + } + } + }, + + Package (0x06) + { + "PSTATE_SET", + Zero, + Package (0x03) + { + "PSTATE", + Zero, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "cam_cc_jpeg_clk", + 0x03, + 0x23C34600, + 0x03 + } + } + }, + + Package (0x03) + { + "PSTATE", + One, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "cam_cc_jpeg_clk", + 0x03, + 0x23C34600, + 0x03 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x02, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "cam_cc_jpeg_clk", + 0x03, + 0x18148D00, + 0x03 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x03, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "cam_cc_jpeg_clk", + 0x03, + 0x0BEBC200, + 0x03 + } + } + } + } + }, + + Package (0x05) + { + "COMPONENT", + One, + Package (0x0B) + { + "FSTATE", + Zero, + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_xo_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_ahb_clk", + One + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "titan_top_gdsc", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_axi_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_soc_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_cpas_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_camnoc_axi_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_jpeg_clk", + One + } + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + Zero, + 0x02 + } + } + }, + + Package (0x0A) + { + "FSTATE", + One, + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_jpeg_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_camnoc_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_cpas_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_soc_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "titan_top_gdsc", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_xo_clk", + 0x02 + } + } + }, + + Package (0x05) + { + "PSTATE_SET", + Zero, + Package (0x03) + { + "PSTATE", + Zero, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "cam_cc_jpeg_clk", + 0x03, + 0x23C34600, + 0x03 + } + } + }, + + Package (0x03) + { + "PSTATE", + One, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "cam_cc_jpeg_clk", + 0x03, + 0x23C34600, + 0x03 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x02, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "cam_cc_jpeg_clk", + 0x03, + 0x0BEBC200, + 0x03 + } + } + } + } + } + }, + + Package (0x05) + { + "DEVICE", + "\\_SB.MPCS", + Package (0x04) + { + "COMPONENT", + Zero, + Package (0x0C) + { + "FSTATE", + Zero, + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_xo_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_ahb_clk", + One + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "titan_top_gdsc", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_axi_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_soc_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_cpas_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_camnoc_axi_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "phy_refgen_south", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "cam_cc_csi0phytimer_clk", + 0x08, + 0x100DA650, + 0x03 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "cam_cc_csiphy0_clk", + 0x08, + 0x16E36000, + 0x03 + } + } + }, + + Package (0x0C) + { + "FSTATE", + One, + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_csiphy0_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_csi0phytimer_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "phy_refgen_south", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_camnoc_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_cpas_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_soc_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "titan_top_gdsc", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_xo_clk", + 0x02 + } + } + } + }, + + Package (0x04) + { + "COMPONENT", + One, + Package (0x0C) + { + "FSTATE", + Zero, + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_xo_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_ahb_clk", + One + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "titan_top_gdsc", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_axi_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_soc_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_cpas_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_camnoc_axi_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "phy_refgen_south", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "cam_cc_csi1phytimer_clk", + 0x08, + 0x100DA650, + 0x03 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "cam_cc_csiphy1_clk", + 0x08, + 0x16E36000, + 0x03 + } + } + }, + + Package (0x0C) + { + "FSTATE", + One, + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_csiphy1_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_csi1phytimer_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "phy_refgen_south", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_camnoc_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_cpas_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_soc_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "titan_top_gdsc", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + 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"cam_cc_cpas_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_camnoc_axi_clk", + One + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "ipe_0_gdsc", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_ipe_0_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_ipe_0_clk", + One + } + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + Zero, + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_ipe_0_areg_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_ipe_0_axi_clk", + One + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "ipe_0_gdsc", + 0x03 + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "ipe_1_gdsc", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_ipe_1_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_ipe_1_clk", + One + } + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + One, + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_ipe_1_areg_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_ipe_1_axi_clk", + One + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "ipe_1_gdsc", + 0x03 + } + } + }, + + Package (0x17) + { + "FSTATE", + One, + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "ipe_1_gdsc", + 0x04 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_ipe_1_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_ipe_1_areg_clk", + 0x02 + } + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + One, + 0x04 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_ipe_1_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_ipe_1_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "ipe_1_gdsc", + 0x02 + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "ipe_0_gdsc", + 0x04 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_ipe_0_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_ipe_0_areg_clk", + 0x02 + } + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + Zero, + 0x04 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_ipe_0_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_ipe_0_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "ipe_0_gdsc", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_camnoc_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_cpas_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_soc_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "titan_top_gdsc", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_xo_clk", + 0x02 + } + } + }, + + Package (0x06) + { + "PSTATE_SET", + Zero, + Package (0x03) + { + "PSTATE", + Zero, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "cam_cc_ipe_0_clk", + 0x03, + 0x23C34600, + 0x03 + } + } + }, + + Package (0x03) + { + "PSTATE", + One, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "cam_cc_ipe_0_clk", + 0x03, + 0x1C9C3800, + 0x03 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x02, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "cam_cc_ipe_0_clk", + 0x03, + 0x18148D00, + 0x03 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x03, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "cam_cc_ipe_0_clk", + 0x03, + Zero, + 0x03 + } + } + } + }, + + Package (0x06) + { + "PSTATE_SET", + One, + Package (0x03) + { + "PSTATE", + Zero, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "cam_cc_ipe_1_clk", + 0x03, + 0x23C34600, + 0x03 + } + } + }, + + Package (0x03) + { + "PSTATE", + One, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "cam_cc_ipe_1_clk", + 0x03, + 0x1C9C3800, + 0x03 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x02, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "cam_cc_ipe_1_clk", + 0x03, + 0x18148D00, + 0x03 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x03, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "cam_cc_ipe_1_clk", + 0x03, + Zero, + 0x03 + } + } + } + } + }, + + Package (0x05) + { + "COMPONENT", + 0x05, + Package (0x10) + { + "FSTATE", + Zero, + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_xo_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_ahb_clk", + One + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "titan_top_gdsc", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_axi_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_soc_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_cpas_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_camnoc_axi_clk", + One + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "bps_gdsc", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_bps_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_bps_clk", + One + } + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + Zero, + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_bps_areg_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_bps_axi_clk", + One + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "bps_gdsc", + 0x03 + } + } + }, + + Package (0x10) + { + "FSTATE", + One, + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "bps_gdsc", + 0x04 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_bps_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_bps_areg_clk", + 0x02 + } + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + Zero, + 0x04 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_bps_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_bps_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "bps_gdsc", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_camnoc_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_cpas_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_soc_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "titan_top_gdsc", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_xo_clk", + 0x02 + } + } + }, + + Package (0x06) + { + "PSTATE_SET", + Zero, + Package (0x03) + { + "PSTATE", + Zero, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "cam_cc_bps_clk", + 0x03, + 0x23C34600, + 0x03 + } + } + }, + + Package (0x03) + { + "PSTATE", + One, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "cam_cc_bps_clk", + 0x03, + 0x1C9C3800, + 0x03 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x02, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "cam_cc_bps_clk", + 0x03, + 0x18148D00, + 0x03 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x03, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "cam_cc_bps_clk", + 0x03, + Zero, + 0x03 + } + } + } + } + }, + + Package (0x05) + { + "COMPONENT", + 0x06, + Package (0x0B) + { + "FSTATE", + Zero, + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_xo_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_ahb_clk", + One + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "titan_top_gdsc", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_axi_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_soc_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_cpas_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_camnoc_axi_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_lrme_clk", + One + } + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + Zero, + 0x02 + } + } + }, + + Package (0x0B) + { + "FSTATE", + One, + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + Zero, + 0x04 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_lrme_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_camnoc_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_cpas_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_soc_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "titan_top_gdsc", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_xo_clk", + 0x02 + } + } + }, + + Package (0x06) + { + "PSTATE_SET", + Zero, + Package (0x03) + { + "PSTATE", + Zero, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "cam_cc_lrme_clk", + 0x03, + 0x17D78400, + 0x03 + } + } + }, + + Package (0x03) + { + "PSTATE", + One, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "cam_cc_lrme_clk", + 0x03, + 0x1312D000, + 0x03 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x02, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "cam_cc_lrme_clk", + 0x03, + 0x10089D40, + 0x03 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x03, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "cam_cc_lrme_clk", + 0x03, + Zero, + 0x03 + } + } + } + } + }, + + Package (0x05) + { + "COMPONENT", + 0x07, + Package (0x0B) + { + "FSTATE", + Zero, + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_xo_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_ahb_clk", + One + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "titan_top_gdsc", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_axi_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_soc_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_cpas_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_camnoc_axi_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_fd_core_clk", + One + } + }, + + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + Zero, + 0x02 + } + } + }, + + Package (0x0B) + { + "FSTATE", + One, + Package (0x02) + { + "PSTATE_ADJUST", + Package (0x02) + { + Zero, + 0x04 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_fd_core_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_camnoc_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_cpas_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "cam_cc_soc_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_axi_clk", + 0x02 + } + }, + + Package (0x02) + { + "FOOTSWITCH", + Package (0x02) + { + "titan_top_gdsc", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_camera_xo_clk", + 0x02 + } + } + }, + + Package (0x06) + { + "PSTATE_SET", + Zero, + Package (0x03) + { + "PSTATE", + Zero, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "cam_cc_fd_core_clk", + 0x03, + 0x23C34600, + 0x03 + } + } + }, + + Package (0x03) + { + "PSTATE", + One, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "cam_cc_fd_core_clk", + 0x03, + 0x20113A80, + 0x03 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x02, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "cam_cc_fd_core_clk", + 0x03, + 0x17D78400, + 0x03 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x03, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "cam_cc_fd_core_clk", + 0x03, + Zero, + 0x03 + } + } + } + } + } + } + }) + } + + // resources needed by touch driver + Scope (\_SB.PEP0) + { +//#if 0 + Method (LPMX, 0, NotSerialized) + { + Return (LPXC) /* \_SB_.PEP0.LPXC */ + } +//#endif + + Name (LPXC, Package (0x01) + { + Package (0x04) + { + "DEVICE", + "\\_SB.TSC1", + Package (0x0B) + { + "DSTATE", + Zero, + // TSC1 Fajita: enable the 2.8V regulator on LDO28_A + Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO28_A", + One, + 2856000, + One, + 0x07, + Zero + } + }, + // Delay 10ms + Package (0x02) + { + "DELAY", + Package (0x01) + { + 10000 + } + }, + // enable the v1p8 GPIO + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 88, + One, + Zero, + One, + Zero, + Zero + } + }, + // enable the 2v8 GPIO + // not actually a thing on fajita + // no 1v8 i2c regulator either + + // sleep 10ms + Package (0x02) + { + "DELAY", + Package (0x01) + { + 10000 + } + }, + + // reset the device + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 99, + One, + Zero, + One, + Zero, + Zero + } + }, + + // sleep 10ms + Package (0x02) + { + "DELAY", + Package (0x01) + { + 10000 + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 99, + Zero, + Zero, + One, + Zero, + Zero + } + }, + + Package (0x02) + { + "DELAY", + Package (0x01) + { + 10000 + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 99, + One, + Zero, + One, + Zero, + Zero + } + }, + }, + + Package (0x04) + { + "DSTATE", + 0x03, + Package (0x02) + { + // set reset low + "TLMMGPIO", + Package (0x06) + { + 99, + Zero, + Zero, + One, + Zero, + Zero + }, + }, + + // set v1p8 low + Package (0x02) + { + // set reset low + "TLMMGPIO", + Package (0x06) + { + 88, + Zero, + Zero, + One, + Zero, + Zero + }, + }, + + // disable the 2.8V regulator + /*Package (0x02) + { + "PMICVREGVOTE", + Package (0x06) + { + "PPP_RESOURCE_ID_LDO28_A", + One, + 2856000, + One, + 0x07, + Zero + } + },*/ + } + } + }) + } + + // Bus Access Modules (BAM) + Device (BAM1) + { + Name (_HID, "QCOM0213") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + Name (_UID, One) // _UID: Unique ID + Name (_CCA, Zero) // _CCA: Cache Coherency Attribute + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + Memory32Fixed (ReadWrite, + 0x01DC4000, // Address Base + 0x00024000, // Address Length + ) + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x00000130, + } + }) + Return (RBUF) /* \_SB_.BAM1._CRS.RBUF */ + } + } + + Device (BAM5) + { + Name (_HID, "QCOM0213") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + Name (_UID, 0x05) // _UID: Unique ID + Name (_CCA, Zero) // _CCA: Cache Coherency Attribute + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + Memory32Fixed (ReadWrite, + 0x17184000, // Address Base + 0x00032000, // Address Length + ) + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x000000C4, + } + }) + Return (RBUF) /* \_SB_.BAM5._CRS.RBUF */ + } + } + + Device (BAM6) + { + Name (_HID, "QCOM0213") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + Name (_UID, 0x06) // _UID: Unique ID + Name (_CCA, Zero) // _CCA: Cache Coherency Attribute + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + Memory32Fixed (ReadWrite, + 0x17204000, // Address Base + 0x00026000, // Address Length + ) + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x00000144, + } + }) + Return (RBUF) /* \_SB_.BAM6._CRS.RBUF */ + } + } + + Device (BAM7) + { + Name (_HID, "QCOM0213") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + Name (_UID, 0x07) // _UID: Unique ID + Name (_CCA, Zero) // _CCA: Cache Coherency Attribute + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + Memory32Fixed (ReadWrite, + 0x08884000, // Address Base + 0x00023000, // Address Length + ) + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x0000009A, + } + }) + Return (RBUF) /* \_SB_.BAM7._CRS.RBUF */ + } + } + + Device (BAMD) + { + Name (_HID, "QCOM0213") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + Name (_UID, 0x0D) // _UID: Unique ID + Name (_CCA, Zero) // _CCA: Cache Coherency Attribute + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + Memory32Fixed (ReadWrite, + 0x0A904000, // Address Base + 0x00017000, // Address Length + ) + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x000000A9, + } + }) + Return (RBUF) /* \_SB_.BAMD._CRS.RBUF */ + } + } + + Device (BAME) + { + Name (_HID, "QCOM0213") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + Name (_UID, 0x0E) // _UID: Unique ID + Name (_CCA, Zero) // _CCA: Cache Coherency Attribute + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + Memory32Fixed (ReadWrite, + 0x06064000, // Address Base + 0x00015000, // Address Length + ) + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x000000C7, + } + }) + Return (RBUF) /* \_SB_.BAME._CRS.RBUF */ + } + } + + Device (BAMF) + { + Name (_HID, "QCOM0213") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + Name (_UID, 0x0F) // _UID: Unique ID + Name (_CCA, Zero) // _CCA: Cache Coherency Attribute + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + Memory32Fixed (ReadWrite, + 0x0A704000, // Address Base + 0x00017000, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x000000A4, + } + }) + Return (RBUF) /* \_SB_.BAMF._CRS.RBUF */ + } + } + + Device (UAR7) + { + Name (_HID, "QCOM0236") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + Name (_UID, 0x07) // _UID: Unique ID + Name (_DEP, Package (0x01) // _DEP: Dependencies + { + \_SB.PEP0 + }) + Name (_CCA, Zero) // _CCA: Cache Coherency Attribute + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + Memory32Fixed (ReadWrite, + 0x00898000, // Address Base + 0x00004000, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x0000027F, + } + GpioInt (Edge, ActiveLow, Exclusive, PullDown, 0x0000, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0030 + } + }) + Return (RBUF) /* \_SB_.UAR7._CRS.RBUF */ + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0B) + } + } + + Device (UARD) + { + Name (_HID, "QCOM0236") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + Name (_UID, 0x0A) // _UID: Unique ID + Name (_DEP, Package (0x01) // _DEP: Dependencies + { + \_SB.PEP0 + }) + Name (_CCA, Zero) // _CCA: Cache Coherency Attribute + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + Memory32Fixed (ReadWrite, + 0x00A84000, // Address Base + 0x00004000, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000182, + } + GpioInt (Edge, ActiveLow, Exclusive, PullDown, 0x0000, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0005 + } + }) + Return (RBUF) /* \_SB_.UARD._CRS.RBUF */ + } + } + + Device (I2C1) + { + Name (_HID, "QCOM0220") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + Name (_UID, One) // _UID: Unique ID + Name (_DEP, Package (0x02) // _DEP: Dependencies + { + \_SB.PEP0, + \_SB.QGP0 + }) + Name (_CCA, Zero) // _CCA: Cache Coherency Attribute + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + Memory32Fixed (ReadWrite, + 0x00880000, // Address Base + 0x00004000, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000279, + } + }) + Return (RBUF) /* \_SB_.I2C1._CRS.RBUF */ + } + } + + Device (I2C3) + { + Name (_HID, "QCOM0220") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + Name (_UID, 0x03) // _UID: Unique ID + Name (_DEP, Package (0x02) // _DEP: Dependencies + { + \_SB.PEP0, + \_SB.QGP0 + }) + Name (_CCA, Zero) // _CCA: Cache Coherency Attribute + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + Memory32Fixed (ReadWrite, + 0x00888000, // Address Base + 0x00004000, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x0000027B, + } + }) + Return (RBUF) /* \_SB_.I2C3._CRS.RBUF */ + } + } + + Device (I2C4) + { + Name (_HID, "QCOM0220") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + Name (_UID, 0x04) // _UID: Unique ID + Name (_DEP, Package (0x01) // _DEP: Dependencies + { + \_SB.PEP0//, + //\_SB.QGP0 + }) + Name (_CCA, Zero) // _CCA: Cache Coherency Attribute + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + Memory32Fixed (ReadWrite, + 0x0088C000, // Address Base + 0x00004000, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x0000027C, + } + }) + Return (RBUF) /* \_SB_.I2C4._CRS.RBUF */ + } + } + + Device (I2C5) + { + Name (_HID, "QCOM0220") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + Name (_UID, 0x05) // _UID: Unique ID + Name (_DEP, Package (0x02) // _DEP: Dependencies + { + \_SB.PEP0, + \_SB.QGP0 + }) + Name (_CCA, Zero) // _CCA: Cache Coherency Attribute + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + Memory32Fixed (ReadWrite, + 0x00890000, // Address Base + 0x00004000, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x0000027D, + } + }) + Return (RBUF) /* \_SB_.I2C5._CRS.RBUF */ + } + } + + Device (I2C8) + { + Name (_HID, "QCOM0220") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + Name (_UID, 0x08) // _UID: Unique ID + Name (_DEP, Package (0x02) // _DEP: Dependencies + { + \_SB.PEP0, + \_SB.QGP0 + }) + Name (_CCA, Zero) // _CCA: Cache Coherency Attribute + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + Memory32Fixed (ReadWrite, + 0x0089C000, // Address Base + 0x00004000, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000280, + } + }) + Return (RBUF) /* \_SB_.I2C8._CRS.RBUF */ + } + } + + Device (IC11) + { + Name (_HID, "QCOM0220") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + Name (_UID, 0x0B) // _UID: Unique ID + Name (_DEP, Package (0x01) // _DEP: Dependencies + { + \_SB.PEP0//, + //\_SB.QGP0 + }) + Name (_CCA, Zero) // _CCA: Cache Coherency Attribute + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + Memory32Fixed (ReadWrite, + 0x00A88000, // Address Base + 0x00004000, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000183, + } + }) + Return (RBUF) /* \_SB_.IC11._CRS.RBUF */ + } + } + + Device (IC12) + { + Name (_HID, "QCOM0220") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + Name (_UID, 0x0C) // _UID: Unique ID + Name (_DEP, Package (0x02) // _DEP: Dependencies + { + \_SB.PEP0, + \_SB.QGP0 + }) + Name (_CCA, Zero) // _CCA: Cache Coherency Attribute + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + Memory32Fixed (ReadWrite, + 0x00A8C000, // Address Base + 0x00004000, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000184, + } + }) + Return (RBUF) /* \_SB_.IC12._CRS.RBUF */ + } + } + + Device (IC13) + { + Name (_HID, "QCOM0220") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + Name (_UID, 0x0D) // _UID: Unique ID + Name (_DEP, Package (0x01) // _DEP: Dependencies + { + \_SB.PEP0 + }) + Name (_CCA, Zero) // _CCA: Cache Coherency Attribute + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + Memory32Fixed (ReadWrite, + 0x00A90000, // Address Base + 0x00004000, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000185, + } + }) + Return (RBUF) /* \_SB_.IC13._CRS.RBUF */ + } + } + + Device (IC15) + { + Name (_HID, "QCOM0220") // _HID: Hardware ID + Name (_UID, 0x0F) // _UID: Unique ID + Name (_DEP, Package (0x02) // _DEP: Dependencies + { + \_SB.PEP0, + \_SB.QGP0 + }) + Name (_CCA, Zero) // _CCA: Cache Coherency Attribute + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + Memory32Fixed (ReadWrite, + 0x00A98000, // Address Base + 0x00004000, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000187, + } + }) + Return (RBUF) /* \_SB_.IC15._CRS.RBUF */ + } + } + + Device (IC16) + { + Name (_HID, "QCOM0220") // _HID: Hardware ID + Name (_UID, 0x10) // _UID: Unique ID + Name (_DEP, Package (0x02) // _DEP: Dependencies + { + \_SB.PEP0, + \_SB.QGP0 + }) + Name (_CCA, Zero) // _CCA: Cache Coherency Attribute + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + Memory32Fixed (ReadWrite, + 0x00A9C000, // Address Base + 0x00004000, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000188, + } + }) + Return (RBUF) /* \_SB_.IC16._CRS.RBUF */ + } + } + + Device (SPI9) + { + Name (_HID, "QCOM021E") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + Name (_UID, 0x09) // _UID: Unique ID + Name (_DEP, Package (0x02) // _DEP: Dependencies + { + \_SB.PEP0, + \_SB.QGP1 + }) + Name (_CCA, Zero) // _CCA: Cache Coherency Attribute + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + Memory32Fixed (ReadWrite, + 0x00A80000, // Address Base + 0x00004000, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000181, + } + }) + Return (RBUF) /* \_SB_.SPI9._CRS.RBUF */ + } + } + + // + // PEP resources for buses + // + Scope (\_SB.PEP0) + { + Method (BSMD, 0, NotSerialized) + { + Return (BSRC) /* \_SB_.PEP0.BSRC */ + } + + Method (PQMD, 0, NotSerialized) + { + If ((\_SB.SIDV < 0x00020000)) + { + Return (DFS1) /* \_SB_.PEP0.DFS1 */ + } + Else + { + Return (DFS2) /* \_SB_.PEP0.DFS2 */ + } + } + + Name (BSRC, Package (0x0C) + { + Package (0x04) + { + "DEVICE", + "\\_SB.UAR7", + Package (0x12) + { + "COMPONENT", + Zero, + Package (0x09) + { + "FSTATE", + Zero, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_BLSP_1", + "ICBID_SLAVE_EBI1", + 0x53724E00, + 0x0682 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_BLSP_1", + 0x08D24D00, + 0x02FAF080 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap_0_m_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap_0_s_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap0_core_2x_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap0_core_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap0_s6_clk", + One + } + } + }, + + Package (0x09) + { + "FSTATE", + One, + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap_0_m_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap_0_s_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap0_s6_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap0_core_2x_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap0_core_clk", + 0x02 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_BLSP_1", + "ICBID_SLAVE_EBI1", + Zero, + Zero + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_BLSP_1", + Zero, + Zero + } + } + }, + + Package (0x06) + { + "PSTATE", + Zero, + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x2D, + Zero, + One, + Zero, + One, + Zero + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x2E, + Zero, + One, + Zero, + Zero, + Zero + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x2F, + Zero, + One, + Zero, + Zero, + Zero + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x30, + Zero, + One, + Zero, + One, + Zero + } + } + }, + + Package (0x06) + { + "PSTATE", + One, + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x2D, + Zero, + One, + Zero, + One, + Zero + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x2E, + Zero, + One, + Zero, + Zero, + Zero + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x2F, + Zero, + One, + Zero, + Zero, + Zero + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x30, + Zero, + One, + Zero, + One, + Zero + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x02, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "gcc_qupv3_wrap0_s6_clk", + 0x03, + 0x00708000, + 0x04 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x03, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "gcc_qupv3_wrap0_s6_clk", + 0x03, + 0x00E10000, + 0x04 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x04, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "gcc_qupv3_wrap0_s6_clk", + 0x03, + 0x01C20000, + 0x04 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x05, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "gcc_qupv3_wrap0_s6_clk", + 0x03, + 0x01E84800, + 0x04 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x06, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "gcc_qupv3_wrap0_s6_clk", + 0x03, + 0x02DC6C00, + 0x04 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x07, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "gcc_qupv3_wrap0_s6_clk", + 0x03, + 0x03D09000, + 0x04 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x08, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "gcc_qupv3_wrap0_s6_clk", + 0x03, + 0x04C4B400, + 0x04 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x09, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "gcc_qupv3_wrap0_s6_clk", + 0x03, + 0x05B8D800, + 0x04 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x0A, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "gcc_qupv3_wrap0_s6_clk", + 0x03, + 0x061A8000, + 0x04 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x0B, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "gcc_qupv3_wrap0_s6_clk", + 0x03, + 0x06ACFC00, + 0x04 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x0C, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "gcc_qupv3_wrap0_s6_clk", + 0x03, + 0x07080000, + 0x04 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x0D, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "gcc_qupv3_wrap0_s6_clk", + 0x03, + 0x07A12000, + 0x04 + } + } + } + }, + + Package (0x04) + { + "COMPONENT", + One, + Package (0x02) + { + "FSTATE", + Zero + }, + + Package (0x02) + { + "FSTATE", + One + } + } + }, + + Package (0x05) + { + "DEVICE", + 0x02, + "\\_SB.UARD", + Package (0x12) + { + "COMPONENT", + Zero, + Package (0x0A) + { + "FSTATE", + Zero, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_BLSP_2", + "ICBID_SLAVE_EBI1", + 0x53724E00, + 0x0682 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_BLSP_2", + 0x08D24D00, + 0x02FAF080 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap_1_m_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap_1_s_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "gcc_qupv3_wrap1_s1_clk", + 0x03, + 0x00708000, + 0x04 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap1_s1_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap1_core_2x_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap1_core_clk", + One + } + } + }, + + Package (0x09) + { + "FSTATE", + One, + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap_1_m_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap_1_s_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap1_s1_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap1_core_2x_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap1_core_clk", + 0x02 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_BLSP_2", + "ICBID_SLAVE_EBI1", + Zero, + Zero + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_BLSP_2", + Zero, + Zero + } + } + }, + + Package (0x04) + { + "PSTATE", + Zero, + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x05, + Zero, + One, + Zero, + One, + Zero + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x04, + Zero, + One, + Zero, + Zero, + Zero + } + } + }, + + Package (0x04) + { + "PSTATE", + One, + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x05, + Zero, + One, + Zero, + One, + Zero + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x04, + Zero, + One, + Zero, + Zero, + Zero + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x02, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "gcc_qupv3_wrap1_s1_clk", + 0x03, + 0x00708000, + 0x04 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x03, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "gcc_qupv3_wrap1_s1_clk", + 0x03, + 0x00E10000, + 0x04 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x04, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "gcc_qupv3_wrap1_s1_clk", + 0x03, + 0x01C20000, + 0x04 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x05, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "gcc_qupv3_wrap1_s1_clk", + 0x03, + 0x01E84800, + 0x04 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x06, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "gcc_qupv3_wrap1_s1_clk", + 0x03, + 0x02DC6C00, + 0x04 + } + } + }, + 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(0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap1_core_2x_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap1_core_clk", + 0x02 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_BLSP_2", + "ICBID_SLAVE_EBI1", + Zero, + Zero + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_BLSP_2", + Zero, + Zero + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x37, + Zero, + Zero, + Zero, + 0x03, + Zero + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x38, + Zero, + Zero, + Zero, + 0x03, + Zero + } + } + } + }, + + Package (0x07) + { + "DEVICE", + "\\_SB.IC12", + Package (0x03) + { + "COMPONENT", + Zero, + Package (0x02) + { + "FSTATE", + Zero + } + }, + + Package (0x0B) + { + "DSTATE", + Zero, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_BLSP_2", + "ICBID_SLAVE_EBI1", + 0x53724E00, + 0x0682 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_BLSP_2", + 0x08D24D00, + 0x02FAF080 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap_1_m_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap_1_s_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "gcc_qupv3_wrap1_s3_clk", + 0x08, + 0x0124F800, + 0x04 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap1_core_2x_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap1_core_clk", + One + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x1F, + One, + One, + One, + 0x03, + Zero + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x20, + One, + One, + One, + 0x03, + Zero + } + } + }, + + Package (0x02) + { + "DSTATE", + One + }, + + Package (0x02) + { + "DSTATE", + 0x02 + }, + + Package (0x0B) + { + "DSTATE", + 0x03, + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap_1_m_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap_1_s_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap1_s3_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap1_core_2x_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap1_core_clk", + 0x02 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_BLSP_2", + "ICBID_SLAVE_EBI1", + Zero, + Zero + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_BLSP_2", + Zero, + Zero + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x1F, + Zero, + Zero, + Zero, + Zero, + Zero + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x20, + Zero, + Zero, + Zero, + Zero, + Zero + } + } + } + }, + + Package (0x07) + { + "DEVICE", + "\\_SB.IC13", + Package (0x03) + { + "COMPONENT", + Zero, + Package (0x02) + { + "FSTATE", + Zero + } + }, + + Package (0x0B) + { + "DSTATE", + Zero, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_BLSP_2", + "ICBID_SLAVE_EBI1", + 0x53724E00, + 0x0682 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_BLSP_2", + 0x08D24D00, + 0x02FAF080 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap_1_m_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap_1_s_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "gcc_qupv3_wrap1_s4_clk", + 0x08, + 0x0124F800, + 0x04 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap1_core_2x_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap1_core_clk", + One + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x31, + One, + One, + One, + 0x03, + Zero + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x32, + One, + One, + One, + 0x03, + Zero + } + } + }, + + Package (0x02) + { + "DSTATE", + One + }, + + Package (0x02) + { + "DSTATE", + 0x02 + }, + + Package (0x0B) + { + "DSTATE", + 0x03, + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap_1_m_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap_1_s_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap1_s4_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap1_core_2x_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap1_core_clk", + 0x02 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_BLSP_2", + "ICBID_SLAVE_EBI1", + Zero, + Zero + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_BLSP_2", + Zero, + Zero + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x31, + Zero, + Zero, + Zero, + 0x03, + Zero + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x32, + Zero, + Zero, + Zero, + 0x03, + Zero + } + } + } + }, + + Package (0x07) + { + "DEVICE", + "\\_SB.IC15", + Package (0x03) + { + "COMPONENT", + Zero, + Package (0x02) + { + "FSTATE", + Zero + } + }, + + Package (0x0B) + { + "DSTATE", + Zero, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_BLSP_2", + "ICBID_SLAVE_EBI1", + 0x53724E00, + 0x0682 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_BLSP_2", + 0x08F0D180, + 0x02FAF080 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap_1_m_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap_1_s_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "gcc_qupv3_wrap1_s6_clk", + 0x08, + 0x0124F800, + 0x04 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap1_core_2x_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap1_core_clk", + One + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x21, + One, + 0x02, + One, + 0x03, + Zero + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x22, + One, + 0x02, + One, + 0x03, + Zero + } + } + }, + + Package (0x02) + { + "DSTATE", + One + }, + + Package (0x02) + { + "DSTATE", + 0x02 + }, + + Package (0x0B) + { + "DSTATE", + 0x03, + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap_1_m_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap_1_s_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap1_s6_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap1_core_2x_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap1_core_clk", + 0x02 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_BLSP_2", + "ICBID_SLAVE_EBI1", + Zero, + Zero + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_BLSP_2", + Zero, + Zero + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x21, + Zero, + Zero, + Zero, + 0x03, + Zero + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x22, + Zero, + Zero, + Zero, + 0x03, + Zero + } + } + } + }, + + Package (0x07) + { + "DEVICE", + "\\_SB.IC16", + Package (0x03) + { + "COMPONENT", + Zero, + Package (0x02) + { + "FSTATE", + Zero + } + }, + + Package (0x0B) + { + "DSTATE", + Zero, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_BLSP_2", + "ICBID_SLAVE_EBI1", + 0x53724E00, + 0x0682 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_BLSP_2", + 0x08D24D00, + 0x02FAF080 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap_1_m_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap_1_s_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "gcc_qupv3_wrap1_s7_clk", + 0x08, + 0x0124F800, + 0x04 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap1_core_2x_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap1_core_clk", + One + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x51, + One, + 0x02, + One, + 0x03, + Zero + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x52, + One, + 0x02, + One, + 0x03, + Zero + } + } + }, + + Package (0x02) + { + "DSTATE", + One + }, + + Package (0x02) + { + "DSTATE", + 0x02 + }, + + Package (0x0B) + { + "DSTATE", + 0x03, + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap_1_m_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap_1_s_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap1_s7_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap1_core_2x_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap1_core_clk", + 0x02 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_BLSP_2", + "ICBID_SLAVE_EBI1", + Zero, + Zero + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_BLSP_2", + Zero, + Zero + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x51, + Zero, + Zero, + Zero, + Zero, + Zero + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x52, + Zero, + Zero, + Zero, + Zero, + Zero + } + } + } + } + }) + Name (DFS1, Package (0x01) + { + Package (0x07) + { + "DEVICE", + "\\_SB.SPI9", + Package (0x0A) + { + "COMPONENT", + Zero, + Package (0x02) + { + "FSTATE", + Zero + }, + + Package (0x03) + { + "PSTATE", + Zero, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "gcc_qupv3_wrap1_s0_clk", + 0x03, + 0x0124F800, + 0x03 + } + } + }, + + Package (0x03) + { + "PSTATE", + One, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "gcc_qupv3_wrap1_s0_clk", + 0x03, + 0x01E84800, + 0x03 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x02, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "gcc_qupv3_wrap1_s0_clk", + 0x03, + 0x0249F000, + 0x03 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x03, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "gcc_qupv3_wrap1_s0_clk", + 0x03, + 0x02DC6C00, + 0x03 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x04, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "gcc_qupv3_wrap1_s0_clk", + 0x03, + 0x03D09000, + 0x03 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x05, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "gcc_qupv3_wrap1_s0_clk", + 0x03, + 0x05B8D800, + 0x03 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x06, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "gcc_qupv3_wrap1_s0_clk", + 0x03, + 0x05F5E100, + 0x03 + } + } + } + }, + + Package (0x0D) + { + "DSTATE", + Zero, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_BLSP_2", + "ICBID_SLAVE_EBI1", + 0x53724E00, + 0x0682 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_BLSP_2", + 0x08D24D00, + 0x02FAF080 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap_1_m_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap_1_s_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap1_s0_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap1_core_2x_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap1_core_clk", + One + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x41, + One, + 0x02, + Zero, + One, + Zero + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x42, + One, + 0x02, + One, + One, + Zero + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x43, + One, + 0x02, + One, + One, + Zero + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x44, + One, + 0x02, + One, + One, + Zero + } + } + }, + + Package (0x02) + { + "DSTATE", + One + }, + + Package (0x02) + { + "DSTATE", + 0x02 + }, + + Package (0x0D) + { + "DSTATE", + 0x03, + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap_1_m_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap_1_s_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap1_s0_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap1_core_2x_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap1_core_clk", + 0x02 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_BLSP_2", + "ICBID_SLAVE_EBI1", + Zero, + Zero + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_BLSP_2", + Zero, + Zero + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x41, + Zero, + 0x02, + Zero, + One, + Zero + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x42, + Zero, + 0x02, + Zero, + One, + Zero + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x43, + Zero, + 0x02, + Zero, + One, + Zero + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x44, + Zero, + 0x02, + Zero, + One, + Zero + } + } + } + } + }) + Name (DFS2, Package (0x01) + { + Package (0x07) + { + "DEVICE", + "\\_SB.SPI9", + Package (0x0A) + { + "COMPONENT", + Zero, + Package (0x02) + { + "FSTATE", + Zero + }, + + Package (0x03) + { + "PSTATE", + Zero, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "gcc_qupv3_wrap1_s0_clk", + 0x03, + 0x0124F800, + 0x03 + } + } + }, + + Package (0x03) + { + "PSTATE", + One, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "gcc_qupv3_wrap1_s0_clk", + 0x03, + 0x01E84800, + 0x03 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x02, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "gcc_qupv3_wrap1_s0_clk", + 0x03, + 0x02DC6C00, + 0x03 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x03, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "gcc_qupv3_wrap1_s0_clk", + 0x03, + 0x03D09000, + 0x03 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x04, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "gcc_qupv3_wrap1_s0_clk", + 0x03, + 0x05B8D800, + 0x03 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x05, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "gcc_qupv3_wrap1_s0_clk", + 0x03, + 0x05F5E100, + 0x03 + } + } + }, + + Package (0x03) + { + "PSTATE", + 0x06, + Package (0x02) + { + "CLOCK", + Package (0x04) + { + "gcc_qupv3_wrap1_s0_clk", + 0x03, + 0x07270E00, + 0x03 + } + } + } + }, + + Package (0x0D) + { + "DSTATE", + Zero, + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_BLSP_2", + "ICBID_SLAVE_EBI1", + 0x53724E00, + 0x0682 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_BLSP_2", + 0x08D24D00, + 0x02FAF080 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap_1_m_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap_1_s_ahb_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap1_s0_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap1_core_2x_clk", + One + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap1_core_clk", + One + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x41, + One, + 0x02, + Zero, + One, + Zero + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x42, + One, + 0x02, + One, + One, + Zero + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x43, + One, + 0x02, + One, + One, + Zero + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x44, + One, + 0x02, + One, + One, + Zero + } + } + }, + + Package (0x02) + { + "DSTATE", + One + }, + + Package (0x02) + { + "DSTATE", + 0x02 + }, + + Package (0x0D) + { + "DSTATE", + 0x03, + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap_1_m_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap_1_s_ahb_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap1_s0_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap1_core_2x_clk", + 0x02 + } + }, + + Package (0x02) + { + "CLOCK", + Package (0x02) + { + "gcc_qupv3_wrap1_core_clk", + 0x02 + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_BLSP_2", + "ICBID_SLAVE_EBI1", + Zero, + Zero + } + }, + + Package (0x02) + { + "BUSARB", + Package (0x05) + { + 0x03, + "ICBID_MASTER_APPSS_PROC", + "ICBID_SLAVE_BLSP_2", + Zero, + Zero + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x41, + Zero, + 0x02, + Zero, + One, + Zero + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x42, + Zero, + 0x02, + Zero, + One, + Zero + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x43, + Zero, + 0x02, + Zero, + One, + Zero + } + }, + + Package (0x02) + { + "TLMMGPIO", + Package (0x06) + { + 0x44, + Zero, + 0x02, + Zero, + One, + Zero + } + } + } + } + }) + } + + // RPE Subsystem Notifier (RPEN) + Device (RPEN) + { + Name (_HID, "QCOM026D") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + } + + // + // Peripheral Image Loader (PIL) Driver + // + Device (PILC) + { + Name (_HID, "QCOM023B") // _HID: Hardware ID + Method (PILX, 0, NotSerialized) + { + Return (PILP) /* \_SB_.PILC.PILP */ + } + + Name (PILP, Package (0x01) + { + // Methods needed for PIL bootup proceedure + // Drive will parse this list and call each + // method accordingly + "OPCA" + }) + Method(ACPO, 0x0, NotSerialized) + { + Name(PKGG, Package(0x1) + { + Package(0x3) + { + // Represents MBA subsystem + Zero, + Zero, + Buffer(0x10) + { + 0x6d, 0x76, 0x58, 0xba, 0xf2, 0xab, 0x02, 0x44, 0x88, 0xd7, 0x90, 0xab, + 0x24, 0x3f, 0x6c, 0x77 + } + } + }) + // Copy ACPI globals for Address for this subsystem into above package for use in driver + Store(RMTB, Index(DerefOf(Index(PKGG, Zero, )), Zero, )) + Store(RMTX, Index(DerefOf(Index(PKGG, Zero, )), One, )) + Return(PKGG) + } +#if 0 + Method (ACPO, 0, NotSerialized) + { + Name (PKGG, Package (0x01) + { + Package (0x03) + { + // Represents MBA subsystem + Zero, + Zero, + ToUUID ("ba58766d-abf2-4402-88d7-90ab243f6c77") + } + }) + // Copy ACPI globals for Address for this subsystem into above package for use in driver + DerefOf (PKGG [Zero]) [Zero] = RMTB /* \_SB_.RMTB */ + DerefOf (PKGG [Zero]) [One] = RMTX /* \_SB_.RMTX */ + Return (PKGG) /* \_SB_.PILC.ACPO.PKGG */ + } +#endif + } + + // + // RPE Crash Dump Injector (CDI) Driver + // + Device (CDI) + { + Name (_DEP, Package (0x02) // _DEP: Dependencies + { + \_SB.PILC, + \_SB.RPEN + }) + Name (_HID, "QCOM026C") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0F) + } + } + + Device (SCSS) + { + Name (_DEP, Package (0x06) // _DEP: Dependencies + { + \_SB.PEP0, + \_SB.PILC, + \_SB.GLNK, + \_SB.IPC0, + \_SB.RPEN, + \_SB.SSDD + }) + //Name (_HID, "QCOM02BE") // _HID: Hardware ID + Name (_HID, "MEOW02BE") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x00000199, + } + }) + Return (RBUF) /* \_SB_.SCSS._CRS.RBUF */ + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0F) + } + } + + + +// comment up to here + + + + // + // ADSP Driver: load ADSP image + // + Device (ADSP) + { + Name (_DEP, Package (0x07) // _DEP: Dependencies + { + \_SB.PEP0, + \_SB.PILC, + \_SB.GLNK, + \_SB.IPC0, + \_SB.RPEN, + \_SB.SSDD, + \_SB.PDSR + }) + Name (_HID, "QCOM023D") // _HID: Hardware ID + //Name (_HID, "MEOW023D") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + // + // WDIR - Watch Dog Interrupt Registers + // + Method (WDIR, 0, NotSerialized) + { + Return (Package (0x04) + { + 0x02, // Interrupt number - 2nd bit in Eleventh register + 0x17A0011C, // APCS_GICD_ISENABLERn (n represents Eleventh register), register used to enable WDOG bite interrupt. + 0x17A0019C, // APCS_GICD_ICENABLERn (n represents Eleventh register), register used to disable WDOG bite interrupt. + 0x17A0021C // APCS_GICD_ICPENDRn (n represents Eleventh register), register used to clear pending WDOG bite interrupt. + }) + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + // Inbound interrupt from LPASS dog bite + // See http://ipcatalog.qualcomm.com/irqs/chip/50/map/110 + // q6ss_wdog_exp_irq = 194 + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x000000C2, + } + }) + Return (RBUF) /* \_SB_.ADSP._CRS.RBUF */ + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0F) + } + + Device (SLM1) + { + Name (_ADR, Zero) // _ADR: Address + Name (_CCA, Zero) // _CCA: Cache Coherency Attribute + Name (_SUB, "C153144D") // _SUB: Subsystem ID + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + // SLIMbus register address space + Memory32Fixed (ReadWrite, + 0x171C0000, // Address Base + 0x0002C000, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x000000C3, + } + }) + Return (RBUF) /* \_SB_.ADSP.SLM1._CRS.RBUF */ + } + + Method (CHLD, 0, NotSerialized) + { + Return (Package (0x01) + { + "SLM1\\QCOM023F" + }) + } + + // ADCM Driver Configurations + Device (ADCM) + { + Name (_SUB, "C153144D") // _SUB: Subsystem ID + // HID values are present in Qualcomm.HID.props under MSBuild\Qualcomm + // Parent of ADCM shall defined this ( Refer mproc.asl or slimbus.asl) + // AMSS in bear family and Slimbus in Badger family makes below entry + // HID_ACD = QCOM242D + // Name (_HID, "HID_ACD") + + // Address object for acpi device enumerated device (ADCM) on parent device bus + // Used to identify multiple child if present + Name (_ADR, Zero) // _ADR: Address + Name (_DEP, Package (0x02) // _DEP: Dependencies + { + \_SB.MMU0, + \_SB.IMM0 + }) + Method (CHLD, 0, NotSerialized) + { + Return (Package (0x01) + { + "ADCM\\SAMM0802" + }) + } + + Device (AUDD) + { + Name (_ADR, Zero) // _ADR: Address + Name (_SUB, "C153144D") // _SUB: Subsystem ID + Name (_DEP, Package (0x01) // _DEP: Dependencies + { + \_SB.SPI9 + }) + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + GpioIo (Exclusive, PullNone, 0x0000, 0x0640, IoRestrictionNone, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0040 + } + GpioInt (Edge, ActiveHigh, Exclusive, PullDown, 0x0000, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0100 + } + SpiSerialBusV2 (0x0000, PolarityLow, FourWireMode, 0x08, + ControllerInitiated, 0x016E3600, ClockPolarityLow, + ClockPhaseFirst, "\\_SB.SPI9", + 0x00, ResourceConsumer, , Exclusive, + RawDataBuffer (0x07) // Vendor Data + { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }) + }) + Return (RBUF) /* \_SB_.ADSP.SLM1.ADCM.AUDD._CRS.RBUF */ + } + + Method (CHLD, 0, NotSerialized) + { + Name (CH, Package (0x02) + { + "AUDD\\SAMM0803", + "AUDD\\SAMM0801" + }) + Return (CH) /* \_SB_.ADSP.SLM1.ADCM.AUDD.CHLD.CH__ */ + } + + // MBHC Driver Configurations + Device (MBHC) + { + Name (_ADR, Zero) // _ADR: Address + Name (_SUB, "C153144D") // _SUB: Subsystem ID + } + + // Miniport Device Configurations + Device (QCRT) + { + // Address object for acpi device enumerated device (QCRT) on parent device bus + // Used to identify multiple child if present + // Since, QCRT is second child of AUDD, we have assigned slot-1 + Name (_ADR, One) // _ADR: Address + Name (_SUB, "C153144D") // _SUB: Subsystem ID + } + } + } + } + + Device (SLM2) + { + Name (_ADR, One) // _ADR: Address + Name (_CCA, Zero) // _CCA: Cache Coherency Attribute + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + Memory32Fixed (ReadWrite, + 0x17240000, // Address Base + 0x0002C000, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000143, + } + }) + Return (RBUF) /* \_SB_.ADSP.SLM2._CRS.RBUF */ + } + } + } + + // + // AMSS Driver: Used for loading the modem binaries + // + Device (AMSS) + { + Name (_CCA, Zero) // _CCA: Cache Coherency Attribute + Name (_DEP, Package (0x09) // _DEP: Dependencies + { + \_SB.PEP0, + \_SB.IPA, + \_SB.GLNK, + \_SB.IPC0, + \_SB.PILC, + \_SB.RFS0, + \_SB.RPEN, + \_SB.SSDD, + \_SB.PDSR + }) + Name (_HID, "QCOM023E") // _HID: Hardware ID + Name (WLEN, One) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0F) + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + // Inbound interrupt from Q6SW dog bite: + // q6ss_wdog_exp_irq = 298 + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x0000012A, + } + }) + Return (RBUF) /* \_SB_.AMSS._CRS.RBUF */ + } + + // + // WDIR - Watch Dog Interrupt Registers + // + Method (WDIR, 0, NotSerialized) + { + Return (Package (0x04) + { + Zero, + 0x17A0013C, + 0x17A001BC, + 0x17A002BC + }) + } + + Device (QWLN) + { + Name (_ADR, Zero) // _ADR: Address + Name (_DEP, Package (0x02) // _DEP: Dependencies + { + \_SB.PEP0, + \_SB.MMU0 + }) + Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake + { + Zero, + Zero + }) // wakeable from S0 + Name (_S0W, 0x02) // S0 should put device in D2 for wake + Name (_S4W, 0x02) // all other Sx (just in case) should also wake from D2 + Name (_PRR, Package (One) // _PRR: Power Resource for Reset + { + \_SB.AMSS.QWLN.WRST + }) // Power resource reference for device reset and recovery. + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + Memory32Fixed (ReadWrite, + 0x18800000, // Address Base + 0x00800000, // Address Length + ) + Memory32Fixed (ReadWrite, + 0x0C250000, // Address Base + 0x00000010, // Address Length + ) + Memory32Fixed (ReadWrite, + 0x8DF00000, // Address Base // fajita + 0x00100000, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x000001BE, + } + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x000001BF, + } + Interrupt (ResourceConsumer, Level, ActiveHigh, ExclusiveAndWake, ,, ) + { + 0x000001C0, + } + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x000001C1, + } + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x000001C2, + } + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x000001C3, + } + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x000001C4, + } + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x000001C5, + } + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x000001C6, + } + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x000001C7, + } + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x000001C8, + } + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x000001C9, + } + }) + Return (RBUF) /* \_SB_.AMSS.QWLN._CRS.RBUF */ + } + + Method (WMSA, 0, NotSerialized) + { + Return (Package (0x01) + { + 0x00100000 + }) + } + + OperationRegion (WOPR, 0x80, Zero, 0x10) + Field (WOPR, DWordAcc, NoLock, Preserve) + { + Offset (0x04), + WTRG, 32 + } + + PowerResource (WRST, 0x05, 0x0000) + { + Method (_ON, 0, NotSerialized) // _ON_: Power On + { + } + + Method (_OFF, 0, NotSerialized) // _OFF: Power Off + { + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0F) + } + + Method (_RST, 0, NotSerialized) // _RST: Device Reset + { + WTRG = 0xABCD + } + } + } + + Scope (\_SB) + { + Device (COEX) + { + Name (_HID, "QCOM0295") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + } + + Device (WSAR) + { + Name (_HID, "SAM0609") // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + Name (_SUB, "C153144D") // _SUB: Subsystem ID + Name (_DEP, Package (0x01) // _DEP: Dependencies + { + \_SB.AMSS.QWLN + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0F) + } + } + } + } + + // + // QMI Service manager + // + Device (QSM) + { + Name (_HID, "QCOM02B9") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + Name (_DEP, Package (0x04) // _DEP: Dependencies + { + \_SB.GLNK, + \_SB.IPC0, + \_SB.PILC, + \_SB.RPEN + }) + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + Memory32Fixed (ReadWrite, + 0x98F00000, // Address Base + 0x00600000, // Address Length + ) + }) + Return (RBUF) /* \_SB_.QSM_._CRS.RBUF */ + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0F) + } + } + + // + // Subsys Dummy Device + // Subsys devices that use QCCI should have an dependency on this + // + Device (SSDD) + { + Name (_HID, "QCOM02D1") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + Name (_DEP, Package (0x02) // _DEP: Dependencies + { + \_SB.GLNK, + \_SB.TFTP + }) + } + + Device (PDSR) + { + Name (_HID, "QCOM02CE") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + Name (_DEP, Package (0x03) // _DEP: Dependencies + { + \_SB.PEP0, + \_SB.GLNK, + \_SB.IPC0 + }) + } + + Device (CDSP) + { + Name (_DEP, Package (0x07) // _DEP: Dependencies + { + \_SB.PEP0, + \_SB.PILC, + \_SB.GLNK, + \_SB.IPC0, + \_SB.RPEN, + \_SB.SSDD, + \_SB.PDSR + }) + Name (_HID, "QCOM02F7") // _HID: Hardware ID + //Name (_HID, "MEOW02F7") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x00000262, + } + }) + Return (RBUF) /* \_SB_.CDSP._CRS.RBUF */ + } + } + + Device (TFTP) + { + Name (_HID, "QCOM02F6") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + Name (_DEP, Package (One) // _DEP: Dependencies + { + \_SB.IPC0 + }) + } + + Scope (\_SB.PILC) + { + Method (_SUB, 0, NotSerialized) // _SUB: Subsystem ID + { + If ((\_SB.SOID == 0x0155)) + { + Return ("CLSA0850") + } + Else + { + Return (\_SB.PSUB) + } + } + } + + Scope (\_SB.AMSS) + { + Method (_SUB, 0, NotSerialized) // _SUB: Subsystem ID + { + If ((\_SB.SOID == 0x0155)) + { + Return ("CLSA0850") + } + Else + { + Return (\_SB.PSUB) + } + } + } + + Device (LLC) + { + Name (_DEP, Package (One) // _DEP: Dependencies + { + \_SB.PEP0 + }) + Name (_HID, "QCOM02F8") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (ResourceTemplate () + { + Memory32Fixed (ReadWrite, + 0x01300000, // Address Base + 0x00028000, // Address Length + ) + }) + } + } + + Device (MMU0) + { + Name (_HID, "QCOM0212") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + Name (_UID, Zero) // _UID: Unique ID + Name (_DEP, Package (0x01) // _DEP: Dependencies + { + \_SB.MMU1 + }) + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (ResourceTemplate () + { + Memory32Fixed (ReadWrite, + 0x15000000, // Address Base + 0x0007FFB8, // Address Length + ) + Memory32Fixed (ReadWrite, + 0x01F46000, // Address Base + 0x00000004, // Address Length + ) + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x00000080, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x00000081, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x00000082, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x00000083, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x00000084, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x00000085, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x00000086, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x00000087, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x00000088, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x00000089, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x0000008A, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x0000008B, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x0000008C, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x0000008D, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x0000008E, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x0000008F, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x00000090, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x00000091, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x00000092, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x00000093, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x00000094, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x00000095, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x00000096, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x000000D5, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x000000D6, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x000000D7, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x000000D8, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x000000D9, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x000000DA, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x000000DB, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x000000DC, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x000000DD, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x000000DE, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x000000DF, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x000000E0, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x0000015B, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x0000015C, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x0000015D, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x0000015E, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x0000015F, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x00000160, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x00000161, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x00000162, + } + }) + } + } + + Device (MMU1) + { + Name (_HID, "QCOM0212") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + Name (_UID, One) // _UID: Unique ID + Name (_DEP, Package (0x01) // _DEP: Dependencies + { + \_SB.PEP0 + }) + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (ResourceTemplate () + { + Memory32Fixed (ReadWrite, + 0x05040000, // Address Base + 0x00010000, // Address Length + ) + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x0000018C, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x0000018D, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x0000018E, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x0000018F, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x00000190, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x00000191, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x00000192, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x00000193, + } + }) + } + } + + Device (IMM0) + { + Name (_HID, "QCOM030B") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + Name (_UID, Zero) // _UID: Unique ID + } + + Device (IMM1) + { + Name (_HID, "QCOM030B") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + Name (_UID, One) // _UID: Unique ID + } + +//#if 0 + Device (GPU0) + { + Name (_HID, "QCOM027E") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + Name (_CID, "ACPIQCOM027E") // _CID: Compatible ID + Name (_UID, Zero) // _UID: Unique ID + Name (_HRV, 0x7C) // _HRV: Hardware Revision + // Expose the internal monitor device to allow it to be used in a thermal zone + // for thermal mitigation. + // + Device (MON0) + { + Method (_ADR, 0, NotSerialized) // _ADR: Address + { + Return (Zero) + } + } + + Name (_DEP, Package (0x0A) // _DEP: Dependencies + { + \_SB.MMU0, + \_SB.MMU1, + \_SB.IMM0, + \_SB.IMM1, + \_SB.PEP0, + \_SB.PMIC, + \_SB.PILC, + \_SB.RPEN, + \_SB.TREE, + \_SB.SCM0 + }) + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + Memory32Fixed (ReadWrite, + 0x0AE00000, // Address Base + 0x00140000, // Address Length + ) + Memory32Fixed (ReadWrite, + 0x088E0000, // Address Base + 0x000F4000, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000073, + } + Memory32Fixed (ReadWrite, + 0x05000000, // Address Base + 0x0003F010, // Address Length + ) + Memory32Fixed (ReadWrite, + 0x05060000, // Address Base + 0x0003F000, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x0000014C, + } + Memory32Fixed (ReadWrite, + 0x0B280000, // Address Base + 0x0000FFFF, // Address Length + ) + Memory32Fixed (ReadWrite, + 0x0B480000, // Address Base + 0x00010000, // Address Length + ) + Memory32Fixed (ReadWrite, + 0x05090000, // Address Base + 0x00009000, // Address Length + ) + Memory32Fixed (ReadWrite, + 0x0C200000, // Address Base + 0x0000FFFF, // Address Length + ) + Memory32Fixed (ReadWrite, + 0x0AA00000, // Address Base + 0x00200000, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x000000CE, + } + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x000000CF, + } + // TLMM GPIO used to reset the DSI panel + // + GpioIo (Shared, PullUp, 0x0000, 0x0000, IoRestrictionNone, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0060 + } + }) + Return (RBUF) /* \_SB_.GPU0._CRS.RBUF */ + } + + //------------------------------------------------------------------------------ + // Resource Auxiliary Info + // This method is a companion method to the main _CRS resource method. It + // includes information for each resource, such as the owning component, a + // string identifier, etc. + //------------------------------------------------------------------------------ + // + Method (RESI, 0, NotSerialized) + { + Name (RINF, Package (0x10) + { + 0x03, // Table Format Major Version + Zero, // Table Format Minor Version + Package (0x03) + { + "RESOURCE", + "MDP_REGS", // Resource Name + "DISPLAY" // Owning Component + }, + + Package (0x03) + { + "RESOURCE", + "DP_PHY_REGS", + "DISPLAY" + }, + + Package (0x03) + { + "RESOURCE", + "VSYNC_INTERRUPT", + "DISPLAY" + }, + + Package (0x03) + { + "RESOURCE", + "GFX_REGS", + "GRAPHICS" + }, + + Package (0x03) + { + "RESOURCE", + "GFX_REG_CONT", + "GRAPHICS" + }, + + Package (0x03) + { + "RESOURCE", + "GFX_INTERRUPT", + "GRAPHICS" + }, + + Package (0x03) + { + "RESOURCE", + "GPU_PDC_SEQ_MEM", + "GRAPHICS" + }, + + Package (0x03) + { + "RESOURCE", + "GPU_PDC_REGS", + "GRAPHICS" + }, + + Package (0x03) + { + "RESOURCE", + "GPU_CC", + "GRAPHICS" + }, + + Package (0x03) + { + "RESOURCE", + "GPU_RPMH_CPRF", + "GRAPHICS" + }, + + Package (0x03) + { + "RESOURCE", + "VIDEO_REGS", + "VIDEO" + }, + + Package (0x03) + { + "RESOURCE", + "VIDC_INTERRUPT", + "VIDEO" + }, + + Package (0x03) + { + "RESOURCE", + "VIDC_WD_INTERRUPT", + "VIDEO" + }, + + // TLMM GPIO used to reset the DSI panel + // + Package (0x03) + { + "RESOURCE", + "DSI_PANEL_RESET", + "DISPLAY" + } + }) + Return (RINF) /* \_SB_.GPU0.RESI.RINF */ + } + + //------------------------------------------------------------------------------ + // Graphics Engines and Display Config + // This method encapsulates all per-platform configuration data for engines and + // the display. This method consists of three sub-packages. The first package + // encapsulates all configuration information for the supported engines. The + // second package encapsulates all display configuration data. The third + // package is the list of all page tables used by the SMMUs in the engines and + // display. + //------------------------------------------------------------------------------ + // + Method (ENGS, 0, NotSerialized) + { + Name (EBUF, Package (0x06) + { + 0x03, // Table Format Major Version + 0x02, // Table Format Minor Version + 0x003B0014, // XML Common/Platform Source File Revision + + //------------------------------------------------------------------------------ + // Graphics Engine List + // This package enumerates all of the expected engines that should be enumerated + // on this platform, as well as engine-specific configuration data. This + // includes resource assignments, power component assignments, MMU IDs, + // and even chip family information. + //------------------------------------------------------------------------------ + // + Package (0x08) + { + "ENGINES", + 0x06, // Number of engines + Package (0x0A) + { + "ENGINE", + "GRAPHICS", // Engine String Identifier + "Adreno6X", // Chip Family Identifier + One, // Index of Primary Power Component + 0x02, // P-State Set Index of Footswitch override + Zero, // P-State Set Index of Reset + Package (0x0B) + { + "MMUINFO", + "Miniport", // SMMU managed by miniport or engine + "ArmSmmuV2", // SMMU Family + 0x02, // Number of SMMU stages + 0x31, // Address bits + "V8L", // Address format + "SMMUID", + ToUUID ("9833c712-3292-4ffb-b0f4-2bd20e1f7f66"), + "SMMUINTERFACEID", + Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ + }, + + Package (0x0E) + { + "PAGETABLEUSAGE", + 0x04, // Number of page tables + "GraphicsGlobalPT", + Zero, + 0x03030000, + "GraphicsPerProcessPT", + Zero, + 0x03030000, + "GraphicsSecurePT", + One, + 0x030A0000, + "GraphicsGmuPT", + 0x03, + 0x03030002 + } + }, + + Package (0x04) + { + "PERF_CONTROLS", + Package (0x01) + { + One + }, + + Package (0x02) + { + 0x03, + Package (0x02) + { + "LimitForPassiveCooling", + One + } + }, + + Package (0x02) + { + 0x04, + Package (0x02) + { + "LimitForPassiveCooling", + One + } + } + }, + + Package (0x02) + { + "THERMAL_DOMAINS", + "GPU" + }, + + Package (0x05) + { + "PROPERTIES", + 0x03, + Package (0x02) + { + "GmemBaseAddr", + Zero + }, + + Package (0x02) + { + "GmemSize", + 0x00100000 + }, + + Package (0x02) + { + "SMMUCount", + One + } + } + }, + + Package (0x09) + { + "ENGINE", + "MDPBLT", // Engine String Identifier + "MDP5.x", // Chip Family Identifier + 0x02, // Index of Primary Power Component + One, // P-State Set Index of Footswitch override + Zero, // P-State Set Index of Reset + Package (0x02) + { + "SHAREDSMMU", + "ROTATOR" + }, + + Package (0x03) + { + "PERF_CONTROLS", + Package (0x02) + { + 0x02, + Package (0x02) + { + "LimitForPassiveCooling", + One + } + }, + + Package (0x02) + { + 0x03, + Package (0x02) + { + "LimitForPassiveCooling", + One + } + } + }, + + Package (0x02) + { + "THERMAL_DOMAINS", + "GPU" + } + }, + + Package (0x09) + { + "ENGINE", + "ROTATOR", + "MDP5.x", + 0x03, + One, + Zero, + Package (0x0B) + { + "MMUINFO", + "Miniport", + "ArmSmmuV2", + 0x02, + 0x20, + "V7S", + "SMMUID", + ToUUID ("36079ae4-78e8-452d-af50-0cff78b2f1ca"), + "SMMUINTERFACEID", + Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ + }, + + Package (0x04) + { + "PAGETABLEUSAGE", + 0x02, + "MdpNonSecurePT", + "MdpSecurePT" + } + }, + + Package (0x03) + { + "PERF_CONTROLS", + Package (0x02) + { + 0x02, + Package (0x02) + { + "LimitForPassiveCooling", + One + } + }, + + Package (0x02) + { + 0x03, + Package (0x02) + { + "LimitForPassiveCooling", + One + } + } + }, + + Package (0x02) + { + "THERMAL_DOMAINS", + "GPU" + } + }, + + Package (0x0A) + { + "ENGINE", + "VIDEO", + "Venus", + 0x04, + One, + Zero, + Package (0x0B) + { + "MMUINFO", + "Engine", + "ArmSmmuV2", + 0x02, + 0x20, + "V7S", + "SMMUID", + ToUUID ("665e0f8e-add3-49d1-91bc-5540c5f57fba"), + "SMMUINTERFACEID", + ToUUID ("1c3fc0e8-0b11-4ee0-be89-3e21420a865f"), + Package (0x07) + { + "PAGETABLEUSAGE", + 0x05, + "VideoNonSecurePT", + "VideoSecurePT1", + "VideoSecurePT2", + "VideoSecurePT3", + "VideoSecurePT4" + } + }, + + Package (0x03) + { + "PERF_CONTROLS", + Package (0x01) + { + 0x02 + }, + + Package (0x01) + { + 0x03 + } + }, + + Package (0x01) + { + "THERMAL_DOMAINS" + }, + + Package (0x03) + { + "PROPERTIES", + One, + Package (0x02) + { + "DecMaxFps", + 0x3C + } + } + }, + + Package (0x09) + { + "ENGINE", + "CRYPTO", + "Crypto1.0", + 0x05, + One, + Zero, + Package (0x0B) + { + "MMUINFO", + "Miniport", + "ArmSmmuV2", + 0x02, + 0x20, + "V7S", + "SMMUID", + ToUUID ("36079ae4-78e8-452d-af50-0cff78b2f1ca"), + "SMMUINTERFACEID", + Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ + }, + + Package (0x04) + { + "PAGETABLEUSAGE", + 0x02, + "CryptoNonSecurePT", + "CryptoSecurePT" + } + }, + + Package (0x02) + { + "PERF_CONTROLS", + Package (0x01) + { + 0x02 + } + }, + + Package (0x01) + { + "THERMAL_DOMAINS" + } + }, + + Package (0x08) + { + "ENGINE", + "VIDEO_ENCODER", + "Venus", + 0x06, + One, + Zero, + Package (0x03) + { + "PERF_CONTROLS", + Package (0x01) + { + 0x02 + }, + + Package (0x01) + { + 0x03 + } + }, + + Package (0x01) + { + "THERMAL_DOMAINS" + } + } + }, + + //------------------------------------------------------------------------------ + // Display Info Package + // This package enumerates all resources assigned to the display. Additionally, + // this routine includes any display configuration data, such as hotplug + // support. + //------------------------------------------------------------------------------ + // + Package (0x08) + { + "DISPLAYS", + "MDP5.x", // Chip Family Identifier + 0x03, // Number of displays + Package (0x07) + { + "DISPLAY", + "INTERNAL1", // Display Name + Zero, // Index of Display Power Component + One, // P-State Set Index of Footswitch override + Zero, // P-State Set Index of reset + Package (0x04) + { + "PERF_CONTROLS", + Package (0x01) + { + 0x02 + }, + + Package (0x01) + { + 0x03 + }, + + Package (0x01) + { + 0x04 + } + }, + + Package (0x01) + { + "THERMAL_DOMAINS" + } + }, + + Package (0x07) + { + "DISPLAY", + "INTERNAL2", + 0x07, + One, + Zero, + Package (0x04) + { + "PERF_CONTROLS", + Package (0x01) + { + 0x02 + }, + + Package (0x01) + { + 0x03 + }, + + Package (0x01) + { + 0x04 + } + }, + + Package (0x01) + { + "THERMAL_DOMAINS" + } + }, + + Package (0x07) + { + "DISPLAY", + "EXTERNAL1", + 0x08, + One, + Zero, + Package (0x03) + { + "PERF_CONTROLS", + Package (0x01) + { + 0x02 + }, + + Package (0x01) + { + 0x03 + } + }, + + Package (0x01) + { + "THERMAL_DOMAINS" + } + }, + + Package (0x02) + { + "RESOURCES", + Package (0x0B) + { + "MMUINFO", + "Miniport", + "ArmSmmuV2", + 0x02, + 0x20, + "V7S", + "SMMUID", + ToUUID ("36079ae4-78e8-452d-af50-0cff78b2f1ca"), + "SMMUINTERFACEID", + Buffer (0x10) + { + /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ + }, + + Package (0x04) + { + "PAGETABLEUSAGE", + 0x02, + "MdpNonSecurePT", + "MdpSecurePT" + } + } + }, + + Package (0x0F) + { + "PRIMARY_SOURCE_MODES", + 0x0D, + Package (0x02) + { + 0x0280, + 0x01E0 + }, + + Package (0x02) + { + 0x0320, + 0x0258 + }, + + Package (0x02) + { + 0x0500, + 0x02D0 + }, + + Package (0x02) + { + 0x0400, + 0x0300 + }, + + Package (0x02) + { + 0x0480, + 0x0300 + }, + + Package (0x02) + { + 0x0500, + 0x0300 + }, + + Package (0x02) + { + 0x0550, + 0x0300 + }, + + Package (0x02) + { + 0x0556, + 0x0300 + }, + + Package (0x02) + { + 0x0640, + 0x0384 + }, + + Package (0x02) + { + 0x0500, + 0x0400 + }, + + Package (0x02) + { + 0x0780, + 0x0438 + }, + + Package (0x02) + { + 0x0780, + 0x04B0 + }, + + Package (0x02) + { + 0x0780, + 0x0500 + } + } + }, + + //------------------------------------------------------------------------------ + // Page Table List + // This package enumerates all of the page tables used by any of the displays + // and engines. Page tables defined here may be referenced by one or more engine + // or display. + //------------------------------------------------------------------------------ + // + Package (0x0F) + { + "PAGETABLES", + 0x0D, // Number of page tables + Package (0x07) + { + "GraphicsGlobalPT", // Name + One, // Global + Zero, // Secure + One, // HighTTBR + One, // HiddenFromOS + 0x0000008000000000, // VaStart + 0x0000000800000000 // VaSizeBytes + }, + + Package (0x07) + { + "GraphicsPerProcessPT", + Zero, + Zero, + Zero, + Zero, + 0x00400000, + 0x0000007FFFC00000 + }, + + Package (0x07) + { + "GraphicsSecurePT", + Zero, + One, + Zero, + One, + 0x0000008800000000, + 0xC0000000 + }, + + Package (0x07) + { + "GraphicsGmuPT", + Zero, + Zero, + Zero, + Zero, + 0x60000000, + 0x20000000 + }, + + Package (0x07) + { + "MdpNonSecurePT", + Zero, + Zero, + Zero, + Zero, + 0x80100000, + 0x7FF00000 + }, + + Package (0x07) + { + "MdpSecurePT", + Zero, + One, + Zero, + One, + 0x80000000, + 0x80000000 + }, + + Package (0x09) + { + "VideoNonSecurePT", // Name + Zero, // Global + Zero, // Secure + Zero, // HighTTBR + One, // HiddenFromOS + 0x00100000, // VaStart + 0xBFF00000, // VaSizeBytes + 0x1B, // VideoBufferMask + Zero // VideoCBIndex + }, + + Package (0x09) + { + "VideoSecurePT1", + Zero, + One, + Zero, + One, + 0xC0000000, + 0x10000000, + 0x09, + One + }, + + Package (0x09) + { + "VideoSecurePT2", + Zero, + One, + Zero, + One, + 0xD0000000, + 0x10000000, + 0x07, + 0x02 + }, + + Package (0x09) + { + "VideoSecurePT3", + Zero, + One, + Zero, + One, + 0xE0000000, + 0x10000000, + 0x02, + 0x03 + }, + + Package (0x09) + { + "VideoSecurePT4", + Zero, + One, + Zero, + One, + 0xF0000000, + 0x10000000, + 0x2A, + 0x04 + }, + + Package (0x07) + { + "CryptoNonSecurePT", + Zero, + Zero, + Zero, + Zero, + 0x00100000, + 0x7FF00000 + }, + + Package (0x07) + { + "CryptoSecurePT", + Zero, + One, + Zero, + One, + 0x80000000, + 0x80000000 + } + } + }) + Return (EBUF) /* \_SB_.GPU0.ENGS.EBUF */ + } + + //------------------------------------------------------------------------------ + // Graphics Thermal Management Details + //------------------------------------------------------------------------------ + // + Method (TMDT, 0, NotSerialized) + { + Name (RBUF, Package (0x03) + { + One, // Table Format Major Version + Zero, // Table Format Minor Version + Package (0x03) + { + "THERMAL_DOMAINS", + One, // Num Thermal Domains + Package (0x03) + { + "GPU", + "GPU0", + Package (0x03) + { + "GRAPHICS", + "MDPBLT", + "ROTATOR" + } + } + } + }) + Return (RBUF) /* \_SB_.GPU0.TMDT.RBUF */ + } + + //------------------------------------------------------------------------------ + // Graphics PEP Component List + // This method is a companion method to the graphics entries inside PEP's DCFG + // method. It includes the same components, generated from a single XML source, + // with any additional information required to be passed to dxgkrnl. + //------------------------------------------------------------------------------ + // + Method (PMCL, 0, NotSerialized) + { + Name (RBUF, Package (0x0D) + { + 0x03, // Table Format Major Version + One, // Table Format Minor Version + 0x0A, // Number of power components + + //---------------------------------------------------------------------------------- + // C0 - Internal Display Power States + //---------------------------------------------------------------------------------- + // + Package (0x0F) + { + "COMPONENT", + Zero, + ToUUID ("2c135991-4391-4633-90b1-fa96f2e2cc04"), + "PRIMDISPLAY_POWER_STATES", + "HW_BLOCK_MDP", + Package (0x02) + { + "DISPLAY", + "INTERNAL1" + }, + + 0x02, + 0x05, + Package (0x06) + { + "FSTATE", + Zero, + "ALL_ON", + Zero, + Zero, + 0x02 + }, + + Package (0x06) + { + "FSTATE", + One, + "PWR_OFF", + One, + One, + One + }, + + //---------------------------------------------------------------------------------- + // C0.PS0 - Internal Display: MDP Reset Control + //---------------------------------------------------------------------------------- + // + Package (0x0A) + { + "PSTATE_SET", + Zero, + "INTERNAL1_RESET", + "*", + "RESET", + 0x02, + Zero, + Zero, + Package (0x04) + { + "PSTATE", + Zero, + One, + 0x02 + }, + + Package (0x04) + { + "PSTATE", + One, + Zero, + 0x02 + } + }, + + //---------------------------------------------------------------------------------- + // C0.PS1 - Internal Display: MDP Footswitch override + //---------------------------------------------------------------------------------- + // + Package (0x0A) + { + "PSTATE_SET", + One, + "INTERNAL1_FOOTSWITCH_OVERRIDE", + "*", + "FOOTSWITCH_OVERRIDE", + 0x02, + 0xFFFFFFFF, + Zero, + Package (0x04) + { + "PSTATE", + Zero, + One, + 0x02 + }, + + Package (0x04) + { + "PSTATE", + One, + Zero, + 0x02 + } + }, + + //---------------------------------------------------------------------------------- + // C0.PS2 - Internal Display: Power states for MDP scan-out HW + //---------------------------------------------------------------------------------- + // + Package (0x0D) + { + "PSTATE_SET", + 0x02, + "INTERNAL1_SCAN_CONTROL", + "*", + "DISPLAY_SOURCE_SCAN_CTRL", + 0x05, + Zero, + Zero, + Package (0x04) + { + "PSTATE", + Zero, + 0x04, + 0x02 + }, + + Package (0x04) + { + "PSTATE", + One, + 0x03, + 0x02 + }, + + Package (0x04) + { + "PSTATE", + 0x02, + 0x02, + 0x02 + }, + + Package (0x04) + { + "PSTATE", + 0x03, + One, + 0x02 + }, + + Package (0x04) + { + "PSTATE", + 0x04, + Zero, + 0x02 + } + }, + + //---------------------------------------------------------------------------------- + // C0.PS3 - Internal Display: MDP Core Clock Frequency + //---------------------------------------------------------------------------------- + // + Package (0x15) + { + "PSTATE_SET", + 0x03, + "INTERNAL1_CORE_CLOCK_CONTROL", + "*", + "CORE_CLOCK", + 0x0D, + 0x04, + Zero, + Package (0x04) + { + "PSTATE", + Zero, + 0x19A14780, + One + }, + + Package (0x04) + { + "PSTATE", + One, + 0x18964020, + One + }, + + Package (0x04) + { + "PSTATE", + 0x02, + 0x14810600, + 0x02 + }, + + Package (0x04) + { + "PSTATE", + 0x03, + 0x11E1A300, + 0x02 + }, + + Package (0x04) + { + "PSTATE", + 0x04, + 0x10642AC0, + 0x02 + }, + + Package (0x04) + { + "PSTATE", + 0x05, + 0x0BEBC200, + 0x02 + }, + + Package (0x04) + { + "PSTATE", + 0x06, + 0x0A37CADB, + 0x03 + }, + + Package (0x04) + { + "PSTATE", + 0x07, + 0x09D5B340, + 0x03 + }, + + Package (0x04) + { + "PSTATE", + 0x08, + 0x08F0D180, + 0x03 + }, + + Package (0x04) + { + "PSTATE", + 0x09, + 0x05F5E100, + 0x03 + }, + + Package (0x04) + { + "PSTATE", + 0x0A, + 0x051BD4B0, + 0x03 + }, + + Package (0x04) + { + "PSTATE", + 0x0B, + 0x0124F800, + 0x03 + }, + + Package (0x04) + { + "PSTATE", + 0x0C, + Zero, + 0x03 + } + }, + + //---------------------------------------------------------------------------------- + // C0.PS4 - Internal Display: Display Bandwidth to EBI + //---------------------------------------------------------------------------------- + // + Package (0x33) + { + "PSTATE_SET", + 0x04, + "INTERNAL1_EBI_BANDWIDTH", + "*", + "BANDWIDTH", + 0x2B, + 0x1F, + Zero, + Package (0x04) + { + "PSTATE", + Zero, + 0x000000031A4A9F80, + Zero + }, + + Package (0x04) + { + "PSTATE", + One, + 0x0000000302731B80, + Zero + }, + + Package (0x04) + { + "PSTATE", + 0x02, + 0x00000002EA9B9780, + Zero + }, + + Package (0x04) + { + "PSTATE", + 0x03, + 0x00000002D2C41380, + Zero + }, + + Package (0x04) + { + "PSTATE", + 0x04, + 0x00000002BAEC8F80, + Zero + }, + + Package (0x04) + { + "PSTATE", + 0x05, + 0x00000002A3150B80, + Zero + }, + + Package (0x04) + { + "PSTATE", + 0x06, + 0x000000028B3D8780, + Zero + }, + + Package (0x04) + { + "PSTATE", + 0x07, + 0x0000000273660380, + Zero + }, + + Package (0x04) + { + "PSTATE", + 0x08, + 0x000000025B8E7F80, + One + }, + + Package (0x04) + { + "PSTATE", + 0x09, + 0x000000023C346000, + One + }, + + Package (0x04) + { + "PSTATE", + 0x0A, + 0x00000002245CDC00, + One + }, + + Package (0x04) + { + "PSTATE", + 0x0B, + 0x000000020C855800, + One + }, + + Package (0x04) + { + "PSTATE", + 0x0C, + 0x00000001F4ADD400, + One + }, + + Package (0x04) + { + "PSTATE", + 0x0D, + 0x00000001DCD65000, + One + }, + + Package (0x04) + { + "PSTATE", + 0x0E, + 0x00000001C4FECC00, + One + }, + + Package (0x04) + { + "PSTATE", + 0x0F, + 0x00000001AD274800, + One + }, + + Package (0x04) + { + "PSTATE", + 0x10, + 0x00000001954FC400, + One + }, + + Package (0x04) + { + "PSTATE", + 0x11, + 0x000000017D784000, + One + }, + + Package (0x04) + { + "PSTATE", + 0x12, + 0x0000000165A0BC00, + One + }, + + Package (0x04) + { + "PSTATE", + 0x13, + 0x000000014DC93800, + One + }, + + Package (0x04) + { + "PSTATE", + 0x14, + 0x0000000135F1B400, + 0x02 + }, + + Package (0x04) + { + "PSTATE", + 0x15, + 0x000000011E1A3000, + 0x02 + }, + + Package (0x04) + { + "PSTATE", + 0x16, + 0x000000010642AC00, + 0x02 + }, + + Package (0x04) + { + "PSTATE", + 0x17, + 0xEE6B2800, + 0x02 + }, + + Package (0x04) + { + "PSTATE", + 0x18, + 0xD693A400, + 0x02 + }, + + Package (0x04) + { + "PSTATE", + 0x19, + 0xBEBC2000, + 0x02 + }, + + Package (0x04) + { + "PSTATE", + 0x1A, + 0xA6E49C00, + 0x02 + }, + + Package (0x04) + { + "PSTATE", + 0x1B, + 0x8F0D1800, + 0x02 + }, + + Package (0x04) + { + "PSTATE", + 0x1C, + 0x77359400, + 0x02 + }, + + Package (0x04) + { + "PSTATE", + 0x1D, + 0x5F5E1000, + 0x02 + }, + + Package (0x04) + { + "PSTATE", + 0x1E, + 0x59682F00, + 0x02 + }, + + Package (0x04) + { + "PSTATE", + 0x1F, + 0x53724E00, + 0x02 + }, + + Package (0x04) + { + "PSTATE", + 0x20, + 0x4D7C6D00, + 0x02 + }, + + Package (0x04) + { + "PSTATE", + 0x21, + 0x47868C00, + 0x02 + }, + + Package (0x04) + { + "PSTATE", + 0x22, + 0x4190AB00, + 0x02 + }, + + Package (0x04) + { + "PSTATE", + 0x23, + 0x3B9ACA00, + 0x02 + }, + + Package (0x04) + { + "PSTATE", + 0x24, + 0x35A4E900, + 0x02 + }, + + Package (0x04) + { + "PSTATE", + 0x25, + 0x2FAF0800, + 0x02 + }, + + Package (0x04) + { + "PSTATE", + 0x26, + 0x29B92700, + 0x02 + }, + + Package (0x04) + { + "PSTATE", + 0x27, + 0x23C34600, + 0x02 + }, + + Package (0x04) + { + "PSTATE", + 0x28, + 0x1DCD6500, + 0x02 + }, + + Package (0x04) + { + "PSTATE", + 0x29, + 0x17D78400, + 0x02 + }, + + Package (0x04) + { + "PSTATE", + 0x2A, + Zero, + 0x02 + } + } + }, + + //---------------------------------------------------------------------------------- + // C1 - 3D Graphics Engine Power States + //---------------------------------------------------------------------------------- + // + Package (0x10) + { + "COMPONENT", + One, + ToUUID ("30bdf1b5-28f7-4c0c-ac47-273dd1401e11"), + "GRAPHICS_POWER_STATES", + "HW_BLOCK_GRAPHICS", + Package (0x02) + { + "ENGINE", + "GRAPHICS" + }, + + 0x03, + 0x05, + Package (0x06) + { + "FSTATE", + Zero, + "ALL_ON", + Zero, + Zero, + 0x03 + }, + + Package (0x06) + { + "FSTATE", + One, + "PWR_OFF", + 0x2710, + 0x0A, + 0x02 + }, + + Package (0x06) + { + "FSTATE", + 0x02, + "PWR_OFF", + 0x2711, + 0x0A, + One + }, + + //---------------------------------------------------------------------------------- + // C1.PS0 - 3D Graphics Core P-State Set: Reset + //---------------------------------------------------------------------------------- + // + Package (0x0A) + { + "PSTATE_SET", + Zero, + "GRAPHICS_RESET", + "*", + "RESET", + 0x02, + Zero, + Zero, + Package (0x04) + { + "PSTATE", + Zero, + One, + 0x02 + }, + + Package (0x04) + { + "PSTATE", + One, + Zero, + 0x02 + } + }, + + Package (0x0B) + { + "PSTATE_SET", + One, + "CX_HS_MGMT", + "*", + "INTERNAL", + 0x03, + Zero, + Zero, + Package (0x04) + { + "PSTATE", + Zero, + 0x02, + 0x02 + }, + + Package (0x04) + { + "PSTATE", + One, + One, + 0x02 + }, + + Package (0x04) + { + "PSTATE", + 0x02, + Zero, + 0x02 + } + }, + + Package (0x0A) + { + "PSTATE_SET", + 0x02, + "GRAPHICS_FOOTSWITCH_OVERRIDE", + "*", + "FOOTSWITCH_OVERRIDE", + 0x02, + One, + Zero, + Package (0x04) + { + "PSTATE", + Zero, + One, + 0x02 + }, + + Package (0x04) + { + "PSTATE", + One, + Zero, + 0x02 + } + }, + + Package (0x02) + { + "ENGINE_PSTATE_SET", + 0x03 + }, + + Package (0x16) + { + "ENGINE_PSTATE_SET", + 0x04, + "GRAPHICS_BW_CONTROL", + "BANDWIDTH", + 0x0D, + Zero, + "TRUE", + 0x04, + 0x03, + Package (0x05) + { + "PSTATE", + Zero, + 0x00000001AE1B6C00, + 0x0180, + Package (0x02) + { + "GPU", + 0x64 + } + }, + + Package (0x05) + { + "PSTATE", + One, + 0x0000000172BDAB00, + 0x0100, + Package (0x02) + { + "GPU", + 0x56 + } + }, + + Package (0x05) + { + "PSTATE", + 0x02, + 0x0000000134FD9000, + 0x0100, + Package (0x02) + { + "GPU", + 0x48 + } + }, + + Package (0x05) + { + "PSTATE", + 0x03, + 0xF278C100, + 0xC0, + Package (0x02) + { + "GPU", + 0x38 + } + }, + + Package (0x05) + { + "PSTATE", + 0x04, + 0xB71B0000, + 0x80, + Package (0x02) + { + "GPU", + 0x2A + } + }, + + Package (0x05) + { + "PSTATE", + 0x05, + 0xA25CF100, + 0x80, + Package (0x02) + { + "GPU", + 0x26 + } + }, + + Package (0x05) + { + "PSTATE", + 0x06, + 0x826A3B00, + 0x80, + Package (0x02) + { + "GPU", + 0x1E + } + }, + + Package (0x05) + { + "PSTATE", + 0x07, + 0x623A7C00, + 0x40, + Package (0x02) + { + "GPU", + 0x17 + } + }, + + Package (0x05) + { + "PSTATE", + 0x08, + 0x47868C00, + 0x30, + Package (0x02) + { + "GPU", + 0x11 + } + }, + + Package (0x05) + { + "PSTATE", + 0x09, + 0x2FAF0800, + 0x30, + Package (0x02) + { + "GPU", + 0x0B + } + }, + + Package (0x05) + { + "PSTATE", + 0x0A, + 0x23C34600, + 0x30, + Package (0x02) + { + "GPU", + 0x08 + } + }, + + Package (0x05) + { + "PSTATE", + 0x0B, + 0x17D78400, + 0x30, + Package (0x02) + { + "GPU", + Zero + } + }, + + Package (0x05) + { + "PSTATE", + 0x0C, + Zero, + Zero, + Package (0x02) + { + "GPU", + Zero + } + } + } + }, + + Package (0x0F) + { + "COMPONENT", + 0x02, + ToUUID ("07ca2add-df87-49e1-8583-08687dc81c8e"), + "MDPBLT_POWER_STATES", + "HW_BLOCK_MDP", + Package (0x02) + { + "ENGINE", + "MDPBLT" + }, + + 0x03, + 0x04, + Package (0x06) + { + "FSTATE", + Zero, + "ALL_ON", + Zero, + Zero, + 0x03 + }, + + Package (0x06) + { + "FSTATE", + One, + "CLK_OFF", + 0x2710, + Zero, + 0x02 + }, + + Package (0x06) + { + "FSTATE", + 0x02, + "PWR_OFF", + 0x000186A0, + Zero, + One + }, + + Package (0x0A) + { + "PSTATE_SET", + Zero, + "MDPBLT_RESET", + "*", + "RESET", + 0x02, + Zero, + Zero, + Package (0x04) + { + "PSTATE", + Zero, + One, + 0x02 + }, + + Package (0x04) + { + "PSTATE", + One, + Zero, + 0x02 + } + }, + + Package (0x0A) + { + "PSTATE_SET", + One, + "MDPBLT_FOOTSWITCH_OVERRIDE", + "*", + "FOOTSWITCH_OVERRIDE", + 0x02, + 0xFFFFFFFF, + Zero, + Package (0x04) + { + "PSTATE", + Zero, + One, + 0x02 + }, + + Package (0x04) + { + "PSTATE", + One, + Zero, + 0x02 + } + }, + + Package (0x15) + { + "PSTATE_SET", + 0x02, + "MDPBLT_CORE_CLOCK_CONTROL", + "*", + "CORE_CLOCK", + 0x0D, + 0x08, + Zero, + Package (0x05) + { + "PSTATE", + Zero, + 0x19A14780, + One, + Package (0x02) + { + "GPU", + 0x64 + } + }, + + Package (0x05) + { + "PSTATE", + One, + 0x18964020, + One, + Package (0x02) + { + "GPU", + 0x64 + } + }, + + Package (0x05) + { + "PSTATE", + 0x02, + 0x14810600, + 0x02, + Package (0x02) + { + "GPU", + 0x42 + } + }, + + Package (0x05) + { + "PSTATE", + 0x03, + 0x11E1A300, + 0x02, + Package (0x02) + { + "GPU", + 0x42 + } + }, + + Package (0x05) + { + "PSTATE", + 0x04, + 0x10642AC0, + 0x02, + Package (0x02) + { + "GPU", + 0x42 + } + }, + + Package (0x05) + { + "PSTATE", + 0x05, + 0x0BEBC200, + 0x02, + Package (0x02) + { + "GPU", + 0x42 + } + }, + + Package (0x05) + { + "PSTATE", + 0x06, + 0x0A37CADB, + 0x03, + Package (0x02) + { + "GPU", + 0x21 + } + }, + + Package (0x05) + { + "PSTATE", + 0x07, + 0x09D5B340, + 0x03, + Package (0x02) + { + "GPU", + 0x21 + } + }, + + Package (0x05) + { + "PSTATE", + 0x08, + 0x08F0D180, + 0x03, + Package (0x02) + { + "GPU", + 0x21 + } + }, + + Package (0x05) + { + "PSTATE", + 0x09, + 0x05F5E100, + 0x03, + Package (0x02) + { + "GPU", + 0x21 + } + }, + + Package (0x05) + { + "PSTATE", + 0x0A, + 0x051BD4B0, + 0x03, + Package (0x02) + { + "GPU", + Zero + } + }, + + Package (0x05) + { + "PSTATE", + 0x0B, + 0x0124F800, + 0x03, + Package (0x02) + { + "GPU", + Zero + } + }, + + Package (0x05) + { + "PSTATE", + 0x0C, + Zero, + 0x03, + Package (0x02) + { + "GPU", + Zero + } + } + }, + + Package (0x3A) + { + "PSTATE_SET", + 0x03, + "MDPBLT_AXI_BANDWIDTH_CONTROL", + "*", + "BANDWIDTH", + 0x32, + 0xFFFFFFFF, + Zero, + Package (0x05) + { + "PSTATE", + Zero, + 0x000000031A4A9F80, + Zero, + Package (0x02) + { + "GPU", + 0x64 + } + }, + + Package (0x05) + { + "PSTATE", + One, + 0x0000000302731B80, + Zero, + Package (0x02) + { + "GPU", + 0x64 + } + }, + + Package (0x05) + { + "PSTATE", + 0x02, + 0x00000002EA9B9780, + Zero, + Package (0x02) + { + "GPU", + 0x64 + } + }, + + Package (0x05) + { + "PSTATE", + 0x03, + 0x00000002D2C41380, + Zero, + Package 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0x02, + Package (0x02) + { + "GPU", + 0x51 + }, + + Package (0x01) + { + 0x0140 + } + }, + + Package (0x06) + { + "PSTATE", + 0x03, + 0x1EFE9200, + 0x03, + Package (0x02) + { + "GPU", + 0x47 + }, + + Package (0x01) + { + 0x0100 + } + }, + + Package (0x06) + { + "PSTATE", + 0x04, + 0x18AD2380, + 0x04, + Package (0x02) + { + "GPU", + 0x38 + }, + + Package (0x01) + { + 0xC0 + } + }, + + Package (0x06) + { + "PSTATE", + 0x05, + 0x14628180, + 0x05, + Package (0x02) + { + "GPU", + 0x2F + }, + + Package (0x01) + { + 0x80 + } + }, + + Package (0x06) + { + "PSTATE", + 0x06, + 0x0EB8EBC0, + 0x06, + Package (0x02) + { + "GPU", + 0x23 + }, + + Package (0x01) + { + 0x40 + } + }, + + Package (0x06) + { + "PSTATE", + 0x07, + 0x0ABA9500, + 0x07, + Package (0x02) + { + "GPU", + Zero + }, + + Package (0x01) + { + 0x30 + } + }, + + Package (0x06) + { + "PSTATE", + 0x08, + Zero, + 0x08, + Package (0x02) + { + "GPU", + Zero + }, + + Package (0x01) + { + Zero + } + } + }) + Name (P002, Package (0x0B) + { + "ENGINE_PSTATE_SET", + 0x03, + "GRAPHICS_FREQ_CONTROL", + "CORE_CLOCK", + 0x02, + One, + "TRUE", + Zero, + Zero, + Package (0x06) + { + "PSTATE", + Zero, + 0x10B07600, + Zero, + Package (0x02) + { + "GPU", + Zero + }, + + Package (0x01) + { + 0x80 + } + }, + + Package (0x06) + { + "PSTATE", + One, + Zero, + One, + Package (0x02) + { + "GPU", + Zero + }, + + Package (0x01) + { + Zero + } + } + }) + If ((\_SB.SIDV >= 0x00020000)) + { + DerefOf (RBUF [0x04]) [0x0E] = P001 /* \_SB_.GPU0.PMCL.P001 */ + } + Else + { + DerefOf (RBUF [0x04]) [0x0E] = P002 /* \_SB_.GPU0.PMCL.P002 */ + } + + Return (RBUF) /* \_SB_.GPU0.PMCL.RBUF */ + } + + // panel specific ROM data + Method (_ROM, 3, NotSerialized) // _ROM: Read-Only Memory + { + /*Name (PCFG, Buffer (2488) + { + 0x3C, 0x3F, 0x78, 0x6D, 0x6C, 0x20, 0x76, 0x65, 0x72, 0x73, 0x69, 0x6F, 0x6E, 0x3D, 0x22, 0x31, + 0x2E, 0x30, 0x22, 0x20, 0x65, 0x6E, 0x63, 0x6F, 0x64, 0x69, 0x6E, 0x67, 0x3D, 0x22, 0x75, 0x74, + 0x66, 0x2D, 0x38, 0x22, 0x3F, 0x3E, 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(Local2))) + { + Local1 = (SizeOf (Local2) - Local0) + } + + CreateField (Local2, (0x08 * Local0), (0x08 * Local1), RBUF) + Return (RBUF) /* \_SB_.GPU0._ROM.RBUF */ + } + + // + // IGC method - panel inverse gamma correction table. + // + // The buffer contains inverse gamma correction data for 3 color components, each with 256 16-bit integers. + // The buffer size is 3*256*2 = 1536 bytes. + // each table entry is represend by a 16-bit integer and data format in the buffer is described below: + // + // +--- 16 bits ---+--- 16 bits ---+--- 16 bits ---+---------+--- 16 bits ---+ 0 + // | Red[0] | Red[1] | Red[2] | ... | Red[255] | + // +---------------+---------------+---------------+---------+---------------+ 512 + // | Green[0] | Green[1] | Green[2] | ... | Green[255] | + // +---------------+---------------+---------------+---------+---------------+ 1024 + // | Blue[0] | Blue[1] | Blue[2] | ... | Blue[255] | + // +---------------+---------------+---------------+---------+---------------+ 1536 + // + Method (PIGC, 2, NotSerialized) + { + Name (RBUF, Buffer (One) + { + 0x00 // . + }) + Return (RBUF) /* \_SB_.GPU0.PIGC.RBUF */ + } + + // + // PCC method - panel color correction matrix + // + // Buffer format for HW which support 3X8 color correction matrix. + // + // The buffer contains color correction coefficients for 3 color components, each with 11 64-bit integers. + // The buffer size is 3*11*8 = 264 bytes. + // each coefficient in the matrix is represented by a long long integer (64-bit), and data format in the + // buffer is described below: + // + // +--64 bits--+--64 bits--+--------+--64 bits--+--64 bits--+--64 bits--+--64 bits--+ 0 + // | Red[0] | Red[1] | ... | Red[7] | 0 | 0 | 0 | + // +-----------+-----------+--------+-----------+-----------+-----------+-----------+ 88 + // | Green[0] | Green[1] | ... | Green[7] | 0 | 0 | 0 | + // +-----------+-----------+--------+-----------+-----------+-----------+-----------+ 176 + // | Blue[0] | Blue[1] | ... | Blue[7] | 0 | 0 | 0 | + // +-----------+-----------+--------+-----------+-----------+-----------+-----------+ 264 + // + // Buffer format for HW which support 3X11 color correction matrix. + // + // The buffer contains color correction coefficients for 3 color components, each with 11 64-bit integers. + // The buffer size is 3*11*8 = 264 bytes. + // each coefficient in the matrix is represented by a long long integer (64-bit), and data format in the + // buffer is described below: + // + // +--- 64 bits ---+--- 64 bits ---+--- 64 bits ---+-----------+--- 64 bits ---+ 0 + // | Red[0] | Red[1] | Red[2] | ... | Red[10] | + // +---------------+---------------+---------------+-----------+---------------+ 88 + // | Green[0] | Green[1] | Green[2] | ... | Green[10] | + // +---------------+---------------+---------------+-----------+---------------+ 176 + // | Blue[0] | Blue[1] | Blue[2] | ... | Blue[10] | + // +---------------+---------------+---------------+-----------+---------------+ 264 + // + Method (PPCC, 2, NotSerialized) + { + Name (RBUF, Buffer (One) + { + 0x00 // . + }) + Return (RBUF) /* \_SB_.GPU0.PPCC.RBUF */ + } + + // + // PGC method - panel segment gamma correction table + // + // there're thee components and each with 16 gamma correction segments. Each segment is defined + // as below with parameters, and each parameter is represented by a 32-bit integer (DWORD): + // + // +--4 bytes--+--4 bytes--+--4 bytes--+--4 bytes--+ + // | enable | start | gain | offset | one gamma correction segment(16 bytes) + // +-----------+-----------+-----------+-----------+ + // + // +--- 16 bytes ---+--- 16 bytes ---+--- 16 bytes ---+-----------+--- 16 bytes ---+ 0 + // | red_seg[0] | red_seg[1] | red_seg[2] | ... | red_seg[15] | + // +----------------+----------------+----------------+-----------+----------------+ 256 + // | green_seg[0] | green_seg[1] | green_seg[2] | ... | green_seg[15] | + // +----------------+----------------+----------------+-----------+----------------+ 512 + // | blue_seg[0] | blue_seg[1] | blue_seg[2] | ... | blue_seg[15] | + // +----------------+----------------+----------------+-----------+----------------+ 768 + // + Method (PGCT, 2, NotSerialized) + { + Name (RBUF, Buffer (One) + { + 0x00 // . + }) + Return (RBUF) /* \_SB_.GPU0.PGCT.RBUF */ + } + + // + // PLGC method - panel linear gamma correction table + // + // There are three color components, each color component has 1024 entries. each entry is 2 bytes. + // + // +--- 2 bytes ---+--- 2 bytes ---+--- 2 bytes ---+-----------+--- 2 bytes ---+ 0 + // | red[0] | red[1] | red[2] | ... | red[1023] | + // +---------------+---------------+---------------+-----------+---------------+ 2048 + // | green[0] | green[1] | green[2] | ... | green[1023] | + // +---------------+---------------+---------------+-----------+---------------+ 4096 + // | blue[0] | blue[1] | blue[2] | ... | blue[1023] | + // +---------------+---------------+---------------+-----------+---------------+ 6144 + // + Method (PLGC, 3, NotSerialized) + { + Name (TBUF, Buffer (One) + { + 0x00 // . + }) + If ((Arg1 >= SizeOf (TBUF))) + { + Return (Buffer (One) + { + 0x00 // . + }) + } + Else + { + Local1 = Arg1 + } + + If ((Arg2 > 0x1000)) + { + Local2 = 0x1000 + } + Else + { + Local2 = Arg2 + } + + If (((Local1 + Local2) > SizeOf (TBUF))) + { + Local2 = (SizeOf (TBUF) - Local1) + } + + CreateField (TBUF, (0x08 * Local1), (0x08 * Local2), RBUF) + Return (RBUF) /* \_SB_.GPU0.PLGC.RBUF */ + } + + // + // HSIC method - HSIC settings + // + // Hue, Saturation, Intensity, Contrast levels, the first parameter enable/disable HSIC control, + // followed by HSIC level values, each level ranges from -100 to 100, represented by a 32-bit integer: + // + // +--4 bytes--+--4 bytes--+--4 bytes--+--4 bytes--+--4 bytes--++ + // | Enable | Hue | Saturation| Intensity | Contrast | + // +-----------+-----------+-----------+-----------+-----------++ + // + // + Method (HSIC, 2, NotSerialized) + { + Name (RBUF, Buffer (One) + { + 0x00 // . + }) + Return (RBUF) /* \_SB_.GPU0.HSIC.RBUF */ + } + + // + // PGMT - panel gamut mapping table for HW which support 9x9x9 gamut mapping: + // + // This method returns the gamut mapping table for a panel. + // + // There are three components. Each component has 8 tables and a total of 729 entries. + // Each value is represented by a 16-bit integer: + // + // Table ID Entries + // 0 125 + // 1 100 + // 2 80 + // 3 100 + // 4 100 + // 5 80 + // 6 64 + // 7 80 + // + // +----- 16 bits -----+----- 16 bits ------+----- 16 bits -----+-----------+----- 16 bits -------+ + // | red_comp[0][0] | red_comp[0][1] | red_comp[0][2] | ... | red_comp[7][79] | + // +-------------------+--------------------+-------------------+---------------------------------+ + // | green_comp[0][0] | green_comp[0][1] | green_comp[0][2] | ... | green_comp[7][79] | + // +-------------------+--------------------+-------------------+---------------------------------+ + // | blue_comp[0][0] | blue_comp[0][1] | blue_comp[0][2] | ... | blue_comp[7][79] | + // +-------------------+--------------------+-------------------+---------------------------------+ + // + Method (PGMT, 2, NotSerialized) + { + Name (TBUF, Buffer (One) + { + 0x00 // . + }) + If ((Arg0 >= SizeOf (TBUF))) + { + Return (Buffer (One) + { + 0x00 // . + }) + } + Else + { + Local0 = Arg0 + } + + If ((Arg1 > 0x1000)) + { + Local1 = 0x1000 + } + Else + { + Local1 = Arg1 + } + + If (((Local0 + Local1) > SizeOf (TBUF))) + { + Local1 = (SizeOf (TBUF) - Local0) + } + + CreateField (TBUF, (0x08 * Local0), (0x08 * Local1), RBUF) + Return (RBUF) /* \_SB_.GPU0.PGMT.RBUF */ + } + + // + // PWGM - panel gamut mapping data for HW which support 17x17x17 gamut mapping + // + // This data's header which has two fields: + // NumSamplesPerColorComponent: Number samples per color component in gamut mapping table. + // NumSegmentsPerColor : Number of segments per color component. + // NumSegmentsPerColor must equal 0 or NumSamplesPerColorComponent -1. + // + // This data also can have two tables, one is 3d table, one is segment table. + // Segment table is only required if NumSegmentsPerColor != 0. + // + // 3d table: There are three components. If number samples per component is N = NumSamplesPerColorComponent, + // total entries are NxNxN per component. Each value is represented by a 16-bit integer: + // Segment table: There are three components, table entries are uNumSegmentsPerColor per component, + // each entry is 32 bit value. + // + // Table data header: + // +--------- 32 bits ----------+------- 32 bits -----+ + // | NumSamplesPerColorComponent| NumSegmentsPerColor | + // +----------------------------+---------------------+ 8 bytes + // + // 3d table: + // +---- 16 bits ----+---- 16 bits ----+---- 16 bits ----+-------------+------- 16 bits -----------+ 8 + // | red_comp[0] | red_comp[1] | red_comp[2] | ... | red_comp[N x N x N - 1 ] | + // +-----------------+-----------------+-----------------+-------------+---------------------------+ NxNxNx2 + 8 + // | green_comp[0] | green_comp[1] | green_comp[2] | ... | green_comp[N x N x N - 1] | + // +-----------------+-----------------+-----------------+-------------+---------------------------+ 2xNxNxNx2 + 8 + // | blue_comp[0] | blue_comp[1] | blue_comp[2] | ... | blue_comp[N x N x N - 1] | + // +-----------------+-----------------+-----------------+-------------+---------------------------+ 3xNxNxNx2 + 8 + // + // Segment table: ( if NumSegmentsPerColor = 0, there is no segment table). + // +----- 32 bits ------+----- 32 bits ------+------ 32 bits -----+-------------+-------- 32 bits -------+ 3xNxNxNx2 + 8 + // | sg_red_comp[[0] | sg_red_comp[1] | sg_red_comp[2] | ... | sg_red_comp[N-2] | + // +--------------------+--------------------+--------------------+-------------+------------------------+ (N-1)x4 + 3xNxNxNx2 + 8 + // | sg_green_comp[0] | sg_ green_comp[1] | sg_ green_comp[2] | ... | sg_green_comp[N-2] | + // +--------------------+--------------------+--------------------+-------------+------------------------+ 2x(N-1)x4 + 3xNxNxNx2 + 8 + // | sg_ blue_comp[0] | sg_ blue_comp[1] | sg_ blue_comp[2] | ... | sg_ blue_comp[N-2] | + // +--------------------+--------------------+------------------- +-------------+------------------------+ 3x(N-1)x4 + 3xNxNxNx2 + 8 + // + // Maximum size = 3 x(17 - 1) x 4 + 3 x 17 x 17 x 17 x 2 + 8 = 29678 bytes. + // + Method (PWGM, 2, NotSerialized) + { + Name (TBUF, Buffer (One) + { + 0x00 // . + }) + If ((Arg0 >= SizeOf (TBUF))) + { + Return (Buffer (One) + { + 0x00 // . + }) + } + Else + { + Local0 = Arg0 + } + + If ((Arg1 > 0x1000)) + { + Local1 = 0x1000 + } + Else + { + Local1 = Arg1 + } + + If (((Local0 + Local1) > SizeOf (TBUF))) + { + Local1 = (SizeOf (TBUF) - Local0) + } + + CreateField (TBUF, (0x08 * Local0), (0x08 * Local1), RBUF) + Return (RBUF) /* \_SB_.GPU0.PWGM.RBUF */ + } + + // + // PGRT - panel gamma response table + // + // This method returns the Gamma response table for a panel. + // The table is given in 2 arrays, one representing the x axis or grayscale and other + // representing the y axis or luminance. + // + // The table is given in a 256 entries array, where the first entry value represents + // the luminance (Y) achieved when displaying black on the screen (shade value is 0 + // for all R, G and B) and the last entry represents the luminance (Y) achieved when + // displaying white on the screen (shade value is 255 for all R, G and B). + // + // The array must be 256 entries. + // + // The range of each entry must be from 0 to 0xffff + // + // Values are least significant byte first. E.g. {0x01, 0x00} represents 0x1 and + // {0x02, 0x01} represents 0x0102 + // + // +--- 2 bytes ---+--- 2 bytes ---+--- 2 bytes ---+-----------+--- 2 bytes ---+ + // | Y[0] | Y[1] | Y[2] | ... | Y[255] | + // +---------------+---------------+---------------+-----------+---------------+ + Method (PGRT, 2, NotSerialized) + { + Name (RBUF, Buffer (One) + { + 0x00 // . + }) + Return (RBUF) /* \_SB_.GPU0.PGRT.RBUF */ + } + + // + // PBRT - panel backlight response table + // + // This method returns the Backlight response table for a panel. + // The table is given in a 256 entries array, where the first entry value represents + // the backlight level (BL) to achieve 0 luminance and the last entry represents + // the highest backlight level to achieve the maximum desired luminance. + // In other words, this array serves as a map from luminance to backlight levels, + // where the index is the desired luminance level and the value (or output) is + // the backlight level to be sent to the hardware (backlight controller). + // + // The array must be 256 entries. + // + // The range of each entry must be from 0 to 0xffff + // + // Values are least significant byte first. E.g. {0x01, 0x00} represents 0x1 and + // {0x02, 0x01} represents 0x0102 + // + // +--- 2 bytes ---+--- 2 bytes ---+--- 2 bytes ---+-----------+--- 2 bytes ---+ + // | BL[0] | BL[1] | BL[2] | ... | BL[255] | + // +---------------+---------------+---------------+-----------+---------------+ + Method (PBRT, 2, NotSerialized) + { + Name (RBUF, Buffer (One) + { + 0x00 // . + }) + Return (RBUF) /* \_SB_.GPU0.PBRT.RBUF */ + } + + Method (PBRC, 2, NotSerialized) + { + Name (RBUF, Buffer (0x02) + { + 0x00, 0x00 // .. + }) + Return (RBUF) /* \_SB_.GPU0.PBRC.RBUF */ + } + + // + // DITH method - Dithering settings + // + // Dithering matrix could have following two formats: + // + // Format 1: + // +--1 byte--------+--1 byte--------+--1 byte--------+--1 byte--------+ + // | Element[0,0] | Element[0,1] | Element[0,2] | Element[0,3] | + // | Element[1,0] | Element[1,1] | Element[1,2] | Element[1,3] | + // | Element[2,0] | Element[2,1] | Element[2,2] | Element[2,3] | + // | Element[3,0] | Element[3,1] | Element[3,2] | Element[3,3] | + // | Bit Depth C0 | Bit Depth C1 | Bit Depth C2 | Reserved(0x0) | + // +----------------+----------------+----------------+----------------+ + // | Dithering mode (4 bytes) (0: not supported, 1:Spatial, 2:Temporal)| + // +----------------+----------------+----------------+----------------+ + // + // There is dithering mode in Format 1. + // + // Format 2: + // + // +--1 byte--------+--1 byte--------+--1 byte--------+--1 byte--------++ + // | Element[0,0] | Element[0,1] | Element[0,2] | Element[0,3] | + // | Element[1,0] | Element[1,1] | Element[1,2] | Element[1,3] | + // | Element[2,0] | Element[2,1] | Element[2,2] | Element[2,3] | + // | Element[3,0] | Element[3,1] | Element[3,2] | Element[3,3] | + // | Bit Depth C2 | Bit Depth C1 | Bit Depth C0 | Reserved(0x0) | + // +----------------+----------------+----------------+----------------+ + // + // There is no dithering mode in Format 2. Default dither mode: spatial. + // + Method (DITH, 2, NotSerialized) + { + Name (RBUF, Buffer (One) + { + 0x00 // . + }) + Return (RBUF) /* \_SB_.GPU0.DITH.RBUF */ + } + + /// + // BLCP Method - Backlight control packet method, returns a + // command buffer for a specific backlight level + // + // Input Parameters + // Backlight level - Integer from 0% to 100% + // + // Output Parameters + // + // Packet format: + // +--32bits--+-----variable (8bit alignment)--+ + // | Header | Packet payload | + // +----------+--------------------------------+ + // + // For DSI Command packets, payload data must be in this format + // + // +-- 8 bits-+----variable (8bit alignment)----+ + // | Cmd Type | Packet Data | + // +----------+---------------------------------+ + // + // For I2C Command packets, payload data must be in this format + // + // +-- 16 bits-+----variable (8bit alignment)----+ + // | Address | Command Data | + // +-----------+---------------------------------+ + // + // All packets must follow with a DWORD header with 0x0 + // + Method (BLCP, 1, Serialized) + { + Name(RBUF, Buffer(0x100){}) + Store(0x0, LOCAL0) + + CreateField(RBUF, Multiply(LOCAL0, 8), 32, PKHR) + Add(LOCAL0, 4, LOCAL0) + + CreateField(RBUF, Multiply(LOCAL0, 8), 8, PKCM) + Add(LOCAL0, 1, LOCAL0) + + CreateField(RBUF, Multiply(LOCAL0, 8), 8, PKDS) + Add(LOCAL0, 1, LOCAL0) + + CreateField(RBUF, Multiply(LOCAL0, 8), 8, PKUB) + Add(LOCAL0, 1, LOCAL0) + + CreateField(RBUF, Multiply(LOCAL0, 8), 8, PKLB) + Add(LOCAL0, 1, LOCAL0) + + // Add additonal ON command + Name (BON, // Backlight on + Buffer() {0x39, // Command 39 + 0x53, 0x24}) // Manual backlight control + // Create the packet header field + CreateField(RBUF, Multiply(LOCAL0, 8), 32, PKH2) // Create the packet header + Add(LOCAL0, 4, LOCAL0) // Increment the data pointer + // Create the packet payload field + CreateField(RBUF, Multiply(LOCAL0, 8), 32, PKP2) // Create the packet payload + Store(Sizeof(BON), PKH2) // Store the size of the buffer in the header + Store(BON, PKP2) // Store the packet payload + Add(LOCAL0, Sizeof(BON), LOCAL0) // Increment the offset by the packet size + + CreateDWordField(RBUF, Multiply(LOCAL0, 8), EOF) + + /*LOCAL1 = Arg0 * 10 // to map to 1024 + LOCAL2 = LOCAL1 >> 8 + LOCAL1 &= 0xFF*/ + + LOCAL1 = Arg0 * 1023 + LOCAL1 /= 0xFF + + LOCAL2 = Arg0 * 1023 + LOCAL2 /= 0xFF00 + LOCAL2 &= 3 + + PKHR = 4 + PKCM = 0x39 + PKDS = 0x51 + //PKUB = 0x00 + //PKLB = 0x10 + PKUB = LOCAL2 + PKLB = LOCAL1 + + EOF = 0x0 + + Return(RBUF) + } + + Method (ROM2, 3, NotSerialized) + { + Name (PCFG, Buffer (One) + { + 0x00 // . + }) + While (One) + { + If (One) + { + Local2 = PCFG /* \_SB_.GPU0.ROM2.PCFG */ + } + + Break + } + + If ((Arg0 >= SizeOf (Local2))) + { + Return (Buffer (One) + { + 0x00 // . + }) + } + Else + { + Local0 = Arg0 + } + + If ((Arg1 > 0x1000)) + { + Local1 = 0x1000 + } + Else + { + Local1 = Arg1 + } + + If (((Local0 + Local1) > SizeOf (Local2))) + { + Local1 = (SizeOf (Local2) - Local0) + } + + CreateField (Local2, (0x08 * Local0), (0x08 * Local1), RBUF) + Return (RBUF) /* \_SB_.GPU0.ROM2.RBUF */ + } + + Method (IGC2, 2, NotSerialized) + { + Name (RBUF, Buffer (One) + { + 0x00 // . + }) + Return (RBUF) /* \_SB_.GPU0.IGC2.RBUF */ + } + + Method (PCC2, 2, NotSerialized) + { + Name (RBUF, Buffer (One) + { + 0x00 // . + }) + Return (RBUF) /* \_SB_.GPU0.PCC2.RBUF */ + } + + Method (GCT2, 2, NotSerialized) + { + Name (RBUF, Buffer (One) + { + 0x00 // . + }) + Return (RBUF) /* \_SB_.GPU0.GCT2.RBUF */ + } + + Method (LGC2, 3, NotSerialized) + { + Name (TBUF, Buffer (One) + { + 0x00 // . + }) + If ((Arg1 >= SizeOf (TBUF))) + { + Return (Buffer (One) + { + 0x00 // . + }) + } + Else + { + Local1 = Arg1 + } + + If ((Arg2 > 0x1000)) + { + Local2 = 0x1000 + } + Else + { + Local2 = Arg2 + } + + If (((Local1 + Local2) > SizeOf (TBUF))) + { + Local2 = (SizeOf (TBUF) - Local1) + } + + CreateField (TBUF, (0x08 * Local1), (0x08 * Local2), RBUF) + Return (RBUF) /* \_SB_.GPU0.LGC2.RBUF */ + } + + Method (HSI2, 2, NotSerialized) + { + Name (RBUF, Buffer (One) + { + 0x00 // . + }) + Return (RBUF) /* \_SB_.GPU0.HSI2.RBUF */ + } + + Method (GMT2, 2, NotSerialized) + { + Name (TBUF, Buffer (One) + { + 0x00 // . + }) + If ((Arg0 >= SizeOf (TBUF))) + { + Return (Buffer (One) + { + 0x00 // . + }) + } + Else + { + Local0 = Arg0 + } + + If ((Arg1 > 0x1000)) + { + Local1 = 0x1000 + } + Else + { + Local1 = Arg1 + } + + If (((Local0 + Local1) > SizeOf (TBUF))) + { + Local1 = (SizeOf (TBUF) - Local0) + } + + CreateField (TBUF, (0x08 * Local0), (0x08 * Local1), RBUF) + Return (RBUF) /* \_SB_.GPU0.GMT2.RBUF */ + } + + Method (WGM2, 2, NotSerialized) + { + Name (TBUF, Buffer (One) + { + 0x00 // . + }) + If ((Arg0 >= SizeOf (TBUF))) + { + Return (Buffer (One) + { + 0x00 // . + }) + } + Else + { + Local0 = Arg0 + } + + If ((Arg1 > 0x1000)) + { + Local1 = 0x1000 + } + Else + { + Local1 = Arg1 + } + + If (((Local0 + Local1) > SizeOf (TBUF))) + { + Local1 = (SizeOf (TBUF) - Local0) + } + + CreateField (TBUF, (0x08 * Local0), (0x08 * Local1), RBUF) + Return (RBUF) /* \_SB_.GPU0.WGM2.RBUF */ + } + + Method (GRT2, 2, NotSerialized) + { + Name (RBUF, Buffer (One) + { + 0x00 // . + }) + Return (RBUF) /* \_SB_.GPU0.GRT2.RBUF */ + } + + Method (BRT2, 2, NotSerialized) + { + Name (RBUF, Buffer (One) + { + 0x00 // . + }) + Return (RBUF) /* \_SB_.GPU0.BRT2.RBUF */ + } + + Method (DIT2, 2, NotSerialized) + { + Name (RBUF, Buffer (One) + { + 0x00 // . + }) + Return (RBUF) /* \_SB_.GPU0.DIT2.RBUF */ + } + + Method (BLC2, 1, NotSerialized) + { + Name (RBUF, Buffer (0x0100){}) + Return (RBUF) /* \_SB_.GPU0.BLC2.RBUF */ + } + + Method (ROE1, 3, NotSerialized) + { + Name (PCFG, Buffer (One) + { + 0x00 // . + }) + Local2 = PCFG /* \_SB_.GPU0.ROE1.PCFG */ + If ((Arg0 >= SizeOf (Local2))) + { + Return (Buffer (One) + { + 0x00 // . + }) + } + Else + { + Local0 = Arg0 + } + + If ((Arg1 > 0x1000)) + { + Local1 = 0x1000 + } + Else + { + Local1 = Arg1 + } + + If (((Local0 + Local1) > SizeOf (Local2))) + { + Local1 = (SizeOf (Local2) - Local0) + } + + CreateField (Local2, (0x08 * Local0), (0x08 * Local1), RBUF) + Return (RBUF) /* \_SB_.GPU0.ROE1.RBUF */ + } + + Name (_DOD, Package (0x01) // _DOD: Display Output Devices + { + 0x00024321 + }) + + // Enumeration and device info for the AVStream child driver + // + Device (AVS0) + { + // The address for this device (Same as in _DOD, above) + // + Name (_ADR, 0x00024321) // _ADR: Address + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, Buffer (0x02) + { + 0x79, 0x00 // y. + }) + Return (RBUF) /* \_SB_.GPU0.AVS0._CRS.RBUF */ + } + + Name (_DEP, Package (0x03) // _DEP: Dependencies + { + \_SB.MMU0, + \_SB.IMM0, + \_SB.VFE0 + }) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0F) + } + + //------------------------------------------------------------------------------ + // Child Device Info + // This method includes information for child devices + //------------------------------------------------------------------------------ + // + Method (CHDV, 0, NotSerialized) + { + Name (CHIF, Package (0x02) + { + One, // Number of Child devices + Package (0x07) + { + "CHILDDEV", + Zero, // Child ID + 0x00024321, // ACPI UID + "QCOM_AVStream_850", // Hardware ID + Zero, // Instance ID + "Qualcomm Camera AVStream Mini Driver", // Device Text + Package (0x04) + { + "COMPATIBLEIDS", + 0x02, + "VEN_QCOM&DEV__AVSTREAM", + "QCOM_AVSTREAM" + } + } + }) + Return (CHIF) /* \_SB_.GPU0.CHDV.CHIF */ + } + + Method (DPCC, 2, NotSerialized) + { + Return (\_SB.CCST) + } + + Method (DPIN, 2, NotSerialized) + { + Return (\_SB.PINA) + } + + Method (REGR, 0, NotSerialized) + { + Name (RBUF, Package (0x1B) + { + Package (0x02) + { + "ForceMaxPerf", + Zero + }, + + Package (0x02) + { + "ForceStablePowerSettings", + Zero + }, + + Package (0x02) + { + "ForceActive", + Zero + }, + + Package (0x02) + { + "DeferForceActive", + Zero + }, + + Package (0x02) + { + "PreventPowerCollapse", + Zero + }, + + Package (0x02) + { + "DisableThermalMitigation", + Zero + }, + + Package (0x02) + { + "DisableTzMDSSRestore", + One + }, + + Package (0x02) + { + "UseLowPTForGfxPerProcess", + One + }, + + Package (0x02) + { + "DisableCDI", + One + }, + + Package (0x02) + { + "GPU64bAddrEnabled", + One + }, + + Package (0x02) + { + "MaxPreemptionOffsets", + 0x80 + }, + + Package (0x02) + { + "MaxRequiredDmaQueueEntry", + 0x08 + }, + + Package (0x02) + { + "SupportsSecureInAperture", + One + }, + + Package (0x02) + { + "ZeroFlagSupportInPTE", + One + }, + + Package (0x02) + { + "SupportsCacheCoherency", + One + }, + + Package (0x02) + { + "SupportsSHMBridge", + Zero + }, + + Package (0x02) + { + "SecureCarveoutSize", + 0x00200000 + }, + + Package (0x02) + { + "UBWCEnable", + Zero + }, + + Package (0x02) + { + "allowDrmAbove1080p", + One + }, + + Package (0x02) + { + "ZeroPageLowAddr", + 0x85F00000 + }, + + Package (0x02) + { + "ZeroPageHighAddr", + Zero + }, + + Package (0x02) + { + "KeepUefiBuffer", + One + }, + + Package (0x06) + { + "GRAPHICS", + Package (0x02) + { + "ForceActive", + Zero + }, + + Package (0x02) + { + "EnableSystemCache", + One + }, + + Package (0x02) + { + "EnableSysCacheForGpuhtw", + One + }, + + Package (0x0A) + { + "DCVS", + Package (0x02) + { + "Enable", + One + }, + + Package (0x02) + { + "IncreaseFilterBw", + 0x00020000 + }, + + Package (0x02) + { + "DecreaseFilterBw", + 0x3333 + }, + + Package (0x02) + { + "TargetBusyPct", + 0x55 + }, + + Package (0x02) + { + "SampleRate", + 0x3C + }, + + Package (0x02) + { + "TargetBusyPctOffscreen", + 0x4B + }, + + Package (0x02) + { + "SampleRateOffscreen", + 0x14 + }, + + Package (0x02) + { + "GpuResetValue", + 0x11490C80 + }, + + Package (0x02) + { + "BusResetValue", + 0x04B0 + } + }, + + Package (0x06) + { + "A6x", + Package (0x02) + { + "SleepMode", + Zero + }, + + Package (0x02) + { + "DisableICG", + Zero + }, + + Package (0x02) + { + "DisableGmuCG", + Zero + }, + + Package (0x02) + { + "EnableFallbackToDisableSecureMode", + Zero + }, + + Package (0x02) + { + "DisableCPCrashDump", + Zero + } + } + }, + + Package (0x04) + { + "VIDEO", + Package (0x02) + { + "ForceActive", + Zero + }, + + Package (0x02) + { + "PreventPowerCollapse", + Zero + }, + + Package (0x02) + { + "EnableSystemCache", + One + } + }, + + Package (0x02) + { + "CRYPTO", + Package (0x02) + { + "EnableCryptoVA", + One + } + }, + + Package (0x03) + { + "VIDEO_ENCODER", + Package (0x02) + { + "ForceActive", + Zero + }, + + Package (0x02) + { + "PreventPowerCollapse", + Zero + } + }, + + Package (0x07) + { + "DISPLAY", + Package (0x02) + { + "DisableMiracast", + One + }, + + Package (0x02) + { + "EnableOEMDriverDependency", + Zero + }, + + Package (0x02) + { + "EnableBridgeDriverDependency", + Zero + }, + + Package (0x02) + { + "DisableRotator", + Zero + }, + + Package (0x02) + { + "DisableMDPBLT", + One + }, + + Package (0x02) + { + "DisableExternal", + Zero + } + } + }) + Return (RBUF) /* \_SB_.GPU0.REGR.RBUF */ + } + } +//#endif + + // + // Secure Channel Manager (SCM) Driver + // + Device (SCM0) + { + Name (_HID, "QCOM0214") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + Name (_UID, Zero) // _UID: Unique ID + } + + // + // TrEE Driver + // + Device (TREE) + { + Name (_HID, "QCOM02BB") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + Name (_UID, Zero) // _UID: Unique ID + Method (MCGT, 0, NotSerialized) + { + Name (TPKG, Package (0x01) + { + Package (0x02) + { + Zero, + Zero + } + }) + DerefOf (TPKG [Zero]) [Zero] = TCMA /* \_SB_.TCMA */ + DerefOf (TPKG [Zero]) [One] = TCML /* \_SB_.TCML */ + Return (TPKG) /* \_SB_.TREE.MCGT.TPKG */ + } + } + + // + //SPMI driver. + // + Device (SPMI) + { + Name (_HID, "QCOM0216") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + Name (_CID, "PNP0CA2") // _CID: Compatible ID + Name (_UID, One) // _UID: Unique ID + Name (_CCA, Zero) // _CCA: Cache Coherency Attribute + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + Memory32Fixed (ReadWrite, + 0x0C400000, // Address Base + 0x02800000, // Address Length + ) + }) + Return (RBUF) /* \_SB_.SPMI._CRS.RBUF */ + } + + Method (CONF, 0, NotSerialized) + { + Name (XBUF, Buffer (0x1A) + { + /* 0000 */ 0x00, 0x01, 0x01, 0x01, 0xFF, 0x00, 0x02, 0x00, // ........ + /* 0008 */ 0x0A, 0x07, 0x04, 0x07, 0x01, 0xFF, 0x10, 0x01, // ........ + /* 0010 */ 0x00, 0x01, 0x0C, 0x40, 0x00, 0x00, 0x02, 0x80, // ...@.... + /* 0018 */ 0x00, 0x00 // .. + }) + Return (XBUF) /* \_SB_.SPMI.CONF.XBUF */ + } + } + + // + // TLMM controller. + // + Device (GIO0) + { + Name (_HID, "QCOM0217") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + Name (_UID, Zero) // _UID: Unique ID + OperationRegion (GPOR, GeneralPurposeIo, Zero, One) + Field (\_SB.GIO0.GPOR, ByteAcc, NoLock, Preserve) + { + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + // TLMM register address space + Memory32Fixed (ReadWrite, + 0x03400000, // Address Base + 0x00C00000, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x000000F0, + } + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x000000F0, + } + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x000000F0, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Shared, ,, ) + { + 0x00000288, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Shared, ,, ) + { + 0x00000238, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Shared, ,, ) + { + 0x00000226, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Shared, ,, ) + { + 0x00000232, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Shared, ,, ) + { + 0x00000284, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Shared, ,, ) + { + 0x0000021F, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Shared, ,, ) + { + 0x00000236, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Shared, ,, ) + { + 0x0000023D, + } + }) + Return (RBUF) /* \_SB_.GIO0._CRS.RBUF */ + } + + // ACPI method to return Num pins + Method (OFNI, 0, NotSerialized) + { + Name (RBUF, Buffer (0x02) + { + 0x96, // 0: TOTAL_GPIO_PINS + 0x00 // 1: TOTAL_GPIO_PINS // .. + }) + Return (RBUF) /* \_SB_.GIO0.OFNI.RBUF */ + } + + Name (GABL, Zero) + Method (_REG, 2, NotSerialized) // _REG: Region Availability + { + If ((Arg0 == 0x08)) + { + GABL = Arg1 + } + } + + Name (_AEI, Buffer (0x02) // _AEI: ACPI Event Interrupts + { + 0x79, 0x00 // y. + }) + } + + //PCIE asl + OperationRegion (CP00, SystemMemory, 0x13000000, 0x24) + Field (CP00, DWordAcc, NoLock, Preserve) + { + MVIO, 32, + MV01, 32, + MV02, 32, + MV03, 32, + MV04, 32, + MV11, 32, + MV12, 32, + MV13, 32, + MV14, 32 + } + + OperationRegion (CP01, SystemMemory, 0x01C00000, 0x1004) + Field (CP01, DWordAcc, NoLock, Preserve) + { + PSC0, 32, + Offset (0x20), + PPC0, 32, + PPS0, 32, + Offset (0x1B0), + PLT0, 32, + Offset (0x358), + PSL0, 32, + Offset (0x360), + WBL0, 32, + WBH0, 32, + WLL0, 32, + WLH0, 32, + RBL0, 32, + RBH0, 32, + RLL0, 32, + RLH0, 32, + PPEB, 32, + Offset (0x398), + WBL1, 32, + WBH1, 32, + WLL1, 32, + WLH1, 32, + RBL1, 32, + RBH1, 32, + RLL1, 32, + RLH1, 32, + Offset (0x1000), + PDT0, 32 + } + + OperationRegion (CP02, SystemMemory, 0x01C06000, 0x0188) + Field (CP02, DWordAcc, NoLock, Preserve) + { + Offset (0x0C), + QCB1, 32, + QSEC, 32, + QAP1, 32, + QAP2, 32, + QSP1, 32, + QSP2, 32, + QSS1, 32, + QSS2, 32, + Offset (0x34), + QECE, 32, + QCE1, 32, + QSCC, 32, + QSBE, 32, + Offset (0x48), + QCPI, 32, + Offset (0x5C), + QCED, 32, + QCP0, 32, + Offset (0x68), + QPR0, 32, + Offset (0x70), + QPC0, 32, + Offset (0x80), + QSES, 32, + Offset (0x88), + QCRC, 32, + Offset (0x90), + QCLC, 32, + Offset (0x98), + QC1M, 32, + QC2M, 32, + QC3M, 32, + Offset (0xB0), + QSM0, 32, + Offset (0xB8), + QS1M, 32, + QS2M, 32, + QS3M, 32, + Offset (0xD8), + QIG0, 32, + QIG1, 32, + Offset (0xF0), + QCVT, 32, + QVT1, 32, + QVT2, 32, + Offset (0x11C), + QTT1, 32, + QTT2, 32, + Offset (0x138), + QCCS, 32, + QCHS, 32, + Offset (0x148), + QCD0, 32, + Offset (0x154), + QCCN, 32, + Offset (0x15C), + QCCC, 32, + Offset (0x164), + QMCS, 32, + Offset (0x184), + QCCM, 32 + } + + OperationRegion (CP03, SystemMemory, 0x01C06200, 0xA8) + Field (CP03, DWordAcc, NoLock, Preserve) + { + Offset (0x44), + QTOT, 32, + Offset (0x60), + QTDE, 32, + Offset (0x8C), + QTM1, 32, + Offset (0xA4), + QTL2, 32 + } + + OperationRegion (CP04, SystemMemory, 0x01C06400, 0x016C) + Field (CP04, DWordAcc, NoLock, Preserve) + { + Offset (0x0C), + QRSH, 32, + Offset (0x14), + QRSG, 32, + Offset (0x34), + QRUS, 32, + Offset (0x3C), + QRFL, 32, + Offset (0x44), + QRPC, 32, + Offset (0xD4), + QRC2, 32, + QRC3, 32, + QRC4, 32, + Offset (0xF8), + QRA1, 32, + QRA2, 32, + QRSE, 32, + QRSC, 32, + Offset (0x10C), + QRDC, 32, + Offset (0x11C), + QRIM, 32, + Offset (0x164), + QRM0, 32, + QRM1, 32 + } + + OperationRegion (CP05, SystemMemory, 0x01C06600, 0x70) + Field (CP05, DWordAcc, NoLock, Preserve) + { + Offset (0x2C), + PMDC, 32, + Offset (0x44), + PAC1, 32, + Offset (0x54), + PMC2, 32, + PMC3, 32, + PMC4, 32, + PMC5, 32 + } + + OperationRegion (CP06, SystemMemory, 0x01C06800, 0x0210) + Field (CP06, DWordAcc, NoLock, Preserve) + { + PPSR, 32, + PPDC, 32, + PCST, 32, + Offset (0x54), + PERD, 32, + Offset (0x6C), + PSC4, 32, + Offset (0xA0), + PDTA, 32, + PLTA, 32, + PLCD, 32, + Offset (0xC4), + PFC1, 32, + PFC2, 32, + PFVL, 32, + PFVH, 32, + PFMC, 32, + Offset (0x174), + PPPS, 32, + Offset (0x1A8), + PSDM, 32, + PODA, 32, + PPSC, 32, + Offset (0x1D8), + PRSL, 32, + PDAL, 32, + PDAM, 32, + Offset (0x20C), + PRC1, 32 + } + + OperationRegion (CP07, SystemMemory, 0x60000000, 0x1000) + Field (CP07, DWordAcc, NoLock, Preserve) + { + Offset (0x04), + SCR0, 32, + CRI0, 32, + Offset (0x10), + R0B0, 32, + R0B1, 32, + BNR0, 32, + Offset (0x7C), + LCA0, 32, + LCS0, 32, + Offset (0x88), + SLC0, 32, + Offset (0xA0), + LC20, 32, + Offset (0x8BC), + CSW0, 32, + Offset (0x900), + IAV0, 32, + CR10, 32, + CR20, 32, + ILB0, 32, + IUB0, 32, + ILR0, 32, + ILT0, 32, + IUT0, 32, + Offset (0xF24), + ESC0, 32, + EST0, 32, + Offset (0xFC4), + ECS0, 32 + } + + Method (PPU0, 0, Serialized) + { + Name (TOUT, Zero) + PDT0 = 0x04 + PPDC = One + QECE = 0x14 + QCPI = 0x07 + QCLC = One + QCRC = 0x20 + QCVT = Zero + QVT2 = One + QVT1 = 0xC9 + QTT1 = 0xFF + QTT2 = 0x3F + QMCS = One + QCCN = Zero + QCD0 = 0x0A + QCED = 0x19 + QCE1 = 0x90 + QSM0 = 0x82 + QS3M = 0x02 + QS2M = 0xEA + QS1M = 0xAB + QC3M = Zero + QC2M = 0x0D + QC1M = 0x04 + QCHS = Zero + QCP0 = 0x06 + QPR0 = 0x16 + QPC0 = 0x36 + QCCM = One + QCCC = 0x16 + QCCS = 0x33 + QSCC = 0x02 + QSBE = 0x07 + QSES = 0x04 + QIG1 = Zero + QIG0 = 0x3F + QCB1 = 0x09 + QSEC = One + QSP1 = 0x40 + QSP2 = One + QAP1 = 0x02 + QAP2 = Zero + QSS1 = 0x7E + QSS2 = 0x15 + QTOT = 0x02 + QTL2 = 0x12 + QTDE = 0x10 + QTM1 = 0x06 + QRSC = 0x03 + QRSE = 0x1C + QRDC = 0x14 + QRC2 = 0x0E + QRC3 = 0x04 + QRC4 = 0x1A + QRUS = 0x4B + QRSG = 0x04 + QRSH = 0x04 + QRA1 = 0x71 + QRM0 = 0x59 + QRM1 = 0x59 + QRA2 = 0x80 + QRIM = 0x40 + QRPC = 0x71 + QRFL = 0x40 + PERD = 0x04 + PMDC = 0x52 + PMC2 = 0x50 + PMC4 = 0x1A + PMC5 = 0x06 + PFC2 = 0x83 + PFVL = 0x09 + PFVH = 0xA2 + PFMC = 0x40 + PFC1 = 0x02 + PODA = Zero + PDTA = One + PDAM = Zero + PDAL = 0x20 + PSDM = Zero + PLTA = One + PLCD = 0x73 + PRSL = 0xAA + PPSC = 0x03 + PRC1 = 0x0D + PSC4 = Zero + PAC1 = Zero + If ((\_SB.SIDV >= 0x00020000)){} + PPDC = 0x03 + PPSR = Zero + PCST = 0x03 + Local0 = PPPS /* \_SB_.PPPS */ + While ((Local0 & 0x40)) + { + Sleep (One) + TOUT++ + If ((TOUT == 0x0F)) + { + Break + } + + Local0 = PPPS /* \_SB_.PPPS */ + } + + If ((TOUT == 0x0F)) + { + Return (One) + } + Else + { + Return (Zero) + } + } + + Method (LTS0, 0, Serialized) + { + Name (TOUT, Zero) + Local0 = LC20 /* \_SB_.LC20 */ + Local0 |= 0x40 + LC20 = Local0 + PLT0 = 0x0100 + Local0 = EST0 /* \_SB_.EST0 */ + While (((Local0 & 0x0400) != 0x0400)) + { + Sleep (One) + TOUT++ + If ((TOUT == 0x96)) + { + Break + } + + Local0 = EST0 /* \_SB_.EST0 */ + } + + If ((TOUT == 0x96)) + { + Return (One) + } + Else + { + Return (Zero) + } + } + + Method (IAT0, 0, Serialized) + { + IAV0 = One + ILB0 = 0x60100000 + IUB0 = Zero + ILR0 = 0x601FFFFF + ILT0 = 0x01000000 + IUT0 = Zero + CR10 = 0x04 + CR20 = 0x80000000 + BNR0 = 0x00010100 + } + + Method (REB0, 2, Serialized) + { + Local0 = PSC0 /* \_SB_.PSC0 */ + Local0 &= 0xFBFFFFFF + PSC0 = Local0 + WBL0 = Arg0 + WBH0 = Zero + WLL0 = Arg1 + WLH0 = Zero + RBL0 = Arg0 + RBH0 = Zero + RLL0 = Arg1 + RLH0 = Zero + Local0 = PSC0 /* \_SB_.PSC0 */ + Local0 |= 0x04000000 + PSC0 = Local0 + } + + Method (EEB0, 2, Serialized) + { + Local0 = PSC0 /* \_SB_.PSC0 */ + Local0 &= 0xBFFFFFFF + PSC0 = Local0 + WBL1 = Arg0 + WBH1 = Zero + WLL1 = Arg1 + WLH1 = Zero + RBL1 = Arg0 + RBH1 = Zero + RLL1 = Arg1 + RLH1 = Zero + Local0 = PSC0 /* \_SB_.PSC0 */ + Local0 |= 0x40000000 + PSC0 = Local0 + } + + Name (E0LT, 0x600FFFFF) + Method (MSC0, 0, Serialized) + { + Local0 = SCR0 /* \_SB_.SCR0 */ + Local0 |= 0x02 + SCR0 = Local0 + PSL0 = 0x01000000 + Local0 = PPC0 /* \_SB_.PPC0 */ + Local0 &= 0xFFFFFFDF + PPC0 = Local0 + CSW0 = One + Local0 = LCA0 /* \_SB_.LCA0 */ + Local0 |= 0x00400000 + Local0 &= 0xFFFFFBFF + Local0 |= 0x0800 + LCA0 = Local0 + Local0 = CRI0 /* \_SB_.CRI0 */ + Local0 &= 0xFFFF + Local0 |= 0x06040000 + CRI0 = Local0 + ECS0 = One + R0B0 = Zero + R0B1 = Zero + ECS0 = Zero + CSW0 = Zero + PPEB = 0x60000000 + REB0 (0x60001000, \_SB.E0LT) + EEB0 (0x60101000, 0x601FFFFF) + } + + Name (G0D3, Zero) + PowerResource (P0ON, 0x05, 0x0000) + { + Name (_DEP, Package (One) // _DEP: Dependencies + { + \_SB.GIO0 + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (Zero) + } + + Method (_ON, 0, NotSerialized) // _ON_: Power On + { + If (G0D3) + { + GP0B = One + Sleep (One) + GP0B = Zero + If ((\_SB.GIO0.GABL == One)) + { + \_SB.PCI0.MOD1 = One + Sleep (0x05) + \_SB.PCI0.MOD2 = Zero + } + + G0D3 = Zero + If (\_SB.PPU0 ()) + { + Debug = "PHY Init failed for Port 0" + While (One){} + } + + Sleep (0x05) + If ((\_SB.GIO0.GABL == One)) + { + \_SB.PCI0.MOD2 = One + } + + If (\_SB.LTS0 ()) + { + \_SB.E0LT = 0x601FFFFF + } + Else + { + \_SB.E0LT = 0x600FFFFF + } + + \_SB.IAT0 () + \_SB.MSC0 () + } + } + + Method (_OFF, 0, NotSerialized) // _OFF: Power Off + { + If ((G0D3 == Zero)) + { + BreakPoint + Name (PTO0, Zero) + G0D3 = One + Local0 = PSC0 /* \_SB_.PSC0 */ + Local0 |= 0x10 + PSC0 = Local0 + Local0 = ESC0 /* \_SB_.ESC0 */ + Local0 |= 0x10 + ESC0 = Local0 + Local0 = PPS0 /* \_SB_.PPS0 */ + While ((Local0 &= 0x20 != 0x20)) + { + Sleep (0x0A) + PTO0 += One + If ((PTO0 == 0x0A)) + { + Break + } + + Local0 = PPS0 /* \_SB_.PPS0 */ + } + + If ((\_SB.GIO0.GABL == One)) + { + \_SB.PCI0.MOD2 = Zero + } + + PPDC = Zero + PCST = Zero + } + } + } + + PowerResource (P0OF, 0x05, 0x0000) + { + Name (_DEP, Package (One) // _DEP: Dependencies + { + \_SB.GIO0 + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (Zero) + } + + Method (_ON, 0, NotSerialized) // _ON_: Power On + { + } + + Method (_OFF, 0, NotSerialized) // _OFF: Power Off + { + } + + Method (_RST, 0, NotSerialized) // _RST: Device Reset + { + GP0B = One + Sleep (One) + GP0B = Zero + If ((\_SB.GIO0.GABL == One)) + { + \_SB.PCI0.MOD1 = Zero + Sleep (One) + \_SB.PCI0.MOD1 = One + Sleep (0x05) + \_SB.PCI0.MOD2 = Zero + } + + G0D3 = Zero + If (\_SB.PPU0 ()) + { + Debug = "PHY Init failed for Port 0" + While (One){} + } + + Sleep (0x05) + If ((\_SB.GIO0.GABL == One)) + { + \_SB.PCI0.MOD2 = One + } + + If (\_SB.LTS0 ()) + { + \_SB.E0LT = 0x601FFFFF + } + Else + { + \_SB.E0LT = 0x600FFFFF + } + + \_SB.IAT0 () + \_SB.MSC0 () + } + } + + Device (PCI0) + { + Name (_DEP, Package (One) // _DEP: Dependencies + { + \_SB.PEP0 + }) + Name (_HID, EisaId ("PNP0A08") /* PCI Express Bus */) // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + Name (_CID, EisaId ("PNP0A03") /* PCI Bus */) // _CID: Compatible ID + Name (_UID, Zero) // _UID: Unique ID + Name (_SEG, Zero) // _SEG: PCI Segment + Name (_BBN, Zero) // _BBN: BIOS Bus Number + Name (_PRT, Package (0x04) // _PRT: PCI Routing Table + { + Package (0x04) + { + 0xFFFF, + Zero, + Zero, + 0xB5 + }, + + Package (0x04) + { + 0xFFFF, + One, + Zero, + 0xB6 + }, + + Package (0x04) + { + 0xFFFF, + 0x02, + Zero, + 0xB7 + }, + + Package (0x04) + { + 0xFFFF, + 0x03, + Zero, + 0xB8 + } + }) + Method (_CCA, 0, NotSerialized) // _CCA: Cache Coherency Attribute + { + Return (Zero) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (Zero) + } + + Method (_PSC, 0, NotSerialized) // _PSC: Power State Current + { + Return (Zero) + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + Memory32Fixed (ReadWrite, + 0x60200000, // Address Base + 0x00DF0000, // Address Length + ) + WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, + 0x0000, // Granularity + 0x0000, // Range Minimum + 0x0001, // Range Maximum + 0x0000, // Translation Offset + 0x0002, // Length + ,, ) + }) + Return (RBUF) /* \_SB_.PCI0._CRS.RBUF */ + } + + Name (SUPP, Zero) + Name (CTRL, Zero) + Method (_DSW, 3, NotSerialized) // _DSW: Device Sleep Wake + { + } + + Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities + { + If ((Arg0 == ToUUID ("33db4d5b-1ff7-401c-9657-7441c03dd766") /* PCI Host Bridge Device */)) + { + CreateDWordField (Arg3, Zero, CDW1) + CreateDWordField (Arg3, 0x04, CDW2) + CreateDWordField (Arg3, 0x08, CDW3) + SUPP = CDW2 /* \_SB_.PCI0._OSC.CDW2 */ + CTRL = CDW3 /* \_SB_.PCI0._OSC.CDW3 */ + If (((SUPP & 0x16) != 0x16)) + { + CTRL &= 0x1E + } + + CTRL &= 0x15 + If ((Arg1 != One)) + { + CDW1 |= 0x08 + } + + If ((CDW3 != CTRL)) + { + CDW1 |= 0x10 + } + + CDW3 = CTRL /* \_SB_.PCI0.CTRL */ + Return (Arg3) + } + Else + { + CDW1 |= 0x04 + Return (Arg3) + } + } + + Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method + { + If ((Arg0 == ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) + { + While (One) + { + Name (_T_0, 0x00) // _T_x: Emitted by ASL Compiler + _T_0 = ToInteger (Arg2) + If ((_T_0 == Zero)) + { + Return (Buffer (0x02) + { + 0xFF, 0x03 // .. + }) + } + ElseIf ((_T_0 == One)) + { + Return (Package (0x02) + { + Package (One) + { + One + }, + + Package (0x03) + { + Zero, + One, + One + } + }) + } + ElseIf ((_T_0 == 0x02)) + { + Return (Package (One) + { + Package (0x04) + { + One, + 0x03, + Zero, + 0x07 + } + }) + } + ElseIf ((_T_0 == 0x03)) + { + Return (Package (One) + { + Zero + }) + } + ElseIf ((_T_0 == 0x04)) + { + Return (Package (0x02) + { + Package (One) + { + Zero + }, + + Package (0x04) + { + One, + 0x03, + Zero, + 0x07 + } + }) + } + ElseIf ((_T_0 == 0x05)) + { + Return (Package (One) + { + One + }) + } + ElseIf ((_T_0 == 0x06)) + { + Return (Package (0x04) + { + Package (One) + { + Zero + }, + + Package (One) + { + Zero + }, + + Package (One) + { + Zero + }, + + Package (One) + { + Zero + } + }) + } + ElseIf ((_T_0 == 0x07)) + { + Return (Package (One) + { + One + }) + } + ElseIf ((_T_0 == 0x08)) + { + Return (Package (One) + { + One + }) + } + ElseIf ((_T_0 == 0x09)) + { + Return (Package (0x05) + { + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + Zero, + 0xFFFFFFFF + }) + } + Else + { + } + + Break + } + } + } + + Name (_S0W, 0x04) // _S0W: S0 Device Wake State + Name (GWLE, ResourceTemplate () + { + GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionNone, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0027 + } + }) + Name (GWLP, ResourceTemplate () + { + GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionNone, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0023 + } + }) + Scope (\_SB.GIO0) + { + OperationRegion (WLEN, GeneralPurposeIo, Zero, One) + OperationRegion (WLPR, GeneralPurposeIo, Zero, One) + } + + Field (\_SB.GIO0.WLEN, ByteAcc, NoLock, Preserve) + { + Connection (\_SB.PCI0.GWLE), + MOD1, 1 + } + + Field (\_SB.GIO0.WLPR, ByteAcc, NoLock, Preserve) + { + Connection (\_SB.PCI0.GWLP), + MOD2, 1 + } + + Name (_PR0, Package (0x01) // _PR0: Power Resources for D0 + { + \_SB.P0ON + }) + Name (_PR3, Package (0x01) // _PR3: Power Resources for D3hot + { + \_SB.P0ON + }) + Device (RP1) + { + Name (_ADR, Zero) // _ADR: Address + Name (_PR0, Package (0x01) // _PR0: Power Resources for D0 + { + \_SB.P0OF + }) + Name (_PR3, Package (0x01) // _PR3: Power Resources for D3hot + { + \_SB.P0OF + }) + Name (_PRR, Package (0x01) // _PRR: Power Resource for Reset + { + \_SB.P0OF + }) + Name (_S0W, 0x04) // _S0W: S0 Device Wake State + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + GpioInt (Edge, ActiveLow, ExclusiveAndWake, PullUp, 0x0000, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0025 + } + }) + Return (RBUF) /* \_SB_.PCI0.RP1_._CRS.RBUF */ + } + + Name (_DSD, Package (0x02) // _DSD: Device-Specific Data + { + ToUUID ("6211e2c0-58a3-4af3-90e1-927a4e0c55a4"), + Package (0x01) + { + Package (0x02) + { + "HotPlugSupportInD3", + One + } + } + }) + Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method + { + If ((Arg0 == ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) + { + While (One) + { + Name (_T_0, 0x00) // _T_x: Emitted by ASL Compiler + _T_0 = ToInteger (Arg2) + If ((_T_0 == Zero)) + { + Return (Buffer (0x02) + { + 0x01, 0x03 // .. + }) + } + ElseIf ((_T_0 == 0x08)) + { + Return (Package (One) + { + One + }) + } + ElseIf ((_T_0 == 0x09)) + { + Return (Package (0x05) + { + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + Zero, + 0xFFFFFFFF + }) + } + Else + { + } + + Break + } + } + } + } + } + + OperationRegion (CP08, SystemMemory, 0x01C08000, 0x1004) + Field (CP08, DWordAcc, NoLock, Preserve) + { + PSC1, 32, + Offset (0x20), + PPC1, 32, + PPS1, 32, + Offset (0x1B0), + PLT1, 32, + Offset (0x358), + PSL1, 32, + Offset (0x360), + LBW0, 32, + HBW0, 32, + LLW0, 32, + HLW0, 32, + LBR0, 32, + HBR0, 32, + LLR0, 32, + HLR0, 32, + PEB1, 32, + Offset (0x398), + LBW1, 32, + HBW1, 32, + LLW1, 32, + HLW1, 32, + LBR1, 32, + HBR1, 32, + LLR1, 32, + HLR1, 32, + Offset (0x1000), + PDT1, 32 + } + + OperationRegion (CP09, SystemMemory, 0x01C0A000, 0x026C) + Field (CP09, DWordAcc, NoLock, Preserve) + { + Offset (0x14), + HSEC, 32, + HAP1, 32, + HAP2, 32, + HSP1, 32, + HSP2, 32, + HSS1, 32, + HSS2, 32, + Offset (0x34), + HSM1, 32, + HSM2, 32, + Offset (0x54), + HECE, 32, + HCE1, 32, + HSCC, 32, + HSBE, 32, + HPLE, 32, + HCPI, 32, + C1M0, 32, + C2M0, 32, + C3M0, 32, + C1M1, 32, + C2M1, 32, + C3M1, 32, + Offset (0xB4), + HCM0, 32, + HCM1, 32, + Offset (0xC0), + HPR0, 32, + HPR1, 32, + HPR2, 32, + HPC0, 32, + HPC1, 32, + HPC2, 32, + Offset (0xDC), + HSES, 32, + Offset (0xF0), + HRC2, 32, + Offset (0xF8), + HCLC, 32, + Offset (0x100), + HRM0, 32, + Offset (0x108), + HRM1, 32, + Offset (0x11C), + S1M0, 32, + S2M0, 32, + S3M0, 32, + S1M1, 32, + S2M1, 32, + S3M1, 32, + Offset (0x150), + G0M0, 32, + Offset (0x158), + G0M1, 32, + Offset (0x178), + HCVT, 32, + Offset (0x1CC), + HCCS, 32, + HCHS, 32, + Offset (0x1E0), + HCDV, 32, + Offset (0x1E8), + HCCE, 32, + Offset (0x1F0), + HCCC, 32, + Offset (0x1FC), + HMCS, 32, + Offset (0x21C), + HDM1, 32, + Offset (0x224), + HCCM, 32, + HVD1, 32, + HVD2, 32 + } + + OperationRegion (CP10, SystemMemory, 0x01C0A800, 0x02F0) + Field (CP10, DWordAcc, NoLock, Preserve) + { + Offset (0x0C), + L0C0, 32, + L0C1, 32, + L0C2, 32, + L0TE, 32, + Offset (0x60), + L0BM, 32, + L0LM, 32, + Offset (0x7C), + L0PR, 32, + Offset (0xC0), + L0L0, 32, + L0L1, 32, + L0L2, 32, + Offset (0xD0), + L0R1, 32, + L0R2, 32, + L0M0, 32, + L0M1, 32, + L0M2, 32, + Offset (0xFC), + L0CD, 32, + L0VD, 32, + Offset (0x108), + L0X0, 32, + Offset (0x114), + L0TT, 32, + L0OT, 32, + L0RT, 32, + L0ET, 32, + L0VG, 32, + L0DG, 32, + Offset (0x130), + L0EG, 32, + L0OG, 32, + L0PG, 32, + L0IN, 32, + Offset (0x154), + L0EI, 32, + Offset (0x160), + L0DI, 32, + Offset (0x168), + L0B0, 32, + L0B1, 32, + Offset (0x178), + L0T1, 32, + Offset (0x180), + L0RC, 32, + L0F0, 32, + L0F1, 32, + L0F2, 32, + L0S0, 32, + L0S1, 32, + L0S2, 32, + L0SC, 32, + Offset (0x1A4), + L0RB, 32, + Offset (0x1C0), + L0P0, 32, + L0P1, 32, + L0P2, 32, + Offset (0x230), + L0SE, 32, + L0SN, 32, + L0SD, 32, + Offset (0x2A4), + L0DC, 32, + L0ST, 32, + L0RE, 32, + L0PC, 32, + Offset (0x2B8), + L0N0, 32, + Offset (0x2C0), + L0ER, 32, + L0HI, 32, + Offset (0x2CC), + L0RR, 32 + } + + OperationRegion (CP11, SystemMemory, 0x01C0B000, 0x02F0) + Field (CP11, DWordAcc, NoLock, Preserve) + { + Offset (0x0C), + L1C0, 32, + L1C1, 32, + L1C2, 32, + L1TE, 32, + Offset (0x60), + L1BM, 32, + L1LM, 32, + Offset (0x7C), + L1PR, 32, + Offset (0xC0), + L1L0, 32, + L1L1, 32, + L1L2, 32, + Offset (0xD0), + L1R1, 32, + L1R2, 32, + L1M0, 32, + L1M1, 32, + L1M2, 32, + Offset (0xFC), + L1CD, 32, + L1VD, 32, + Offset (0x108), + L1X0, 32, + Offset (0x114), + L1TT, 32, + L1OT, 32, + L1RT, 32, + L1ET, 32, + L1VG, 32, + L1DG, 32, + Offset (0x130), + L1EG, 32, + L1OG, 32, + L1PG, 32, + L1IN, 32, + Offset (0x154), + L1EI, 32, + Offset (0x160), + L1DI, 32, + Offset (0x168), + L1B0, 32, + L1B1, 32, + Offset (0x178), + L1T1, 32, + Offset (0x180), + L1RC, 32, + L1F0, 32, + L1F1, 32, + L1F2, 32, + L1S0, 32, + L1S1, 32, + L1S2, 32, + L1SC, 32, + Offset (0x1A4), + L1RB, 32, + Offset (0x1C0), + L1P0, 32, + L1P1, 32, + L1P2, 32, + Offset (0x230), + L1SE, 32, + L1SN, 32, + L1SD, 32, + Offset (0x2A4), + L1DC, 32, + L1ST, 32, + L1RE, 32, + L1PC, 32, + Offset (0x2B8), + L1N0, 32, + Offset (0x2C0), + L1ER, 32, + L1HI, 32, + Offset (0x2CC), + L1RR, 32 + } + + OperationRegion (CP12, SystemMemory, 0x01C0B800, 0x02DC) + Field (CP12, DWordAcc, NoLock, Preserve) + { + HPSR, 32, + HPDC, 32, + HSTC, 32, + Offset (0x2C), + HTM3, 32, + Offset (0x40), + HTP3, 32, + Offset (0x54), + HTM6, 32, + Offset (0x68), + HTP6, 32, + Offset (0x15C), + HPSG, 32, + Offset (0x174), + HTRC, 32, + Offset (0x2AC), + HPST, 32 + } + + OperationRegion (CP13, SystemMemory, 0x40000000, 0x1000) + Field (CP13, DWordAcc, NoLock, Preserve) + { + Offset (0x04), + SCR1, 32, + CRI1, 32, + Offset (0x10), + R1B0, 32, + R1B1, 32, + BNR1, 32, + Offset (0x7C), + LCA1, 32, + LCS1, 32, + SCA1, 32, + SLC1, 32, + Offset (0xA0), + LC21, 32, + Offset (0x154), + P1PR, 32, + Offset (0x710), + GPLC, 32, + Offset (0x80C), + G32C, 32, + Offset (0x8A8), + GEQC, 32, + GMDC, 32, + Offset (0x8BC), + CSW1, 32, + Offset (0x900), + IAV1, 32, + CR11, 32, + CR21, 32, + ILB1, 32, + IUB1, 32, + ILR1, 32, + ILT1, 32, + IUT1, 32, + Offset (0xF24), + ESC1, 32, + EST1, 32, + Offset (0xFC4), + ECS1, 32 + } + + OperationRegion (CP14, SystemMemory, 0x03971000, 0x10) + Field (CP14, DWordAcc, NoLock, Preserve) + { + C113, 32, + I113, 32, + N113, 32, + S113, 32 + } + + OperationRegion (CP15, SystemMemory, 0x0016B000, 0x1020) + Field (CP15, DWordAcc, NoLock, Preserve) + { + GP0B, 32, + Offset (0x101C), + G0PB, 32 + } + + OperationRegion (CP16, SystemMemory, 0x0018D000, 0x1030) + Field (CP16, DWordAcc, NoLock, Preserve) + { + GP1B, 32, + Offset (0x1014), + G1LB, 32, + Offset (0x101C), + G1PB, 32, + G1NB, 32 + } + + Method (PPU1, 0, Serialized) + { + Name (TOUT, Zero) + PDT1 = 0x04 + HPDC = 0x03 + HSES = 0x27 + HSEC = One + HSP1 = 0x31 + HSP2 = One + HSS1 = 0xDE + HSS2 = 0x07 + HSM1 = 0x4C + HSM2 = 0x06 + HECE = 0x18 + HCE1 = 0xB0 + C1M0 = 0x8C + C2M0 = 0x20 + C1M1 = 0x14 + C2M1 = 0x34 + HCM0 = 0x06 + HCM1 = 0x06 + HPR0 = 0x16 + HPR1 = 0x16 + HPC0 = 0x36 + HPC1 = 0x36 + HRC2 = 0x05 + HCLC = 0x42 + HRM0 = 0x82 + HRM1 = 0x68 + S1M0 = 0x55 + S2M0 = 0x55 + S3M0 = 0x03 + S1M1 = 0xAB + S2M1 = 0xAA + S3M1 = 0x02 + G0M0 = 0x3F + G0M1 = 0x3F + HCVT = 0x10 + HCCS = Zero + HCHS = 0x30 + HCDV = 0x04 + HCCE = 0x73 + HCCC = 0x1C + HMCS = 0x15 + HDM1 = 0x04 + HCCM = One + HVD1 = 0x22 + HVD2 = Zero + L0C0 = Zero + L0TE = 0x0D + L0BM = One + L0LM = 0x3A + L0PR = 0x2F + L0L0 = 0x09 + L0L1 = 0x09 + L0L2 = 0x1A + L0R1 = One + L0R2 = 0x07 + L0M0 = 0x31 + L0M1 = 0x31 + L0M2 = 0x03 + L0CD = 0x02 + L0VD = One + L0X0 = 0x12 + L0TT = 0x25 + L0OT = Zero + L0RT = 0x05 + L0ET = One + L0VG = 0x26 + L0DG = 0x12 + L0EG = 0x04 + L0OG = 0x04 + L0PG = 0x09 + L0EI = 0x15 + L0DI = 0x32 + L0B0 = 0x7F + L0B1 = 0x07 + L0T1 = 0x04 + L0RC = 0x70 + L0F0 = 0x08 + L0F1 = 0x08 + L0F2 = 0x09 + L0S0 = 0x04 + L0S1 = 0x04 + L0S2 = 0x02 + L0SC = 0x0C + L0RB = 0x02 + L0P0 = 0x5C + L0P1 = 0x3E + L0P2 = 0x3F + L0SE = 0x21 + L0SN = 0xA0 + L0SD = 0x08 + L0DC = One + L0RE = 0xC3 + L0PC = Zero + L0N0 = 0x8C + L0ER = 0x7F + L0HI = 0x2A + L0C1 = 0x0C + L0C2 = Zero + L0RR = 0x02 + L0IN = 0x20 + L1C0 = Zero + L1TE = 0x0D + L1BM = One + L1LM = 0x3A + L1PR = 0x2F + L1L0 = 0x09 + L1L1 = 0x09 + L1L2 = 0x1A + L1R1 = One + L1R2 = 0x07 + L1M0 = 0x31 + L1M1 = 0x31 + L1M2 = 0x03 + L1CD = 0x02 + L1VD = One + L1X0 = 0x12 + L1TT = 0x25 + L1OT = Zero + L1RT = 0x05 + L1ET = One + L1VG = 0x26 + L1DG = 0x12 + L1EG = 0x04 + L1OG = 0x04 + L1PG = 0x09 + L1EI = 0x15 + L1DI = 0x32 + L1B0 = 0x7F + L1B1 = 0x07 + L1T1 = 0x04 + L1RC = 0x70 + L1F0 = 0x08 + L1F1 = 0x08 + L1F2 = 0x09 + L1S0 = 0x04 + L1S1 = 0x04 + L1S2 = 0x02 + L1SC = 0x0C + L1RB = 0x02 + L1P0 = 0x5C + L1P1 = 0x3E + L1P2 = 0x3F + L1SE = 0x21 + L1SN = 0xA0 + L1SD = 0x08 + L1DC = One + L1RE = 0xC3 + L1PC = Zero + L1N0 = 0x8C + L1ER = 0x7F + L1HI = 0x2A + L1C1 = 0x0C + L1C2 = Zero + L1RR = 0x02 + L1IN = 0x20 + HPSG = 0x3F + HTRC = 0x58 + HTM3 = 0x19 + HTP3 = 0x07 + HTM6 = 0x17 + HTP6 = 0x09 + If ((\_SB.SIDV >= 0x00020000)){} + HPSR = Zero + L0ST = One + L1ST = One + HSTC = One + Local0 = HPST /* \_SB_.HPST */ + While ((Local0 & 0x40)) + { + Sleep (One) + TOUT++ + If ((TOUT == 0x0F)) + { + Break + } + + Local0 = HPST /* \_SB_.HPST */ + } + + If ((TOUT == 0x0F)) + { + Return (One) + } + Else + { + Return (Zero) + } + } + + Method (LTS1, 0, Serialized) + { + Name (TOUT, Zero) + Local0 = G32C /* \_SB_.G32C */ + Local0 &= 0xFFFFE0FF + Local0 |= 0x0100 + G32C = Local0 + GMDC = 0x000155A0 + Local0 = GEQC /* \_SB_.GEQC */ + Local0 &= 0xFFFFFFEF + GEQC = Local0 + CSW1 = One + P1PR = 0x77777777 + CSW1 = Zero + Local0 = GPLC /* \_SB_.GPLC */ + Local0 &= 0xFFC0F0FF + Local0 |= 0x00030300 + GPLC = Local0 + PLT1 = 0x0100 + Local0 = EST1 /* \_SB_.EST1 */ + While (((Local0 & 0x0400) != 0x0400)) + { + Sleep (One) + TOUT++ + If ((TOUT == 0x96)) + { + Break + } + + Local0 = EST1 /* \_SB_.EST1 */ + } + + If ((TOUT == 0x96)) + { + Return (One) + } + Else + { + Return (Zero) + } + } + + Method (IAT1, 0, Serialized) + { + IAV1 = One + ILB1 = 0x40100000 + IUB1 = Zero + ILR1 = 0x401FFFFF + ILT1 = 0x01000000 + IUT1 = Zero + CR11 = 0x04 + CR21 = 0x80000000 + BNR1 = 0x00010100 + } + + Method (REB1, 2, Serialized) + { + Local0 = PSC1 /* \_SB_.PSC1 */ + Local0 &= 0xFBFFFFFF + PSC1 = Local0 + LBW0 = Arg0 + HBW0 = Zero + LLW0 = Arg1 + HLW0 = Zero + LBR0 = Arg0 + HBR0 = Zero + LLR0 = Arg1 + HLR0 = Zero + Local0 = PSC1 /* \_SB_.PSC1 */ + Local0 |= 0x04000000 + PSC1 = Local0 + } + + Method (EEB1, 2, Serialized) + { + Local0 = PSC1 /* \_SB_.PSC1 */ + Local0 &= 0xBFFFFFFF + PSC1 = Local0 + LBW1 = Arg0 + HBW1 = Zero + LLW1 = Arg1 + HLW1 = Zero + LBR1 = Arg0 + HBR1 = Zero + LLR1 = Arg1 + HLR1 = Zero + Local0 = PSC1 /* \_SB_.PSC1 */ + Local0 |= 0x40000000 + PSC1 = Local0 + } + + Name (E1LT, 0x400FFFFF) + Method (MSC1, 0, Serialized) + { + Local0 = SCR1 /* \_SB_.SCR1 */ + Local0 |= 0x02 + SCR1 = Local0 + PSL1 = 0x20000000 + Local0 = PPC1 /* \_SB_.PPC1 */ + Local0 &= 0xFFFFFFDF + PPC1 = Local0 + CSW1 = One + Local0 = LCA1 /* \_SB_.LCA1 */ + Local0 |= 0x00400000 + Local0 |= 0x0C00 + LCA1 = Local0 + Local0 = CRI1 /* \_SB_.CRI1 */ + Local0 &= 0xFFFF + Local0 |= 0x06040000 + CRI1 = Local0 + Local0 = SCA1 /* \_SB_.SCA1 */ + Local0 &= 0xFFFFFFBF + SCA1 = Local0 + CSW1 = Zero + ECS1 = One + R1B0 = Zero + R1B1 = Zero + ECS1 = Zero + PEB1 = 0x40000000 + REB1 (0x40001000, \_SB.E1LT) + EEB1 (0x40101000, 0x401FFFFF) + } + + Name (G1D3, Zero) + PowerResource (P1ON, 0x05, 0x0000) + { + Name (_DEP, Package (One) // _DEP: Dependencies + { + \_SB.GIO0 + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (Zero) + } + + Method (_ON, 0, NotSerialized) // _ON_: Power On + { + If (G1D3) + { + G1D3 = Zero + GP1B = One + Sleep (One) + GP1B = Zero + G1PB = One + Sleep (One) + G1PB = Zero + If (\_SB.PPU1 ()) + { + Debug = "PHY Init Failed for Port 1" + While (One){} + } + + If ((\_SB.GIO0.GABL == One)) + { + \_SB.PCI1.MOD2 = Zero + } + + Sleep (0x0A) + If ((\_SB.GIO0.GABL == One)) + { + \_SB.PCI1.MOD2 = One + } + + If (\_SB.LTS1 ()) + { + \_SB.E1LT = 0x401FFFFF + } + Else + { + \_SB.E1LT = 0x400FFFFF + } + + \_SB.IAT1 () + \_SB.MSC1 () + } + } + + Method (_OFF, 0, NotSerialized) // _OFF: Power Off + { + If ((G1D3 == Zero)) + { + BreakPoint + Name (PTO0, Zero) + G1D3 = One + Local0 = PSC1 /* \_SB_.PSC1 */ + Local0 |= 0x10 + PSC1 = Local0 + Local0 = ESC1 /* \_SB_.ESC1 */ + Local0 |= 0x10 + ESC1 = Local0 + Local0 = PPS1 /* \_SB_.PPS1 */ + While ((Local0 &= 0x20 != 0x20)) + { + Sleep (0x0A) + PTO0 += One + If ((PTO0 == 0x0A)) + { + Break + } + + Local0 = PPS1 /* \_SB_.PPS1 */ + } + + If ((\_SB.GIO0.GABL == One)) + { + \_SB.PCI1.MOD2 = Zero + } + + HPSR = Zero + L0ST = Zero + L1ST = Zero + HSTC = Zero + } + } + } + + PowerResource (P1OF, 0x05, 0x0000) + { + Name (_DEP, Package (One) // _DEP: Dependencies + { + \_SB.GIO0 + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (Zero) + } + + Method (_ON, 0, NotSerialized) // _ON_: Power On + { + } + + Method (_OFF, 0, NotSerialized) // _OFF: Power Off + { + } + + Method (_RST, 0, Serialized) // _RST: Device Reset + { + GP1B = One + Sleep (One) + GP1B = Zero + G1PB = One + Sleep (One) + G1PB = Zero + If (\_SB.PPU1 ()) + { + Debug = "PHY Init Failed for Port 1" + While (One){} + } + + If ((\_SB.GIO0.GABL == One)) + { + \_SB.PCI1.MOD2 = Zero + } + + Sleep (0x0A) + If ((\_SB.GIO0.GABL == One)) + { + \_SB.PCI1.MOD2 = One + } + + If (\_SB.LTS1 ()) + { + \_SB.E1LT = 0x401FFFFF + } + Else + { + \_SB.E1LT = 0x400FFFFF + } + + \_SB.IAT1 () + \_SB.MSC1 () + } + } + + Device (PCI1) + { + Name (_DEP, Package (One) // _DEP: Dependencies + { + \_SB.PEP0 + }) + Name (_HID, EisaId ("PNP0A08") /* PCI Express Bus */) // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + Name (_CID, EisaId ("PNP0A03") /* PCI Bus */) // _CID: Compatible ID + Name (_UID, One) // _UID: Unique ID + Name (_SEG, One) // _SEG: PCI Segment + Name (_BBN, Zero) // _BBN: BIOS Bus Number + Name (_PRT, Package (0x04) // _PRT: PCI Routing Table + { + Package (0x04) + { + 0xFFFF, + Zero, + Zero, + 0x01D2 + }, + + Package (0x04) + { + 0xFFFF, + One, + Zero, + 0x01D3 + }, + + Package (0x04) + { + 0xFFFF, + 0x02, + Zero, + 0x01D6 + }, + + Package (0x04) + { + 0xFFFF, + 0x03, + Zero, + 0x01D7 + } + }) + Method (_CCA, 0, NotSerialized) // _CCA: Cache Coherency Attribute + { + Return (One) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (Zero) + } + + Method (_PSC, 0, NotSerialized) // _PSC: Power State Current + { + Return (Zero) + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + Memory32Fixed (ReadWrite, + 0x40200000, // Address Base + 0x01FDF000, // Address Length + ) + WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, + 0x0000, // Granularity + 0x0000, // Range Minimum + 0x0001, // Range Maximum + 0x0000, // Translation Offset + 0x0002, // Length + ,, ) + }) + Return (RBUF) /* \_SB_.PCI1._CRS.RBUF */ + } + + Name (SUPP, Zero) + Name (CTRL, Zero) + Method (_DSW, 3, NotSerialized) // _DSW: Device Sleep Wake + { + } + + Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities + { + If ((Arg0 == ToUUID ("33db4d5b-1ff7-401c-9657-7441c03dd766") /* PCI Host Bridge Device */)) + { + CreateDWordField (Arg3, Zero, CDW1) + CreateDWordField (Arg3, 0x04, CDW2) + CreateDWordField (Arg3, 0x08, CDW3) + SUPP = CDW2 /* \_SB_.PCI1._OSC.CDW2 */ + CTRL = CDW3 /* \_SB_.PCI1._OSC.CDW3 */ + If (((SUPP & 0x16) != 0x16)) + { + CTRL &= 0x1E + } + + CTRL &= 0x15 + If ((Arg1 != One)) + { + CDW1 |= 0x08 + } + + If ((CDW3 != CTRL)) + { + CDW1 |= 0x10 + } + + CDW3 = CTRL /* \_SB_.PCI1.CTRL */ + Return (Arg3) + } + Else + { + CDW1 |= 0x04 + Return (Arg3) + } + } + + Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method + { + If ((Arg0 == ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) + { + While (One) + { + Name (_T_0, 0x00) // _T_x: Emitted by ASL Compiler + _T_0 = ToInteger (Arg2) + If ((_T_0 == Zero)) + { + Return (Buffer (0x02) + { + 0xFF, 0x03 // .. + }) + } + ElseIf ((_T_0 == One)) + { + Return (Package (0x02) + { + Package (One) + { + One + }, + + Package (0x03) + { + Zero, + One, + One + } + }) + } + ElseIf ((_T_0 == 0x02)) + { + Return (Package (One) + { + Package (0x04) + { + One, + 0x03, + Zero, + 0x07 + } + }) + } + ElseIf ((_T_0 == 0x03)) + { + Return (Package (One) + { + Zero + }) + } + ElseIf ((_T_0 == 0x04)) + { + Return (Package (0x02) + { + Package (One) + { + Zero + }, + + Package (0x04) + { + One, + 0x03, + Zero, + 0x07 + } + }) + } + ElseIf ((_T_0 == 0x05)) + { + Return (Package (One) + { + One + }) + } + ElseIf ((_T_0 == 0x06)) + { + Return (Package (0x04) + { + Package (One) + { + Zero + }, + + Package (One) + { + Zero + }, + + Package (One) + { + Zero + }, + + Package (One) + { + Zero + } + }) + } + ElseIf ((_T_0 == 0x07)) + { + Return (Package (One) + { + 0x02 + }) + } + ElseIf ((_T_0 == 0x08)) + { + Return (Package (One) + { + One + }) + } + ElseIf ((_T_0 == 0x09)) + { + Return (Package (0x05) + { + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + Zero, + 0xFFFFFFFF + }) + } + Else + { + } + + Break + } + } + } + + Name (_S0W, 0x04) // _S0W: S0 Device Wake State + Name (RST1, ResourceTemplate () + { + GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionNone, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0066 + } + }) + Scope (\_SB.GIO0) + { + OperationRegion (P1PR, GeneralPurposeIo, Zero, One) + } + + Field (\_SB.GIO0.P1PR, ByteAcc, NoLock, Preserve) + { + Connection (\_SB.PCI1.RST1), + MOD2, 1 + } + + Name (_PR0, Package (0x01) // _PR0: Power Resources for D0 + { + \_SB.P1ON + }) + Name (_PR3, Package (0x01) // _PR3: Power Resources for D3hot + { + \_SB.P1ON + }) + Device (RP1) + { + Name (_ADR, Zero) // _ADR: Address + Name (_PR0, Package (0x01) // _PR0: Power Resources for D0 + { + \_SB.P1OF + }) + Name (_PR3, Package (0x01) // _PR3: Power Resources for D3hot + { + \_SB.P1OF + }) + Name (_PRR, Package (0x01) // _PRR: Power Resource for Reset + { + \_SB.P1OF + }) + Name (_DSD, Package (0x02) // _DSD: Device-Specific Data + { + ToUUID ("6211e2c0-58a3-4af3-90e1-927a4e0c55a4"), + Package (0x01) + { + Package (0x02) + { + "HotPlugSupportInD3", + One + } + } + }) + Name (_S0W, 0x04) // _S0W: S0 Device Wake State + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + GpioInt (Edge, ActiveLow, ExclusiveAndWake, PullUp, 0x0000, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0068 + } + GpioInt (Edge, ActiveBoth, ExclusiveAndWake, PullUp, 0x0000, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0071 + } + }) + Return (RBUF) /* \_SB_.PCI1.RP1_._CRS.RBUF */ + } + + Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method + { + If ((Arg0 == ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) + { + While (One) + { + Name (_T_0, 0x00) // _T_x: Emitted by ASL Compiler + _T_0 = ToInteger (Arg2) + If ((_T_0 == Zero)) + { + Return (Buffer (0x02) + { + 0x01, 0x03 // .. + }) + } + ElseIf ((_T_0 == 0x08)) + { + Return (Package (One) + { + One + }) + } + ElseIf ((_T_0 == 0x09)) + { + Return (Package (0x05) + { + 0xFFFFFFFF, + 0xFFFFFFFF, + 0xFFFFFFFF, + Zero, + 0xFFFFFFFF + }) + } + Else + { + } + + Break + } + } + } + } + } + + + // + // IPC Router + // + Device (IPC0) + { +//#if 0 + Name (_DEP, Package (One) // _DEP: Dependencies + { + \_SB.GLNK + }) +//#endif + Name (_HID, "QCOM021C") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + } + + Device (GLNK) + { +//#if 0 + Name (_DEP, Package (One) // _DEP: Dependencies + { + \_SB.RPEN + }) +//#endif + Name (_HID, "QCOM02F9") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + Name (_UID, Zero) // _UID: Unique ID + Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x000001E3, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x000000BE, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x000000CC, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x00000260, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x000001E1, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x000000BC, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x000000CA, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x0000025E, + } + }) + Return (RBUF) /* \_SB_.GLNK._CRS.RBUF */ + } + } + + // ADSP RPC Driver + // + Device (ARPC) + { + Name (_DEP, Package (0x03) // _DEP: Dependencies + { + \_SB.MMU0, + \_SB.GLNK, + \_SB.SCM0 + }) + Name (_HID, "QCOM0297") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + } + + Device (ARPD) + { + Name (_DEP, Package (0x02) // _DEP: Dependencies + { + \_SB.ADSP, + \_SB.ARPC + }) + Name (_HID, "QCOM02F3") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + } + + // + // RemoteFS + // + Device(RFS0) + { + Name(_DEP, Package(0x2) + { + IPC0, + UFS0 + }) + Name(_HID, "QCOM0235") + Alias(PSUB, _SUB) + Method(_CRS, 0x0, NotSerialized) + { + Name(RBUF, Buffer(0x26) + { + 0x86, 0x09, 0x00, 0x01, 0x88, 0x88, 0x88, 0x88, 0x99, 0x99, 0x99, 0x99, + 0x86, 0x09, 0x00, 0x01, 0x11, 0x11, 0x11, 0x11, 0x22, 0x22, 0x22, 0x22, + 0x86, 0x09, 0x00, 0x01, 0x33, 0x33, 0x33, 0x33, 0x44, 0x44, 0x44, 0x44, + 0x79, 0x00 + }) + CreateDWordField(RBUF, 0x4, RMTA) + CreateDWordField(RBUF, 0x8, RMTL) + CreateDWordField(RBUF, 0x10, RFMA) + CreateDWordField(RBUF, 0x14, RFML) + CreateDWordField(RBUF, 0x1c, RFAA) + CreateDWordField(RBUF, 0x20, RFAL) + Store(RMTB, RMTA) + Store(RMTX, RMTL) + Store(RFMB, RFMA) + Store(RFMS, RFML) + Store(RFAB, RFAA) + Store(RFAS, RFAL) + Return(RBUF) + } + Method(_STA, 0x0, NotSerialized) + { + Return(0xb) + } + } + +#if 0 + Device (RFS0) + { + Name (_DEP, Package (0x02) // _DEP: Dependencies + { + \_SB.IPC0, + \_SB.UFS0 + }) + Name (_HID, "QCOM0235") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + Memory32Fixed (ReadWrite, + 0x88888888, // Address Base + 0x99999999, // Address Length + _Y00) + Memory32Fixed (ReadWrite, + 0x11111111, // Address Base + 0x22222222, // Address Length + _Y01) + Memory32Fixed (ReadWrite, + 0x33333333, // Address Base + 0x44444444, // Address Length + _Y02) + }) + CreateDWordField (RBUF, \_SB.RFS0._CRS._Y00._BAS, RMTA) // _BAS: Base Address + CreateDWordField (RBUF, \_SB.RFS0._CRS._Y00._LEN, RMTL) // _LEN: Length + CreateDWordField (RBUF, \_SB.RFS0._CRS._Y01._BAS, RFMA) // _BAS: Base Address + CreateDWordField (RBUF, \_SB.RFS0._CRS._Y01._LEN, RFML) // _LEN: Length + CreateDWordField (RBUF, \_SB.RFS0._CRS._Y02._BAS, RFAA) // _BAS: Base Address + CreateDWordField (RBUF, \_SB.RFS0._CRS._Y02._LEN, RFAL) // _LEN: Length + RMTA = \_SB.RMTB + RMTL = \_SB.RMTX + RFMA = \_SB.RFMB + RFML = \_SB.RFMS + RFAA = \_SB.RFAB + RFAL = \_SB.RFAS + Return (RBUF) /* \_SB_.RFS0._CRS.RBUF */ + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0B) + } + } +#endif + + Device (IPA) + { + Name (_DEP, Package (0x06) // _DEP: Dependencies + { + \_SB.PEP0, + \_SB.RPEN, + \_SB.PILC, + \_SB.MMU0, + \_SB.GSI, + \_SB.GLNK + }) + Name (_HID, "QCOM02B3") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + Name (_UID, Zero) // _UID: Unique ID + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (ResourceTemplate () + { + Memory32Fixed (ReadWrite, + 0x01E40000, // Address Base + 0x0001FFFF, // Address Length + ) + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x00000157, + } + }) + } + } + + Device (GSI) + { + Name (_DEP, Package (0x01) // _DEP: Dependencies + { + \_SB.PEP0 + }) + Name (_HID, "QCOM02E7") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + Name (_UID, Zero) // _UID: Unique ID + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + Memory32Fixed (ReadWrite, + 0x01E00000, // Address Base + 0x00030000, // Address Length + ) + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x000001D0, + } + }) + Return (RBUF) /* \_SB_.GSI_._CRS.RBUF */ + } + } + + // + //Qualcomm DIAG Service + // + Device (QDIG) + { + Name (_DEP, Package (One) // _DEP: Dependencies + { + \_SB.GLNK + }) + Name (_HID, "QCOM0225") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + } + + // + // Qualcomm DIAG Bridge + // + Device (QCDB) + { + Name (_HID, "QCOM0298") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + } + + Device (SYSM) + { + Name (_HID, "MEOW0010" /* Processor Container Device */) // _HID: Hardware ID + Name (_UID, 0x00100000) // _UID: Unique ID + Name (_LPI, Package (0x05) // _LPI: Low Power Idle States + { + Zero, + 0x01000000, + 0x02, + Package (0x0A) + { + 0x251C, + 0x1770, + Zero, + 0x20, + Zero, + Zero, + 0x3300, + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + "platform.F1" + }, + + Package (0x0A) + { + 0x2710, + 0x19C8, + One, + 0x20, + Zero, + Zero, + 0xC300, + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + "platform.F2" + } + }) + Device (CLUS) + { + Name (_HID, "MEOW0010" /* Processor Container Device */) // _HID: Hardware ID + Name (_UID, 0x10) // _UID: Unique ID + Name (_LPI, Package (0x05) // _LPI: Low Power Idle States + { + Zero, + 0x01000000, + 0x02, + Package (0x0A) + { + 0x170C, + 0x0BB8, + Zero, + Zero, + Zero, + Zero, + 0x20, + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + "L3Cluster.D2" + }, + + Package (0x0A) + { + 0x1770, + 0x0CE4, + One, + Zero, + Zero, + 0x02, + 0x40, + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + "L3Cluster.D4" + } + }) + Device (CPU0) + { + Name (_HID, "MEOW0007" /* Processor Device */) // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0F) + } + + Name (_LPI, Package (0x07) // _LPI: Low Power Idle States + { + Zero, + Zero, + 0x04, + Package (0x0A) + { + Zero, + Zero, + One, + Zero, + Zero, + Zero, + ResourceTemplate () + { + Register (FFixedHW, + 0x20, // Bit Width + 0x00, // Bit Offset + 0x00000000FFFFFFFF, // Address + 0x03, // Access Size + ) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + "KryoSilver0.C1" + }, + + Package (0x0A) + { + 0x0190, + 0x64, + Zero, + Zero, + Zero, + One, + ResourceTemplate () + { + Register (FFixedHW, + 0x20, // Bit Width + 0x00, // Bit Offset + 0x0000000000000002, // Address + 0x03, // Access Size + ) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + "KryoSilver0.C2" + }, + + Package (0x0A) + { + 0x1388, + 0x01F4, + One, + One, + Zero, + One, + ResourceTemplate () + { + Register (FFixedHW, + 0x20, // Bit Width + 0x00, // Bit Offset + 0x0000000040000003, // Address + 0x03, // Access Size + ) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + "KryoSilver0.C3" + }, + + Package (0x0A) + { + 0x13EC, + 0x0226, + One, + One, + Zero, + 0x02, + ResourceTemplate () + { + Register (FFixedHW, + 0x20, // Bit Width + 0x00, // Bit Offset + 0x0000000040000004, // Address + 0x03, // Access Size + ) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + "KryoSilver0.C4" + } + }) + } + + Device (CPU1) + { + Name (_HID, "MEOW0007" /* Processor Device */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0F) + } + + Name (_LPI, Package (0x07) // _LPI: Low Power Idle States + { + Zero, + Zero, + 0x04, + Package (0x0A) + { + Zero, + Zero, + One, + Zero, + Zero, + Zero, + ResourceTemplate () + { + Register (FFixedHW, + 0x20, // Bit Width + 0x00, // Bit Offset + 0x00000000FFFFFFFF, // Address + 0x03, // Access Size + ) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + "KryoSilver1.C1" + }, + + Package (0x0A) + { + 0x0190, + 0x64, + Zero, + Zero, + Zero, + One, + ResourceTemplate () + { + Register (FFixedHW, + 0x20, // Bit Width + 0x00, // Bit Offset + 0x0000000000000002, // Address + 0x03, // Access Size + ) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + "KryoSilver1.C2" + }, + + Package (0x0A) + { + 0x1388, + 0x01F4, + One, + One, + Zero, + One, + ResourceTemplate () + { + Register (FFixedHW, + 0x20, // Bit Width + 0x00, // Bit Offset + 0x0000000040000003, // Address + 0x03, // Access Size + ) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + "KryoSilver1.C3" + }, + + Package (0x0A) + { + 0x13EC, + 0x0226, + One, + One, + Zero, + 0x02, + ResourceTemplate () + { + Register (FFixedHW, + 0x20, // Bit Width + 0x00, // Bit Offset + 0x0000000040000004, // Address + 0x03, // Access Size + ) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + "KryoSilver1.C4" + } + }) + } + + Device (CPU2) + { + Name (_HID, "MEOW0007" /* Processor Device */) // _HID: Hardware ID + Name (_UID, 0x02) // _UID: Unique ID + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0F) + } + + Name (_LPI, Package (0x07) // _LPI: Low Power Idle States + { + Zero, + Zero, + 0x04, + Package (0x0A) + { + Zero, + Zero, + One, + Zero, + Zero, + Zero, + ResourceTemplate () + { + Register (FFixedHW, + 0x20, // Bit Width + 0x00, // Bit Offset + 0x00000000FFFFFFFF, // Address + 0x03, // Access Size + ) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + "KryoSilver2.C1" + }, + + Package (0x0A) + { + 0x0190, + 0x64, + Zero, + Zero, + Zero, + One, + ResourceTemplate () + { + Register (FFixedHW, + 0x20, // Bit Width + 0x00, // Bit Offset + 0x0000000000000002, // Address + 0x03, // Access Size + ) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + "KryoSilver2.C2" + }, + + Package (0x0A) + { + 0x1388, + 0x01F4, + One, + One, + Zero, + One, + ResourceTemplate () + { + Register (FFixedHW, + 0x20, // Bit Width + 0x00, // Bit Offset + 0x0000000040000003, // Address + 0x03, // Access Size + ) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + "KryoSilver2.C3" + }, + + Package (0x0A) + { + 0x13EC, + 0x0226, + One, + One, + Zero, + 0x02, + ResourceTemplate () + { + Register (FFixedHW, + 0x20, // Bit Width + 0x00, // Bit Offset + 0x0000000040000004, // Address + 0x03, // Access Size + ) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + "KryoSilver2.C4" + } + }) + } + + Device (CPU3) + { + Name (_HID, "MEOW0007" /* Processor Device */) // _HID: Hardware ID + Name (_UID, 0x03) // _UID: Unique ID + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0F) + } + + Name (_LPI, Package (0x07) // _LPI: Low Power Idle States + { + Zero, + Zero, + 0x04, + Package (0x0A) + { + Zero, + Zero, + One, + Zero, + Zero, + Zero, + ResourceTemplate () + { + Register (FFixedHW, + 0x20, // Bit Width + 0x00, // Bit Offset + 0x00000000FFFFFFFF, // Address + 0x03, // Access Size + ) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + "KryoSilver3.C1" + }, + + Package (0x0A) + { + 0x0190, + 0x64, + Zero, + Zero, + Zero, + One, + ResourceTemplate () + { + Register (FFixedHW, + 0x20, // Bit Width + 0x00, // Bit Offset + 0x0000000000000002, // Address + 0x03, // Access Size + ) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + "KryoSilver3.C2" + }, + + Package (0x0A) + { + 0x1388, + 0x01F4, + One, + One, + Zero, + One, + ResourceTemplate () + { + Register (FFixedHW, + 0x20, // Bit Width + 0x00, // Bit Offset + 0x0000000040000003, // Address + 0x03, // Access Size + ) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + "KryoSilver3.C3" + }, + + Package (0x0A) + { + 0x13EC, + 0x0226, + One, + One, + Zero, + 0x02, + ResourceTemplate () + { + Register (FFixedHW, + 0x20, // Bit Width + 0x00, // Bit Offset + 0x0000000040000004, // Address + 0x03, // Access Size + ) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + "KryoSilver3.C4" + } + }) + } + + Device (CPU4) + { + Name (_HID, "MEOW0007" /* Processor Device */) // _HID: Hardware ID + Name (_UID, 0x04) // _UID: Unique ID + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0F) + } + + Name (_LPI, Package (0x07) // _LPI: Low Power Idle States + { + Zero, + Zero, + 0x04, + Package (0x0A) + { + Zero, + Zero, + One, + Zero, + Zero, + Zero, + ResourceTemplate () + { + Register (FFixedHW, + 0x20, // Bit Width + 0x00, // Bit Offset + 0x00000000FFFFFFFF, // Address + 0x03, // Access Size + ) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + "KryoGold0.C1" + }, + + Package (0x0A) + { + 0x0190, + 0x64, + Zero, + Zero, + Zero, + One, + ResourceTemplate () + { + Register (FFixedHW, + 0x20, // Bit Width + 0x00, // Bit Offset + 0x0000000000000002, // Address + 0x03, // Access Size + ) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + "KryoGold0.C2" + }, + + Package (0x0A) + { + 0x03E8, + 0x028A, + One, + One, + Zero, + One, + ResourceTemplate () + { + Register (FFixedHW, + 0x20, // Bit Width + 0x00, // Bit Offset + 0x0000000040000003, // Address + 0x03, // Access Size + ) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + "KryoGold0.C3" + }, + + Package (0x0A) + { + 0x05DC, + 0x044C, + One, + One, + Zero, + 0x02, + ResourceTemplate () + { + Register (FFixedHW, + 0x20, // Bit Width + 0x00, // Bit Offset + 0x0000000040000004, // Address + 0x03, // Access Size + ) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + "KryoGold0.C4" + } + }) + } + + Device (CPU5) + { + Name (_HID, "MEOW0007" /* Processor Device */) // _HID: Hardware ID + Name (_UID, 0x05) // _UID: Unique ID + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0F) + } + + Name (_LPI, Package (0x07) // _LPI: Low Power Idle States + { + Zero, + Zero, + 0x04, + Package (0x0A) + { + Zero, + Zero, + One, + Zero, + Zero, + Zero, + ResourceTemplate () + { + Register (FFixedHW, + 0x20, // Bit Width + 0x00, // Bit Offset + 0x00000000FFFFFFFF, // Address + 0x03, // Access Size + ) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + "KryoGold1.C1" + }, + + Package (0x0A) + { + 0x0190, + 0x64, + Zero, + Zero, + Zero, + One, + ResourceTemplate () + { + Register (FFixedHW, + 0x20, // Bit Width + 0x00, // Bit Offset + 0x0000000000000002, // Address + 0x03, // Access Size + ) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + "KryoGold1.C2" + }, + + Package (0x0A) + { + 0x03E8, + 0x028A, + One, + One, + Zero, + One, + ResourceTemplate () + { + Register (FFixedHW, + 0x20, // Bit Width + 0x00, // Bit Offset + 0x0000000040000003, // Address + 0x03, // Access Size + ) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + "KryoGold1.C3" + }, + + Package (0x0A) + { + 0x05DC, + 0x044C, + One, + One, + Zero, + 0x02, + ResourceTemplate () + { + Register (FFixedHW, + 0x20, // Bit Width + 0x00, // Bit Offset + 0x0000000040000004, // Address + 0x03, // Access Size + ) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + "KryoGold1.C4" + } + }) + } + + Device (CPU6) + { + Name (_HID, "MEOW0007" /* Processor Device */) // _HID: Hardware ID + Name (_UID, 0x06) // _UID: Unique ID + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0F) + } + + Name (_LPI, Package (0x07) // _LPI: Low Power Idle States + { + Zero, + Zero, + 0x04, + Package (0x0A) + { + Zero, + Zero, + One, + Zero, + Zero, + Zero, + ResourceTemplate () + { + Register (FFixedHW, + 0x20, // Bit Width + 0x00, // Bit Offset + 0x00000000FFFFFFFF, // Address + 0x03, // Access Size + ) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + "KryoGold2.C1" + }, + + Package (0x0A) + { + 0x0190, + 0x64, + Zero, + Zero, + Zero, + One, + ResourceTemplate () + { + Register (FFixedHW, + 0x20, // Bit Width + 0x00, // Bit Offset + 0x0000000000000002, // Address + 0x03, // Access Size + ) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + "KryoGold2.C2" + }, + + Package (0x0A) + { + 0x03E8, + 0x028A, + One, + One, + Zero, + One, + ResourceTemplate () + { + Register (FFixedHW, + 0x20, // Bit Width + 0x00, // Bit Offset + 0x0000000040000003, // Address + 0x03, // Access Size + ) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + "KryoGold2.C3" + }, + + Package (0x0A) + { + 0x05DC, + 0x044C, + One, + One, + Zero, + 0x02, + ResourceTemplate () + { + Register (FFixedHW, + 0x20, // Bit Width + 0x00, // Bit Offset + 0x0000000040000004, // Address + 0x03, // Access Size + ) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + "KryoGold2.C4" + } + }) + } + + Device (CPU7) + { + Name (_HID, "MEOW0007" /* Processor Device */) // _HID: Hardware ID + Name (_UID, 0x07) // _UID: Unique ID + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0F) + } + + Name (_LPI, Package (0x07) // _LPI: Low Power Idle States + { + Zero, + Zero, + 0x04, + Package (0x0A) + { + Zero, + Zero, + One, + Zero, + Zero, + Zero, + ResourceTemplate () + { + Register (FFixedHW, + 0x20, // Bit Width + 0x00, // Bit Offset + 0x00000000FFFFFFFF, // Address + 0x03, // Access Size + ) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + "KryoGold3.C1" + }, + + Package (0x0A) + { + 0x0190, + 0x64, + Zero, + Zero, + Zero, + One, + ResourceTemplate () + { + Register (FFixedHW, + 0x20, // Bit Width + 0x00, // Bit Offset + 0x0000000000000002, // Address + 0x03, // Access Size + ) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + "KryoGold3.C2" + }, + + Package (0x0A) + { + 0x03E8, + 0x028A, + One, + One, + Zero, + One, + ResourceTemplate () + { + Register (FFixedHW, + 0x20, // Bit Width + 0x00, // Bit Offset + 0x0000000040000003, // Address + 0x03, // Access Size + ) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + "KryoGold3.C3" + }, + + Package (0x0A) + { + 0x05DC, + 0x044C, + One, + One, + Zero, + 0x02, + ResourceTemplate () + { + Register (FFixedHW, + 0x20, // Bit Width + 0x00, // Bit Offset + 0x0000000040000004, // Address + 0x03, // Access Size + ) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + ResourceTemplate () + { + Register (SystemMemory, + 0x00, // Bit Width + 0x00, // Bit Offset + 0x0000000000000000, // Address + ,) + }, + + "KryoGold3.C4" + } + }) + } + } + } + + Device (QRNG) + { + Name (_DEP, Package (One) // _DEP: Dependencies + { + \_SB.PEP0 + }) + Name (_HID, "QCOM02FE") // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + Memory32Fixed (ReadWrite, + 0x00793000, // Address Base + 0x00001000, // Address Length + ) + }) + Return (RBUF) /* \_SB_.QRNG._CRS.RBUF */ + } + } + + // + // Qualcomm GPS driver + // + Device (GPS) + { + Name (_DEP, Package (One) // _DEP: Dependencies + { + \_SB.GLNK + }) + Name (_HID, "QCOM02B6") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + Name (_CID, "ACPIQCOM24B4") // _CID: Compatible ID + Name (_UID, Zero) // _UID: Unique ID + } + + Device (QGP0) + { + Name (_HID, "NOPE02F4") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + Name (_UID, Zero) // _UID: Unique ID + Name (_CCA, Zero) // _CCA: Cache Coherency Attribute + Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + Memory32Fixed (ReadWrite, + 0x00804000, // Address Base + 0x00050000, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000119, + } + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x0000011B, + } + }) + Return (RBUF) /* \_SB_.QGP0._CRS.RBUF */ + } + + Method (GPII, 0, Serialized) + { + Return (Package (0x02) + { + Package (0x03) + { + Zero, + 0x05, + 0x0119 + }, + + Package (0x03) + { + Zero, + 0x07, + 0x011B + } + }) + } + } + + Device (QGP1) + { + Name (_HID, "NOPE02F4") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + Name (_UID, One) // _UID: Unique ID + Name (_CCA, Zero) // _CCA: Cache Coherency Attribute + Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + Memory32Fixed (ReadWrite, + 0x00A04000, // Address Base + 0x00050000, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000138, + } + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x0000013A, + } + }) + Return (RBUF) /* \_SB_.QGP1._CRS.RBUF */ + } + + Method (GPII, 0, Serialized) + { + Return (Package (0x02) + { + Package (0x03) + { + One, + One, + 0x0138 + }, + + Package (0x03) + { + One, + 0x03, + 0x013A + } + }) + } + } + + Scope (\_SB) + { + OperationRegion (XACA, SystemMemory, 0x146BFA94, 0x64) + Field (XACA, AnyAcc, Lock, Preserve) + { + HBID, 8, + BWDS, 8, + PRP1, 8, + PVCS, 8, + BATP, 8, + VMXC, 8, + VMXN, 8, + VMXD, 8 + } + } + + Device (SARM) + { + Name (_HID, "QCOM0301") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + } + + Scope (\_SB) + { + Device (WBDI) + { + Name (_HID, "SAM0909") // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + Name (_SUB, "C153144D") // _SUB: Subsystem ID + Name (_DEP, Package (0x02) // _DEP: Dependencies + { + \_SB.GIO0, + \_SB.SCM0 + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0F) + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionNone, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x003E + } + GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionNone, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x003B + } + GpioInt (Level, ActiveLow, ExclusiveAndWake, PullDefault, 0x0000, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x003C + } + }) + Return (RBUF) /* \_SB_.WBDI._CRS.RBUF */ + } + } + } + + // + //CAMERA PLATFORM + // + Device (CAMP) + { + Name (_DEP, Package (0x02) // _DEP: Dependencies + { + \_SB.PEP0, + \_SB.PMIC + }) + Name (_HID, "QCOM026F") // _HID: Hardware ID + Name (_UID, 0x1B) // _UID: Unique ID + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + Memory32Fixed (ReadWrite, + 0x0AC40000, // Address Base + 0x0000006C, // Address Length + ) + Memory32Fixed (ReadWrite, + 0x0AC42000, // Address Base + 0x00004E8C, // Address Length + ) + Memory32Fixed (ReadWrite, + 0x0AC4A000, // Address Base + 0x00000C1C, // Address Length + ) + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x000001EC, + } + }) + Return (RBUF) /* \_SB_.CAMP._CRS.RBUF */ + } + + Name (PLED, Zero) + Method (PPUT, 1, NotSerialized) + { + PLED = Arg0 + If ((PLED == Zero)) + { + \_SB.LED1.RLED (0x0100, Zero) + } + + If ((PLED == One)) + { + \_SB.LED1.RLED (0x0100, One) + } + + Return (PLED) /* \_SB_.CAMP.PLED */ + } + + Method (PGET, 0, NotSerialized) + { + Return (PLED) /* \_SB_.CAMP.PLED */ + } + + Method (PCFG, 0, Serialized) + { + Return (Package (0x01) + { + Package (0x09) + { + 0x03, + Zero, + 0x00210010, + Zero, + Zero, + Zero, + Zero, + Zero, + Zero + } + }) + } + + Method (PERF, 0, NotSerialized) + { + Name (EBUF, Package (0x02) + { + Package (0x05) + { + "COMPONENT", + Zero, + Package (0x05) + { + "PSTATE_SET", + Zero, + Zero, + "CAMP_CLK", + Package (0x04) + { + "PSTATE", + Zero, + 0x023C3460, + 0x0124F800 + } + }, + + Package (0x05) + { + "PSTATE_SET", + One, + One, + "NRT_UNCOMP_BANDWIDTH", + Package (0x28) + { + "PSTATE", + Zero, + 0x00000002CB417800, + 0x00000002AD741300, + 0x000000028FA6AE00, + 0x0000000271D94900, + 0x00000002540BE400, + 0x00000002363E7F00, + 0x0000000218711A00, + 0x00000001FAA3B500, + 0x00000001DCD65000, + 0x00000001BF08EB00, + 0x00000001A13B8600, + 0x00000001836E2100, + 0x0000000165A0BC00, + 0x0000000147D35700, + 0x000000012A05F200, + 0x000000010C388D00, + 0xEE6B2800, + 0xD09DC300, + 0xC4B20100, + 0xB8C63F00, + 0xACDA7D00, + 0xA0EEBB00, + 0x9502F900, + 0x89173700, + 0x7D2B7500, + 0x713FB300, + 0x6553F100, + 0x59682F00, + 0x4D7C6D00, + 0x4190AB00, + 0x35A4E900, + 0x29B92700, + 0x1DCD6500, + 0x17D78400, + 0x11E1A300, + 0x0BEBC200, + 0x05F5E100, + Zero + } + }, + + Package (0x05) + { + "PSTATE_SET", + 0x02, + One, + "NRT_BANDWIDTH", + Package (0x28) + { + "PSTATE", + Zero, + 0x00000002CB417800, + 0x00000002AD741300, + 0x000000028FA6AE00, + 0x0000000271D94900, + 0x00000002540BE400, + 0x00000002363E7F00, + 0x0000000218711A00, + 0x00000001FAA3B500, + 0x00000001DCD65000, + 0x00000001BF08EB00, + 0x00000001A13B8600, + 0x00000001836E2100, + 0x0000000165A0BC00, + 0x0000000147D35700, + 0x000000012A05F200, + 0x000000010C388D00, + 0xEE6B2800, + 0xD09DC300, + 0xC4B20100, + 0xB8C63F00, + 0xACDA7D00, + 0xA0EEBB00, + 0x9502F900, + 0x89173700, + 0x7D2B7500, + 0x713FB300, + 0x6553F100, + 0x59682F00, + 0x4D7C6D00, + 0x4190AB00, + 0x35A4E900, + 0x29B92700, + 0x1DCD6500, + 0x17D78400, + 0x11E1A300, + 0x0BEBC200, + 0x05F5E100, + Zero + } + } + }, + + Package (0x06) + { + "COMPONENT", + One, + Package (0x05) + { + "PSTATE_SET", + Zero, + One, + "HF0_UNCOMP_BANDWIDTH", + Package (0x08) + { + "PSTATE", + Zero, + 0x4190AB00, + 0x17D78400, + 0x11E1A300, + 0x0BEBC200, + 0x05F5E100, + Zero + } + }, + + Package (0x05) + { + "PSTATE_SET", + One, + One, + "HF0_BANDWIDTH", + Package (0x08) + { + "PSTATE", + Zero, + 0x4190AB00, + 0x17D78400, + 0x11E1A300, + 0x0BEBC200, + 0x05F5E100, + Zero + } + }, + + Package (0x05) + { + "PSTATE_SET", + 0x02, + One, + "NRT_UNCOMP_BANDWIDTH", + Package (0x08) + { + "PSTATE", + Zero, + 0x4190AB00, + 0x17D78400, + 0x11E1A300, + 0x0BEBC200, + 0x05F5E100, + Zero + } + }, + + Package (0x05) + { + "PSTATE_SET", + 0x03, + One, + "NRT_BANDWIDTH", + Package (0x08) + { + "PSTATE", + Zero, + 0x4190AB00, + 0x17D78400, + 0x11E1A300, + 0x0BEBC200, + 0x05F5E100, + Zero + } + } + } + }) + Return (EBUF) /* \_SB_.CAMP.PERF.EBUF */ + } + } + + // + // CAMERA SENSOR + // + Device (CAMS) + { + Name (_DEP, Package (One) // _DEP: Dependencies + { + \_SB.MPCS + }) + Name (_HID, "QCOM0245") // _HID: Hardware ID + Name (_UID, 0x15) // _UID: Unique ID + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0F) + } + + Method (SCFG, 0, Serialized) + { + Return (Package (0x01) + { + Package (0x05) + { + "com.qti.sensormodule.powerlogics_s5k4h5yc.bin", + "com.qti.tuned.powerlogics_s5k4h5yc.bin", + 0x0015006E, + 0x485B0000, + Zero + } + }) + } + + Name (PGID, Buffer (0x0A) + { + "\\_SB.CAMS" + }) + Name (DBUF, Buffer (DBFL){}) + CreateByteField (DBUF, Zero, STAT) + CreateByteField (DBUF, 0x02, DVAL) + CreateField (DBUF, 0x18, 0xA0, DEID) + Method (_S1D, 0, NotSerialized) // _S1D: S1 Device State + { + Return (0x03) + } + + Method (_S2D, 0, NotSerialized) // _S2D: S2 Device State + { + Return (0x03) + } + + Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State + { + Return (0x03) + } + + Method (_PS0, 0, NotSerialized) // _PS0: Power State 0 + { + DEID = Buffer (ESNL){} + DVAL = Zero + DEID = PGID /* \_SB_.CAMS.PGID */ + If (\_SB.ABD.AVBL) + { + \_SB.PEP0.FLD0 = DBUF /* \_SB_.CAMS.DBUF */ + } + } + + Method (_PS3, 0, NotSerialized) // _PS3: Power State 3 + { + DEID = Buffer (ESNL){} + DVAL = 0x03 + DEID = PGID /* \_SB_.CAMS.PGID */ + If (\_SB.ABD.AVBL) + { + \_SB.PEP0.FLD0 = DBUF /* \_SB_.CAMS.DBUF */ + } + } + } + + Device (CAMF) + { + Name (_DEP, Package (One) // _DEP: Dependencies + { + \_SB.MPCS + }) + Name (_HID, "QCOM024A") // _HID: Hardware ID + Name (_UID, 0x1A) // _UID: Unique ID + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0F) + } + + Method (SCFG, 0, Serialized) + { + Return (Package (0x01) + { + Package (0x05) + { + "com.qti.sensormodule.hnt_s5k5e3yx.bin", + "com.qti.tuned.hnt_s5k5e3yx.bin", + 0x00150020, + 0x5E300000, + Zero + } + }) + } + + Name (PGID, Buffer (0x0A) + { + "\\_SB.CAMF" + }) + Name (DBUF, Buffer (DBFL){}) + CreateByteField (DBUF, Zero, STAT) + CreateByteField (DBUF, 0x02, DVAL) + CreateField (DBUF, 0x18, 0xA0, DEID) + Method (_S1D, 0, NotSerialized) // _S1D: S1 Device State + { + Return (0x03) + } + + Method (_S2D, 0, NotSerialized) // _S2D: S2 Device State + { + Return (0x03) + } + + Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State + { + Return (0x03) + } + + Method (_PS0, 0, NotSerialized) // _PS0: Power State 0 + { + DEID = Buffer (ESNL){} + DVAL = Zero + DEID = PGID /* \_SB_.CAMF.PGID */ + If (\_SB.ABD.AVBL) + { + \_SB.PEP0.FLD0 = DBUF /* \_SB_.CAMF.DBUF */ + } + } + + Method (_PS3, 0, NotSerialized) // _PS3: Power State 3 + { + DEID = Buffer (ESNL){} + DVAL = 0x03 + DEID = PGID /* \_SB_.CAMF.PGID */ + If (\_SB.ABD.AVBL) + { + \_SB.PEP0.FLD0 = DBUF /* \_SB_.CAMF.DBUF */ + } + } + } + + Device (CAMI) + { + Name (_DEP, Package (One) // _DEP: Dependencies + { + \_SB.MPCS + }) + Name (_HID, "QCOM0247") // _HID: Hardware ID + Name (_UID, 0x1C) // _UID: Unique ID + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (Zero) + } + + Method (SCFG, 0, Serialized) + { + Return (Package (0x01) + { + Package (0x05) + { + "com.qti.sensormodule.tfc_ov7251.bin", + "com.qti.tuned.liteon_ov7251.bin", + 0x001500C0, + 0x7750300A, + Zero + } + }) + } + + Name (PGID, Buffer (0x0A) + { + "\\_SB.CAMI" + }) + Name (DBUF, Buffer (DBFL){}) + CreateByteField (DBUF, Zero, STAT) + CreateByteField (DBUF, 0x02, DVAL) + CreateField (DBUF, 0x18, 0xA0, DEID) + Method (_S1D, 0, NotSerialized) // _S1D: S1 Device State + { + Return (0x03) + } + + Method (_S2D, 0, NotSerialized) // _S2D: S2 Device State + { + Return (0x03) + } + + Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State + { + Return (0x03) + } + + Method (_PS0, 0, NotSerialized) // _PS0: Power State 0 + { + DEID = Buffer (ESNL){} + DVAL = Zero + DEID = PGID /* \_SB_.CAMI.PGID */ + If (\_SB.ABD.AVBL) + { + \_SB.PEP0.FLD0 = DBUF /* \_SB_.CAMI.DBUF */ + } + } + + Method (_PS3, 0, NotSerialized) // _PS3: Power State 3 + { + DEID = Buffer (ESNL){} + DVAL = 0x03 + DEID = PGID /* \_SB_.CAMI.PGID */ + If (\_SB.ABD.AVBL) + { + \_SB.PEP0.FLD0 = DBUF /* \_SB_.CAMI.DBUF */ + } + } + } + + Device (FLSH) + { + Name (_DEP, Package (One) // _DEP: Dependencies + { + \_SB.CAMP + }) + Name (_HID, "QCOM025C") // _HID: Hardware ID + Name (_UID, 0x19) // _UID: Unique ID + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (Zero) + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, Buffer (0x02) + { + 0x79, 0x00 // y. + }) + Return (RBUF) /* \_SB_.FLSH._CRS.RBUF */ + } + } + + Device (MPCS) + { + Name (_DEP, Package (One) // _DEP: Dependencies + { + \_SB.CAMP + }) + Name (_HID, "QCOM02E8") // _HID: Hardware ID + Name (_UID, 0x18) // _UID: Unique ID + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + Memory32Fixed (ReadWrite, + 0x0AC65000, // Address Base + 0x00000900, // Address Length + ) + Memory32Fixed (ReadWrite, + 0x0AC66000, // Address Base + 0x00000900, // Address Length + ) + Memory32Fixed (ReadWrite, + 0x0AC67000, // Address Base + 0x00000900, // Address Length + ) + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x000001FD, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x000001FE, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x000001FF, + } + }) + Return (RBUF) /* \_SB_.MPCS._CRS.RBUF */ + } + } + + // + // Hardware JPEG Encoder + // + Device (JPGE) + { + Name (_DEP, Package (0x02) // _DEP: Dependencies + { + \_SB.CAMP, + \_SB.MMU0 + }) + Name (_HID, "QCOM0276") // _HID: Hardware ID + Name (_UID, 0x17) // _UID: Unique ID + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + Memory32Fixed (ReadWrite, + 0x0AC4E000, // Address Base + 0x00000340, // Address Length + ) + Memory32Fixed (ReadWrite, + 0x0AC52000, // Address Base + 0x000001B4, // Address Length + ) + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x000001FA, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x000001FB, + } + }) + Return (RBUF) /* \_SB_.JPGE._CRS.RBUF */ + } + + Method (PERF, 0, NotSerialized) + { + Name (EBUF, Package (0x02) + { + Package (0x03) + { + "COMPONENT", + Zero, + Package (0x05) + { + "PSTATE_SET", + Zero, + Zero, + "JPEG0_CLK", + Package (0x06) + { + "PSTATE", + Zero, + 0x23C34600, + 0x23C34600, + 0x18148D00, + 0x0BEBC200 + } + } + }, + + Package (0x03) + { + "COMPONENT", + One, + Package (0x05) + { + "PSTATE_SET", + Zero, + Zero, + "DMA_CLK", + Package (0x05) + { + "PSTATE", + Zero, + 0x23C34600, + 0x23C34600, + 0x0BEBC200 + } + } + } + }) + Return (EBUF) /* \_SB_.JPGE.PERF.EBUF */ + } + } + + Device (VFE0) + { + Name (_DEP, Package (0x03) // _DEP: Dependencies + { + \_SB.MMU0, + \_SB.PEP0, + \_SB.CAMP + }) + Name (_HID, "QCOM0243") // _HID: Hardware ID + Name (_UID, 0x16) // _UID: Unique ID + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + Memory32Fixed (ReadWrite, + 0x0AC00000, // Address Base + 0x00020000, // Address Length + ) + Memory32Fixed (ReadWrite, + 0x0AC48000, // Address Base + 0x00001000, // Address Length + ) + Memory32Fixed (ReadWrite, + 0x0AC5A000, // Address Base + 0x00004000, // Address Length + ) + Memory32Fixed (ReadWrite, + 0x0AC6B000, // Address Base + 0x00001000, // Address Length + ) + Memory32Fixed (ReadOnly, + 0x0AC6F000, // Address Base + 0x00008000, // Address Length + ) + Memory32Fixed (ReadOnly, + 0x0AC87000, // Address Base + 0x0000A000, // Address Length + ) + Memory32Fixed (ReadOnly, + 0x0AC91000, // Address Base + 0x0000A000, // Address Length + ) + Memory32Fixed (ReadWrite, + 0x0ACAF000, // Address Base + 0x00005000, // Address Length + ) + Memory32Fixed (ReadWrite, + 0x0ACB6000, // Address Base + 0x00005000, // Address Length + ) + Memory32Fixed (ReadWrite, + 0x0ACC4000, // Address Base + 0x00005000, // Address Length + ) + Memory32Fixed (ReadWrite, + 0x8BF00000, // Address Base + 0x00500000, // Address Length + ) + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x000001ED, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x000001EF, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x000001F1, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x000001F3, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x000001F5, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x000001EE, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x000001F0, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x000001F2, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x000001F4, + } + }) + Return (RBUF) /* \_SB_.VFE0._CRS.RBUF */ + } + + Method (PERF, 0, NotSerialized) + { + Name (EBUF, Package (0x08) + { + Package (0x05) + { + "COMPONENT", + Zero, + Package (0x05) + { + "PSTATE_SET", + Zero, + Zero, + "IFE0_CLK", + Package (0x06) + { + "PSTATE", + Zero, + 0x23C34600, + 0x1C9C3800, + 0x18148D00, + Zero + } + }, + + Package (0x05) + { + "PSTATE_SET", + One, + One, + "HF0_UNCOMP_BANDWIDTH", + Package (0x20) + { + "PSTATE", + Zero, + 0x00000008D8F9FC00, + 0x0000000826299E00, + 0x0000000684EE1800, + 0x000000055AE82600, + 0x00000004A817C800, + 0x00000003B9ACA000, + 0x0000000342770C00, + 0x00000002CB417800, + 0xEE6B2800, + 0xD09DC300, + 0xC4B20100, + 0xB8C63F00, + 0xACDA7D00, + 0xA0EEBB00, + 0x9502F900, + 0x89173700, + 0x7D2B7500, + 0x713FB300, + 0x6553F100, + 0x59682F00, + 0x4D7C6D00, + 0x4190AB00, + 0x35A4E900, + 0x29B92700, + 0x1DCD6500, + 0x17D78400, + 0x11E1A300, + 0x0BEBC200, + 0x05F5E100, + Zero + } + }, + + Package (0x05) + { + "PSTATE_SET", + 0x02, + One, + "HF0_BANDWIDTH", + Package (0x20) + { + "PSTATE", + Zero, + 0x00000008D8F9FC00, + 0x0000000826299E00, + 0x0000000684EE1800, + 0x000000055AE82600, + 0x00000004A817C800, + 0x00000003B9ACA000, + 0x0000000342770C00, + 0x00000002CB417800, + 0xEE6B2800, + 0xD09DC300, + 0xC4B20100, + 0xB8C63F00, + 0xACDA7D00, + 0xA0EEBB00, + 0x9502F900, + 0x89173700, + 0x7D2B7500, + 0x713FB300, + 0x6553F100, + 0x59682F00, + 0x4D7C6D00, + 0x4190AB00, + 0x35A4E900, + 0x29B92700, + 0x1DCD6500, + 0x17D78400, + 0x11E1A300, + 0x0BEBC200, + 0x05F5E100, + Zero + } + } + }, + + Package (0x05) + { + "COMPONENT", + One, + Package (0x05) + { + "PSTATE_SET", + Zero, + Zero, + "IFE1_CLK", + Package (0x06) + { + "PSTATE", + Zero, + 0x23C34600, + 0x1C9C3800, + 0x18148D00, + Zero + } + }, + + Package (0x05) + { + "PSTATE_SET", + One, + One, + "HF1_UNCOMP_BANDWIDTH", + Package (0x20) + { + "PSTATE", + Zero, + 0x00000008D8F9FC00, + 0x0000000826299E00, + 0x0000000684EE1800, + 0x000000055AE82600, + 0x00000004A817C800, + 0x00000003B9ACA000, + 0x0000000342770C00, + 0x00000002CB417800, + 0xEE6B2800, + 0xD09DC300, + 0xC4B20100, + 0xB8C63F00, + 0xACDA7D00, + 0xA0EEBB00, + 0x9502F900, + 0x89173700, + 0x7D2B7500, + 0x713FB300, + 0x6553F100, + 0x59682F00, + 0x4D7C6D00, + 0x4190AB00, + 0x35A4E900, + 0x29B92700, + 0x1DCD6500, + 0x17D78400, + 0x11E1A300, + 0x0BEBC200, + 0x05F5E100, + Zero + } + }, + + Package (0x05) + { + "PSTATE_SET", + 0x02, + One, + "HF1_BANDWIDTH", + Package (0x20) + { + "PSTATE", + Zero, + 0x00000008D8F9FC00, + 0x0000000826299E00, + 0x0000000684EE1800, + 0x000000055AE82600, + 0x00000004A817C800, + 0x00000003B9ACA000, + 0x0000000342770C00, + 0x00000002CB417800, + 0xEE6B2800, + 0xD09DC300, + 0xC4B20100, + 0xB8C63F00, + 0xACDA7D00, + 0xA0EEBB00, + 0x9502F900, + 0x89173700, + 0x7D2B7500, + 0x713FB300, + 0x6553F100, + 0x59682F00, + 0x4D7C6D00, + 0x4190AB00, + 0x35A4E900, + 0x29B92700, + 0x1DCD6500, + 0x17D78400, + 0x11E1A300, + 0x0BEBC200, + 0x05F5E100, + Zero + } + } + }, + + Package (0x03) + { + "COMPONENT", + 0x02, + Package (0x05) + { + "PSTATE_SET", + Zero, + Zero, + "IFE_LITE_CLK", + Package (0x06) + { + "PSTATE", + Zero, + 0x23C34600, + 0x1C9C3800, + 0x18148D00, + Zero + } + } + }, + + Package (0x03) + { + "COMPONENT", + 0x03, + Package (0x05) + { + "PSTATE_SET", + Zero, + Zero, + "ICP_CLK", + Package (0x05) + { + "PSTATE", + Zero, + 0x23C34600, + 0x17D78400, + Zero + } + } + }, + + Package (0x04) + { + "COMPONENT", + 0x04, + Package (0x05) + { + "PSTATE_SET", + Zero, + Zero, + "IPE0_CLK", + Package (0x06) + { + "PSTATE", + Zero, + 0x23C34600, + 0x1C9C3800, + 0x18148D00, + Zero + } + }, + + Package (0x05) + { + "PSTATE_SET", + One, + Zero, + "IPE1_CLK", + Package (0x06) + { + "PSTATE", + Zero, + 0x23C34600, + 0x1C9C3800, + 0x18148D00, + Zero + } + } + }, + + Package (0x03) + { + "COMPONENT", + 0x05, + Package (0x05) + { + "PSTATE_SET", + Zero, + Zero, + "BPS_CLK", + Package (0x06) + { + "PSTATE", + Zero, + 0x23C34600, + 0x1C9C3800, + 0x18148D00, + Zero + } + } + }, + + Package (0x03) + { + "COMPONENT", + 0x06, + Package (0x05) + { + "PSTATE_SET", + Zero, + Zero, + "LRME_CLK", + Package (0x06) + { + "PSTATE", + Zero, + 0x17D78400, + 0x1312D000, + 0x10089D40, + Zero + } + } + }, + + Package (0x03) + { + "COMPONENT", + 0x07, + Package (0x05) + { + "PSTATE_SET", + Zero, + Zero, + "FD_CLK", + Package (0x06) + { + "PSTATE", + Zero, + 0x23C34600, + 0x20113A80, + 0x17D78400, + Zero + } + } + } + }) + Return (EBUF) /* \_SB_.VFE0.PERF.EBUF */ + } + } + + Scope (\_SB) + { + Name (GRST, Zero) + } + + // Qualcomm Sensor Collection + Device (SEN2) + { + Name (_DEP, Package (0x03) // _DEP: Dependencies + { + \_SB.IPC0, + \_SB.SCSS, + \_SB.ARPC + }) + Name (_HID, "QCOM0308") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + Name (_CID, "QCOM02A2") // _CID: Compatible ID + } + + Device (ALS1) + { + Name (_ADR, Zero) // _ADR: Address + Name (_HID, "SAM0204") // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_DEP, Package (0x01) // _DEP: Dependencies + { + \_SB.I2C3 + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0F) + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + I2cSerialBusV2 (0x0029, ControllerInitiated, 0x00061A80, + AddressingMode7Bit, "\\_SB.I2C3", + 0x00, ResourceConsumer, , Exclusive, + ) + }) + Return (RBUF) /* \_SB_.ALS1._CRS.RBUF */ + } + + Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method + { + If ((Arg0 == ToUUID ("518808e9-2eb8-42d3-b5e3-b135f94343c9"))) + { + If ((Arg2 == Zero)) + { + Return (Buffer (One) + { + 0x03 // . + }) + } + + If ((Arg2 == One)) + { + Return (Buffer (0xEC) + { + /* 0000 */ 0x80, 0x13, 0x81, 0xDA, 0x82, 0x00, 0x83, 0x00, // ........ + /* 0008 */ 0x84, 0x00, 0x85, 0x00, 0x86, 0x00, 0x87, 0x02, // ........ + /* 0010 */ 0xFF, 0xFF, 0xFF, 0xFF, 0x05, 0x00, 0x00, 0x00, // ........ + /* 0018 */ 0x01, 0x00, 0x00, 0x00, 0x16, 0x00, 0x00, 0x00, // ........ + /* 0020 */ 0x03, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, // .... ... + /* 0028 */ 0x06, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, // ....(... + /* 0030 */ 0x0A, 0x00, 0x00, 0x00, 0x32, 0x00, 0x00, 0x00, // ....2... + /* 0038 */ 0x13, 0x00, 0x00, 0x00, 0x3C, 0x00, 0x00, 0x00, // ....<... + /* 0040 */ 0x25, 0x00, 0x00, 0x00, 0x46, 0x00, 0x00, 0x00, // %...F... + /* 0048 */ 0x47, 0x00, 0x00, 0x00, 0x50, 0x00, 0x00, 0x00, // G...P... + /* 0050 */ 0x88, 0x00, 0x00, 0x00, 0x5A, 0x00, 0x00, 0x00, // ....Z... + /* 0058 */ 0x04, 0x01, 0x00, 0x00, 0x64, 0x00, 0x00, 0x00, // ....d... + /* 0060 */ 0xF4, 0x01, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, // ........ + /* 0068 */ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // ........ + /* 0070 */ 0xFF, 0xFF, 0xFF, 0xFF, 0xFC, 0xA9, 0xF1, 0x3E, // .......> + /* 0078 */ 0x7B, 0x14, 0xA2, 0x40, 0x52, 0xB8, 0x02, 0x41, // {..@R..A + /* 0080 */ 0x52, 0xB8, 0x3E, 0x3F, 0x17, 0xD9, 0x16, 0x40, // R.>?...@ + /* 0088 */ 0x1F, 0x85, 0x1B, 0x40, 0x21, 0xB0, 0x82, 0x3F, // ...@!..? + /* 0090 */ 0xB0, 0x72, 0xB8, 0x3F, 0x5E, 0xBA, 0x99, 0x3F, // .r.?^..? + /* 0098 */ 0x00, 0x00, 0x60, 0x40, 0x08, 0xAC, 0x9C, 0x3E, // ..`@...> + /* 00A0 */ 0x0E, 0x2D, 0xB2, 0x3D, 0xFF, 0xFF, 0xFF, 0xFF, // .-.=.... + /* 00A8 */ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // ........ + /* 00B0 */ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // ........ + /* 00B8 */ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // ........ + /* 00C0 */ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // ........ + /* 00C8 */ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // ........ + /* 00D0 */ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // ........ + /* 00D8 */ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // ........ + /* 00E0 */ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // ........ + /* 00E8 */ 0xFF, 0xFF, 0xFF, 0xFF // .... + }) + } + } + Else + { + Return (Buffer (One) + { + 0x00 // . + }) + } + } + } + + Device (SAR1) + { + Name (_ADR, Zero) // _ADR: Address + Name (_HID, "SAM0207") // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_DEP, Package (0x01) // _DEP: Dependencies + { + \_SB.I2C5 + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0F) + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + I2cSerialBusV2 (0x002C, ControllerInitiated, 0x00061A80, + AddressingMode7Bit, "\\_SB.I2C5", + 0x00, ResourceConsumer, , Exclusive, + ) + GpioInt (Level, ActiveLow, ExclusiveAndWake, PullDefault, 0x0000, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0054 + } + }) + Return (RBUF) /* \_SB_.SAR1._CRS.RBUF */ + } + + Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method + { + If ((Arg0 == ToUUID ("37305404-87d8-4117-b665-c877ec1ce7db"))) + { + If ((Arg2 == Zero)) + { + Return (Buffer (One) + { + 0x3F // ? + }) + } + + If ((Arg2 == One)) + { + Return (Buffer (0x40) + { + /* 0000 */ 0x10, 0x0F, 0x05, 0x60, 0x11, 0x28, 0x27, 0x07, // ...`.('. + /* 0008 */ 0x28, 0x00, 0x29, 0x00, 0x2A, 0x00, 0x2B, 0x04, // (.).*.+. + /* 0010 */ 0x31, 0x09, 0x33, 0x20, 0x35, 0x14, 0x36, 0x08, // 1.3 5.6. + /* 0018 */ 0x37, 0x1A, 0x4A, 0x40, 0x4D, 0x04, 0x06, 0x00, // 7.J@M... + /* 0020 */ 0x07, 0x80, 0x2D, 0x08, 0xFF, 0xFF, 0xFF, 0xFF, // ..-..... + /* 0028 */ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // ........ + /* 0030 */ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // ........ + /* 0038 */ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF // ........ + }) + } + + If ((Arg2 == 0x02)) + { + Return (Buffer (One) + { + 0x01 // . + }) + } + + If ((Arg2 == 0x03)) + { + While (One) + { + Name (_T_0, 0x00) // _T_x: Emitted by ASL Compiler + _T_0 = ToInteger (\_SB.GRST) + If ((_T_0 == Zero)) + { + Return (Buffer (0x04) + { + 0x00 // . + }) + } + ElseIf ((_T_0 == One)) + { + Return (Buffer (0x04) + { + 0x01 // . + }) + } + ElseIf ((_T_0 == 0x02)) + { + Return (Buffer (0x04) + { + 0x02 // . + }) + } + ElseIf ((_T_0 == 0x03)) + { + Return (Buffer (0x04) + { + 0x03 // . + }) + } + ElseIf ((_T_0 == 0x04)) + { + Return (Buffer (0x04) + { + 0x04 // . + }) + } + ElseIf ((_T_0 == 0x05)) + { + Return (Buffer (0x04) + { + 0x05 // . + }) + } + ElseIf ((_T_0 == 0x06)) + { + Return (Buffer (0x04) + { + 0x06 // . + }) + } + ElseIf ((_T_0 == 0x07)) + { + Return (Buffer (0x04) + { + 0x07 // . + }) + } + ElseIf ((_T_0 == 0x08)) + { + Return (Buffer (0x04) + { + 0x08 // . + }) + } + ElseIf ((_T_0 == 0x09)) + { + Return (Buffer (0x04) + { + 0x09 // . + }) + } + ElseIf ((_T_0 == 0x0A)) + { + Return (Buffer (0x04) + { + 0x0A // . + }) + } + ElseIf ((_T_0 == 0x0B)) + { + Return (Buffer (0x04) + { + 0x0B // . + }) + } + ElseIf ((_T_0 == 0x0C)) + { + Return (Buffer (0x04) + { + 0x0C // . + }) + } + ElseIf ((_T_0 == 0x0D)) + { + Return (Buffer (0x04) + { + 0x0D // . + }) + } + ElseIf ((_T_0 == 0x0E)) + { + Return (Buffer (0x04) + { + 0x0E // . + }) + } + ElseIf ((_T_0 == 0x0F)) + { + Return (Buffer (0x04) + { + 0x0F // . + }) + } + + Break + } + } + + If ((Arg2 == 0x04)) + { + ADBG ("Grip1 WORKING!") + \_SB.GRST |= One + While (One) + { + Name (_T_1, 0x00) // _T_x: Emitted by ASL Compiler + _T_1 = ToInteger (\_SB.GRST) + If ((_T_1 == Zero)) + { + Return (Buffer (0x04) + { + 0x00 // . + }) + } + ElseIf ((_T_1 == One)) + { + Return (Buffer (0x04) + { + 0x01 // . + }) + } + ElseIf ((_T_1 == 0x02)) + { + Return (Buffer (0x04) + { + 0x02 // . + }) + } + ElseIf ((_T_1 == 0x03)) + { + Return (Buffer (0x04) + { + 0x03 // . + }) + } + ElseIf ((_T_1 == 0x04)) + { + Return (Buffer (0x04) + { + 0x04 // . + }) + } + ElseIf ((_T_1 == 0x05)) + { + Return (Buffer (0x04) + { + 0x05 // . + }) + } + ElseIf ((_T_1 == 0x06)) + { + Return (Buffer (0x04) + { + 0x06 // . + }) + } + ElseIf ((_T_1 == 0x07)) + { + Return (Buffer (0x04) + { + 0x07 // . + }) + } + ElseIf ((_T_1 == 0x08)) + { + Return (Buffer (0x04) + { + 0x08 // . + }) + } + ElseIf ((_T_1 == 0x09)) + { + Return (Buffer (0x04) + { + 0x09 // . + }) + } + ElseIf ((_T_1 == 0x0A)) + { + Return (Buffer (0x04) + { + 0x0A // . + }) + } + ElseIf ((_T_1 == 0x0B)) + { + Return (Buffer (0x04) + { + 0x0B // . + }) + } + ElseIf ((_T_1 == 0x0C)) + { + Return (Buffer (0x04) + { + 0x0C // . + }) + } + ElseIf ((_T_1 == 0x0D)) + { + Return (Buffer (0x04) + { + 0x0D // . + }) + } + ElseIf ((_T_1 == 0x0E)) + { + Return (Buffer (0x04) + { + 0x0E // . + }) + } + ElseIf ((_T_1 == 0x0F)) + { + Return (Buffer (0x04) + { + 0x0F // . + }) + } + + Break + } + } + + If ((Arg2 == 0x05)) + { + ADBG ("Grip1 RELEASE!") + \_SB.GRST &= ~One + While (One) + { + Name (_T_2, 0x00) // _T_x: Emitted by ASL Compiler + _T_2 = ToInteger (\_SB.GRST) + If ((_T_2 == Zero)) + { + Return (Buffer (0x04) + { + 0x00 // . + }) + } + ElseIf ((_T_2 == One)) + { + Return (Buffer (0x04) + { + 0x01 // . + }) + } + ElseIf ((_T_2 == 0x02)) + { + Return (Buffer (0x04) + { + 0x02 // . + }) + } + ElseIf ((_T_2 == 0x03)) + { + Return (Buffer (0x04) + { + 0x03 // . + }) + } + ElseIf ((_T_2 == 0x04)) + { + Return (Buffer (0x04) + { + 0x04 // . + }) + } + ElseIf ((_T_2 == 0x05)) + { + Return (Buffer (0x04) + { + 0x05 // . + }) + } + ElseIf ((_T_2 == 0x06)) + { + Return (Buffer (0x04) + { + 0x06 // . + }) + } + ElseIf ((_T_2 == 0x07)) + { + Return (Buffer (0x04) + { + 0x07 // . + }) + } + ElseIf ((_T_2 == 0x08)) + { + Return (Buffer (0x04) + { + 0x08 // . + }) + } + ElseIf ((_T_2 == 0x09)) + { + Return (Buffer (0x04) + { + 0x09 // . + }) + } + ElseIf ((_T_2 == 0x0A)) + { + Return (Buffer (0x04) + { + 0x0A // . + }) + } + ElseIf ((_T_2 == 0x0B)) + { + Return (Buffer (0x04) + { + 0x0B // . + }) + } + ElseIf ((_T_2 == 0x0C)) + { + Return (Buffer (0x04) + { + 0x0C // . + }) + } + ElseIf ((_T_2 == 0x0D)) + { + Return (Buffer (0x04) + { + 0x0D // . + }) + } + ElseIf ((_T_2 == 0x0E)) + { + Return (Buffer (0x04) + { + 0x0E // . + }) + } + ElseIf ((_T_2 == 0x0F)) + { + Return (Buffer (0x04) + { + 0x0F // . + }) + } + + Break + } + } + + If ((Arg2 == 0x06)) + { + ADBG ("Disp ON by Grip1") + ADBG (Concatenate ("GRST: ", ToHexString (\_SB.GRST))) + If ((\_SB.GRST == Zero)) + { + ADBG ("GRST is Already 0") + Return (Buffer (One) + { + 0x00 // . + }) + } + Else + { + \_SB.GRST = Zero + ADBG ("Set GRST to 0") + ADBG (Concatenate ("GRST: ", ToHexString (\_SB.GRST))) + ADBG ("LID Close noti") + \_SB.LID0.LIDB = Zero + Notify (\_SB.LID0, 0x80) // Status Change + ADBG ("Grip1 Sleep 500") + Sleep (0x01F4) + ADBG ("LID Open noti") + \_SB.LID0.LIDB = One + Notify (\_SB.LID0, 0x80) // Status Change + Return (Buffer (One) + { + 0x01 // . + }) + } + } + } + Else + { + Return (Buffer (One) + { + 0x00 // . + }) + } + } + } + + Device (SAR2) + { + Name (_ADR, Zero) // _ADR: Address + Name (_HID, "SAM0207") // _HID: Hardware ID + Name (_UID, 0x02) // _UID: Unique ID + Name (_DEP, Package (0x01) // _DEP: Dependencies + { + \_SB.IC11 + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0F) + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + I2cSerialBusV2 (0x0028, ControllerInitiated, 0x00061A80, + AddressingMode7Bit, "\\_SB.IC11", + 0x00, ResourceConsumer, , Exclusive, + ) + GpioInt (Level, ActiveLow, ExclusiveAndWake, PullDefault, 0x0000, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x004F + } + }) + Return (RBUF) /* \_SB_.SAR2._CRS.RBUF */ + } + + Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method + { + If ((Arg0 == ToUUID ("37305404-87d8-4117-b665-c877ec1ce7db"))) + { + If ((Arg2 == Zero)) + { + Return (Buffer (One) + { + 0x3F // ? + }) + } + + If ((Arg2 == One)) + { + Return (Buffer (0x40) + { + /* 0000 */ 0x10, 0x16, 0x05, 0x60, 0x11, 0x28, 0x27, 0x07, // ...`.('. + /* 0008 */ 0x28, 0x00, 0x29, 0x00, 0x2A, 0x00, 0x2B, 0x04, // (.).*.+. + /* 0010 */ 0x33, 0x20, 0x35, 0x14, 0x36, 0x08, 0x37, 0x28, // 3 5.6.7( + /* 0018 */ 0x4A, 0x40, 0x4D, 0x04, 0x06, 0x00, 0x07, 0x80, // J@M..... + /* 0020 */ 0x2D, 0x08, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // -....... + /* 0028 */ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // ........ + /* 0030 */ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // ........ + /* 0038 */ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF // ........ + }) + } + + If ((Arg2 == 0x02)) + { + Return (Buffer (One) + { + 0x02 // . + }) + } + + If ((Arg2 == 0x03)) + { + While (One) + { + Name (_T_0, 0x00) // _T_x: Emitted by ASL Compiler + _T_0 = ToInteger (\_SB.GRST) + If ((_T_0 == Zero)) + { + Return (Buffer (0x04) + { + 0x00 // . + }) + } + ElseIf ((_T_0 == One)) + { + Return (Buffer (0x04) + { + 0x01 // . + }) + } + ElseIf ((_T_0 == 0x02)) + { + Return (Buffer (0x04) + { + 0x02 // . + }) + } + ElseIf ((_T_0 == 0x03)) + { + Return (Buffer (0x04) + { + 0x03 // . + }) + } + ElseIf ((_T_0 == 0x04)) + { + Return (Buffer (0x04) + { + 0x04 // . + }) + } + ElseIf ((_T_0 == 0x05)) + { + Return (Buffer (0x04) + { + 0x05 // . + }) + } + ElseIf ((_T_0 == 0x06)) + { + Return (Buffer (0x04) + { + 0x06 // . + }) + } + ElseIf ((_T_0 == 0x07)) + { + Return (Buffer (0x04) + { + 0x07 // . + }) + } + ElseIf ((_T_0 == 0x08)) + { + Return (Buffer (0x04) + { + 0x08 // . + }) + } + ElseIf ((_T_0 == 0x09)) + { + Return (Buffer (0x04) + { + 0x09 // . + }) + } + ElseIf ((_T_0 == 0x0A)) + { + Return (Buffer (0x04) + { + 0x0A // . + }) + } + ElseIf ((_T_0 == 0x0B)) + { + Return (Buffer (0x04) + { + 0x0B // . + }) + } + ElseIf ((_T_0 == 0x0C)) + { + Return (Buffer (0x04) + { + 0x0C // . + }) + } + ElseIf ((_T_0 == 0x0D)) + { + Return (Buffer (0x04) + { + 0x0D // . + }) + } + ElseIf ((_T_0 == 0x0E)) + { + Return (Buffer (0x04) + { + 0x0E // . + }) + } + ElseIf ((_T_0 == 0x0F)) + { + Return (Buffer (0x04) + { + 0x0F // . + }) + } + + Break + } + } + + If ((Arg2 == 0x04)) + { + ADBG ("Grip2 WORKING!") + \_SB.GRST |= 0x02 + While (One) + { + Name (_T_1, 0x00) // _T_x: Emitted by ASL Compiler + _T_1 = ToInteger (\_SB.GRST) + If ((_T_1 == Zero)) + { + Return (Buffer (0x04) + { + 0x00 // . + }) + } + ElseIf ((_T_1 == One)) + { + Return (Buffer (0x04) + { + 0x01 // . + }) + } + ElseIf ((_T_1 == 0x02)) + { + Return (Buffer (0x04) + { + 0x02 // . + }) + } + ElseIf ((_T_1 == 0x03)) + { + Return (Buffer (0x04) + { + 0x03 // . + }) + } + ElseIf ((_T_1 == 0x04)) + { + Return (Buffer (0x04) + { + 0x04 // . + }) + } + ElseIf ((_T_1 == 0x05)) + { + Return (Buffer (0x04) + { + 0x05 // . + }) + } + ElseIf ((_T_1 == 0x06)) + { + Return (Buffer (0x04) + { + 0x06 // . + }) + } + ElseIf ((_T_1 == 0x07)) + { + Return (Buffer (0x04) + { + 0x07 // . + }) + } + ElseIf ((_T_1 == 0x08)) + { + Return (Buffer (0x04) + { + 0x08 // . + }) + } + ElseIf ((_T_1 == 0x09)) + { + Return (Buffer (0x04) + { + 0x09 // . + }) + } + ElseIf ((_T_1 == 0x0A)) + { + Return (Buffer (0x04) + { + 0x0A // . + }) + } + ElseIf ((_T_1 == 0x0B)) + { + Return (Buffer (0x04) + { + 0x0B // . + }) + } + ElseIf ((_T_1 == 0x0C)) + { + Return (Buffer (0x04) + { + 0x0C // . + }) + } + ElseIf ((_T_1 == 0x0D)) + { + Return (Buffer (0x04) + { + 0x0D // . + }) + } + ElseIf ((_T_1 == 0x0E)) + { + Return (Buffer (0x04) + { + 0x0E // . + }) + } + ElseIf ((_T_1 == 0x0F)) + { + Return (Buffer (0x04) + { + 0x0F // . + }) + } + + Break + } + } + + If ((Arg2 == 0x05)) + { + ADBG ("Grip2 RELEASE!") + \_SB.GRST &= ~0x02 + While (One) + { + Name (_T_2, 0x00) // _T_x: Emitted by ASL Compiler + _T_2 = ToInteger (\_SB.GRST) + If ((_T_2 == Zero)) + { + Return (Buffer (0x04) + { + 0x00 // . + }) + } + ElseIf ((_T_2 == One)) + { + Return (Buffer (0x04) + { + 0x01 // . + }) + } + ElseIf ((_T_2 == 0x02)) + { + Return (Buffer (0x04) + { + 0x02 // . + }) + } + ElseIf ((_T_2 == 0x03)) + { + Return (Buffer (0x04) + { + 0x03 // . + }) + } + ElseIf ((_T_2 == 0x04)) + { + Return (Buffer (0x04) + { + 0x04 // . + }) + } + ElseIf ((_T_2 == 0x05)) + { + Return (Buffer (0x04) + { + 0x05 // . + }) + } + ElseIf ((_T_2 == 0x06)) + { + Return (Buffer (0x04) + { + 0x06 // . + }) + } + ElseIf ((_T_2 == 0x07)) + { + Return (Buffer (0x04) + { + 0x07 // . + }) + } + ElseIf ((_T_2 == 0x08)) + { + Return (Buffer (0x04) + { + 0x08 // . + }) + } + ElseIf ((_T_2 == 0x09)) + { + Return (Buffer (0x04) + { + 0x09 // . + }) + } + ElseIf ((_T_2 == 0x0A)) + { + Return (Buffer (0x04) + { + 0x0A // . + }) + } + ElseIf ((_T_2 == 0x0B)) + { + Return (Buffer (0x04) + { + 0x0B // . + }) + } + ElseIf ((_T_2 == 0x0C)) + { + Return (Buffer (0x04) + { + 0x0C // . + }) + } + ElseIf ((_T_2 == 0x0D)) + { + Return (Buffer (0x04) + { + 0x0D // . + }) + } + ElseIf ((_T_2 == 0x0E)) + { + Return (Buffer (0x04) + { + 0x0E // . + }) + } + ElseIf ((_T_2 == 0x0F)) + { + Return (Buffer (0x04) + { + 0x0F // . + }) + } + + Break + } + } + + If ((Arg2 == 0x06)) + { + ADBG ("Disp ON by Grip2") + ADBG (Concatenate ("GRST: ", ToHexString (\_SB.GRST))) + If ((\_SB.GRST == Zero)) + { + ADBG ("GRST is Already 0") + Return (Buffer (One) + { + 0x00 // . + }) + } + Else + { + \_SB.GRST = Zero + ADBG ("Set GRST to 0") + ADBG (Concatenate ("GRST: ", ToHexString (\_SB.GRST))) + ADBG ("LID Close noti") + \_SB.LID0.LIDB = Zero + Notify (\_SB.LID0, 0x80) // Status Change + ADBG ("Grip2 Sleep 500") + Sleep (0x01F4) + ADBG ("LID Open noti") + \_SB.LID0.LIDB = One + Notify (\_SB.LID0, 0x80) // Status Change + Return (Buffer (One) + { + 0x01 // . + }) + } + } + } + Else + { + Return (Buffer (One) + { + 0x00 // . + }) + } + } + } + + Device (SAR3) + { + Name (_ADR, Zero) // _ADR: Address + Name (_HID, "SAM0207") // _HID: Hardware ID + Name (_UID, 0x03) // _UID: Unique ID + Name (_DEP, Package (0x01) // _DEP: Dependencies + { + \_SB.I2C5 + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0F) + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + I2cSerialBusV2 (0x0028, ControllerInitiated, 0x00061A80, + AddressingMode7Bit, "\\_SB.I2C5", + 0x00, ResourceConsumer, , Exclusive, + ) + GpioInt (Level, ActiveLow, ExclusiveAndWake, PullDefault, 0x0000, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0073 + } + }) + Return (RBUF) /* \_SB_.SAR3._CRS.RBUF */ + } + + Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method + { + If ((Arg0 == ToUUID ("37305404-87d8-4117-b665-c877ec1ce7db"))) + { + If ((Arg2 == Zero)) + { + Return (Buffer (One) + { + 0x3F // ? + }) + } + + If ((Arg2 == One)) + { + Return (Buffer (0x40) + { + /* 0000 */ 0x10, 0x16, 0x05, 0x60, 0x11, 0x28, 0x27, 0x7F, // ...`.('. + /* 0008 */ 0x28, 0x00, 0x29, 0x00, 0x2A, 0x00, 0x2B, 0x04, // (.).*.+. + /* 0010 */ 0x33, 0x20, 0x35, 0x14, 0x36, 0x08, 0x37, 0x1D, // 3 5.6.7. + /* 0018 */ 0x4A, 0x40, 0x4D, 0x04, 0x06, 0x00, 0x07, 0x80, // J@M..... + /* 0020 */ 0x2D, 0x08, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // -....... + /* 0028 */ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // ........ + /* 0030 */ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // ........ + /* 0038 */ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF // ........ + }) + } + + If ((Arg2 == 0x02)) + { + Return (Buffer (One) + { + 0x03 // . + }) + } + + If ((Arg2 == 0x03)) + { + While (One) + { + Name (_T_0, 0x00) // _T_x: Emitted by ASL Compiler + _T_0 = ToInteger (\_SB.GRST) + If ((_T_0 == Zero)) + { + Return (Buffer (0x04) + { + 0x00 // . + }) + } + ElseIf ((_T_0 == One)) + { + Return (Buffer (0x04) + { + 0x01 // . + }) + } + ElseIf ((_T_0 == 0x02)) + { + Return (Buffer (0x04) + { + 0x02 // . + }) + } + ElseIf ((_T_0 == 0x03)) + { + Return (Buffer (0x04) + { + 0x03 // . + }) + } + ElseIf ((_T_0 == 0x04)) + { + Return (Buffer (0x04) + { + 0x04 // . + }) + } + ElseIf ((_T_0 == 0x05)) + { + Return (Buffer (0x04) + { + 0x05 // . + }) + } + ElseIf ((_T_0 == 0x06)) + { + Return (Buffer (0x04) + { + 0x06 // . + }) + } + ElseIf ((_T_0 == 0x07)) + { + Return (Buffer (0x04) + { + 0x07 // . + }) + } + ElseIf ((_T_0 == 0x08)) + { + Return (Buffer (0x04) + { + 0x08 // . + }) + } + ElseIf ((_T_0 == 0x09)) + { + Return (Buffer (0x04) + { + 0x09 // . + }) + } + ElseIf ((_T_0 == 0x0A)) + { + Return (Buffer (0x04) + { + 0x0A // . + }) + } + ElseIf ((_T_0 == 0x0B)) + { + Return (Buffer (0x04) + { + 0x0B // . + }) + } + ElseIf ((_T_0 == 0x0C)) + { + Return (Buffer (0x04) + { + 0x0C // . + }) + } + ElseIf ((_T_0 == 0x0D)) + { + Return (Buffer (0x04) + { + 0x0D // . + }) + } + ElseIf ((_T_0 == 0x0E)) + { + Return (Buffer (0x04) + { + 0x0E // . + }) + } + ElseIf ((_T_0 == 0x0F)) + { + Return (Buffer (0x04) + { + 0x0F // . + }) + } + + Break + } + } + + If ((Arg2 == 0x04)) + { + ADBG ("Grip3 WORKING!") + \_SB.GRST |= 0x04 + While (One) + { + Name (_T_1, 0x00) // _T_x: Emitted by ASL Compiler + _T_1 = ToInteger (\_SB.GRST) + If ((_T_1 == Zero)) + { + Return (Buffer (0x04) + { + 0x00 // . + }) + } + ElseIf ((_T_1 == One)) + { + Return (Buffer (0x04) + { + 0x01 // . + }) + } + ElseIf ((_T_1 == 0x02)) + { + Return (Buffer (0x04) + { + 0x02 // . + }) + } + ElseIf ((_T_1 == 0x03)) + { + Return (Buffer (0x04) + { + 0x03 // . + }) + } + ElseIf ((_T_1 == 0x04)) + { + Return (Buffer (0x04) + { + 0x04 // . + }) + } + ElseIf ((_T_1 == 0x05)) + { + Return (Buffer (0x04) + { + 0x05 // . + }) + } + ElseIf ((_T_1 == 0x06)) + { + Return (Buffer (0x04) + { + 0x06 // . + }) + } + ElseIf ((_T_1 == 0x07)) + { + Return (Buffer (0x04) + { + 0x07 // . + }) + } + ElseIf ((_T_1 == 0x08)) + { + Return (Buffer (0x04) + { + 0x08 // . + }) + } + ElseIf ((_T_1 == 0x09)) + { + Return (Buffer (0x04) + { + 0x09 // . + }) + } + ElseIf ((_T_1 == 0x0A)) + { + Return (Buffer (0x04) + { + 0x0A // . + }) + } + ElseIf ((_T_1 == 0x0B)) + { + Return (Buffer (0x04) + { + 0x0B // . + }) + } + ElseIf ((_T_1 == 0x0C)) + { + Return (Buffer (0x04) + { + 0x0C // . + }) + } + ElseIf ((_T_1 == 0x0D)) + { + Return (Buffer (0x04) + { + 0x0D // . + }) + } + ElseIf ((_T_1 == 0x0E)) + { + Return (Buffer (0x04) + { + 0x0E // . + }) + } + ElseIf ((_T_1 == 0x0F)) + { + Return (Buffer (0x04) + { + 0x0F // . + }) + } + + Break + } + } + + If ((Arg2 == 0x05)) + { + ADBG ("Grip3 RELEASE!") + \_SB.GRST &= ~0x04 + While (One) + { + Name (_T_2, 0x00) // _T_x: Emitted by ASL Compiler + _T_2 = ToInteger (\_SB.GRST) + If ((_T_2 == Zero)) + { + Return (Buffer (0x04) + { + 0x00 // . + }) + } + ElseIf ((_T_2 == One)) + { + Return (Buffer (0x04) + { + 0x01 // . + }) + } + ElseIf ((_T_2 == 0x02)) + { + Return (Buffer (0x04) + { + 0x02 // . + }) + } + ElseIf ((_T_2 == 0x03)) + { + Return (Buffer (0x04) + { + 0x03 // . + }) + } + ElseIf ((_T_2 == 0x04)) + { + Return (Buffer (0x04) + { + 0x04 // . + }) + } + ElseIf ((_T_2 == 0x05)) + { + Return (Buffer (0x04) + { + 0x05 // . + }) + } + ElseIf ((_T_2 == 0x06)) + { + Return (Buffer (0x04) + { + 0x06 // . + }) + } + ElseIf ((_T_2 == 0x07)) + { + Return (Buffer (0x04) + { + 0x07 // . + }) + } + ElseIf ((_T_2 == 0x08)) + { + Return (Buffer (0x04) + { + 0x08 // . + }) + } + ElseIf ((_T_2 == 0x09)) + { + Return (Buffer (0x04) + { + 0x09 // . + }) + } + ElseIf ((_T_2 == 0x0A)) + { + Return (Buffer (0x04) + { + 0x0A // . + }) + } + ElseIf ((_T_2 == 0x0B)) + { + Return (Buffer (0x04) + { + 0x0B // . + }) + } + ElseIf ((_T_2 == 0x0C)) + { + Return (Buffer (0x04) + { + 0x0C // . + }) + } + ElseIf ((_T_2 == 0x0D)) + { + Return (Buffer (0x04) + { + 0x0D // . + }) + } + ElseIf ((_T_2 == 0x0E)) + { + Return (Buffer (0x04) + { + 0x0E // . + }) + } + ElseIf ((_T_2 == 0x0F)) + { + Return (Buffer (0x04) + { + 0x0F // . + }) + } + + Break + } + } + + If ((Arg2 == 0x06)) + { + ADBG ("Disp ON by Grip3") + ADBG (Concatenate ("GRST: ", ToHexString (\_SB.GRST))) + If ((\_SB.GRST == Zero)) + { + ADBG ("GRST is Already 0") + Return (Buffer (One) + { + 0x00 // . + }) + } + Else + { + \_SB.GRST = Zero + ADBG ("Set GRST to 0") + ADBG (Concatenate ("GRST: ", ToHexString (\_SB.GRST))) + ADBG ("LID Close noti") + \_SB.LID0.LIDB = Zero + Notify (\_SB.LID0, 0x80) // Status Change + ADBG ("Grip3 Sleep 500") + Sleep (0x01F4) + ADBG ("LID Open noti") + \_SB.LID0.LIDB = One + Notify (\_SB.LID0, 0x80) // Status Change + Return (Buffer (One) + { + 0x01 // . + }) + } + } + } + Else + { + Return (Buffer (One) + { + 0x00 // . + }) + } + } + } + + Device (SAR4) + { + Name (_ADR, Zero) // _ADR: Address + Name (_HID, "SAM0207") // _HID: Hardware ID + Name (_UID, 0x04) // _UID: Unique ID + Name (_DEP, Package (0x01) // _DEP: Dependencies + { + \_SB.IC11 + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0F) + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + I2cSerialBusV2 (0x002C, ControllerInitiated, 0x00061A80, + AddressingMode7Bit, "\\_SB.IC11", + 0x00, ResourceConsumer, , Exclusive, + ) + GpioInt (Level, ActiveLow, ExclusiveAndWake, PullDefault, 0x0000, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0079 + } + }) + Return (RBUF) /* \_SB_.SAR4._CRS.RBUF */ + } + + Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method + { + If ((Arg0 == ToUUID ("37305404-87d8-4117-b665-c877ec1ce7db"))) + { + If ((Arg2 == Zero)) + { + Return (Buffer (One) + { + 0x3F // ? + }) + } + + If ((Arg2 == One)) + { + Return (Buffer (0x40) + { + /* 0000 */ 0x10, 0x0F, 0x05, 0x60, 0x11, 0x28, 0x27, 0x07, // ...`.('. + /* 0008 */ 0x28, 0x00, 0x29, 0x00, 0x2A, 0x00, 0x2B, 0x04, // (.).*.+. + /* 0010 */ 0x33, 0x20, 0x35, 0x14, 0x36, 0x08, 0x37, 0x1A, // 3 5.6.7. + /* 0018 */ 0x4A, 0x40, 0x4D, 0x04, 0x06, 0x00, 0x07, 0x80, // J@M..... + /* 0020 */ 0x2D, 0x08, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // -....... + /* 0028 */ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // ........ + /* 0030 */ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // ........ + /* 0038 */ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF // ........ + }) + } + + If ((Arg2 == 0x02)) + { + Return (Buffer (One) + { + 0x04 // . + }) + } + + If ((Arg2 == 0x03)) + { + While (One) + { + Name (_T_0, 0x00) // _T_x: Emitted by ASL Compiler + _T_0 = ToInteger (\_SB.GRST) + If ((_T_0 == Zero)) + { + Return (Buffer (0x04) + { + 0x00 // . + }) + } + ElseIf ((_T_0 == One)) + { + Return (Buffer (0x04) + { + 0x01 // . + }) + } + ElseIf ((_T_0 == 0x02)) + { + Return (Buffer (0x04) + { + 0x02 // . + }) + } + ElseIf ((_T_0 == 0x03)) + { + Return (Buffer (0x04) + { + 0x03 // . + }) + } + ElseIf ((_T_0 == 0x04)) + { + Return (Buffer (0x04) + { + 0x04 // . + }) + } + ElseIf ((_T_0 == 0x05)) + { + Return (Buffer (0x04) + { + 0x05 // . + }) + } + ElseIf ((_T_0 == 0x06)) + { + Return (Buffer (0x04) + { + 0x06 // . + }) + } + ElseIf ((_T_0 == 0x07)) + { + Return (Buffer (0x04) + { + 0x07 // . + }) + } + ElseIf ((_T_0 == 0x08)) + { + Return (Buffer (0x04) + { + 0x08 // . + }) + } + ElseIf ((_T_0 == 0x09)) + { + Return (Buffer (0x04) + { + 0x09 // . + }) + } + ElseIf ((_T_0 == 0x0A)) + { + Return (Buffer (0x04) + { + 0x0A // . + }) + } + ElseIf ((_T_0 == 0x0B)) + { + Return (Buffer (0x04) + { + 0x0B // . + }) + } + ElseIf ((_T_0 == 0x0C)) + { + Return (Buffer (0x04) + { + 0x0C // . + }) + } + ElseIf ((_T_0 == 0x0D)) + { + Return (Buffer (0x04) + { + 0x0D // . + }) + } + ElseIf ((_T_0 == 0x0E)) + { + Return (Buffer (0x04) + { + 0x0E // . + }) + } + ElseIf ((_T_0 == 0x0F)) + { + Return (Buffer (0x04) + { + 0x0F // . + }) + } + + Break + } + } + + If ((Arg2 == 0x04)) + { + ADBG ("Grip4 WORKING!") + \_SB.GRST |= 0x08 + While (One) + { + Name (_T_1, 0x00) // _T_x: Emitted by ASL Compiler + _T_1 = ToInteger (\_SB.GRST) + If ((_T_1 == Zero)) + { + Return (Buffer (0x04) + { + 0x00 // . + }) + } + ElseIf ((_T_1 == One)) + { + Return (Buffer (0x04) + { + 0x01 // . + }) + } + ElseIf ((_T_1 == 0x02)) + { + Return (Buffer (0x04) + { + 0x02 // . + }) + } + ElseIf ((_T_1 == 0x03)) + { + Return (Buffer (0x04) + { + 0x03 // . + }) + } + ElseIf ((_T_1 == 0x04)) + { + Return (Buffer (0x04) + { + 0x04 // . + }) + } + ElseIf ((_T_1 == 0x05)) + { + Return (Buffer (0x04) + { + 0x05 // . + }) + } + ElseIf ((_T_1 == 0x06)) + { + Return (Buffer (0x04) + { + 0x06 // . + }) + } + ElseIf ((_T_1 == 0x07)) + { + Return (Buffer (0x04) + { + 0x07 // . + }) + } + ElseIf ((_T_1 == 0x08)) + { + Return (Buffer (0x04) + { + 0x08 // . + }) + } + ElseIf ((_T_1 == 0x09)) + { + Return (Buffer (0x04) + { + 0x09 // . + }) + } + ElseIf ((_T_1 == 0x0A)) + { + Return (Buffer (0x04) + { + 0x0A // . + }) + } + ElseIf ((_T_1 == 0x0B)) + { + Return (Buffer (0x04) + { + 0x0B // . + }) + } + ElseIf ((_T_1 == 0x0C)) + { + Return (Buffer (0x04) + { + 0x0C // . + }) + } + ElseIf ((_T_1 == 0x0D)) + { + Return (Buffer (0x04) + { + 0x0D // . + }) + } + ElseIf ((_T_1 == 0x0E)) + { + Return (Buffer (0x04) + { + 0x0E // . + }) + } + ElseIf ((_T_1 == 0x0F)) + { + Return (Buffer (0x04) + { + 0x0F // . + }) + } + + Break + } + } + + If ((Arg2 == 0x05)) + { + ADBG ("Grip4 RELEASE!") + \_SB.GRST &= ~0x08 + While (One) + { + Name (_T_2, 0x00) // _T_x: Emitted by ASL Compiler + _T_2 = ToInteger (\_SB.GRST) + If ((_T_2 == Zero)) + { + Return (Buffer (0x04) + { + 0x00 // . + }) + } + ElseIf ((_T_2 == One)) + { + Return (Buffer (0x04) + { + 0x01 // . + }) + } + ElseIf ((_T_2 == 0x02)) + { + Return (Buffer (0x04) + { + 0x02 // . + }) + } + ElseIf ((_T_2 == 0x03)) + { + Return (Buffer (0x04) + { + 0x03 // . + }) + } + ElseIf ((_T_2 == 0x04)) + { + Return (Buffer (0x04) + { + 0x04 // . + }) + } + ElseIf ((_T_2 == 0x05)) + { + Return (Buffer (0x04) + { + 0x05 // . + }) + } + ElseIf ((_T_2 == 0x06)) + { + Return (Buffer (0x04) + { + 0x06 // . + }) + } + ElseIf ((_T_2 == 0x07)) + { + Return (Buffer (0x04) + { + 0x07 // . + }) + } + ElseIf ((_T_2 == 0x08)) + { + Return (Buffer (0x04) + { + 0x08 // . + }) + } + ElseIf ((_T_2 == 0x09)) + { + Return (Buffer (0x04) + { + 0x09 // . + }) + } + ElseIf ((_T_2 == 0x0A)) + { + Return (Buffer (0x04) + { + 0x0A // . + }) + } + ElseIf ((_T_2 == 0x0B)) + { + Return (Buffer (0x04) + { + 0x0B // . + }) + } + ElseIf ((_T_2 == 0x0C)) + { + Return (Buffer (0x04) + { + 0x0C // . + }) + } + ElseIf ((_T_2 == 0x0D)) + { + Return (Buffer (0x04) + { + 0x0D // . + }) + } + ElseIf ((_T_2 == 0x0E)) + { + Return (Buffer (0x04) + { + 0x0E // . + }) + } + ElseIf ((_T_2 == 0x0F)) + { + Return (Buffer (0x04) + { + 0x0F // . + }) + } + + Break + } + } + + If ((Arg2 == 0x06)) + { + ADBG ("Disp ON by Grip4") + ADBG (Concatenate ("GRST: ", ToHexString (\_SB.GRST))) + If ((\_SB.GRST == Zero)) + { + ADBG ("GRST is Already 0") + Return (Buffer (One) + { + 0x00 // . + }) + } + Else + { + \_SB.GRST = Zero + ADBG ("Set GRST to 0") + ADBG (Concatenate ("GRST: ", ToHexString (\_SB.GRST))) + ADBG ("LID Close noti") + \_SB.LID0.LIDB = Zero + Notify (\_SB.LID0, 0x80) // Status Change + ADBG ("Grip4 Sleep 500") + Sleep (0x01F4) + ADBG ("LID Open noti") + \_SB.LID0.LIDB = One + Notify (\_SB.LID0, 0x80) // Status Change + Return (Buffer (One) + { + 0x01 // . + }) + } + } + } + Else + { + Return (Buffer (One) + { + 0x00 // . + }) + } + } + } + + Device (LED1) + { + Name (_ADR, Zero) // _ADR: Address + Name (_HID, "SAM0608") // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_DEP, Package (0x01) // _DEP: Dependencies + { + \_SB.I2C3 + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0F) + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + I2cSerialBusV2 (0x0030, ControllerInitiated, 0x00061A80, + AddressingMode7Bit, "\\_SB.I2C3", + 0x00, ResourceConsumer, , Exclusive, + ) + }) + Return (RBUF) /* \_SB_.LED1._CRS.RBUF */ + } + + Name (LEDR, Zero) + Method (RLED, 2, Serialized) + { + If ((Arg1 == One)) + { + LEDR |= Arg0 + } + Else + { + Local0 = ~Arg0 + LEDR &= Local0 + } + + ADBG (Concatenate ("LEDR=", ToHexString (LEDR))) + Notify (\_SB.LED1, 0x80) // Status Change + } + + Method (GLED, 0, NotSerialized) + { + Return (LEDR) /* \_SB_.LED1.LEDR */ + } + + Method (SLED, 1, NotSerialized) + { + LEDR = Arg0 + Return (Zero) + } + + Name (RGBC, Zero) + Method (GLCR, 0, NotSerialized) + { + RGBC |= 0x06 + RGBC |= 0x0200 + RGBC |= 0x00170000 + Return (RGBC) /* \_SB_.LED1.RGBC */ + } + } + + Device (LID0) + { + Name (_HID, "PNP0C0D" /* Lid Device */) // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + Name (LIDB, One) + Method (_LID, 0, NotSerialized) // _LID: Lid Status + { + Return (LIDB) /* \_SB_.LID0.LIDB */ + } + } + + Method (ADDR, 0, NotSerialized) + { + If ((\_SB.SVMJ == One)) + { + Return (0x0390B000) + } + ElseIf ((\_SB.SVMJ == 0x02)) + { + Return (0x0350B000) + } + } + + OperationRegion (NM11, SystemMemory, ADDR (), 0x14) + Field (NM11, DWordAcc, NoLock, Preserve) + { + PI1C, 32, + PIN1, 32, + PI1N, 32, + PI1S, 32, + PI1L, 32 + } + + Method (_MID, 0, Serialized) + { + Name (NMID, Zero) + NMID = PIN1 /* \_SB_.PIN1 */ + Return (NMID) /* \_SB_._MID.NMID */ + } + + Scope (\_SB) + { + Device (SAMO) + { + Name (_HID, "SAM0101") // _HID: Hardware ID + Name (_CID, "SAM0101") // _CID: Compatible ID + Name (_SUB, "C153144D") // _SUB: Subsystem ID + Name (_UID, Zero) // _UID: Unique ID + Name (_DEP, Package (0x02) // _DEP: Dependencies + { + \_SB.I2C4, + \_SB.GIO0 + }) + Name (AVBL, Zero) + Method (_REG, 2, NotSerialized) // _REG: Region Availability + { + If ((Arg0 == 0x9A)) + { + ^AVBL = Arg1 + } + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Local0 = 0x0F + Return (Local0) + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + I2cSerialBusV2 (0x002C, ControllerInitiated, 0x00061A80, + AddressingMode7Bit, "\\_SB.I2C4", + 0x00, ResourceConsumer, , Exclusive, + ) + GpioInt (Edge, ActiveHigh, Exclusive, PullNone, 0x1388, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x001D + } + }) + Return (RBUF) /* \_SB_.SAMO._CRS.RBUF */ + } + } + } + + Scope (\_SB.SAMO) + { + OperationRegion (SMOP, 0x9A, Zero, One) + Field (SMOP, ByteAcc, Lock, Preserve) + { + BRLV, 8 + } + } + +#if 0 + Scope (\_SB) + { + Device (SAFI) + { + Name (_HID, "SAM0701") // _HID: Hardware ID + Name (_CID, "SAM0701") // _CID: Compatible ID + Name (_SUB, "C153144D") // _SUB: Subsystem ID + Name (_DDN, "Samsung Firmware Interface") // _DDN: DOS Device Name + Name (_UID, One) // _UID: Unique ID + Name (AVBL, Zero) + Method (_REG, 2, NotSerialized) // _REG: Region Availability + { + If ((Arg0 == 0x9F)) + { + ^AVBL = Arg1 + } + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Local0 = 0x0F + Return (Local0) + } + + OperationRegion (ECM2, 0x9F, Zero, 0x38) + Field (ECM2, ByteAcc, Lock, Preserve) + { + ELG0, 8, + ELG1, 8, + ELG2, 8, + ELG3, 8, + ELG4, 8, + ELG5, 8, + ELG6, 8, + ELG7, 8, + ELG8, 8, + ELG9, 8, + AAAA, 128, + MADD, 32, + MVAL, 32 + } + + Method (OPID, 0, NotSerialized) + { + Local0 = One + Return (0x9F) + } + + Method (GCAP, 0, NotSerialized) + { + Local0 = Zero + Return (Local0) + } + + Method (PCAP, 1, NotSerialized) + { + Return (Zero) + } + + Method (PRNT, 1, Serialized) + { + If ((\_SB.SAFI.AVBL == One)) + { + AAAA = Arg0 + Notify (\_SB.SAFI, 0x89) // Device-Specific + } + } + + Method (SABM, 0, Serialized) + { + Return (Zero) + } + + Event (DSEV) + Method (DSBB, 1, Serialized) + { + Return (Zero) + } + + Method (DSBE, 0, Serialized) + { + Return (Zero) + } + + Method (CHTY, 0, Serialized) + { + Local0 = \_SB.EMEC.CHTY + Return (Local0) + } + + Name (UCNP, Package (0x04) + { + Zero, + Zero, + Zero, + Zero + }) + Method (TRSD, 1, NotSerialized) + { + Name (RBUF, Package (0x04) + { + 0x70, + Zero, + 0x70, + Zero + }) + Return (RBUF) /* \_SB_.SAFI.TRSD.RBUF */ + } + + Method (GUCN, 1, Serialized) + { + If ((\_SB.EMEC.AVBL == One)) + { + If ((Arg0 == One)) + { + UCNP [Zero] = Zero + UCNP [One] = \_SB.EMEC.CCST + UCNP [0x02] = \_SB.EMEC.HPDS + UCNP [0x03] = \_SB.EMEC.PINA + } + + If ((Arg0 == 0x02)) + { + UCNP [Zero] = Zero + UCNP [One] = \_SB.EMEC.CCS2 + UCNP [0x02] = \_SB.EMEC.HPD2 + UCNP [0x03] = \_SB.EMEC.PIN2 + } + } + Else + { + ADBG ("EMECNotReady") + } + + Return (UCNP) /* \_SB_.SAFI.UCNP */ + } + + Method (SLED, 1, Serialized) + { + Local0 = 0x02 + \_SB.LED1.RLED (Local0, Arg0) + Return (Zero) + } + } + } + + Scope (\_SB) + { + Device (SIC2) + { + Name (_HID, "SWI2CD1") // _HID: Hardware ID + Name (_DDN, "SW I2C") // _DDN: DOS Device Name + Name (_UID, 0x02) // _UID: Unique ID + Method (_STA, 0, NotSerialized) // _STA: Status + { + Local0 = Zero + Return (Local0) + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionNone, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x005E + } + GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionNone, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x005D + } + }) + Return (RBUF) /* \_SB_.SIC2._CRS.RBUF */ + } + + Method (SI2C, 0, NotSerialized) + { + Name (CFG0, Package (0x0D) + { + 0x03D5E004, + 0x03D5D004, + 0x03D5E004, + 0x03D5D004, + 0x03D5E000, + 0x03D5D000, + 0x03D5E000, + 0x03D5D000, + 0x0200, + 0x0200, + Zero, + 0x04, + 0x02 + }) + Return (CFG0) /* \_SB_.SIC2.SI2C.CFG0 */ + } + } + } +#endif + +#if 0 + Scope (\_SB) + { + Device (EMEC) + { + Name (_HID, "SAM0604") // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + Name (_SUB, "C153144D") // _SUB: Subsystem ID + Name (_DEP, Package (0x06) // _DEP: Dependencies + { + \_SB.I2C1, + \_SB.IC13, + \_SB.IC15, + \_SB.I2C8, + \_SB.GIO0, + \_SB.PM01 + }) + Name (AVBL, Zero) + Method (_REG, 2, NotSerialized) // _REG: Region Availability + { + If ((Arg0 == 0x9C)) + { + AVBL = Arg1 + } + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0F) + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBF1, ResourceTemplate () + { + I2cSerialBusV2 (0x0033, ControllerInitiated, 0x00061A80, + AddressingMode7Bit, "\\_SB.IC13", + 0x00, ResourceConsumer, , Exclusive, + ) + I2cSerialBusV2 (0x0025, ControllerInitiated, 0x00061A80, + AddressingMode7Bit, "\\_SB.IC15", + 0x00, ResourceConsumer, , Exclusive, + ) + I2cSerialBusV2 (0x0009, ControllerInitiated, 0x000186A0, + AddressingMode7Bit, "\\_SB.I2C8", + 0x00, ResourceConsumer, , Exclusive, + ) + I2cSerialBusV2 (0x000B, ControllerInitiated, 0x000186A0, + AddressingMode7Bit, "\\_SB.I2C8", + 0x00, ResourceConsumer, , Exclusive, + ) + I2cSerialBusV2 (0x001A, ControllerInitiated, 0x00061A80, + AddressingMode7Bit, "\\_SB.IC13", + 0x00, ResourceConsumer, , Exclusive, + ) + GpioInt (Level, ActiveLow, ExclusiveAndWake, PullDefault, 0x0000, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x001A + } + GpioInt (Level, ActiveLow, ExclusiveAndWake, PullDefault, 0x0000, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x002C + } + GpioInt (Level, ActiveLow, ExclusiveAndWake, PullDefault, 0x0000, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x007A + } + GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionInputOnly, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0026 + } + GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionInputOnly, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0050 + } + GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionOutputOnly, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0067 + } + GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionInputOnly, + "\\_SB.PM01", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0080 + } + GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionInputOnly, + "\\_SB.PM01", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0084 + } + GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionOutputOnly, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0018 + } + GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionOutputOnly, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0068 + } + GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionInputOnly, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0024 + } + GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionOutputOnly, + "\\_SB.PM01", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x008E + } + GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionInputOnly, + "\\_SB.PM01", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0090 + } + GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionInputOnly, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x003D + } + }) + Name (RBF2, ResourceTemplate () + { + I2cSerialBusV2 (0x0033, ControllerInitiated, 0x00061A80, + AddressingMode7Bit, "\\_SB.IC13", + 0x00, ResourceConsumer, , Exclusive, + ) + I2cSerialBusV2 (0x0025, ControllerInitiated, 0x00061A80, + AddressingMode7Bit, "\\_SB.IC15", + 0x00, ResourceConsumer, , Exclusive, + ) + I2cSerialBusV2 (0x0009, ControllerInitiated, 0x000186A0, + AddressingMode7Bit, "\\_SB.I2C8", + 0x00, ResourceConsumer, , Exclusive, + ) + I2cSerialBusV2 (0x000B, ControllerInitiated, 0x000186A0, + AddressingMode7Bit, "\\_SB.I2C8", + 0x00, ResourceConsumer, , Exclusive, + ) + I2cSerialBusV2 (0x001A, ControllerInitiated, 0x00061A80, + AddressingMode7Bit, "\\_SB.IC13", + 0x00, ResourceConsumer, , Exclusive, + ) + I2cSerialBusV2 (0x0033, ControllerInitiated, 0x00061A80, + AddressingMode7Bit, "\\_SB.I2C1", + 0x00, ResourceConsumer, , Exclusive, + ) + I2cSerialBusV2 (0x0025, ControllerInitiated, 0x00061A80, + AddressingMode7Bit, "\\_SB.I2C1", + 0x00, ResourceConsumer, , Exclusive, + ) + I2cSerialBusV2 (0x0008, ControllerInitiated, 0x00061A80, + AddressingMode7Bit, "\\_SB.IC15", + 0x00, ResourceConsumer, , Exclusive, + ) + GpioInt (Level, ActiveLow, ExclusiveAndWake, PullDefault, 0x0000, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0140 + } + GpioInt (Level, ActiveLow, ExclusiveAndWake, PullDefault, 0x0000, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x002C + } + GpioInt (Edge, ActiveLow, ExclusiveAndWake, PullDefault, 0x0000, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x01C0 + } + GpioInt (Level, ActiveLow, ExclusiveAndWake, PullDefault, 0x0000, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0200 + } + GpioInt (Level, ActiveLow, ExclusiveAndWake, PullDefault, 0x0000, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0034 + } + GpioInt (Edge, ActiveLow, ExclusiveAndWake, PullDefault, 0x0000, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0033 + } + GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionInputOnly, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0026 + } + GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionInputOnly, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0050 + } + GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionOutputOnly, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0067 + } + GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionInputOnly, + "\\_SB.PM01", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0080 + } + GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionInputOnly, + "\\_SB.PM01", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0084 + } + GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionOutputOnly, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0018 + } + GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionOutputOnly, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0068 + } + GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionInputOnly, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0024 + } + GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionOutputOnly, + "\\_SB.PM01", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x008E + } + GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionNone, + "\\_SB.PM01", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0090 + } + GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionInputOnly, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x003D + } + GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionOutputOnly, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0007 + } + GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionOutputOnly, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x004E + } + GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionInputOnly, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0025 + } + GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionInputOnly, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x004D + } + GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionInputOnly, + "\\_SB.PM01", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0086 + } + GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionInputOnly, + "\\_SB.PM01", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0083 + } + GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionOutputOnly, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x000B + } + GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionOutputOnly, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0072 + } + GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionInputOnly, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x003F + } + GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionOutputOnly, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0045 + } + GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionOutputOnly, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0053 + } + GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionOutputOnly, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x005C + } + GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionOutputOnly, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0010 + } + GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionInputOnly, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0016 + } + GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionOutputOnly, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0023 + } + GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionOutputOnly, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0009 + } + GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionOutputOnly, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0028 + } + GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionOutputOnly, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0002 + } + }) + If ((BDRV == One)) + { + Return (RBF1) /* \_SB_.EMEC._CRS.RBF1 */ + } + Else + { + Return (RBF2) /* \_SB_.EMEC._CRS.RBF2 */ + } + } + + Name (CVER, 0x03) + Method (GVER, 0, NotSerialized) + { + Local0 = CVER /* \_SB_.EMEC.CVER */ + Return (Local0) + } + + Name (BDRV, 0x02) + Method (GBDR, 0, NotSerialized) + { + Local0 = 0x05 + Return (Local0) + } + + Method (GBPV, 0, NotSerialized) + { + Local0 = \_SB.MDID + Return (Local0) + } + } + } + + Scope (\_SB.EMEC) + { + OperationRegion (EMOP, 0x9C, Zero, 0x0100) + Field (EMOP, DWordAcc, NoLock, Preserve) + { + DRL1, 8, + DRL2, 8, + Offset (0x04), + PRL1, 8, + PRL2, 8, + Offset (0x08), + CHST, 32, + SOC, 32, + VOLT, 32, + CHGC, 32, + CHTY, 32, + Offset (0x80), + CCST, 32, + HSFL, 32, + HPDS, 32, + PINA, 32, + HPDB, 32, + Offset (0xA0), + CCS2, 32, + HPD2, 32, + PIN2, 32 + } + + Method (CBLN, 1, NotSerialized) + { + If ((Arg0 == One)) + { + Notify (\_SB.UCME, 0x80) // Status Change + Notify (\_SB.SAFI, 0xA4) // Device-Specific + } + + If ((Arg0 == 0x02)) + { + Notify (\_SB.SAFI, 0xA4) // Device-Specific + } + + Return (Zero) + } + + Method (PCCD, 1, NotSerialized) + { + ADBG (Concatenate ("PCCD=", ToHexString (Arg0))) + If ((Arg0 == 0x02)) + { + Return (Zero) + } + + \_SB.CCST = \_SB.EMEC.CCST + \_SB.HSFL = \_SB.EMEC.HSFL + Return (Zero) + } + + Method (PHPD, 1, NotSerialized) + { + ADBG (Concatenate ("PHPD=", ToHexString (Arg0))) + If ((Arg0 == 0x02)) + { + Return (Zero) + } + +#if 0 + \_SB.HPDS = \_SB.EMEC.HPDS + \_SB.PINA = \_SB.EMEC.PINA + \_SB.HPDB = \_SB.EMEC.HPDB + Notify (\_SB.GPU0, \_SB.HPDB) +#endif + Return (Zero) + } + + Method (HPDF, 3, NotSerialized) + { + \_SB.HPDS = Arg0 + \_SB.PINA = Arg1 + \_SB.HPDB = Arg2 +#if 0 + Notify (\_SB.GPU0, \_SB.HPDB) +#endif + } + + Method (CCOT, 2, NotSerialized) + { + \_SB.CCST = Arg0 + \_SB.HSFL = Arg1 + } + + Method (PLDR, 1, NotSerialized) + { + Local0 = Zero + \_SB.LED1.RLED (0xF0, Zero) + If ((CHST == 0x05)) + { + Local0 |= 0x20 + } + + If ((CHST == 0x11)) + { + Local0 |= 0x40 + } + + If ((CHST == 0x21)) + { + Local0 |= 0x10 + } + + If ((CHST == 0x40)) + { + Local0 |= 0x80 + } + + \_SB.LED1.RLED (Local0, Arg0) + Return (Zero) + } + + Method (PLID, 1, Serialized) + { + ADBG (Concatenate ("PLID=", ToHexString (Arg0))) + \_SB.LID0.LIDB = Arg0 + Notify (\_SB.LID0, 0x80) // Status Change + Return (\_SB.LID0.LIDB) + } + + Method (PHID, 1, Serialized) + { + ADBG (Concatenate ("PHID=", ToHexString (Arg0))) + Notify (\_SB.SVBI, Arg0) + Return (Zero) + } + + Method (PPGS, 1, Serialized) + { + ADBG (Concatenate ("PPGS=", ToHexString (Arg0))) + Notify (\_SB.SAFI, 0xA3) // Device-Specific + Return (Zero) + } + } + + Scope (\_SB) + { + Device (UCME) + { + Name (_HID, "SAM0605") // _HID: Hardware ID + Name (_CID, "SAM0605") // _CID: Compatible ID + Name (_SUB, "C153144D") // _SUB: Subsystem ID + Name (_DDN, "UCM Emulation") // _DDN: DOS Device Name + Name (_UID, One) // _UID: Unique ID + Name (AVBL, Zero) + Method (_REG, 2, NotSerialized) // _REG: Region Availability + { + If ((Arg0 == 0x9F)) + { + ^AVBL = Arg1 + } + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Local0 = 0x0F + Return (Local0) + } + + Method (GDRO, 1, NotSerialized) + { + If ((Arg0 == One)) + { + Local0 = \_SB.EMEC.DRL1 + } + + If ((Arg0 == 0x02)) + { + Local0 = \_SB.EMEC.DRL2 + } + + Return (Local0) + } + + Method (GPRO, 1, NotSerialized) + { + If ((Arg0 == One)) + { + Local0 = \_SB.EMEC.PRL1 + } + + If ((Arg0 == 0x02)) + { + Local0 = \_SB.EMEC.PRL2 + } + + Return (Local0) + } + + Device (POR0) + { + Name (_ADR, Zero) // _ADR: Address + Name (_PLD, Package (0x01) // _PLD: Physical Location of Device + { + ToPLD ( + PLD_Revision = 0x2, + PLD_IgnoreColor = 0x1, + PLD_Red = 0x0, + PLD_Green = 0x0, + PLD_Blue = 0x0, + PLD_Width = 0x0, + PLD_Height = 0x0, + PLD_UserVisible = 0x1, + PLD_Dock = 0x0, + PLD_Lid = 0x0, + PLD_Panel = "BACK", + PLD_VerticalPosition = "CENTER", + PLD_HorizontalPosition = "LEFT", + PLD_Shape = "VERTICALRECTANGLE", + PLD_GroupOrientation = 0x0, + PLD_GroupToken = 0x0, + PLD_GroupPosition = 0x1, + PLD_Bay = 0x0, + PLD_Ejectable = 0x0, + PLD_EjectRequired = 0x0, + PLD_CabinetNumber = 0x0, + PLD_CardCageNumber = 0x0, + PLD_Reference = 0x0, + PLD_Rotation = 0x0, + PLD_Order = 0x0, + PLD_VerticalOffset = 0xFFFF, + PLD_HorizontalOffset = 0xFFFF) + + }) + Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities + { + One, + 0x09, + Zero, + Zero + }) + } + } + } + + Scope (\_SB) + { + Device (MCTL) + { + Name (_HID, "SAM0602") // _HID: Hardware ID + Name (_CID, "SAM0602") // _CID: Compatible ID + Name (_SUB, "C153144D") // _SUB: Subsystem ID + Name (_DDN, "ModemCtrl") // _DDN: DOS Device Name + Name (_UID, Zero) // _UID: Unique ID + Name (_DEP, Package (0x01) // _DEP: Dependencies + { + \_SB.PM01 + }) + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + GpioInt (Edge, ActiveHigh, SharedAndWake, PullNone, 0x0000, + "\\_SB.PM01", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0061 + } + }) + Return (RBUF) /* \_SB_.MCTL._CRS.RBUF */ + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Local0 = 0x0F + Return (Local0) + } + } + } + + Scope (\_SB) + { + Device (AGNT) + { + Name (_ADR, Zero) // _ADR: Address + Name (_HID, "SAM0603") // _HID: Hardware ID + Name (_CID, "SAM0603") // _CID: Compatible ID + Name (_SUB, "C153144D") // _SUB: Subsystem ID + Name (_UID, One) // _UID: Unique ID + Name (_STA, 0x0F) // _STA: Status + } + } +#endif + + + + Method (ADBG, 1, Serialized) + { + + } + + Name (HPDB, Zero) + Name (PINA, Zero) + Name (CCST, Buffer (One) + { + 0x02 // . + }) + Name (HSFL, Buffer (One) + { + 0x00 // . + }) + Name (USBC, Buffer (One) + { + 0x0B // . + }) + + //Name (QUFN, Zero) + Name (QUFN, One) + Name (DPP0, Buffer (One) + { + 0x00 // . + }) + + + Device (UCP0) + { + Name (_HID, "QCOM02D0") // _HID: Hardware ID + Name (_DEP, Package (0x03) // _DEP: Dependencies + { + \_SB.PEP0, + \_SB.PTCC, + \_SB.URS0 + }) + Device (CON0) + { + Name (_ADR, Zero) // _ADR: Address + Name (_PLD, Package (0x01) // _PLD: Physical Location of Device + { + ToPLD ( + PLD_Revision = 0x2, + PLD_IgnoreColor = 0x1, + PLD_Red = 0x0, + PLD_Green = 0x0, + PLD_Blue = 0x0, + PLD_Width = 0x0, + PLD_Height = 0x0, + PLD_UserVisible = 0x1, + PLD_Dock = 0x0, + PLD_Lid = 0x0, + PLD_Panel = "BACK", + PLD_VerticalPosition = "CENTER", + PLD_HorizontalPosition = "LEFT", + PLD_Shape = "VERTICALRECTANGLE", + PLD_GroupOrientation = 0x0, + PLD_GroupToken = 0x0, + PLD_GroupPosition = 0x1, + PLD_Bay = 0x0, + PLD_Ejectable = 0x0, + PLD_EjectRequired = 0x0, + PLD_CabinetNumber = 0x0, + PLD_CardCageNumber = 0x0, + PLD_Reference = 0x0, + PLD_Rotation = 0x0, + PLD_Order = 0x0, + PLD_VerticalOffset = 0xFFFF, + PLD_HorizontalOffset = 0xFFFF) + + }) + Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities + { + One, + 0x08, + Zero, + Zero + }) + Name (_DSD, Package (0x02) // _DSD: Device-Specific Data + { + ToUUID ("6b856e62-40f4-4688-bd46-5e888a2260de"), + Package (0x0A) + { + Package (0x02) + { + One, + 0x04 + }, + + Package (0x02) + { + 0x02, + 0x03 + }, + + Package (0x02) + { + 0x03, + Zero + }, + + Package (0x02) + { + 0x04, + One + }, + + Package (0x02) + { + 0x05, + 0x03 + }, + + Package (0x02) + { + 0x06, + Package (0x01) + { + 0x0001905A + } + }, + + Package (0x02) + { + 0x07, + Package (0x02) + { + 0x0001912C, + 0x0002D0C8 + } + }, + + Package (0x02) + { + 0x08, + Package (0x02) + { + 0xFF01, + 0x3C86 + } + }, + + Package (0x02) + { + 0x09, + One + }, + + Package (0x02) + { + 0x0A, + One + } + } + }) + } + + Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method + { + While (One) + { + Name (_T_0, Buffer (0x01) // _T_x: Emitted by ASL Compiler + { + 0x00 // . + }) + CopyObject (ToBuffer (Arg0), _T_0) /* \_SB_.UCP0._DSM._T_0 */ + If ((_T_0 == ToUUID ("18de299f-9476-4fc9-b43b-8aeb713ed751"))) + { + While (One) + { + Name (_T_1, 0x00) // _T_x: Emitted by ASL Compiler + _T_1 = ToInteger (Arg2) + If ((_T_1 == Zero)) + { + While (One) + { + Name (_T_2, 0x00) // _T_x: Emitted by ASL Compiler + _T_2 = ToInteger (Arg1) + If ((_T_2 == Zero)) + { + Return (Buffer (One) + { + 0x01 // . + }) + Break + } + Else + { + Return (Buffer (One) + { + 0x01 // . + }) + Break + } + + Break + } + + Return (Buffer (One) + { + 0x00 // . + }) + Break + } + ElseIf ((_T_1 == One)) + { + While (One) + { + Name (_T_3, 0x00) // _T_x: Emitted by ASL Compiler + _T_3 = ToInteger (Arg3) + If ((_T_3 == Zero)) + { + Return (Package (0x01) + { + 0x36019050 + }) + Break + } + ElseIf ((_T_3 == One)) + { + Return (Package (0x01) + { + 0x3601912C + }) + Break + } + Else + { + Return (Package (0x01) + { + Zero + }) + Break + } + + Break + } + } + Else + { + Return (Buffer (One) + { + 0x00 // . + }) + Break + } + + Break + } + } + Else + { + Return (Buffer (One) + { + 0x00 // . + }) + Break + } + + Break + } + } + + Method (CCOT, 2, NotSerialized) + { + \_SB.CCST = Arg0 + \_SB.HSFL = Arg1 + } + + Method (CCVL, 0, NotSerialized) + { + Return (\_SB.CCST) + } + + Method (HPDS, 0, NotSerialized) + { + Notify (\_SB.GPU0, 0x94) // Device-Specific + } + + Method (HPDF, 2, NotSerialized) + { + \_SB.HPDB = Arg0 + \_SB.PINA = Arg1 + Notify (\_SB.GPU0, \_SB.HPDB) + } + + Method (HPDV, 0, NotSerialized) + { + Return (\_SB.HPDB) + } + + Method (PINV, 0, NotSerialized) + { + Return (\_SB.PINA) + } + } + + Device (URS0) + { + Method (URSI, 0, NotSerialized) + { + If ((QUFN == Zero)) + { + Return ("QCOM0304") + } + Else + { + Return ("QCOM0305") + } + } + + Alias (URSI, _HID) + Name (_CID, "PNP0CA1") // _CID: Compatible ID + Alias (PSUB, _SUB) + Name (_UID, Zero) // _UID: Unique ID + Name (_CCA, Zero) // _CCA: Cache Coherency Attribute + Name (_DEP, Package (0x01) // _DEP: Dependencies + { + PEP0 + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A600000, // Address Base + 0x000FFFFF, // Address Length + ) + }) + Device (USB0) + { + Name (_ADR, Zero) // _ADR: Address + Name (_S0W, 0x03) // _S0W: S0 Device Wake State + Name (_PLD, Package (0x01) // _PLD: Physical Location of Device + { + ToPLD ( + PLD_Revision = 0x2, + PLD_IgnoreColor = 0x1, + PLD_Red = 0x0, + PLD_Green = 0x0, + PLD_Blue = 0x0, + PLD_Width = 0x0, + PLD_Height = 0x0, + PLD_UserVisible = 0x1, + PLD_Dock = 0x0, + PLD_Lid = 0x0, + PLD_Panel = "BACK", + PLD_VerticalPosition = "CENTER", + PLD_HorizontalPosition = "LEFT", + PLD_Shape = "VERTICALRECTANGLE", + PLD_GroupOrientation = 0x0, + PLD_GroupToken = 0x0, + PLD_GroupPosition = 0x1, + PLD_Bay = 0x0, + PLD_Ejectable = 0x0, + PLD_EjectRequired = 0x0, + PLD_CabinetNumber = 0x0, + PLD_CardCageNumber = 0x0, + PLD_Reference = 0x0, + PLD_Rotation = 0x0, + PLD_Order = 0x0, + PLD_VerticalOffset = 0xFFFF, + PLD_HorizontalOffset = 0xFFFF) + + }) + Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities + { + One, + 0x09, + Zero, + Zero + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x000000A5, + } + Interrupt (ResourceConsumer, Level, ActiveHigh, SharedAndWake, ,, ) + { + 0x0000017A, + } + Interrupt (ResourceConsumer, Level, ActiveHigh, SharedAndWake, ,, ) + { + 0x00000206, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, SharedAndWake, ,, ) + { + 0x00000208, + } + Interrupt (ResourceConsumer, Edge, ActiveHigh, SharedAndWake, ,, ) + { + 0x00000209, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0F) + } + + Method (DPM0, 1, NotSerialized) + { + DPP0 = Arg0 + Notify (PEP0, 0xA0) // Device-Specific + } + + Method (CCVL, 0, NotSerialized) + { + Return (CCST) /* \_SB_.CCST */ + } + + Method (HSEN, 0, NotSerialized) + { + Return (HSFL) /* \_SB_.HSFL */ + } + + Name (HSEI, ResourceTemplate () + { + GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionNone, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x003E + } + }) + Scope (^^GIO0) + { + OperationRegion (HLEN, GeneralPurposeIo, Zero, One) + } + + Field (^^GIO0.HLEN, ByteAcc, NoLock, Preserve) + { + Connection (HSEI), + MOD1, 1 + } + + Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method + { + While (One) + { + Name (_T_0, Buffer (One) // _T_x: Emitted by ASL Compiler + { + 0x00 // . + }) + CopyObject (ToBuffer (Arg0), _T_0) /* \_SB_.URS0.USB0._DSM._T_0 */ + If ((_T_0 == ToUUID ("ce2ee385-00e6-48cb-9f05-2edb927c4899") /* USB Controller */)) + { + While (One) + { + Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler + _T_1 = ToInteger (Arg2) + If ((_T_1 == Zero)) + { + While (One) + { + Name (_T_2, Zero) // _T_x: Emitted by ASL Compiler + _T_2 = ToInteger (Arg1) + If ((_T_2 == Zero)) + { + Return (Buffer (One) + { + 0x1D // . + }) + Break + } + Else + { + Return (Buffer (One) + { + 0x01 // . + }) + Break + } + + Break + } + + Return (Buffer (One) + { + 0x00 // . + }) + Break + } + ElseIf ((_T_1 == 0x02)) + { + Return (Zero) + Break + } + ElseIf ((_T_1 == 0x03)) + { + Return (One) + Break + } + ElseIf ((_T_1 == 0x04)) + { + Return (0x02) + Break + } + Else + { + Return (Buffer (One) + { + 0x00 // . + }) + Break + } + + Break + } + } + ElseIf ((_T_0 == ToUUID ("a9a82a56-95a1-4b4a-b014-3be47df1b7d5"))) + { + While (One) + { + Name (_T_3, Zero) // _T_x: Emitted by ASL Compiler + _T_3 = ToInteger (Arg1) + If ((_T_3 == One)) + { + While (One) + { + Name (_T_4, Zero) // _T_x: Emitted by ASL Compiler + _T_4 = ToInteger (Arg2) + If ((_T_4 == One)) + { + ADBG ("MOD1+") + MOD1 = One + Return (Buffer (One) + { + 0x01 // . + }) + } + ElseIf ((_T_4 == Zero)) + { + ADBG ("MOD1-") + MOD1 = Zero + Return (Buffer (One) + { + 0x01 // . + }) + } + Else + { + Return (Buffer (One) + { + 0x00 // . + }) + } + + Break + } + } + Else + { + Return (Buffer (One) + { + 0x00 // . + }) + } + + Break + } + } + Else + { + Return (Buffer (One) + { + 0x00 // . + }) + Break + } + + Break + } + } + + Method (PHYC, 0, NotSerialized) + { + Name (CFG0, Package (0x01) + { + Package (0x03) + { + Zero, + 0x088E2198, + 0x20 + } + }) + Return (CFG0) /* \_SB_.URS0.USB0.PHYC.CFG0 */ + } + + Device (RHUB) + { + Name (_ADR, Zero) // _ADR: Address + Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method + { + While (One) + { + Name (_T_0, Buffer (One) // _T_x: Emitted by ASL Compiler + { + 0x00 // . + }) + CopyObject (ToBuffer (Arg0), _T_0) /* \_SB_.URS0.USB0.RHUB._DSM._T_0 */ + If ((_T_0 == ToUUID ("a9a82a56-95a1-4b4a-b014-3be47df1b7d5"))) + { + While (One) + { + Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler + _T_1 = ToInteger (Arg1) + If ((_T_1 == One)) + { + While (One) + { + Name (_T_2, Zero) // _T_x: Emitted by ASL Compiler + _T_2 = ToInteger (Arg2) + If ((_T_2 == One)) + { + ADBG ("MOD1++") + MOD1 = One + Return (Buffer (One) + { + 0x01 // . + }) + } + ElseIf ((_T_2 == Zero)) + { + ADBG ("MOD1--") + MOD1 = Zero + Return (Buffer (One) + { + 0x01 // . + }) + } + Else + { + Return (Buffer (One) + { + 0x00 // . + }) + } + + Break + } + } + Else + { + Return (Buffer (One) + { + 0x00 // . + }) + } + + Break + } + } + Else + { + Return (Buffer (One) + { + 0x00 // . + }) + Break + } + + Break + } + } + } + } + + Device (UFN0) + { + Name (_ADR, One) // _ADR: Address + Name (_S0W, 0x03) // _S0W: S0 Device Wake State + Name (_PLD, Package (0x01) // _PLD: Physical Location of Device + { + ToPLD ( + PLD_Revision = 0x2, + PLD_IgnoreColor = 0x1, + PLD_Red = 0x0, + PLD_Green = 0x0, + PLD_Blue = 0x0, + PLD_Width = 0x0, + PLD_Height = 0x0, + PLD_UserVisible = 0x1, + PLD_Dock = 0x0, + PLD_Lid = 0x0, + PLD_Panel = "BACK", + PLD_VerticalPosition = "CENTER", + PLD_HorizontalPosition = "LEFT", + PLD_Shape = "VERTICALRECTANGLE", + PLD_GroupOrientation = 0x0, + PLD_GroupToken = 0x0, + PLD_GroupPosition = 0x1, + PLD_Bay = 0x0, + PLD_Ejectable = 0x0, + PLD_EjectRequired = 0x0, + PLD_CabinetNumber = 0x0, + PLD_CardCageNumber = 0x0, + PLD_Reference = 0x0, + PLD_Rotation = 0x0, + PLD_Order = 0x0, + PLD_VerticalOffset = 0xFFFF, + PLD_HorizontalOffset = 0xFFFF) + + }) + Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities + { + One, + 0x09, + Zero, + Zero + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x000000A5, + } + Interrupt (ResourceConsumer, Level, ActiveHigh, SharedAndWake, ,, ) + { + 0x000000A2, + } + }) + Method (CCVL, 0, NotSerialized) + { + Return (CCST) /* \_SB_.CCST */ + } + + Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method + { + While (One) + { + Name (_T_0, Buffer (One) // _T_x: Emitted by ASL Compiler + { + 0x00 // . + }) + CopyObject (ToBuffer (Arg0), _T_0) /* \_SB_.URS0.UFN0._DSM._T_0 */ + If ((_T_0 == ToUUID ("fe56cfeb-49d5-4378-a8a2-2978dbe54ad2"))) + { + While (One) + { + Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler + _T_1 = ToInteger (Arg2) + If ((_T_1 == Zero)) + { + While (One) + { + Name (_T_2, Zero) // _T_x: Emitted by ASL Compiler + _T_2 = ToInteger (Arg1) + If ((_T_2 == Zero)) + { + Return (Buffer (One) + { + 0x03 // . + }) + Break + } + Else + { + Return (Buffer (One) + { + 0x01 // . + }) + Break + } + + Break + } + + Return (Buffer (One) + { + 0x00 // . + }) + Break + } + ElseIf ((_T_1 == One)) + { + Return (0x20) + Break + } + Else + { + Return (Buffer (One) + { + 0x00 // . + }) + Break + } + + Break + } + } + ElseIf ((_T_0 == ToUUID ("18de299f-9476-4fc9-b43b-8aeb713ed751"))) + { + While (One) + { + Name (_T_3, Zero) // _T_x: Emitted by ASL Compiler + _T_3 = ToInteger (Arg2) + If ((_T_3 == Zero)) + { + While (One) + { + Name (_T_4, Zero) // _T_x: Emitted by ASL Compiler + _T_4 = ToInteger (Arg1) + If ((_T_4 == Zero)) + { + Return (Buffer (One) + { + 0x03 // . + }) + Break + } + Else + { + Return (Buffer (One) + { + 0x01 // . + }) + Break + } + + Break + } + + Return (Buffer (One) + { + 0x00 // . + }) + Break + } + ElseIf ((_T_3 == One)) + { + Return (0x39) + Break + } + Else + { + Return (Buffer (One) + { + 0x00 // . + }) + Break + } + + Break + } + } + Else + { + Return (Buffer (One) + { + 0x00 // . + }) + Break + } + + Break + } + } + + Method (PHYC, 0, NotSerialized) + { + Name (CFG0, Package (0x12) + { + /*Package (0x03) + { + Zero, + 0x088E2198, + 0x20 + }*/ + + Package (0x03) { Zero, 0x088E2210, 0x23 }, + Package (0x03) { Zero, 0x088E2004, 0x03 }, + Package (0x03) { Zero, 0x088E218c, 0x7c }, + Package (0x03) { Zero, 0x088E202c, 0x80 }, + Package (0x03) { Zero, 0x088E2184, 0x0a }, + Package (0x03) { Zero, 0x088E20b4, 0x19 }, + Package (0x03) { Zero, 0x088E2194, 0x40 }, + Package (0x03) { Zero, 0x088E2198, 0x28 }, + Package (0x03) { Zero, 0x088E2214, 0x21 }, + Package (0x03) { Zero, 0x088E2220, 0x00 }, + Package (0x03) { Zero, 0x088E2224, 0x58 }, + Package (0x03) { Zero, 0x088E2240, 0x35 }, + Package (0x03) { Zero, 0x088E2244, 0x29 }, + Package (0x03) { Zero, 0x088E2248, 0xca }, + Package (0x03) { Zero, 0x088E224c, 0x04 }, + Package (0x03) { Zero, 0x088E2250, 0x03 }, + Package (0x03) { Zero, 0x088E223c, 0x00 }, + Package (0x03) { Zero, 0x088E2210, 0x22 } + }) + Return (CFG0) /* \_SB_.URS0.UFN0.PHYC.CFG0 */ + } + } + } + + + Device (TSC1) + { + Name (_HID, "MSHW1003") // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_DEP, Package (0x03) // _DEP: Dependencies + { + \_SB.PEP0, + \_SB.GIO0, + \_SB.IC13 + }) + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + I2cSerialBusV2 (0x0020, ControllerInitiated, 0x00061A80, + AddressingMode7Bit, "\\_SB.IC13", + 0x00, ResourceConsumer, , Exclusive, + ) + GpioInt (Edge, ActiveLow, ExclusiveAndWake, PullUp, 0x0000, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x007D + } + GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionNone, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0063 + } + }) + Return (RBUF) /* \_SB_.TSC1._CRS.RBUF */ + } + + /*Method (INFO, 0, NotSerialized) + { + Name (RBUF, Buffer (0x04) + { + 0x0F, 0x01, 0x00, 0x00 // .... + }) + Return (RBUF) + }*/ + + // PEP Proxy Support + Name (PGID, Buffer (0x0A) + { + "\\_SB.TSC1" + }) // Device ID buffer - PGID( Pep given ID ) + Name (DBUF, Buffer (DBFL){}) // Device ID buffer - PGID( Pep given ID ) + CreateByteField (DBUF, Zero, STAT) // STATUS 1 BYTE + // HIDDEN 1 BYTE ( SIZE ) + CreateByteField (DBUF, 0x02, DVAL) // Packet value, 1 BYTES Device Status + CreateField (DBUF, 0x18, 0xA0, DEID)// Device ID, 20 BYTES(160 Bits) + Method (_S1D, 0, NotSerialized) // _S1D: S1 Device State + { + Return (0x03) + } + + Method (_S2D, 0, NotSerialized) // _S2D: S2 Device State + { + Return (0x03) + } + + Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State + { + Return (0x03) + } + + Method (_PS0, 0, NotSerialized) // _PS0: Power State 0 + { + DEID = Buffer (ESNL){} + DVAL = Zero + DEID = PGID /* \_SB_.TSC1.PGID */ + If (\_SB.ABD.AVBL) + { + \_SB.PEP0.FLD0 = DBUF /* \_SB_.TSC1.DBUF */ + } + } + + Method (_PS3, 0, NotSerialized) // _PS3: Power State 3 + { + DEID = Buffer (ESNL){} + DVAL = 0x03 + DEID = PGID /* \_SB_.TSC1.PGID */ + If (\_SB.ABD.AVBL) + { + \_SB.PEP0.FLD0 = DBUF /* \_SB_.TSC1.DBUF */ + } + } + } + + // CPU Aggregator Device -- Required for Thermal Parking + Device (AGR0) + { + Name (_HID, "ACPI000C" /* Processor Aggregator Device */) // _HID: Hardware ID + Name (_PUR, Package (0x02) // _PUR: Processor Utilization Request + { + One, + Zero + }) + Method (_OST, 3, NotSerialized) // _OST: OSPM Status Indication + { + \_SB.PEP0.ROST = Arg2 + } + } + + /*Device (OPBT) + { + Name (_HID, "OPHW1001") + Name (_UID, One) // _UID: Unique ID + Name (_DEP, Package (0x02) // _DEP: Dependencies + { + \_SB.PEP0, + \_SB.IC11 + }) + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + I2CSerialBus (0x55, ControllerInitiated, 100000, AddressingMode7Bit, "\\_SB.IC11", , ) + }) + Return (RBUF) + } + }*/ + + Device (OP3P) + { + Name (_HID, "QCOM2456") + Method (_CRS, 0x0, NotSerialized) { + Name (RBUF, ResourceTemplate () { + I2CSerialBus( 0x55, ControllerInitiated, 100000, AddressingMode7Bit, "\\_SB.IC11", , ) + }) + + Return (RBUF) + } // Number of args in CFG0 must match value of NUM_PMIC_3P_ACPI_ARGS 10 in PmicAcpi.c + Method (PMCF) { + Name (CFG0, + Package(){ + // Charger Info + 0, // I2c Index - Resource Index + 1, // Charger IC Type - PLAT_CONFIG_CHG_IC_SMB1360 + 1, // Charger Connector Type - PLAT_CONFIG_CHG_CONN_WALL + 1, // PMIC Watch Dog Timer On - PMIC_TRUE + 20, // PMIC Watch Dog Timer Seconds + + // Gauging Info + 0, // I2c Index - Gauge Resource Index + 2, // I2c Index - Gauge GPIO Expander Resource Index + 0, // Gauge GPIO Expander present + 1, // Gauge IC - PM_THIRD_PARTY_GAUGE_IC_SMB1360 + + // Battery Info + 1, // Battery Type - PLAT_CONFIG_BATT_CELL_TYPE_1S2P + + // GPIO Present + 0 // 0- GPIO not present, 1- GPIO present + }) + Return (CFG0) + } + } + + ThermalZone (TZ0) + { + Name (_HID, "QCOM02B0") // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + Name (_TZD, Package (0x04) // _TZD: Thermal Zone Devices + { + \_SB.SYSM.CLUS.CPU0, + \_SB.SYSM.CLUS.CPU1, + \_SB.SYSM.CLUS.CPU2, + \_SB.SYSM.CLUS.CPU3 + }) + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + Return (Package (0x01) + { + \_SB.PEP0 + }) + } + } + + ThermalZone (TZ1) + { + Name (_HID, "QCOM02B0") // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_TZD, Package (0x01) // _TZD: Thermal Zone Devices + { + \_SB.PEP0 + }) + Name (TPSV, 0x0EF6) + Method (_PSV, 0, NotSerialized) // _PSV: Passive Temperature + { + Return (\_SB.TZ1.TPSV) + } + + Name (_MTL, 0x14) // _MTL: Minimum Throttle Limit + Name (TTC1, Zero) + Method (_TC1, 0, NotSerialized) // _TC1: Thermal Constant 1 + { + Return (\_SB.TZ1.TTC1) + } + + Name (TTC2, One) + Method (_TC2, 0, NotSerialized) // _TC2: Thermal Constant 2 + { + Return (\_SB.TZ1.TTC2) + } + + Name (TTSP, 0x32) + Method (_TSP, 0, NotSerialized) // _TSP: Thermal Sampling Period + { + Return (\_SB.TZ1.TTSP) + } + + Name (_TZP, Zero) // _TZP: Thermal Zone Polling + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + Return (Package (0x01) + { + \_SB.PEP0 + }) + } + } + + ThermalZone (TZ2) + { + Name (_HID, "QCOM02B1") // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + Name (_TZD, Package (0x04) // _TZD: Thermal Zone Devices + { + \_SB.SYSM.CLUS.CPU4, + \_SB.SYSM.CLUS.CPU5, + \_SB.SYSM.CLUS.CPU6, + \_SB.SYSM.CLUS.CPU7 + }) + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + Return (Package (0x01) + { + \_SB.PEP0 + }) + } + } + + ThermalZone (TZ3) + { + Name (_HID, "QCOM02B1") // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_TZD, Package (0x01) // _TZD: Thermal Zone Devices + { + \_SB.PEP0 + }) + Name (TPSV, 0x0EF6) + Method (_PSV, 0, NotSerialized) // _PSV: Passive Temperature + { + Return (\_SB.TZ3.TPSV) + } + + Name (TTC1, Zero) + Method (_TC1, 0, NotSerialized) // _TC1: Thermal Constant 1 + { + Return (\_SB.TZ3.TTC1) + } + + Name (TTC2, One) + Method (_TC2, 0, NotSerialized) // _TC2: Thermal Constant 2 + { + Return (\_SB.TZ3.TTC2) + } + + Name (TTSP, One) + Method (_TSP, 0, NotSerialized) // _TSP: Thermal Sampling Period + { + Return (\_SB.TZ3.TTSP) + } + + Name (_MTL, 0x14) // _MTL: Minimum Throttle Limit + Name (_TZP, Zero) // _TZP: Thermal Zone Polling + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + Return (Package (0x01) + { + \_SB.PEP0 + }) + } + } + + ThermalZone (TZ20) + { + Name (_HID, "QCOM02AB") // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + Name (_TZD, Package (0x01) // _TZD: Thermal Zone Devices + { + //\_SB.SYSM.CLUS.CPU6 +//#if 0 + \_SB.GPU0 +//#endif + }) + Name (TPSV, 0x0E60) + Method (_PSV, 0, NotSerialized) // _PSV: Passive Temperature + { + Return (\_SB.TZ20.TPSV) + } + + Name (TTC1, One) + Method (_TC1, 0, NotSerialized) // _TC1: Thermal Constant 1 + { + Return (\_SB.TZ20.TTC1) + } + + Name (TTC2, 0x02) + Method (_TC2, 0, NotSerialized) // _TC2: Thermal Constant 2 + { + Return (\_SB.TZ20.TTC2) + } + + Name (TTSP, 0x02) + Method (_TSP, 0, NotSerialized) // _TSP: Thermal Sampling Period + { + Return (\_SB.TZ20.TTSP) + } + + Name (_TZP, Zero) // _TZP: Thermal Zone Polling + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + Return (Package (0x01) + { + \_SB.PEP0 + }) + } + } + + ThermalZone (TZ21) + { + Name (_HID, "QCOM02AC") // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + Name (_TZD, Package (0x1) //(0x01) // _TZD: Thermal Zone Devices + { + //\_SB.SYSM.CLUS.CPU6 +//#if 0 + \_SB.GPU0 +//#endif + }) + Name (TPSV, 0x0E60) + Method (_PSV, 0, NotSerialized) // _PSV: Passive Temperature + { + Return (\_SB.TZ21.TPSV) + } + + Name (TTC1, One) + Method (_TC1, 0, NotSerialized) // _TC1: Thermal Constant 1 + { + Return (\_SB.TZ21.TTC1) + } + + Name (TTC2, 0x02) + Method (_TC2, 0, NotSerialized) // _TC2: Thermal Constant 2 + { + Return (\_SB.TZ21.TTC2) + } + + Name (TTSP, 0x02) + Method (_TSP, 0, NotSerialized) // _TSP: Thermal Sampling Period + { + Return (\_SB.TZ21.TTSP) + } + + Name (_TZP, Zero) // _TZP: Thermal Zone Polling + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + Return (Package (0x01) + { + \_SB.PEP0 + }) + } + } + + + ThermalZone (TZ32) + { + Name (_HID, "QCOM02C9") // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + Name (_TZD, Package (0x01) //(0x01) // _TZD: Thermal Zone Devices + { + //\_SB.SYSM.CLUS.CPU6 + \_SB.GPU0.AVS0 + }) + Name (TPSV, 0x0E60) + Method (_PSV, 0, NotSerialized) // _PSV: Passive Temperature + { + Return (\_SB.TZ32.TPSV) + } + + Name (TTC1, One) + Method (_TC1, 0, NotSerialized) // _TC1: Thermal Constant 1 + { + Return (\_SB.TZ32.TTC1) + } + + Name (TTC2, 0x02) + Method (_TC2, 0, NotSerialized) // _TC2: Thermal Constant 2 + { + Return (\_SB.TZ32.TTC2) + } + + Name (TTSP, 0x0A) + Method (_TSP, 0, NotSerialized) // _TSP: Thermal Sampling Period + { + Return (\_SB.TZ32.TTSP) + } + + Name (_TZP, Zero) // _TZP: Thermal Zone Polling + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + Return (Package (0x01) + { + \_SB.PEP0 + }) + } + } + + ThermalZone (TZ33) + { + Name (_HID, "QCOM02CB") // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_TZD, Package (0x01) // _TZD: Thermal Zone Devices + { + \_SB.AMSS + }) + Name (TPSV, 0x0E60) + Method (_PSV, 0, NotSerialized) // _PSV: Passive Temperature + { + Return (\_SB.TZ33.TPSV) + } + + Name (TTC1, One) + Method (_TC1, 0, NotSerialized) // _TC1: Thermal Constant 1 + { + Return (\_SB.TZ33.TTC1) + } + + Name (TTC2, 0x02) + Method (_TC2, 0, NotSerialized) // _TC2: Thermal Constant 2 + { + Return (\_SB.TZ33.TTC2) + } + + Name (TTSP, 0x0A) + Method (_TSP, 0, NotSerialized) // _TSP: Thermal Sampling Period + { + Return (\_SB.TZ33.TTSP) + } + + Name (_TZP, Zero) // _TZP: Thermal Zone Polling + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + Return (Package (0x01) + { + \_SB.PEP0 + }) + } + } + + ThermalZone (TZ36) + { + Name (_HID, "QCOM029E") // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + Name (_TZD, Package (0x08) // _TZD: Thermal Zone Devices + { + \_SB.SYSM.CLUS.CPU0, + \_SB.SYSM.CLUS.CPU1, + \_SB.SYSM.CLUS.CPU2, + \_SB.SYSM.CLUS.CPU3, + \_SB.SYSM.CLUS.CPU4, + \_SB.SYSM.CLUS.CPU5, + \_SB.SYSM.CLUS.CPU6, + \_SB.SYSM.CLUS.CPU7//, + //\_SB.PMBM + }) + Name (TPSV, 0x0EC4) + Method (_PSV, 0, NotSerialized) // _PSV: Passive Temperature + { + Return (\_SB.TZ36.TPSV) + } + + Name (TTC1, 0x04) + Method (_TC1, 0, NotSerialized) // _TC1: Thermal Constant 1 + { + Return (\_SB.TZ36.TTC1) + } + + Name (TTC2, 0x03) + Method (_TC2, 0, NotSerialized) // _TC2: Thermal Constant 2 + { + Return (\_SB.TZ36.TTC2) + } + + Name (TTSP, 0x32) + Method (_TSP, 0, NotSerialized) // _TSP: Thermal Sampling Period + { + Return (\_SB.TZ36.TTSP) + } + + Name (_TZP, Zero) // _TZP: Thermal Zone Polling + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + Return (Package (0x02) + { + \_SB.PEP0, + \_SB.ADC1 + }) + } + } + + ThermalZone (TZ37) + { + Name (_HID, "QCOM029E") // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_TZD, Package (0x01) // _TZD: Thermal Zone Devices + { + \_SB.PEP0//, + //\_SB.PMBM + }) + Name (TPSV, 0x0F8C) + Method (_PSV, 0, NotSerialized) // _PSV: Passive Temperature + { + Return (\_SB.TZ37.TPSV) + } + + Name (TCRT, 0x1054) + Method (_CRT, 0, NotSerialized) // _CRT: Critical Temperature + { + Return (\_SB.TZ37.TCRT) + } + + Name (TTC1, 0x04) + Method (_TC1, 0, NotSerialized) // _TC1: Thermal Constant 1 + { + Return (\_SB.TZ37.TTC1) + } + + Name (TTC2, 0x03) + Method (_TC2, 0, NotSerialized) // _TC2: Thermal Constant 2 + { + Return (\_SB.TZ37.TTC2) + } + + Name (TTSP, 0x32) + Method (_TSP, 0, NotSerialized) // _TSP: Thermal Sampling Period + { + Return (\_SB.TZ37.TTSP) + } + + Name (_TZP, Zero) // _TZP: Thermal Zone Polling + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + Return (Package (0x02) + { + \_SB.PEP0, + \_SB.ADC1 + }) + } + } + + ThermalZone (TZ38) + { + Name (_HID, "QCOM029E") // _HID: Hardware ID + Name (_UID, 0x02) // _UID: Unique ID + Name (_TZD, Package (0x01) // _TZD: Thermal Zone Devices + { + \_SB.PEP0 + }) + Method (INVT, 0, NotSerialized) + { + Return (One) + } + + Method (_MTL, 0, NotSerialized) // _MTL: Minimum Throttle Limit + { + Return (0x3C) + } + + Name (TPSV, 0x0B0E) + Method (_PSV, 0, NotSerialized) // _PSV: Passive Temperature + { + Return (\_SB.TZ38.TPSV) + } + + Name (TTC1, 0x04) + Method (_TC1, 0, NotSerialized) // _TC1: Thermal Constant 1 + { + Return (\_SB.TZ38.TTC1) + } + + Name (TTC2, 0x03) + Method (_TC2, 0, NotSerialized) // _TC2: Thermal Constant 2 + { + Return (\_SB.TZ38.TTC2) + } + + Name (TTSP, 0x0A) + Method (_TSP, 0, NotSerialized) // _TSP: Thermal Sampling Period + { + Return (\_SB.TZ38.TTSP) + } + + Name (_TZP, Zero) // _TZP: Thermal Zone Polling + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + Return (Package (0x02) + { + \_SB.PEP0, + \_SB.ADC1 + }) + } + } + + ThermalZone (TZ40) + { + Name (_HID, "QCOM02AF") // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + Name (_TZD, Package (0x01) // _TZD: Thermal Zone Devices + { + \_SB.COEX + }) + Name (TPSV, 0x0DFC) + Method (_PSV, 0, NotSerialized) // _PSV: Passive Temperature + { + Return (\_SB.TZ40.TPSV) + } + + Name (TTC1, One) + Method (_TC1, 0, NotSerialized) // _TC1: Thermal Constant 1 + { + Return (\_SB.TZ40.TTC1) + } + + Name (TTC2, 0x05) + Method (_TC2, 0, NotSerialized) // _TC2: Thermal Constant 2 + { + Return (\_SB.TZ40.TTC2) + } + + Name (TTSP, 0x1E) + Method (_TSP, 0, NotSerialized) // _TSP: Thermal Sampling Period + { + Return (\_SB.TZ40.TTSP) + } + + Name (_TZP, Zero) // _TZP: Thermal Zone Polling + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + Return (Package (0x01) + { + \_SB.PEP0 + }) + } + } + + ThermalZone (TZ41) + { + Name (_HID, "QCOM0295") // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_TSP, 0x32) // _TSP: Thermal Sampling Period + Name (_TZP, Zero) // _TZP: Thermal Zone Polling + } + + ThermalZone (TZ44) + { + Name (_HID, "QCOM02CC") // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + Name (_TZD, Package (0x04) // _TZD: Thermal Zone Devices + { + \_SB.SYSM.CLUS.CPU4, + \_SB.SYSM.CLUS.CPU5, + \_SB.SYSM.CLUS.CPU6, + \_SB.SYSM.CLUS.CPU7 + }) + Name (TPSV, 0x0E60) + Method (_PSV, 0, NotSerialized) // _PSV: Passive Temperature + { + Return (\_SB.TZ44.TPSV) + } + + Name (TTC1, Zero) + Method (_TC1, 0, NotSerialized) // _TC1: Thermal Constant 1 + { + Return (\_SB.TZ44.TTC1) + } + + Name (TTC2, One) + Method (_TC2, 0, NotSerialized) // _TC2: Thermal Constant 2 + { + Return (\_SB.TZ44.TTC2) + } + + Name (TTSP, One) + Method (_TSP, 0, NotSerialized) // _TSP: Thermal Sampling Period + { + Return (\_SB.TZ44.TTSP) + } + + Name (_TZP, Zero) // _TZP: Thermal Zone Polling + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + Return (Package (0x01) + { + \_SB.PEP0 + }) + } + } + + ThermalZone (TZ99) + { + Name (_HID, "QCOM02B2") // _HID: Hardware ID + Name (_UID, 0x64) // _UID: Unique ID + Name (TCRT, 0x0EF6) + Method (_CRT, 0, NotSerialized) // _CRT: Critical Temperature + { + Return (\_SB.TZ99.TCRT) + } + + Name (TTC1, 0x04) + Method (_TC1, 0, NotSerialized) // _TC1: Thermal Constant 1 + { + Return (\_SB.TZ99.TTC1) + } + + Name (TTC2, 0x03) + Method (_TC2, 0, NotSerialized) // _TC2: Thermal Constant 2 + { + Return (\_SB.TZ99.TTC2) + } + + Name (TTSP, 0x0A) + Method (_TSP, 0, NotSerialized) // _TSP: Thermal Sampling Period + { + Return (\_SB.TZ99.TTSP) + } + + Name (_TZP, Zero) // _TZP: Thermal Zone Polling + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + Return (Package (0x01) + { + \_SB.PEP0 + }) + } + } + + ThermalZone (TZ4) + { + Name (_HID, "QCOM0299") // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + Name (_TZD, Package (0x0A) // _TZD: Thermal Zone Devices + { + \_SB.SYSM.CLUS.CPU0, + \_SB.SYSM.CLUS.CPU1, + \_SB.SYSM.CLUS.CPU2, + \_SB.SYSM.CLUS.CPU3, + \_SB.SYSM.CLUS.CPU4, + \_SB.SYSM.CLUS.CPU5, + \_SB.SYSM.CLUS.CPU6, + \_SB.SYSM.CLUS.CPU7, + \_SB.GPU0.MON0, + \_SB.GPU0 + }) + Name (TPSV, 0x0E92) + Method (_PSV, 0, NotSerialized) // _PSV: Passive Temperature + { + Return (\_SB.TZ4.TPSV) + } + + Name (TTC1, One) + Method (_TC1, 0, NotSerialized) // _TC1: Thermal Constant 1 + { + Return (\_SB.TZ4.TTC1) + } + + Name (TTC2, One) + Method (_TC2, 0, NotSerialized) // _TC2: Thermal Constant 2 + { + Return (\_SB.TZ4.TTC2) + } + + Name (TTSP, 0x32) + Method (_TSP, 0, NotSerialized) // _TSP: Thermal Sampling Period + { + Return (\_SB.TZ4.TTSP) + } + + Name (_MTL, 0x19) // _MTL: Minimum Throttle Limit + Name (_TZP, Zero) // _TZP: Thermal Zone Polling + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + Return (Package (0x02) + { + \_SB.PEP0, + \_SB.ADC1 + }) + } + } + + ThermalZone (TZ5) + { + Name (_HID, "QCOM029A") // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + Name (_TZD, Package (0x08) // _TZD: Thermal Zone Devices + { + \_SB.SYSM.CLUS.CPU0, + \_SB.SYSM.CLUS.CPU1, + \_SB.SYSM.CLUS.CPU2, + \_SB.SYSM.CLUS.CPU3, + \_SB.SYSM.CLUS.CPU4, + \_SB.SYSM.CLUS.CPU5, + \_SB.SYSM.CLUS.CPU6, + \_SB.SYSM.CLUS.CPU7 + }) + Name (TPSV, 0x0E92) + Method (_PSV, 0, NotSerialized) // _PSV: Passive Temperature + { + Return (\_SB.TZ5.TPSV) + } + + Name (TTC1, One) + Method (_TC1, 0, NotSerialized) // _TC1: Thermal Constant 1 + { + Return (\_SB.TZ5.TTC1) + } + + Name (TTC2, One) + Method (_TC2, 0, NotSerialized) // _TC2: Thermal Constant 2 + { + Return (\_SB.TZ5.TTC2) + } + + Name (TTSP, 0x32) + Method (_TSP, 0, NotSerialized) // _TSP: Thermal Sampling Period + { + Return (\_SB.TZ5.TTSP) + } + + Name (_TZP, Zero) // _TZP: Thermal Zone Polling + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + Return (Package (0x02) + { + \_SB.PEP0, + \_SB.ADC1 + }) + } + } + + ThermalZone (TZ6) + { + Name (_HID, "QCOM029B") // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + Name (_TZD, Package (0x01) // _TZD: Thermal Zone Devices + { + \_SB.COEX + }) + Name (TPSV, 0x0E92) + Method (_PSV, 0, NotSerialized) // _PSV: Passive Temperature + { + Return (\_SB.TZ6.TPSV) + } + + Name (TTC1, One) + Method (_TC1, 0, NotSerialized) // _TC1: Thermal Constant 1 + { + Return (\_SB.TZ6.TTC1) + } + + Name (TTC2, One) + Method (_TC2, 0, NotSerialized) // _TC2: Thermal Constant 2 + { + Return (\_SB.TZ6.TTC2) + } + + Name (TTSP, 0x32) + Method (_TSP, 0, NotSerialized) // _TSP: Thermal Sampling Period + { + Return (\_SB.TZ6.TTSP) + } + + Name (_TZP, Zero) // _TZP: Thermal Zone Polling + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + Return (Package (0x02) + { + \_SB.PEP0, + \_SB.ADC1 + }) + } + } + + ThermalZone (TZ7) + { + Name (_HID, "QCOM029C") // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + Name (_TZD, Package (0x08) // _TZD: Thermal Zone Devices + { + \_SB.SYSM.CLUS.CPU0, + \_SB.SYSM.CLUS.CPU1, + \_SB.SYSM.CLUS.CPU2, + \_SB.SYSM.CLUS.CPU3, + \_SB.SYSM.CLUS.CPU4, + \_SB.SYSM.CLUS.CPU5, + \_SB.SYSM.CLUS.CPU6, + \_SB.SYSM.CLUS.CPU7 + }) + Name (TCRT, 0x0DCA) + Method (_CRT, 0, NotSerialized) // _CRT: Critical Temperature + { + Return (\_SB.TZ7.TCRT) + } + + Name (TPSV, 0x0DC0) + Method (_PSV, 0, NotSerialized) // _PSV: Passive Temperature + { + Return (\_SB.TZ7.TPSV) + } + + Name (TTC1, One) + Method (_TC1, 0, NotSerialized) // _TC1: Thermal Constant 1 + { + Return (\_SB.TZ7.TTC1) + } + + Name (TTC2, One) + Method (_TC2, 0, NotSerialized) // _TC2: Thermal Constant 2 + { + Return (\_SB.TZ7.TTC2) + } + + Name (TTSP, 0x32) + Method (_TSP, 0, NotSerialized) // _TSP: Thermal Sampling Period + { + Return (\_SB.TZ7.TTSP) + } + + Name (_TZP, Zero) // _TZP: Thermal Zone Polling + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + Return (Package (0x02) + { + \_SB.PEP0, + \_SB.ADC1 + }) + } + } + + ThermalZone (TZ8) + { + Name (_HID, "QCOM029D") // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + Name (_TZD, Package (0x0A) // _TZD: Thermal Zone Devices + { + \_SB.SYSM.CLUS.CPU0, + \_SB.SYSM.CLUS.CPU1, + \_SB.SYSM.CLUS.CPU2, + \_SB.SYSM.CLUS.CPU3, + \_SB.SYSM.CLUS.CPU4, + \_SB.SYSM.CLUS.CPU5, + \_SB.SYSM.CLUS.CPU6, + \_SB.SYSM.CLUS.CPU7, + \_SB.GPU0.MON0, + \_SB.GPU0 + }) + Name (TPSV, 0x0E92) + Method (_PSV, 0, NotSerialized) // _PSV: Passive Temperature + { + Return (\_SB.TZ8.TPSV) + } + + Name (TTC1, One) + Method (_TC1, 0, NotSerialized) // _TC1: Thermal Constant 1 + { + Return (\_SB.TZ8.TTC1) + } + + Name (TTC2, One) + Method (_TC2, 0, NotSerialized) // _TC2: Thermal Constant 2 + { + Return (\_SB.TZ8.TTC2) + } + + Name (TTSP, 0x32) + Method (_TSP, 0, NotSerialized) // _TSP: Thermal Sampling Period + { + Return (\_SB.TZ8.TTSP) + } + + Name (_TZP, Zero) // _TZP: Thermal Zone Polling + Name (_MTL, 0x19) // _MTL: Minimum Throttle Limit + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + Return (Package (0x02) + { + \_SB.PEP0, + \_SB.ADC1 + }) + } + } + + ThermalZone (TZ9) + { + Name (_HID, "QCOM029F") // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + Name (_TZD, Package (0x0A) // _TZD: Thermal Zone Devices + { + \_SB.SYSM.CLUS.CPU0, + \_SB.SYSM.CLUS.CPU1, + \_SB.SYSM.CLUS.CPU2, + \_SB.SYSM.CLUS.CPU3, + \_SB.SYSM.CLUS.CPU4, + \_SB.SYSM.CLUS.CPU5, + \_SB.SYSM.CLUS.CPU6, + \_SB.SYSM.CLUS.CPU7, + \_SB.GPU0.MON0, + \_SB.GPU0 + }) + Name (TPSV, 0x0E92) + Method (_PSV, 0, NotSerialized) // _PSV: Passive Temperature + { + Return (\_SB.TZ9.TPSV) + } + + Name (TTC1, One) + Method (_TC1, 0, NotSerialized) // _TC1: Thermal Constant 1 + { + Return (\_SB.TZ9.TTC1) + } + + Name (TTC2, One) + Method (_TC2, 0, NotSerialized) // _TC2: Thermal Constant 2 + { + Return (\_SB.TZ9.TTC2) + } + + Name (TTSP, 0x32) + Method (_TSP, 0, NotSerialized) // _TSP: Thermal Sampling Period + { + Return (\_SB.TZ9.TTSP) + } + + Name (_TZP, Zero) // _TZP: Thermal Zone Polling + Name (_MTL, 0x19) // _MTL: Minimum Throttle Limit + Method (_DEP, 0, NotSerialized) // _DEP: Dependencies + { + Return (Package (0x02) + { + \_SB.PEP0, + \_SB.ADC1 + }) + } + } + + Name (HWNH, Zero) + Name (HWNL, Zero) + // + //HWN Haptics + // + Device (HWN1) + { + Name (_HID, "QCOM02A9") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + Method (_STA, 0, NotSerialized) // _STA: Status + { + If ((\_SB.HWNH == Zero)) + { + Return (Zero) + } + Else + { + Return (0x0F) + } + } + + Name (_DEP, Package (One) // _DEP: Dependencies + { + \_SB.PMIC + }) + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + GpioInt (Level, ActiveHigh, Exclusive, PullNone, 0x0000, + "\\_SB.PM01", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0190 + } + }) + Return (RBUF) /* \_SB_.HWN1._CRS.RBUF */ + } + + Method (HAPI, 0, NotSerialized) + { + Name (CFG0, Package (0x03) + { + One, // Total HWN Vibs + One, // PMIC number PMI8998 + One // Flag indicated wheterh to read configuration from ACPI or registry + // 0 -> Read from registry + // 1 -> Read from ACPI HAPC method + }) + Return (CFG0) /* \_SB_.HWN1.HAPI.CFG0 */ + } + + // Haptics configuration method + Method (HAPC, 0, NotSerialized) + { + Name (CFG0, Package (0x16) + { + Zero, + 0x0984, + Zero, + One, + One, + One, + One, + Zero, + 0x04, + One, + 0x03, + 0x14, + One, + 0x03, + Zero, + Zero, + 0x06, + Zero, + Zero, + 0x0535, + 0x03, + One + }) + Return (CFG0) /* \_SB_.HWN1.HAPC.CFG0 */ + } + } + + // HWN LED + Device (HWN0) + { + Name (_HID, "QCOM02A8") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + Name (_UID, Zero) // _UID: Unique ID + Method (_STA, 0, NotSerialized) // _STA: Status + { + If ((\_SB.HWNL == Zero)) + { + Return (Zero) + } + Else + { + Return (0x0F) + } + } + + // ACPI method for LED Configs + Method (HWNL, 0, NotSerialized) + { + Name (CFG0, Package (0x10) + { + One, + 0x03, + 0x019B, + 0x14, + 0x20, + 0x02, + 0x40, + 0x03, + 0x80, + 0x04, + One, + One, + One, + 0x03, + One, + One + }) + Return (CFG0) /* \_SB_.HWN0.HWNL.CFG0 */ + } + } + + // + // Modembridge Driver + // + Device (MBRG) + { + Name (_HID, "QCOM020D") // _HID: Hardware ID + } + + Device (CONT) + { + Name (_HID, "CONT1234") // _HID: Hardware ID + Name (_CID, "PNP0C60" /* Display Sensor Device */) // _CID: Compatible ID + } + + Device (POWR) + { + Name (_HID, "POWR1234") // _HID: Hardware ID + Name (_CID, "PNP0C40" /* Standard Button Controller */) // _CID: Compatible ID + } + + Device (SVBI) + { + Name (_HID, "SAMM0901") // _HID: Hardware ID + Name (_SUB, "C153144D") // _SUB: Subsystem ID + } + +#if 0 + Device (TSC1) + { + Name (_HID, "SYNP1234") // _HID: Hardware ID + Name (_CID, "PNP0C50" /* HID Protocol Device (I2C bus) */) // _CID: Compatible ID + Name (_SUB, "C153144D") // _SUB: Subsystem ID + Name (_HRV, One) // _HRV: Hardware Revision + Name (_ADR, Zero) // _ADR: Address + Name (_DEP, Package (0x03) // _DEP: Dependencies + { + \_SB.GIO0, + \_SB.IC12, + \_SB.PEP0 + }) + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + I2cSerialBusV2 (0x0020, ControllerInitiated, 0x00061A80, + AddressingMode7Bit, "\\_SB.IC12", + 0x00, ResourceConsumer, , Exclusive, + ) + GpioInt (Level, ActiveLow, Exclusive, PullNone, 0x0000, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0078 + } + }) + Return (RBUF) /* \_SB_.TSC1._CRS.RBUF */ + } + + Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method + { + While (One) + { + Name (_T_0, Buffer (0x01) // _T_x: Emitted by ASL Compiler + { + 0x00 // . + }) + CopyObject (ToBuffer (Arg0), _T_0) /* \_SB_.TSC1._DSM._T_0 */ + If ((_T_0 == ToUUID ("3cdff6f7-4267-4555-ad05-b30a3d8938de") /* HID I2C Device */)) + { + While (One) + { + Name (_T_1, 0x00) // _T_x: Emitted by ASL Compiler + _T_1 = ToInteger (Arg2) + If ((_T_1 == Zero)) + { + While (One) + { + Name (_T_2, 0x00) // _T_x: Emitted by ASL Compiler + _T_2 = ToInteger (Arg1) + If ((_T_2 == One)) + { + Return (Buffer (One) + { + 0x03 // . + }) + } + Else + { + Return (Buffer (One) + { + 0x00 // . + }) + } + + Break + } + } + ElseIf ((_T_1 == One)) + { + Debug = "Method _DSM Function HID" + Return (0x20) + } + Else + { + } + + Break + } + } + Else + { + Return (Buffer (One) + { + 0x00 // . + }) + } + + Break + } + } + + Name (PGID, Buffer (0x0A) + { + "\\_SB.TSC1" + }) + Name (DBUF, Buffer (DBFL){}) + CreateByteField (DBUF, Zero, STAT) + CreateByteField (DBUF, 0x02, DVAL) + CreateField (DBUF, 0x18, 0xA0, DEID) + Method (_S1D, 0, NotSerialized) // _S1D: S1 Device State + { + Return (0x03) + } + + Method (_S2D, 0, NotSerialized) // _S2D: S2 Device State + { + Return (0x03) + } + + Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State + { + Return (0x03) + } + + Method (_PS0, 0, NotSerialized) // _PS0: Power State 0 + { + DEID = Buffer (ESNL){} + DVAL = Zero + DEID = PGID /* \_SB_.TSC1.PGID */ + If (\_SB.ABD.AVBL) + { + \_SB.PEP0.FLD0 = DBUF /* \_SB_.TSC1.DBUF */ + } + } + + Method (_PS3, 0, NotSerialized) // _PS3: Power State 3 + { + DEID = Buffer (ESNL){} + DVAL = 0x03 + DEID = PGID /* \_SB_.TSC1.PGID */ + If (\_SB.ABD.AVBL) + { + \_SB.PEP0.FLD0 = DBUF /* \_SB_.TSC1.DBUF */ + } + } + } + + Device (PEN1) + { + Name (_HID, "WCOM0027") // _HID: Hardware ID + Name (_CID, "PNP0C50" /* HID Protocol Device (I2C bus) */) // _CID: Compatible ID + Name (_SUB, "C153144D") // _SUB: Subsystem ID + Name (_HRV, One) // _HRV: Hardware Revision + Name (_ADR, Zero) // _ADR: Address + Name (_DEP, Package (0x03) // _DEP: Dependencies + { + \_SB.GIO0, + \_SB.IC16, + \_SB.PEP0 + }) + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + I2cSerialBusV2 (0x0009, ControllerInitiated, 0x00061A80, + AddressingMode7Bit, "\\_SB.IC16", + 0x00, ResourceConsumer, , Exclusive, + ) + GpioInt (Level, ActiveLow, Exclusive, PullNone, 0x0000, + "\\_SB.GIO0", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0077 + } + }) + Return (RBUF) /* \_SB_.PEN1._CRS.RBUF */ + } + + Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method + { + While (One) + { + Name (_T_0, Buffer (0x01) // _T_x: Emitted by ASL Compiler + { + 0x00 // . + }) + CopyObject (ToBuffer (Arg0), _T_0) /* \_SB_.PEN1._DSM._T_0 */ + If ((_T_0 == ToUUID ("3cdff6f7-4267-4555-ad05-b30a3d8938de") /* HID I2C Device */)) + { + While (One) + { + Name (_T_1, 0x00) // _T_x: Emitted by ASL Compiler + _T_1 = ToInteger (Arg2) + If ((_T_1 == Zero)) + { + While (One) + { + Name (_T_2, 0x00) // _T_x: Emitted by ASL Compiler + _T_2 = ToInteger (Arg1) + If ((_T_2 == One)) + { + Return (Buffer (One) + { + 0x03 // . + }) + } + Else + { + Return (Buffer (One) + { + 0x00 // . + }) + } + + Break + } + } + ElseIf ((_T_1 == One)) + { + Debug = "Method _DSM Function HID" + Return (One) + } + Else + { + } + + Break + } + } + Else + { + Return (Buffer (One) + { + 0x00 // . + }) + } + + Break + } + } + + Name (PGID, Buffer (0x0A) + { + "\\_SB.PEN1" + }) + Name (DBUF, Buffer (DBFL){}) + CreateByteField (DBUF, Zero, STAT) + CreateByteField (DBUF, 0x02, DVAL) + CreateField (DBUF, 0x18, 0xA0, DEID) + Method (_S1D, 0, NotSerialized) // _S1D: S1 Device State + { + Return (0x03) + } + + Method (_S2D, 0, NotSerialized) // _S2D: S2 Device State + { + Return (0x03) + } + + Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State + { + Return (0x03) + } + + Method (_PS0, 0, NotSerialized) // _PS0: Power State 0 + { + DEID = Buffer (ESNL){} + DVAL = Zero + DEID = PGID /* \_SB_.PEN1.PGID */ + If (\_SB.ABD.AVBL) + { + \_SB.PEP0.FLD0 = DBUF /* \_SB_.PEN1.DBUF */ + } + } + + Method (_PS3, 0, NotSerialized) // _PS3: Power State 3 + { + DEID = Buffer (ESNL){} + DVAL = 0x03 + DEID = PGID /* \_SB_.PEN1.PGID */ + If (\_SB.ABD.AVBL) + { + \_SB.PEP0.FLD0 = DBUF /* \_SB_.PEN1.DBUF */ + } + } + } +#endif + + Device (BTNS) + { + Name (_HID, "ACPI0011" /* Generic Buttons Device */) // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + Name (_UID, Zero) // _UID: Unique ID + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (RBUF, ResourceTemplate () + { + GpioInt (Edge, ActiveBoth, Exclusive, PullDown, 0x0010, + "\\_SB.PM01", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0000 + } + GpioInt (Edge, ActiveBoth, ExclusiveAndWake, PullNone, 0x000E, + "\\_SB.PM01", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0085 + } + GpioInt (Edge, ActiveBoth, ExclusiveAndWake, PullDown, 0x0010, + "\\_SB.PM01", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0001 + } + }) + Return (RBUF) /* \_SB_.BTNS._CRS.RBUF */ + } + + Name (_DSD, Package (0x02) // _DSD: Device-Specific Data + { + ToUUID ("fa6bd625-9ce8-470d-a2c7-b3ca36c4282e"), + Package (0x06) + { + // Portable Device Control Application Collection + Package (0x05) + { + Zero, + One, + Zero, + One, + 0x0D + }, + + // Sleep + Package (0x05) + { + One, + Zero, + One, + One, + 0x81 + }, + + // Volume Increment + Package (0x05) + { + One, + One, + One, + 0x0C, + 0xE9 + }, + + // Volume Decrement + Package (0x05) + { + One, + 0x02, + One, + 0x0C, + 0xEA + }, + + Package (0x05) + { + One, + 0x03, + One, + 0x90, + 0x20 + }, + + Package (0x05) + { + One, + 0x04, + One, + 0x90, + 0x21 + } + } + }) + } + + // + //Qualcomm Diagnostic Consumer Interface + // + Device (QDCI) + { + Name (_DEP, Package (One) // _DEP: Dependencies + { + \_SB.GLNK + }) + Name (_HID, "QCOM0224") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + } + + Device (BTH0) + { + Name (_HID, "NOPE02B5") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + Name (_DEP, Package (0x03) // _DEP: Dependencies + { + \_SB.PEP0, + \_SB.PMIC, + \_SB.UAR7 + }) + Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake + { + Zero, + Zero + }) + Name (_S4W, 0x02) // _S4W: S4 Device Wake State + Name (_S0W, 0x02) // _S0W: S0 Device Wake State + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (PBUF, ResourceTemplate () + { + UartSerialBusV2 (0x0001C200, DataBitsEight, StopBitsOne, + 0xC0, LittleEndian, ParityTypeNone, FlowControlHardware, + 0x0020, 0x0020, "\\_SB.UAR7", + 0x00, ResourceConsumer, , Exclusive, + ) + }) + Return (PBUF) /* \_SB_.BTH0._CRS.PBUF */ + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0F) + } + } +//here + + Device (ADC1) + { + Name (_DEP, Package (0x02) // _DEP: Dependencies + { + \_SB.SPMI, + \_SB.PMIC + }) + Name (_HID, "QCOM0221") // _HID: Hardware ID + Alias (\_SB.PSUB, _SUB) + Name (_UID, Zero) // _UID: Unique ID + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (INTB, ResourceTemplate () + { + GpioInt (Edge, ActiveHigh, ExclusiveAndWake, PullUp, 0x0000, + "\\_SB.PM01", 0x00, ResourceConsumer, , + RawDataBuffer (0x01) // Vendor Data + { + 0x02 + }) + { // Pin list + 0x0020 + } + GpioInt (Edge, ActiveHigh, ExclusiveAndWake, PullUp, 0x0000, + "\\_SB.PM01", 0x00, ResourceConsumer, , + RawDataBuffer (0x01) // Vendor Data + { + 0x02 + }) + { // Pin list + 0x0028 + } + GpioInt (Edge, ActiveHigh, ExclusiveAndWake, PullUp, 0x0000, + "\\_SB.PM01", 0x00, ResourceConsumer, , + RawDataBuffer (0x01) // Vendor Data + { + 0x02 + }) + { // Pin list + 0x0168 + } + }) + Name (NAM, Buffer (0x0A) + { + "\\_SB.SPMI" + }) + Name (VUSR, Buffer (0x0C) + { + /* 0000 */ 0x8E, 0x13, 0x00, 0x01, 0x00, 0xC1, 0x02, 0x00, // ........ + /* 0008 */ 0x31, 0x01, 0x00, 0x00 // 1... + }) + Name (VBTM, Buffer (0x0C) + { + /* 0000 */ 0x8E, 0x13, 0x00, 0x01, 0x00, 0xC1, 0x02, 0x00, // ........ + /* 0008 */ 0x34, 0x01, 0x00, 0x00 // 4... + }) + Name (FGRR, Buffer (0x0C) + { + /* 0000 */ 0x8E, 0x13, 0x00, 0x01, 0x00, 0xC1, 0x02, 0x02, // ........ + /* 0008 */ 0x45, 0x01, 0x00, 0x00 // E... + }) + Concatenate (VUSR, NAM, Local1) + Concatenate (VBTM, NAM, Local2) + Concatenate (FGRR, NAM, Local3) + Concatenate (Local1, Local2, Local4) + Concatenate (Local3, INTB, Local5) + Concatenate (Local4, Local5, Local0) + Return (Local0) + } + + Method (ADDV, 0, NotSerialized) + { + Return (Package (0x03) + { + One, + One, + One + }) + } + + Method (GENP, 0, NotSerialized) + { + Return (Package (0x0A) + { + Zero, + 0x4000, + 0x001C9C38, + 0x0007A120, + 0x11, + Zero, + Zero, + 0x0300, + 0x0100, + 0x08 + }) + } + + Method (PTCF, 1, NotSerialized) + { + Local0 = (Arg0 >> One) + Local0 -= 0x00042B08 + Return (Local0) + } + + Method (PTCI, 1, NotSerialized) + { + Local0 = (Arg0 + 0x00042B08) + Local0 <<= One + Return (Local0) + } + + Method (VGIO, 0, NotSerialized) + { + Return (Package (0x08) + { + Package (0x02) + { + 0x08, + Buffer (0x04) + { + 0x12, 0x32, 0x52, 0x72 // .2Rr + } + }, + + Package (0x02) + { + 0x09, + Buffer (0x04) + { + 0x13, 0x33, 0x53, 0x73 // .3Ss + } + }, + + Package (0x02) + { + 0x0A, + Buffer (0x04) + { + 0x14, 0x34, 0x54, 0x74 // .4Tt + } + }, + + Package (0x02) + { + 0x0B, + Buffer (0x04) + { + 0x15, 0x35, 0x55, 0x75 // .5Uu + } + }, + + Package (0x02) + { + 0x0C, + Buffer (0x04) + { + 0x16, 0x36, 0x56, 0x76 // .6Vv + } + }, + + Package (0x02) + { + 0x15, + Buffer (0x05) + { + 0x17, 0x37, 0x57, 0x77, 0x97 // .7Ww. + } + }, + + Package (0x02) + { + 0x16, + Buffer (0x05) + { + 0x18, 0x38, 0x58, 0x78, 0x98 // .8Xx. + } + }, + + Package (0x02) + { + 0x17, + Buffer (0x05) + { + 0x19, 0x39, 0x59, 0x79, 0x99 // .9Yy. + } + } + }) + } + + Method (VTGN, 0, NotSerialized) + { + Return (Package (0x09) + { + 0x02, + 0x02, + 0x4000, + 0x001C9C38, + Zero, + Zero, + 0x0300, + 0x0100, + 0x08 + }) + } + + Method (GENF, 0, NotSerialized) + { + Return (Package (0x0D) + { + 0xFFFFFFE2, + 0x61, + 0xFFFFFFCE, + 0xA0, + 0x03FF, + 0x002625A0, + 0x01F4, + 0x04, + 0x0334, + 0x004C4B40, + 0x02, + One, + 0x0D + }) + } + + Method (FCHN, 0, NotSerialized) + { + Return (Package (0x0C) + { + Package (0x08) + { + "BATT_ID_OHMS", + One, + One, + Zero, + One, + One, + One, + Zero + }, + + Package (0x08) + { + "BATT_ID_OHMS_FRESH", + 0x02, + One, + Zero, + One, + One, + One, + Zero + }, + + Package (0x08) + { + "BATT_THERM", + 0x06, + One, + Zero, + One, + One, + 0x03, + Zero + }, + + Package (0x08) + { + "AUX_THERM", + 0x07, + One, + Zero, + One, + One, + 0x03, + Zero + }, + + Package (0x08) + { + "SKIN_THERM", + Zero, + One, + Zero, + One, + One, + 0x03, + Zero + }, + + Package (0x08) + { + "PMIC_TEMP2", + 0x0C, + One, + Zero, + 0x03, + 0x02, + 0x02, + FGDT + }, + + Package (0x08) + { + "CHG_TEMP", + 0x0D, + One, + Zero, + 0x03, + 0x02, + 0x02, + FGCT + }, + + Package (0x08) + { + "USB_IN", + 0x08, + One, + Zero, + One, + 0x08, + Zero, + Zero + }, + + Package (0x08) + { + "USB_IN_I", + 0x09, + One, + Zero, + One, + One, + 0x04, + Zero + }, + + Package (0x08) + { + "DC_IN", + 0x0A, + One, + Zero, + One, + 0x08, + Zero, + Zero + }, + + Package (0x08) + { + "DC_IN_I", + 0x0B, + One, + Zero, + One, + One, + 0x04, + Zero + }, + + Package (0x08) + { + "FG_GPIO", + 0x0E, + Zero, + Zero, + One, + 0x02, + Zero, + Zero + } + }) + } + + Method (FGDT, 0, NotSerialized) + { + Return (Package (0x02) + { + Package (0x02) + { + 0x01C2, + 0xFFFF3CB0 + }, + + Package (0x02) + { + 0x0366, + 0x00027100 + } + }) + } + + Method (FGCT, 0, NotSerialized) + { + Return (Package (0x02) + { + Package (0x02) + { + 0x0633, + 0xFFFF3CB0 + }, + + Package (0x02) + { + 0x0318, + 0x00027100 + } + }) + } + } + + Scope (\_SB.ADC1) + { + Method (CHAN, 0, NotSerialized) + { + Name (CBUF, Package (0x08) + { + Package (0x0D) + { + "VPH_PWR", + 0x83, + Zero, + Zero, + 0x02, + 0x02, + One, + 0x03, + Zero, + Zero, + Zero, + Zero, + Zero + }, + + Package (0x0D) + { + "VCOIN", + 0x85, + Zero, + Zero, + 0x02, + 0x02, + One, + 0x03, + Zero, + Zero, + Zero, + Zero, + Zero + }, + + Package (0x0D) + { + "PMIC_THERM", + 0x06, + Zero, + Zero, + 0x02, + 0x02, + One, + One, + Zero, + Zero, + Zero, + PTCF, + 0x02 + }, + + Package (0x0D) + { + "XO_THERM", + 0x4C, + 0x08, + Zero, + 0x02, + One, + One, + One, + 0x02, + 0x000186A0, + XTTB, + Zero, + Zero + }, + + Package (0x0D) + { + "XO_THERM_GPS", + 0x4C, + 0x08, + 0x02, + 0x02, + One, + One, + One, + 0x02, + 0x000186A0, + XTTB, + Zero, + Zero + }, + + Package (0x0D) + { + "SYS_THERM1", + 0x4D, + One, + Zero, + 0x02, + One, + One, + One, + 0x02, + 0x000186A0, + SYTB, + Zero, + Zero + } +#if 0 + , + + Package (0x0D) + { + "SYS_THERM2", + 0x4E, + One, + Zero, + 0x02, + One, + One, + One, + 0x02, + 0x000186A0, + SYTB, + Zero, + Zero + } +#endif + , + + Package (0x0D) + { + "PA_THERM", + 0x4F, + One, + Zero, + 0x02, + One, + One, + One, + 0x02, + 0x000186A0, + SYTB, + Zero, + Zero + }, + + Package (0x0D) + { + "PA_THERM1", + 0x50, + One, + Zero, + 0x02, + One, + One, + One, + 0x02, + 0x000186A0, + SYTB, + Zero, + Zero + } +#if 0 + , + + Package (0x0D) + { + "SYS_THERM3", + 0x51, + One, + Zero, + 0x02, + One, + One, + One, + 0x02, + 0x000186A0, + SYTB, + Zero, + Zero + } + , + + Package (0x0D) + { + "VMUX_SOC", + 0x17, + Zero, + Zero, + 0x02, + 0x02, + One, + 0x03, + Zero, + Zero, + Zero, + Zero, + Zero + } +#endif + }) +#if 0 + DerefOf (CBUF [0x0A]) [One] = \_SB.VMXC + DerefOf (CBUF [0x0A]) [0x06] = \_SB.VMXN + DerefOf (CBUF [0x0A]) [0x07] = \_SB.VMXD +#endif + Return (CBUF) /* \_SB_.ADC1.CHAN.CBUF */ + } + + Method (SYTB, 0, NotSerialized) + { + Return (Package (0x22) + { + Package (0x02) + { + 0x0040DD78, + 0xFFFFFFD8 + }, + + Package (0x02) + { + 0x002DD9E4, + 0xFFFFFFDD + }, + + Package (0x02) + { + 0x0020CA24, + 0xFFFFFFE2 + }, + + Package (0x02) + { + 0x0017B588, + 0xFFFFFFE7 + }, + + Package (0x02) + { + 0x001152C4, + 0xFFFFFFEC + }, + + Package (0x02) + { + 0x000CC8A8, + 0xFFFFFFF1 + }, + + Package (0x02) + { + 0x000985E4, + 0xFFFFFFF6 + }, + + Package (0x02) + { + 0x0007286C, + 0xFFFFFFFB + }, + + Package (0x02) + { + 0x00056D10, + Zero + }, + + Package (0x02) + { + 0x000425B8, + 0x05 + }, + + Package (0x02) + { + 0x000331F8, + 0x0A + }, + + Package (0x02) + { + 0x00027AC4, + 0x0F + }, + + Package (0x02) + { + 0x0001F018, + 0x14 + }, + + Package (0x02) + { + 0x000186A0, + 0x19 + }, + + Package (0x02) + { + 0x00013560, + 0x1E + }, + + Package (0x02) + { + 0xF6E0, + 0x23 + }, + + Package (0x02) + { + 0xC60C, + 0x28 + }, + + Package (0x02) + { + 0x9FC4, + 0x2D + }, + + Package (0x02) + { + 0x81B0, + 0x32 + }, + + Package (0x02) + { + 0x69DC, + 0x37 + }, + + Package (0x02) + { + 0x56B8, + 0x3C + }, + + Package (0x02) + { + 0x477C, + 0x41 + }, + + Package (0x02) + { + 0x3B60, + 0x46 + }, + + Package (0x02) + { + 0x3138, + 0x4B + }, + + Package (0x02) + { + 0x2968, + 0x50 + }, + + Package (0x02) + { + 0x22BA, + 0x55 + }, + + Package (0x02) + { + 0x1D4C, + 0x5A + }, + + Package (0x02) + { + 0x18D8, + 0x5F + }, + + Package (0x02) + { + 0x1522, + 0x64 + }, + + Package (0x02) + { + 0x120C, + 0x69 + }, + + Package (0x02) + { + 0x0F82, + 0x6E + }, + + Package (0x02) + { + 0x0D5C, + 0x73 + }, + + Package (0x02) + { + 0x0B86, + 0x78 + }, + + Package (0x02) + { + 0x0A00, + 0x7D + } + }) + } + + Method (XTTB, 0, NotSerialized) + { + Return (Package (0xA8) + { + Package (0x02) + { + 0x0040DC21, + 0xFFFF6000 + }, + + Package (0x02) + { + 0x003C74E5, + 0xFFFF6400 + }, + + Package (0x02) + { + 0x0038611B, + 0xFFFF6800 + }, + + Package (0x02) + { + 0x00349A1A, + 0xFFFF6C00 + }, + + Package (0x02) + { + 0x003119CB, + 0xFFFF7000 + }, + + Package (0x02) + { + 0x002DDA9A, + 0xFFFF7400 + }, + + Package (0x02) + { + 0x002AD76C, + 0xFFFF7800 + }, + + Package (0x02) + { + 0x00280B95, + 0xFFFF7C00 + }, + + Package (0x02) + { + 0x002572CA, + 0xFFFF8000 + }, + + Package (0x02) + { + 0x0023091E, + 0xFFFF8400 + }, + + Package (0x02) + { + 0x0020CAF4, + 0xFFFF8800 + }, + + Package (0x02) + { + 0x001EB4FE, + 0xFFFF8C00 + }, + + Package (0x02) + { + 0x001CC430, + 0xFFFF9000 + }, + + Package (0x02) + { + 0x001AF5BE, + 0xFFFF9400 + }, + + Package (0x02) + { + 0x00194716, + 0xFFFF9800 + }, + + Package (0x02) + { + 0x0017B5DC, + 0xFFFF9C00 + }, + + Package (0x02) + { + 0x00163FE3, + 0xFFFFA000 + }, + + Package (0x02) + { + 0x0014E329, + 0xFFFFA400 + }, + + Package (0x02) + { + 0x00139DD6, + 0xFFFFA800 + }, + + Package (0x02) + { + 0x00126E37, + 0xFFFFAC00 + }, + + Package (0x02) + { + 0x001152BA, + 0xFFFFB000 + }, + + Package (0x02) + { + 0x001049ED, + 0xFFFFB400 + }, + + Package (0x02) + { + 0x000F527B, + 0xFFFFB800 + }, + + Package (0x02) + { + 0x000E6B27, + 0xFFFFBC00 + }, + + Package (0x02) + { + 0x000D92CE, + 0xFFFFC000 + }, + + Package (0x02) + { + 0x000CC863, + 0xFFFFC400 + }, + + Package (0x02) + { + 0x000C0AED, + 0xFFFFC800 + }, + + Package (0x02) + { + 0x000B5985, + 0xFFFFCC00 + }, + + Package (0x02) + { + 0x000AB357, + 0xFFFFD000 + }, + + Package (0x02) + { + 0x000A179D, + 0xFFFFD400 + }, + + Package (0x02) + { + 0x000985A0, + 0xFFFFD800 + }, + + Package (0x02) + { + 0x0008FCB6, + 0xFFFFDC00 + }, + + Package (0x02) + { + 0x00087C44, + 0xFFFFE000 + }, + + Package (0x02) + { + 0x000803B7, + 0xFFFFE400 + }, + + Package (0x02) + { + 0x00079288, + 0xFFFFE800 + }, + + Package (0x02) + { + 0x0007283A, + 0xFFFFEC00 + }, + + Package (0x02) + { + 0x0006C458, + 0xFFFFF000 + }, + + Package (0x02) + { + 0x00066678, + 0xFFFFF400 + }, + + Package (0x02) + { + 0x00060E33, + 0xFFFFF800 + }, + + Package (0x02) + { + 0x0005BB2D, + 0xFFFFFC00 + }, + + Package (0x02) + { + 0x00056D0E, + Zero + }, + + Package (0x02) + { + 0x00052387, + 0x0400 + }, + + Package (0x02) + { + 0x0004DE4C, + 0x0800 + }, + + Package (0x02) + { + 0x00049D17, + 0x0C00 + }, + + Package (0x02) + { + 0x00045FA6, + 0x1000 + }, + + Package (0x02) + { + 0x000425BE, + 0x1400 + }, + + Package (0x02) + { + 0x0003EF25, + 0x1800 + }, + + Package (0x02) + { + 0x0003BBA6, + 0x1C00 + }, + + Package (0x02) + { + 0x00038B11, + 0x2000 + }, + + Package (0x02) + { + 0x00035D37, + 0x2400 + }, + + Package (0x02) + { + 0x000331EE, + 0x2800 + }, + + Package (0x02) + { + 0x0003090E, + 0x2C00 + }, + + Package (0x02) + { + 0x0002E270, + 0x3000 + }, + + Package (0x02) + { + 0x0002BDF2, + 0x3400 + }, + + Package (0x02) + { + 0x00029B74, + 0x3800 + }, + + Package (0x02) + { + 0x00027AD7, + 0x3C00 + }, + + Package (0x02) + { + 0x00025BFE, + 0x4000 + }, + + Package (0x02) + { + 0x00023ECE, + 0x4400 + }, + + Package (0x02) + { + 0x0002232F, + 0x4800 + }, + + Package (0x02) + { + 0x00020909, + 0x4C00 + }, + + Package (0x02) + { + 0x0001F046, + 0x5000 + }, + + Package (0x02) + { + 0x0001D8D2, + 0x5400 + }, + + Package (0x02) + { + 0x0001C298, + 0x5800 + }, + + Package (0x02) + { + 0x0001AD88, + 0x5C00 + }, + + Package (0x02) + { + 0x00019990, + 0x6000 + }, + + Package (0x02) + { + 0x000186A0, + 0x6400 + }, + + Package (0x02) + { + 0x000174AA, + 0x6800 + }, + + Package (0x02) + { + 0x0001639E, + 0x6C00 + }, + + Package (0x02) + { + 0x00015371, + 0x7000 + }, + + Package (0x02) + { + 0x00014415, + 0x7400 + }, + + Package (0x02) + { + 0x00013580, + 0x7800 + }, + + Package (0x02) + { + 0x000127A6, + 0x7C00 + }, + + Package (0x02) + { + 0x00011A7C, + 0x8000 + }, + + Package (0x02) + { + 0x00010DFA, + 0x8400 + }, + + Package (0x02) + { + 0x00010216, + 0x8800 + }, + + Package (0x02) + { + 0xF6C8, + 0x8C00 + }, + + Package (0x02) + { + 0xEC07, + 0x9000 + }, + + Package (0x02) + { + 0xE1CC, + 0x9400 + }, + + Package (0x02) + { + 0xD810, + 0x9800 + }, + + Package (0x02) + { + 0xCECC, + 0x9C00 + }, + + Package (0x02) + { + 0xC5F9, + 0xA000 + }, + + Package (0x02) + { + 0xBD93, + 0xA400 + }, + + Package (0x02) + { + 0xB592, + 0xA800 + }, + + Package (0x02) + { + 0xADF2, + 0xAC00 + }, + + Package (0x02) + { + 0xA6AE, + 0xB000 + }, + + Package (0x02) + { + 0x9FC1, + 0xB400 + }, + + Package (0x02) + { + 0x9927, + 0xB800 + }, + + Package (0x02) + { + 0x92DB, + 0xBC00 + }, + + Package (0x02) + { + 0x8CD9, + 0xC000 + }, + + Package (0x02) + { + 0x871E, + 0xC400 + }, + + Package (0x02) + { + 0x81A6, + 0xC800 + }, + + Package (0x02) + { + 0x7C6D, + 0xCC00 + }, + + Package (0x02) + { + 0x7771, + 0xD000 + }, + + Package (0x02) + { + 0x72AE, + 0xD400 + }, + + Package (0x02) + { + 0x6E22, + 0xD800 + }, + + Package (0x02) + { + 0x69CA, + 0xDC00 + }, + + Package (0x02) + { + 0x65A4, + 0xE000 + }, + + Package (0x02) + { + 0x61AC, + 0xE400 + }, + + Package (0x02) + { + 0x5DE1, + 0xE800 + }, + + Package (0x02) + { + 0x5A40, + 0xEC00 + }, + + Package (0x02) + { + 0x56C8, + 0xF000 + }, + + Package (0x02) + { + 0x5377, + 0xF400 + }, + + Package (0x02) + { + 0x504A, + 0xF800 + }, + + Package (0x02) + { + 0x4D40, + 0xFC00 + }, + + Package (0x02) + { + 0x4A57, + 0x00010000 + }, + + Package (0x02) + { + 0x478E, + 0x00010400 + }, + + Package (0x02) + { + 0x44E4, + 0x00010800 + }, + + Package (0x02) + { + 0x4256, + 0x00010C00 + }, + + Package (0x02) + { + 0x3FE3, + 0x00011000 + }, + + Package (0x02) + { + 0x3D8B, + 0x00011400 + }, + + Package (0x02) + { + 0x3B4C, + 0x00011800 + }, + + Package (0x02) + { + 0x3924, + 0x00011C00 + }, + + Package (0x02) + { + 0x3713, + 0x00012000 + }, + + Package (0x02) + { + 0x3518, + 0x00012400 + }, + + Package (0x02) + { + 0x3332, + 0x00012800 + }, + + Package (0x02) + { + 0x3160, + 0x00012C00 + }, + + Package (0x02) + { + 0x2FA0, + 0x00013000 + }, + + Package (0x02) + { + 0x2DF2, + 0x00013400 + }, + + Package (0x02) + { + 0x2C56, + 0x00013800 + }, + + Package (0x02) + { + 0x2ACA, + 0x00013C00 + }, + + Package (0x02) + { + 0x294E, + 0x00014000 + }, + + Package (0x02) + { + 0x27E1, + 0x00014400 + }, + + Package (0x02) + { + 0x2682, + 0x00014800 + }, + + Package (0x02) + { + 0x2531, + 0x00014C00 + }, + + Package (0x02) + { + 0x23ED, + 0x00015000 + }, + + Package (0x02) + { + 0x22B6, + 0x00015400 + }, + + Package (0x02) + { + 0x218B, + 0x00015800 + }, + + Package (0x02) + { + 0x206B, + 0x00015C00 + }, + + Package (0x02) + { + 0x1F57, + 0x00016000 + }, + + Package (0x02) + { + 0x1E4D, + 0x00016400 + }, + + Package (0x02) + { + 0x1D4D, + 0x00016800 + }, + + Package (0x02) + { + 0x1C56, + 0x00016C00 + }, + + Package (0x02) + { + 0x1B69, + 0x00017000 + }, + + Package (0x02) + { + 0x1A85, + 0x00017400 + }, + + Package (0x02) + { + 0x19AA, + 0x00017800 + }, + + Package (0x02) + { + 0x18D6, + 0x00017C00 + }, + + Package (0x02) + { + 0x180B, + 0x00018000 + }, + + Package (0x02) + { + 0x1747, + 0x00018400 + }, + + Package (0x02) + { + 0x168A, + 0x00018800 + }, + + Package (0x02) + { + 0x15D4, + 0x00018C00 + }, + + Package (0x02) + { + 0x1524, + 0x00019000 + }, + + Package (0x02) + { + 0x147B, + 0x00019400 + }, + + Package (0x02) + { + 0x13D8, + 0x00019800 + }, + + Package (0x02) + { + 0x133B, + 0x00019C00 + }, + + Package (0x02) + { + 0x12A3, + 0x0001A000 + }, + + Package (0x02) + { + 0x1211, + 0x0001A400 + }, + + Package (0x02) + { + 0x1184, + 0x0001A800 + }, + + Package (0x02) + { + 0x10FC, + 0x0001AC00 + }, + + Package (0x02) + { + 0x1079, + 0x0001B000 + }, + + Package (0x02) + { + 0x0FFA, + 0x0001B400 + }, + + Package (0x02) + { + 0x0F80, + 0x0001B800 + }, + + Package (0x02) + { + 0x0F0A, + 0x0001BC00 + }, + + Package (0x02) + { + 0x0E98, + 0x0001C000 + }, + + Package (0x02) + { + 0x0E2A, + 0x0001C400 + }, + + Package (0x02) + { + 0x0DBF, + 0x0001C800 + }, + + Package (0x02) + { + 0x0D59, + 0x0001CC00 + }, + + Package (0x02) + { + 0x0CF5, + 0x0001D000 + }, + + Package (0x02) + { + 0x0C95, + 0x0001D400 + }, + + Package (0x02) + { + 0x0C39, + 0x0001D800 + }, + + Package (0x02) + { + 0x0BDF, + 0x0001DC00 + }, + + Package (0x02) + { + 0x0B88, + 0x0001E000 + }, + + Package (0x02) + { + 0x0B34, + 0x0001E400 + }, + + Package (0x02) + { + 0x0AE3, + 0x0001E800 + }, + + Package (0x02) + { + 0x0A95, + 0x0001EC00 + }, + + Package (0x02) + { + 0x0A49, + 0x0001F000 + }, + + Package (0x02) + { + 0x0A00, + 0x0001F400 + }, + + Package (0x02) + { + 0x09B9, + 0x0001F800 + }, + + Package (0x02) + { + 0x0974, + 0x0001FC00 + } + }) + } + + Method (VTCH, 0, NotSerialized) + { + Return (Package (0x05) + { + Package (0x10) + { + "VPH_PWR", + 0x83, + Zero, + One, + Zero, + 0x02, + One, + 0x03, + Zero, + Zero, + Zero, + Zero, + Zero, + Zero, + Zero, + 0x15F9 + }, + + Package (0x10) + { + "PMIC_THERM", + 0x06, + Zero, + Zero, + Zero, + 0x02, + One, + One, + Zero, + Zero, + Zero, + PTCF, + PTCI, + 0x02, + 0xFFFF3CB0, + 0x000249F0 + }, + + Package (0x10) + { + "SYS_THERM1", + 0x4D, + One, + Zero, + Zero, + One, + One, + One, + 0x02, + 0x000186A0, + SYTB, + Zero, + Zero, + Zero, + 0xFFFFFFD8, + 0x7D + }, + +#if 0 + Package (0x10) + { + "SYS_THERM2", + 0x4E, + One, + Zero, + Zero, + One, + One, + One, + 0x02, + 0x000186A0, + SYTB, + Zero, + Zero, + Zero, + 0xFFFFFFD8, + 0x7D + }, +#endif + + Package (0x10) + { + "PA_THERM", + 0x4F, + One, + Zero, + Zero, + One, + One, + One, + 0x02, + 0x000186A0, + SYTB, + Zero, + Zero, + Zero, + 0xFFFFFFD8, + 0x7D + }, + + Package (0x10) + { + "PA_THERM1", + 0x50, + One, + Zero, + Zero, + One, + One, + One, + 0x02, + 0x000186A0, + SYTB, + Zero, + Zero, + Zero, + 0xFFFFFFD8, + 0x7D + } +#if 0 + , + + Package (0x10) + { + "SYS_THERM3", + 0x51, + One, + Zero, + Zero, + One, + One, + One, + 0x02, + 0x000186A0, + SYTB, + Zero, + Zero, + Zero, + 0xFFFFFFD8, + 0x7D + } +#endif + }) + } + + Method (VTMT, 0, NotSerialized) + { + Return (Package (0x03) + { + 0x0B, + One, + 0x05 + }) + } + } +#if 0 + Device(ADC1) + { + Name(_DEP, Package(0x2) + { + SPMI, + PMIC + }) + Name(_HID, "QCOM0221") + Alias(PSUB, _SUB) + Name(_UID, Zero) + Method(_CRS, 0x0, NotSerialized) + { + Name(INTB, Buffer(0x4a) + { + 0x8c, 0x21, 0x00, 0x01, 0x00, 0x01, 0x00, 0x11, 0x00, 0x01, 0x00, 0x00, + 0x00, 0x00, 0x17, 0x00, 0x00, 0x19, 0x00, 0x23, 0x00, 0x01, 0x00, 0x20, + 0x00, 0x5c, 0x5f, 0x53, 0x42, 0x2e, 0x50, 0x4d, 0x30, 0x31, 0x00, 0x02, + 0x8c, 0x21, 0x00, 0x01, 0x00, 0x01, 0x00, 0x11, 0x00, 0x01, 0x00, 0x00, + 0x00, 0x00, 0x17, 0x00, 0x00, 0x19, 0x00, 0x23, 0x00, 0x01, 0x00, 0x28, + 0x00, 0x5c, 0x5f, 0x53, 0x42, 0x2e, 0x50, 0x4d, 0x30, 0x31, 0x00, 0x02, + 0x79, 0x00 + }) + Name(NAM_, Buffer(0xa) + { + 0x5c, 0x5f, 0x53, 0x42, 0x2e, 0x53, 0x50, 0x4d, 0x49, 0x00 + }) + Name(VUSR, Buffer(0xc) + { + 0x8e, 0x13, 0x00, 0x01, 0x00, 0xc1, 0x02, 0x00, 0x31, 0x01, 0x00, 0x00 + }) + Name(VBTM, Buffer(0xc) + { + 0x8e, 0x13, 0x00, 0x01, 0x00, 0xc1, 0x02, 0x00, 0x34, 0x01, 0x00, 0x00 + }) + Concatenate(VUSR, NAM_, Local1) + Concatenate(VBTM, NAM_, Local2) + Concatenate(Local1, Local2, Local3) + Concatenate(Local3, INTB, Local0) + Return(Local0) + } + Method(ADDV, 0x0, NotSerialized) + { + Return(Package(0x3) + { + One, + One, + Zero + }) + } + Method(GENP, 0x0, NotSerialized) + { + Return(Package(0xa) + { + Zero, + 0x4000, + 0x1c9c38, + 0x7a120, + 0x11, + Zero, + Zero, + 0x300, + 0x100, + 0x8 + }) + } + Method(PTCF, 0x1, NotSerialized) + { + ShiftRight(Arg0, One, Local0) + Subtract(Local0, 0x42b08, Local0) + Return(Local0) + } + Method(PTCI, 0x1, NotSerialized) + { + Add(Arg0, 0x42b08, Local0) + ShiftLeft(Local0, One, Local0) + Return(Local0) + } + Method(VGIO, 0x0, NotSerialized) + { + Return(Package(0x8) + { + Package(0x2) + { + 0x8, + Buffer(0x4) + { + 0x12, 0x32, 0x52, 0x72 + } + }, + Package(0x2) + { + 0x9, + Buffer(0x4) + { + 0x13, 0x33, 0x53, 0x73 + } + }, + Package(0x2) + { + 0xa, + Buffer(0x4) + { + 0x14, 0x34, 0x54, 0x74 + } + }, + Package(0x2) + { + 0xb, + Buffer(0x4) + { + 0x15, 0x35, 0x55, 0x75 + } + }, + Package(0x2) + { + 0xc, + Buffer(0x4) + { + 0x16, 0x36, 0x56, 0x76 + } + }, + Package(0x2) + { + 0x15, + Buffer(0x5) + { + 0x17, 0x37, 0x57, 0x77, 0x97 + } + }, + Package(0x2) + { + 0x16, + Buffer(0x5) + { + 0x18, 0x38, 0x58, 0x78, 0x98 + } + }, + Package(0x2) + { + 0x17, + Buffer(0x5) + { + 0x19, 0x39, 0x59, 0x79, 0x99 + } + } + }) + } + Method(VTGN, 0x0, NotSerialized) + { + Return(Package(0x9) + { + 0x2, + 0x2, + 0x4000, + 0x1c9c38, + Zero, + Zero, + 0x300, + 0x100, + 0x8 + }) + } + Method(GENF, 0x0, NotSerialized) + { + Return(Package(0xd) + { + 0xffffffe2, + 0x61, + 0xffffffce, + 0xa0, + 0x3ff, + 0x2625a0, + 0x1f4, + 0x4, + 0x334, + 0x4c4b40, + 0x2, + One, + 0xd + }) + } + Method(FCHN, 0x0, NotSerialized) + { + Return(Package(0xc) + { + Package(0x8) + { + "BATT_ID_OHMS", + One, + One, + Zero, + One, + One, + One, + Zero + }, + Package(0x8) + { + "BATT_ID_OHMS_FRESH", + 0x2, + One, + Zero, + One, + One, + One, + Zero + }, + Package(0x8) + { + "BATT_THERM", + 0x6, + One, + Zero, + One, + One, + 0x3, + Zero + }, + Package(0x8) + { + "AUX_THERM", + 0x7, + One, + Zero, + One, + One, + 0x3, + Zero + }, + Package(0x8) + { + "SKIN_THERM", + Zero, + One, + Zero, + One, + One, + 0x3, + Zero + }, + Package(0x8) + { + "PMIC_TEMP2", + 0xc, + One, + Zero, + 0x3, + 0x2, + 0x2, + FGDT + }, + Package(0x8) + { + "CHG_TEMP", + 0xd, + One, + Zero, + 0x3, + 0x2, + 0x2, + FGCT + }, + Package(0x8) + { + "USB_IN", + 0x8, + One, + Zero, + One, + 0x8, + Zero, + Zero + }, + Package(0x8) + { + "USB_IN_I", + 0x9, + One, + Zero, + One, + One, + 0x4, + Zero + }, + Package(0x8) + { + "DC_IN", + 0xa, + One, + Zero, + One, + 0x8, + Zero, + Zero + }, + Package(0x8) + { + "DC_IN_I", + 0xb, + One, + Zero, + One, + One, + 0x4, + Zero + }, + Package(0x8) + { + "FG_GPIO", + 0xe, + Zero, + Zero, + One, + 0x2, + Zero, + Zero + } + }) + } + Method(FGDT, 0x0, NotSerialized) + { + Return(Package(0x2) + { + Package(0x2) + { + 0x1c2, + 0xffff3cb0 + }, + Package(0x2) + { + 0x366, + 0x27100 + } + }) + } + Method(FGCT, 0x0, NotSerialized) + { + Return(Package(0x2) + { + Package(0x2) + { + 0x633, + 0xffff3cb0 + }, + Package(0x2) + { + 0x318, + 0x27100 + } + }) + } + } + Scope(ADC1) + { + Method(CHAN, 0x0, NotSerialized) + { + Return(Package(0xc) + { + Package(0xd) + { + "VPH_PWR", + 0x83, + Zero, + Zero, + 0x2, + 0x2, + One, + 0x3, + Zero, + Zero, + Zero, + Zero, + Zero + }, + Package(0xd) + { + "VCOIN", + 0x85, + Zero, + Zero, + 0x2, + 0x2, + One, + 0x3, + Zero, + Zero, + Zero, + Zero, + Zero + }, + Package(0xd) + { + "PMIC_THERM", + 0x6, + Zero, + Zero, + 0x2, + 0x2, + One, + One, + Zero, + Zero, + Zero, + 0x2 + }, + Package(0xd) + { + "XO_THERM", + 0x4c, + 0x8, + Zero, + 0x2, + One, + One, + One, + 0x2, + 0x186a0, + XTTB, + Zero, + Zero + }, + Package(0xd) + { + "XO_THERM_GPS", + 0x4c, + 0x8, + 0x2, + 0x2, + One, + One, + One, + 0x2, + 0x186a0, + XTTB, + Zero, + Zero + }, + Package(0xd) + { + "SYS_THERM1", + 0x4d, + One, + Zero, + 0x2, + One, + One, + One, + 0x2, + 0x186a0, + SYTB, + Zero, + Zero + }, + Package(0xd) + { + "SYS_THERM2", + 0x50, + One, + Zero, + 0x2, + One, + One, + One, + 0x2, + 0x186a0, + SYTB, + Zero, + Zero + }, + Package(0xd) + { + "PA_THERM", + 0x52, + One, + Zero, + 0x2, + One, + One, + One, + 0x2, + 0x186a0, + SYTB, + Zero, + Zero + }, + Package(0xd) + { + "PA_THERM1", + 0x56, + One, + Zero, + 0x2, + One, + One, + One, + 0x2, + 0x186a0, + SYTB, + Zero, + Zero + }, + Package(0xd) + { + "SYS_THERM3", + 0x55, + One, + Zero, + 0x2, + One, + One, + One, + 0x2, + 0x186a0, + SYTB, + Zero, + Zero + }, + Package(0xd) + { + "RF_THERM", + 0x4f, + One, + Zero, + 0x2, + One, + One, + One, + 0x2, + 0x186a0, + SYTB, + Zero, + Zero + }, + Package(0xd) + { + "BAT_THERM", + 0x57, + One, + Zero, + 0x2, + One, + One, + One, + 0x2, + 0x186a0, + SYTB, + Zero, + Zero + } + }) + } + Method(SYTB, 0x0, NotSerialized) + { + Return(Package(0x22) + { + Package(0x2) + { + 0x40dd78, + 0xffffffd8 + }, + Package(0x2) + { + 0x2dd9e4, + 0xffffffdd + }, + Package(0x2) + { + 0x20ca24, + 0xffffffe2 + }, + Package(0x2) + { + 0x17b588, + 0xffffffe7 + }, + Package(0x2) + { + 0x1152c4, + 0xffffffec + }, + Package(0x2) + { + 0xcc8a8, + 0xfffffff1 + }, + Package(0x2) + { + 0x985e4, + 0xfffffff6 + }, + Package(0x2) + { + 0x7286c, + 0xfffffffb + }, + Package(0x2) + { + 0x56d10, + Zero + }, + Package(0x2) + { + 0x425b8, + 0x5 + }, + Package(0x2) + { + 0x331f8, + 0xa + }, + Package(0x2) + { + 0x27ac4, + 0xf + }, + Package(0x2) + { + 0x1f018, + 0x14 + }, + Package(0x2) + { + 0x186a0, + 0x19 + }, + Package(0x2) + { + 0x13560, + 0x1e + }, + Package(0x2) + { + 0xf6e0, + 0x23 + }, + Package(0x2) + { + 0xc60c, + 0x28 + }, + Package(0x2) + { + 0x9fc4, + 0x2d + }, + Package(0x2) + { + 0x81b0, + 0x32 + }, + Package(0x2) + { + 0x69dc, + 0x37 + }, + Package(0x2) + { + 0x56b8, + 0x3c + }, + Package(0x2) + { + 0x477c, + 0x41 + }, + Package(0x2) + { + 0x3b60, + 0x46 + }, + Package(0x2) + { + 0x3138, + 0x4b + }, + Package(0x2) + { + 0x2968, + 0x50 + }, + Package(0x2) + { + 0x22ba, + 0x55 + }, + Package(0x2) + { + 0x1d4c, + 0x5a + }, + Package(0x2) + { + 0x18d8, + 0x5f + }, + Package(0x2) + { + 0x1522, + 0x64 + }, + Package(0x2) + { + 0x120c, + 0x69 + }, + Package(0x2) + { + 0xf82, + 0x6e + }, + Package(0x2) + { + 0xd5c, + 0x73 + }, + Package(0x2) + { + 0xb86, + 0x78 + }, + Package(0x2) + { + 0xa00, + 0x7d + } + }) + } + Method(XTTB, 0x0, NotSerialized) + { + Return(Package(0xa8) + { + Package(0x2) + { + 0x40dc21, + 0xffff6000 + }, + Package(0x2) + { + 0x3c74e5, + 0xffff6400 + }, + Package(0x2) + { + 0x38611b, + 0xffff6800 + }, + Package(0x2) + { + 0x349a1a, + 0xffff6c00 + }, + Package(0x2) + { + 0x3119cb, + 0xffff7000 + }, + Package(0x2) + { + 0x2dda9a, + 0xffff7400 + }, + Package(0x2) + { + 0x2ad76c, + 0xffff7800 + }, + Package(0x2) + { + 0x280b95, + 0xffff7c00 + }, + Package(0x2) + { + 0x2572ca, + 0xffff8000 + }, + Package(0x2) + { + 0x23091e, + 0xffff8400 + }, + Package(0x2) + { + 0x20caf4, + 0xffff8800 + }, + Package(0x2) + { + 0x1eb4fe, + 0xffff8c00 + }, + Package(0x2) + { + 0x1cc430, + 0xffff9000 + }, + Package(0x2) + { + 0x1af5be, + 0xffff9400 + }, + Package(0x2) + { + 0x194716, + 0xffff9800 + }, + Package(0x2) + { + 0x17b5dc, + 0xffff9c00 + }, + Package(0x2) + { + 0x163fe3, + 0xffffa000 + }, + Package(0x2) + { + 0x14e329, + 0xffffa400 + }, + Package(0x2) + { + 0x139dd6, + 0xffffa800 + }, + Package(0x2) + { + 0x126e37, + 0xffffac00 + }, + Package(0x2) + { + 0x1152ba, + 0xffffb000 + }, + Package(0x2) + { + 0x1049ed, + 0xffffb400 + }, + Package(0x2) + { + 0xf527b, + 0xffffb800 + }, + Package(0x2) + { + 0xe6b27, + 0xffffbc00 + }, + Package(0x2) + { + 0xd92ce, + 0xffffc000 + }, + Package(0x2) + { + 0xcc863, + 0xffffc400 + }, + Package(0x2) + { + 0xc0aed, + 0xffffc800 + }, + Package(0x2) + { + 0xb5985, + 0xffffcc00 + }, + Package(0x2) + { + 0xab357, + 0xffffd000 + }, + Package(0x2) + { + 0xa179d, + 0xffffd400 + }, + Package(0x2) + { + 0x985a0, + 0xffffd800 + }, + Package(0x2) + { + 0x8fcb6, + 0xffffdc00 + }, + Package(0x2) + { + 0x87c44, + 0xffffe000 + }, + Package(0x2) + { + 0x803b7, + 0xffffe400 + }, + Package(0x2) + { + 0x79288, + 0xffffe800 + }, + Package(0x2) + { + 0x7283a, + 0xffffec00 + }, + Package(0x2) + { + 0x6c458, + 0xfffff000 + }, + Package(0x2) + { + 0x66678, + 0xfffff400 + }, + Package(0x2) + { + 0x60e33, + 0xfffff800 + }, + Package(0x2) + { + 0x5bb2d, + 0xfffffc00 + }, + Package(0x2) + { + 0x56d0e, + Zero + }, + Package(0x2) + { + 0x52387, + 0x400 + }, + Package(0x2) + { + 0x4de4c, + 0x800 + }, + Package(0x2) + { + 0x49d17, + 0xc00 + }, + Package(0x2) + { + 0x45fa6, + 0x1000 + }, + Package(0x2) + { + 0x425be, + 0x1400 + }, + Package(0x2) + { + 0x3ef25, + 0x1800 + }, + Package(0x2) + { + 0x3bba6, + 0x1c00 + }, + Package(0x2) + { + 0x38b11, + 0x2000 + }, + Package(0x2) + { + 0x35d37, + 0x2400 + }, + Package(0x2) + { + 0x331ee, + 0x2800 + }, + Package(0x2) + { + 0x3090e, + 0x2c00 + }, + Package(0x2) + { + 0x2e270, + 0x3000 + }, + Package(0x2) + { + 0x2bdf2, + 0x3400 + }, + Package(0x2) + { + 0x29b74, + 0x3800 + }, + Package(0x2) + { + 0x27ad7, + 0x3c00 + }, + Package(0x2) + { + 0x25bfe, + 0x4000 + }, + Package(0x2) + { + 0x23ece, + 0x4400 + }, + Package(0x2) + { + 0x2232f, + 0x4800 + }, + Package(0x2) + { + 0x20909, + 0x4c00 + }, + Package(0x2) + { + 0x1f046, + 0x5000 + }, + Package(0x2) + { + 0x1d8d2, + 0x5400 + }, + Package(0x2) + { + 0x1c298, + 0x5800 + }, + Package(0x2) + { + 0x1ad88, + 0x5c00 + }, + Package(0x2) + { + 0x19990, + 0x6000 + }, + Package(0x2) + { + 0x186a0, + 0x6400 + }, + Package(0x2) + { + 0x174aa, + 0x6800 + }, + Package(0x2) + { + 0x1639e, + 0x6c00 + }, + Package(0x2) + { + 0x15371, + 0x7000 + }, + Package(0x2) + { + 0x14415, + 0x7400 + }, + Package(0x2) + { + 0x13580, + 0x7800 + }, + Package(0x2) + { + 0x127a6, + 0x7c00 + }, + Package(0x2) + { + 0x11a7c, + 0x8000 + }, + Package(0x2) + { + 0x10dfa, + 0x8400 + }, + Package(0x2) + { + 0x10216, + 0x8800 + }, + Package(0x2) + { + 0xf6c8, + 0x8c00 + }, + Package(0x2) + { + 0xec07, + 0x9000 + }, + Package(0x2) + { + 0xe1cc, + 0x9400 + }, + Package(0x2) + { + 0xd810, + 0x9800 + }, + Package(0x2) + { + 0xcecc, + 0x9c00 + }, + Package(0x2) + { + 0xc5f9, + 0xa000 + }, + Package(0x2) + { + 0xbd93, + 0xa400 + }, + Package(0x2) + { + 0xb592, + 0xa800 + }, + Package(0x2) + { + 0xadf2, + 0xac00 + }, + Package(0x2) + { + 0xa6ae, + 0xb000 + }, + Package(0x2) + { + 0x9fc1, + 0xb400 + }, + Package(0x2) + { + 0x9927, + 0xb800 + }, + Package(0x2) + { + 0x92db, + 0xbc00 + }, + Package(0x2) + { + 0x8cd9, + 0xc000 + }, + Package(0x2) + { + 0x871e, + 0xc400 + }, + Package(0x2) + { + 0x81a6, + 0xc800 + }, + Package(0x2) + { + 0x7c6d, + 0xcc00 + }, + Package(0x2) + { + 0x7771, + 0xd000 + }, + Package(0x2) + { + 0x72ae, + 0xd400 + }, + Package(0x2) + { + 0x6e22, + 0xd800 + }, + Package(0x2) + { + 0x69ca, + 0xdc00 + }, + Package(0x2) + { + 0x65a4, + 0xe000 + }, + Package(0x2) + { + 0x61ac, + 0xe400 + }, + Package(0x2) + { + 0x5de1, + 0xe800 + }, + Package(0x2) + { + 0x5a40, + 0xec00 + }, + Package(0x2) + { + 0x56c8, + 0xf000 + }, + Package(0x2) + { + 0x5377, + 0xf400 + }, + Package(0x2) + { + 0x504a, + 0xf800 + }, + Package(0x2) + { + 0x4d40, + 0xfc00 + }, + Package(0x2) + { + 0x4a57, + 0x10000 + }, + Package(0x2) + { + 0x478e, + 0x10400 + }, + Package(0x2) + { + 0x44e4, + 0x10800 + }, + Package(0x2) + { + 0x4256, + 0x10c00 + }, + Package(0x2) + { + 0x3fe3, + 0x11000 + }, + Package(0x2) + { + 0x3d8b, + 0x11400 + }, + Package(0x2) + { + 0x3b4c, + 0x11800 + }, + Package(0x2) + { + 0x3924, + 0x11c00 + }, + Package(0x2) + { + 0x3713, + 0x12000 + }, + Package(0x2) + { + 0x3518, + 0x12400 + }, + Package(0x2) + { + 0x3332, + 0x12800 + }, + Package(0x2) + { + 0x3160, + 0x12c00 + }, + Package(0x2) + { + 0x2fa0, + 0x13000 + }, + Package(0x2) + { + 0x2df2, + 0x13400 + }, + Package(0x2) + { + 0x2c56, + 0x13800 + }, + Package(0x2) + { + 0x2aca, + 0x13c00 + }, + Package(0x2) + { + 0x294e, + 0x14000 + }, + Package(0x2) + { + 0x27e1, + 0x14400 + }, + Package(0x2) + { + 0x2682, + 0x14800 + }, + Package(0x2) + { + 0x2531, + 0x14c00 + }, + Package(0x2) + { + 0x23ed, + 0x15000 + }, + Package(0x2) + { + 0x22b6, + 0x15400 + }, + Package(0x2) + { + 0x218b, + 0x15800 + }, + Package(0x2) + { + 0x206b, + 0x15c00 + }, + Package(0x2) + { + 0x1f57, + 0x16000 + }, + Package(0x2) + { + 0x1e4d, + 0x16400 + }, + Package(0x2) + { + 0x1d4d, + 0x16800 + }, + Package(0x2) + { + 0x1c56, + 0x16c00 + }, + Package(0x2) + { + 0x1b69, + 0x17000 + }, + Package(0x2) + { + 0x1a85, + 0x17400 + }, + Package(0x2) + { + 0x19aa, + 0x17800 + }, + Package(0x2) + { + 0x18d6, + 0x17c00 + }, + Package(0x2) + { + 0x180b, + 0x18000 + }, + Package(0x2) + { + 0x1747, + 0x18400 + }, + Package(0x2) + { + 0x168a, + 0x18800 + }, + Package(0x2) + { + 0x15d4, + 0x18c00 + }, + Package(0x2) + { + 0x1524, + 0x19000 + }, + Package(0x2) + { + 0x147b, + 0x19400 + }, + Package(0x2) + { + 0x13d8, + 0x19800 + }, + Package(0x2) + { + 0x133b, + 0x19c00 + }, + Package(0x2) + { + 0x12a3, + 0x1a000 + }, + Package(0x2) + { + 0x1211, + 0x1a400 + }, + Package(0x2) + { + 0x1184, + 0x1a800 + }, + Package(0x2) + { + 0x10fc, + 0x1ac00 + }, + Package(0x2) + { + 0x1079, + 0x1b000 + }, + Package(0x2) + { + 0xffa, + 0x1b400 + }, + Package(0x2) + { + 0xf80, + 0x1b800 + }, + Package(0x2) + { + 0xf0a, + 0x1bc00 + }, + Package(0x2) + { + 0xe98, + 0x1c000 + }, + Package(0x2) + { + 0xe2a, + 0x1c400 + }, + Package(0x2) + { + 0xdbf, + 0x1c800 + }, + Package(0x2) + { + 0xd59, + 0x1cc00 + }, + Package(0x2) + { + 0xcf5, + 0x1d000 + }, + Package(0x2) + { + 0xc95, + 0x1d400 + }, + Package(0x2) + { + 0xc39, + 0x1d800 + }, + Package(0x2) + { + 0xbdf, + 0x1dc00 + }, + Package(0x2) + { + 0xb88, + 0x1e000 + }, + Package(0x2) + { + 0xb34, + 0x1e400 + }, + Package(0x2) + { + 0xae3, + 0x1e800 + }, + Package(0x2) + { + 0xa95, + 0x1ec00 + }, + Package(0x2) + { + 0xa49, + 0x1f000 + }, + Package(0x2) + { + 0xa00, + 0x1f400 + }, + Package(0x2) + { + 0x9b9, + 0x1f800 + }, + Package(0x2) + { + 0x974, + 0x1fc00 + } + }) + } + Method(VTCH, 0x0, NotSerialized) + { + Return(Package(0x8) + { + Package(0x10) + { + "VPH_PWR", + 0x83, + Zero, + One, + Zero, + 0x2, + One, + 0x3, + Zero, + Zero, + Zero, + Zero, + Zero, + Zero, + Zero, + 0x15f9 + }, + Package(0x10) + { + "PMIC_THERM", + 0x6, + Zero, + Zero, + Zero, + 0x2, + One, + One, + Zero, + Zero, + Zero, + 0x2, + 0xffff3cb0, + 0x249f0 + }, + Package(0x10) + { + "SYS_THERM1", + 0x4d, + One, + Zero, + Zero, + One, + One, + One, + 0x2, + 0x186a0, + SYTB, + Zero, + Zero, + Zero, + 0xffffffd8, + 0x7d + }, + Package(0x10) + { + "SYS_THERM2", + 0x50, + One, + Zero, + Zero, + One, + One, + One, + 0x2, + 0x186a0, + SYTB, + Zero, + Zero, + Zero, + 0xffffffd8, + 0x7d + }, + Package(0x10) + { + "PA_THERM", + 0x52, + One, + Zero, + Zero, + One, + One, + One, + 0x2, + 0x186a0, + SYTB, + Zero, + Zero, + Zero, + 0xffffffd8, + 0x7d + }, + Package(0x10) + { + "PA_THERM1", + 0x56, + One, + Zero, + Zero, + One, + One, + One, + 0x2, + 0x186a0, + SYTB, + Zero, + Zero, + Zero, + 0xffffffd8, + 0x7d + }, + Package(0x10) + { + "SYS_THERM3", + 0x55, + One, + Zero, + Zero, + One, + One, + One, + 0x2, + 0x186a0, + SYTB, + Zero, + Zero, + Zero, + 0xffffffd8, + 0x7d + }, + Package(0x10) + { + "BAT_THERM", + 0x57, + One, + Zero, + Zero, + One, + One, + One, + 0x2, + 0x186a0, + SYTB, + Zero, + Zero, + Zero, + 0xffffffd8, + 0x7d + } + }) + } + Method(VTMT, 0x0, NotSerialized) + { + Return(Package(0x3) + { + 0xb, + One, + 0x5 + }) + } + } +#endif + } + + + Name (WAKP, Package (0x02) + { + Zero, + Zero + }) + Method (_PTS, 1, NotSerialized) // _PTS: Prepare To Sleep + { + \_SB.ADBG (Concatenate ("_PTS:ARG0:", ToHexString (Arg0))) + \_SB.LED1.LEDR = Zero + \_SB.LID0.LIDB = One + \_SB.ADBG ("PLID1") + \_SB.ADBG (Concatenate ("_PTS:LEDR:", ToHexString (\_SB.LED1.LEDR))) + If (Arg0){} + } + + Method (_WAK, 1, NotSerialized) // _WAK: Wake + { + \_SB.ADBG (Concatenate ("_WAK:ARG0:", ToHexString (Arg0))) + \_SB.LED1.LEDR = 0x04 + \_SB.ADBG (Concatenate ("_WAK:LEDR:", ToHexString (\_SB.LED1.LEDR))) + Return (WAKP) /* \WAKP */ + } +} \ No newline at end of file diff --git a/sdm845Pkg/Binary/845/AdcDxe/AdcDxe.depex b/sdm845Pkg/Binary/845/AdcDxe/AdcDxe.depex new file mode 100644 index 0000000..743af29 --- /dev/null +++ b/sdm845Pkg/Binary/845/AdcDxe/AdcDxe.depex @@ -0,0 +1 @@ +Bą7®E‘Lˇ–ŮfźÓGŁk0_ú}ôÄJ¤}/‚ě0 \ No newline at end of file diff --git a/sdm845Pkg/Binary/845/AdcDxe/AdcDxe.efi b/sdm845Pkg/Binary/845/AdcDxe/AdcDxe.efi new file mode 100644 index 0000000..0c09b92 Binary files /dev/null and b/sdm845Pkg/Binary/845/AdcDxe/AdcDxe.efi differ diff --git a/sdm845Pkg/Binary/845/ButtonsDxe/ButtonsDxe.depex b/sdm845Pkg/Binary/845/ButtonsDxe/ButtonsDxe.depex new file mode 100644 index 0000000..f943d35 Binary files /dev/null and b/sdm845Pkg/Binary/845/ButtonsDxe/ButtonsDxe.depex differ diff --git a/sdm845Pkg/Binary/845/ButtonsDxe/ButtonsDxe.efi b/sdm845Pkg/Binary/845/ButtonsDxe/ButtonsDxe.efi new file mode 100644 index 0000000..25af949 Binary files /dev/null and b/sdm845Pkg/Binary/845/ButtonsDxe/ButtonsDxe.efi differ diff --git a/sdm845Pkg/Binary/845/CPRDxe/CPRDxe.depex b/sdm845Pkg/Binary/845/CPRDxe/CPRDxe.depex new file mode 100644 index 0000000..d24065d --- /dev/null +++ b/sdm845Pkg/Binary/845/CPRDxe/CPRDxe.depex @@ -0,0 +1 @@ +Bą7®E‘Lˇ–ŮfźÓGŁ \ No newline at end of file diff --git a/sdm845Pkg/Binary/845/CPRDxe/CPRDxe.efi b/sdm845Pkg/Binary/845/CPRDxe/CPRDxe.efi new file mode 100644 index 0000000..3e6ca2b Binary files /dev/null and b/sdm845Pkg/Binary/845/CPRDxe/CPRDxe.efi differ diff --git a/sdm845Pkg/Binary/845/ChipInfo/ChipInfo.depex b/sdm845Pkg/Binary/845/ChipInfo/ChipInfo.depex new file mode 100644 index 0000000..26bd57d --- /dev/null +++ b/sdm845Pkg/Binary/845/ChipInfo/ChipInfo.depex @@ -0,0 +1 @@ +Bą7®E‘Lˇ–ŮfźÓGŁ|Ţaž'™(Oź=2Ř \ No newline at end of file diff --git a/sdm845Pkg/Binary/845/ChipInfo/ChipInfo.efi b/sdm845Pkg/Binary/845/ChipInfo/ChipInfo.efi new file mode 100644 index 0000000..ea03640 Binary files /dev/null and b/sdm845Pkg/Binary/845/ChipInfo/ChipInfo.efi differ diff --git a/sdm845Pkg/Binary/845/ClockDxe/ClockDxe.depex b/sdm845Pkg/Binary/845/ClockDxe/ClockDxe.depex new file mode 100644 index 0000000..14cd96a --- /dev/null +++ b/sdm845Pkg/Binary/845/ClockDxe/ClockDxe.depex @@ -0,0 +1 @@ +Bą7®E‘Lˇ–ŮfźÓGŁiv° —zH¤µ(Ű{EÎń \ No newline at end of file diff --git a/sdm845Pkg/Binary/845/ClockDxe/ClockDxe.efi b/sdm845Pkg/Binary/845/ClockDxe/ClockDxe.efi new file mode 100644 index 0000000..3a448e1 Binary files /dev/null and b/sdm845Pkg/Binary/845/ClockDxe/ClockDxe.efi differ diff --git a/sdm845Pkg/Binary/845/CmdDbDxe/CmdDbDxe.depex b/sdm845Pkg/Binary/845/CmdDbDxe/CmdDbDxe.depex new file mode 100644 index 0000000..2a47cc2 --- /dev/null +++ b/sdm845Pkg/Binary/845/CmdDbDxe/CmdDbDxe.depex @@ -0,0 +1 @@ + \ No newline at end of file diff --git a/sdm845Pkg/Binary/845/CmdDbDxe/CmdDbDxe.efi b/sdm845Pkg/Binary/845/CmdDbDxe/CmdDbDxe.efi new file mode 100644 index 0000000..9a76ff4 Binary files /dev/null and b/sdm845Pkg/Binary/845/CmdDbDxe/CmdDbDxe.efi differ diff --git a/sdm845Pkg/Binary/845/DALSys/DALSys.depex b/sdm845Pkg/Binary/845/DALSys/DALSys.depex new file mode 100644 index 0000000..098cfdc --- /dev/null +++ b/sdm845Pkg/Binary/845/DALSys/DALSys.depex @@ -0,0 +1 @@ +ĐÇĺô9ŇËGŞÍfďv28 \ No newline at end of file diff --git a/sdm845Pkg/Binary/845/DALSys/DALSys.efi b/sdm845Pkg/Binary/845/DALSys/DALSys.efi new file mode 100644 index 0000000..8bfecd4 Binary files /dev/null and b/sdm845Pkg/Binary/845/DALSys/DALSys.efi differ diff --git a/sdm845Pkg/Binary/845/DALTLMM/.depex b/sdm845Pkg/Binary/845/DALTLMM/.depex new file mode 100644 index 0000000..d24065d --- /dev/null +++ b/sdm845Pkg/Binary/845/DALTLMM/.depex @@ -0,0 +1 @@ +Bą7®E‘Lˇ–ŮfźÓGŁ \ No newline at end of file diff --git a/sdm845Pkg/Binary/845/DALTLMM/DALTLMM.depex b/sdm845Pkg/Binary/845/DALTLMM/DALTLMM.depex new file mode 100644 index 0000000..d24065d --- /dev/null +++ b/sdm845Pkg/Binary/845/DALTLMM/DALTLMM.depex @@ -0,0 +1 @@ +Bą7®E‘Lˇ–ŮfźÓGŁ \ No newline at end of file diff --git a/sdm845Pkg/Binary/845/DALTLMM/DALTLMM.efi b/sdm845Pkg/Binary/845/DALTLMM/DALTLMM.efi new file mode 100644 index 0000000..9f05766 Binary files /dev/null and b/sdm845Pkg/Binary/845/DALTLMM/DALTLMM.efi differ diff --git a/sdm845Pkg/Binary/845/EmuVariableRuntimeDxe/EmuVariableRuntimeDxe.depex b/sdm845Pkg/Binary/845/EmuVariableRuntimeDxe/EmuVariableRuntimeDxe.depex new file mode 100644 index 0000000..2a47cc2 --- /dev/null +++ b/sdm845Pkg/Binary/845/EmuVariableRuntimeDxe/EmuVariableRuntimeDxe.depex @@ -0,0 +1 @@ + \ No newline at end of file diff --git a/sdm845Pkg/Binary/845/EmuVariableRuntimeDxe/EmuVariableRuntimeDxe.efi b/sdm845Pkg/Binary/845/EmuVariableRuntimeDxe/EmuVariableRuntimeDxe.efi new file mode 100644 index 0000000..600d173 Binary files /dev/null and b/sdm845Pkg/Binary/845/EmuVariableRuntimeDxe/EmuVariableRuntimeDxe.efi differ diff --git a/sdm845Pkg/Binary/845/EnvDxe/EnvDxe.depex b/sdm845Pkg/Binary/845/EnvDxe/EnvDxe.depex new file mode 100644 index 0000000..2a47cc2 --- /dev/null +++ b/sdm845Pkg/Binary/845/EnvDxe/EnvDxe.depex @@ -0,0 +1 @@ + \ No newline at end of file diff --git a/sdm845Pkg/Binary/845/EnvDxe/EnvDxe.efi b/sdm845Pkg/Binary/845/EnvDxe/EnvDxe.efi new file mode 100644 index 0000000..a13ca00 Binary files /dev/null and b/sdm845Pkg/Binary/845/EnvDxe/EnvDxe.efi differ diff --git a/sdm845Pkg/Binary/845/GlinkDxe/GlinkDxe.depex b/sdm845Pkg/Binary/845/GlinkDxe/GlinkDxe.depex new file mode 100644 index 0000000..2a47cc2 --- /dev/null +++ b/sdm845Pkg/Binary/845/GlinkDxe/GlinkDxe.depex @@ -0,0 +1 @@ + \ No newline at end of file diff --git a/sdm845Pkg/Binary/845/HALIOMMU/HALIOMMU.depex b/sdm845Pkg/Binary/845/HALIOMMU/HALIOMMU.depex new file mode 100644 index 0000000..d1a2d14 Binary files /dev/null and b/sdm845Pkg/Binary/845/HALIOMMU/HALIOMMU.depex differ diff --git a/sdm845Pkg/Binary/845/HALIOMMU/HALIOMMU.efi b/sdm845Pkg/Binary/845/HALIOMMU/HALIOMMU.efi new file mode 100644 index 0000000..20cc2f0 Binary files /dev/null and b/sdm845Pkg/Binary/845/HALIOMMU/HALIOMMU.efi differ diff --git a/sdm845Pkg/Binary/845/HWIODxeDriver/HWIODxeDriver.depex b/sdm845Pkg/Binary/845/HWIODxeDriver/HWIODxeDriver.depex new file mode 100644 index 0000000..d24065d --- /dev/null +++ b/sdm845Pkg/Binary/845/HWIODxeDriver/HWIODxeDriver.depex @@ -0,0 +1 @@ +Bą7®E‘Lˇ–ŮfźÓGŁ \ No newline at end of file diff --git a/sdm845Pkg/Binary/845/HWIODxeDriver/HWIODxeDriver.efi b/sdm845Pkg/Binary/845/HWIODxeDriver/HWIODxeDriver.efi new file mode 100644 index 0000000..094cbd9 Binary files /dev/null and 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b/sdm845Pkg/Binary/845/PdcDxe/PdcDxe.depex new file mode 100644 index 0000000..2a47cc2 --- /dev/null +++ b/sdm845Pkg/Binary/845/PdcDxe/PdcDxe.depex @@ -0,0 +1 @@ + \ No newline at end of file diff --git a/sdm845Pkg/Binary/845/PdcDxe/PdcDxe.efi b/sdm845Pkg/Binary/845/PdcDxe/PdcDxe.efi new file mode 100644 index 0000000..7f43268 Binary files /dev/null and b/sdm845Pkg/Binary/845/PdcDxe/PdcDxe.efi differ diff --git a/sdm845Pkg/Binary/845/PlatformInfoDxeDriver/PlatformInfoDxeDriver.depex b/sdm845Pkg/Binary/845/PlatformInfoDxeDriver/PlatformInfoDxeDriver.depex new file mode 100644 index 0000000..d24065d --- /dev/null +++ b/sdm845Pkg/Binary/845/PlatformInfoDxeDriver/PlatformInfoDxeDriver.depex @@ -0,0 +1 @@ +Bą7®E‘Lˇ–ŮfźÓGŁ \ No newline at end of file diff --git a/sdm845Pkg/Binary/845/PlatformInfoDxeDriver/PlatformInfoDxeDriver.efi b/sdm845Pkg/Binary/845/PlatformInfoDxeDriver/PlatformInfoDxeDriver.efi new file mode 100644 index 0000000..125906c Binary files /dev/null and b/sdm845Pkg/Binary/845/PlatformInfoDxeDriver/PlatformInfoDxeDriver.efi differ diff --git a/sdm845Pkg/Binary/845/PmicDxe/PmicDxe.depex b/sdm845Pkg/Binary/845/PmicDxe/PmicDxe.depex new file mode 100644 index 0000000..743af29 --- /dev/null +++ b/sdm845Pkg/Binary/845/PmicDxe/PmicDxe.depex @@ -0,0 +1 @@ +Bą7®E‘Lˇ–ŮfźÓGŁk0_ú}ôÄJ¤}/‚ě0 \ No newline at end of file diff --git a/sdm845Pkg/Binary/845/PmicDxe/PmicDxe.efi b/sdm845Pkg/Binary/845/PmicDxe/PmicDxe.efi new file mode 100644 index 0000000..ea02b91 Binary files /dev/null and b/sdm845Pkg/Binary/845/PmicDxe/PmicDxe.efi differ diff --git a/sdm845Pkg/Binary/845/QcomChargerDxeLA/QcomChargerDxeLA.depex b/sdm845Pkg/Binary/845/QcomChargerDxeLA/QcomChargerDxeLA.depex new file mode 100644 index 0000000..2a47cc2 --- /dev/null +++ b/sdm845Pkg/Binary/845/QcomChargerDxeLA/QcomChargerDxeLA.depex @@ -0,0 +1 @@ + \ No newline at end of file diff --git a/sdm845Pkg/Binary/845/QcomChargerDxeLA/QcomChargerDxeLA.efi b/sdm845Pkg/Binary/845/QcomChargerDxeLA/QcomChargerDxeLA.efi new file mode 100644 index 0000000..02d0ca9 Binary files /dev/null and b/sdm845Pkg/Binary/845/QcomChargerDxeLA/QcomChargerDxeLA.efi differ diff --git a/sdm845Pkg/Binary/845/QdssDxe/QdssDxe.depex b/sdm845Pkg/Binary/845/QdssDxe/QdssDxe.depex new file mode 100644 index 0000000..2a47cc2 --- /dev/null +++ b/sdm845Pkg/Binary/845/QdssDxe/QdssDxe.depex @@ -0,0 +1 @@ + \ No newline at end of file diff --git a/sdm845Pkg/Binary/845/RealTimeClock/RealTimeClock.depex b/sdm845Pkg/Binary/845/RealTimeClock/RealTimeClock.depex new file mode 100644 index 0000000..2a47cc2 --- /dev/null +++ b/sdm845Pkg/Binary/845/RealTimeClock/RealTimeClock.depex @@ -0,0 +1 @@ + \ No newline at end of file diff --git a/sdm845Pkg/Binary/845/RealTimeClock/RealTimeClock.efi b/sdm845Pkg/Binary/845/RealTimeClock/RealTimeClock.efi new file mode 100644 index 0000000..e9de2ab Binary files /dev/null and b/sdm845Pkg/Binary/845/RealTimeClock/RealTimeClock.efi differ diff --git a/sdm845Pkg/Binary/845/RpmhDxe/RpmhDxe.depex b/sdm845Pkg/Binary/845/RpmhDxe/RpmhDxe.depex new file mode 100644 index 0000000..36f032b --- /dev/null +++ b/sdm845Pkg/Binary/845/RpmhDxe/RpmhDxe.depex @@ -0,0 +1 @@ +Bą7®E‘Lˇ–ŮfźÓGŁ±$¨“|÷€H­•çĽcOQ \ No newline at end of file diff --git a/sdm845Pkg/Binary/845/RpmhDxe/RpmhDxe.efi b/sdm845Pkg/Binary/845/RpmhDxe/RpmhDxe.efi new file mode 100644 index 0000000..4cb0201 Binary files /dev/null and b/sdm845Pkg/Binary/845/RpmhDxe/RpmhDxe.efi differ diff --git a/sdm845Pkg/Binary/845/SPI/SPI.depex b/sdm845Pkg/Binary/845/SPI/SPI.depex new file mode 100644 index 0000000..11fe8cc Binary files /dev/null and b/sdm845Pkg/Binary/845/SPI/SPI.depex differ diff --git a/sdm845Pkg/Binary/845/SPMI/SPMI.depex b/sdm845Pkg/Binary/845/SPMI/SPMI.depex new file mode 100644 index 0000000..2a47cc2 --- /dev/null +++ b/sdm845Pkg/Binary/845/SPMI/SPMI.depex @@ -0,0 +1 @@ + \ No newline at end of file diff --git a/sdm845Pkg/Binary/845/SPMI/SPMI.efi b/sdm845Pkg/Binary/845/SPMI/SPMI.efi new file mode 100644 index 0000000..37b0d09 Binary files /dev/null and b/sdm845Pkg/Binary/845/SPMI/SPMI.efi differ diff --git a/sdm845Pkg/Binary/845/SdccDxe/SdccDxe.depex b/sdm845Pkg/Binary/845/SdccDxe/SdccDxe.depex new file mode 100644 index 0000000..265ee7c Binary files /dev/null and b/sdm845Pkg/Binary/845/SdccDxe/SdccDxe.depex differ diff --git a/sdm845Pkg/Binary/845/SdccDxe/SdccDxe.efi b/sdm845Pkg/Binary/845/SdccDxe/SdccDxe.efi new file mode 100644 index 0000000..a55215b Binary files /dev/null and b/sdm845Pkg/Binary/845/SdccDxe/SdccDxe.efi differ diff --git a/sdm845Pkg/Binary/845/SerialDxe/SerialDxe.depex b/sdm845Pkg/Binary/845/SerialDxe/SerialDxe.depex new file mode 100644 index 0000000..0dc7ce4 --- /dev/null +++ b/sdm845Pkg/Binary/845/SerialDxe/SerialDxe.depex @@ -0,0 +1 @@ +öđŁJ&đ>ňŕŢĹ4/4 \ No newline at end of file diff --git a/sdm845Pkg/Binary/845/SerialDxe/SerialDxe.efi b/sdm845Pkg/Binary/845/SerialDxe/SerialDxe.efi new file mode 100644 index 0000000..3ed1363 Binary files /dev/null and b/sdm845Pkg/Binary/845/SerialDxe/SerialDxe.efi differ diff --git a/sdm845Pkg/Binary/845/SerialDxe/SerialDxeL.efi b/sdm845Pkg/Binary/845/SerialDxe/SerialDxeL.efi new file mode 100644 index 0000000..ac57ac8 Binary files /dev/null and b/sdm845Pkg/Binary/845/SerialDxe/SerialDxeL.efi differ diff --git a/sdm845Pkg/Binary/845/SmemDxe/SmemDxe.depex b/sdm845Pkg/Binary/845/SmemDxe/SmemDxe.depex new file mode 100644 index 0000000..2a47cc2 --- /dev/null +++ b/sdm845Pkg/Binary/845/SmemDxe/SmemDxe.depex @@ -0,0 +1 @@ + \ No newline at end of file diff --git a/sdm845Pkg/Binary/845/SmemDxe/SmemDxe.efi b/sdm845Pkg/Binary/845/SmemDxe/SmemDxe.efi new file mode 100644 index 0000000..22a535d Binary files /dev/null and b/sdm845Pkg/Binary/845/SmemDxe/SmemDxe.efi differ diff --git a/sdm845Pkg/Binary/845/UFSDxe/UFSDxe.depex b/sdm845Pkg/Binary/845/UFSDxe/UFSDxe.depex new file mode 100644 index 0000000..098cfdc --- /dev/null +++ b/sdm845Pkg/Binary/845/UFSDxe/UFSDxe.depex @@ -0,0 +1 @@ +ĐÇĺô9ŇËGŞÍfďv28 \ No newline at end of file diff --git a/sdm845Pkg/Binary/845/UFSDxe/UFSDxe.efi b/sdm845Pkg/Binary/845/UFSDxe/UFSDxe.efi new file mode 100644 index 0000000..c5df5aa Binary files /dev/null and b/sdm845Pkg/Binary/845/UFSDxe/UFSDxe.efi differ diff --git a/sdm845Pkg/Binary/845/ULogDxe/ULogDxe.depex b/sdm845Pkg/Binary/845/ULogDxe/ULogDxe.depex new file mode 100644 index 0000000..2a47cc2 --- /dev/null +++ b/sdm845Pkg/Binary/845/ULogDxe/ULogDxe.depex @@ -0,0 +1 @@ + \ No newline at end of file diff --git a/sdm845Pkg/Binary/845/ULogDxe/ULogDxe.efi b/sdm845Pkg/Binary/845/ULogDxe/ULogDxe.efi new file mode 100644 index 0000000..2dd7d63 Binary files /dev/null and b/sdm845Pkg/Binary/845/ULogDxe/ULogDxe.efi differ diff --git a/sdm845Pkg/Binary/845/UsbConfigDxe/UsbConfigDxe.depex b/sdm845Pkg/Binary/845/UsbConfigDxe/UsbConfigDxe.depex new file mode 100644 index 0000000..8f72e31 --- /dev/null +++ b/sdm845Pkg/Binary/845/UsbConfigDxe/UsbConfigDxe.depex @@ -0,0 +1 @@ +iv° —zH¤µ(Ű{EÎńĐÇĺô9ŇËGŞÍfďv28E\z˛!ĹCş|‚/î_噎—ëßĎĆIľKŮĄ˛† \ No newline at end of file diff --git a/sdm845Pkg/Binary/845/UsbConfigDxe/UsbConfigDxe.efi b/sdm845Pkg/Binary/845/UsbConfigDxe/UsbConfigDxe.efi new file mode 100644 index 0000000..e90cece Binary files /dev/null and b/sdm845Pkg/Binary/845/UsbConfigDxe/UsbConfigDxe.efi differ diff --git a/sdm845Pkg/Binary/845/UsbDeviceDxe/UsbDeviceDxe.depex b/sdm845Pkg/Binary/845/UsbDeviceDxe/UsbDeviceDxe.depex new file mode 100644 index 0000000..2a47cc2 --- /dev/null +++ b/sdm845Pkg/Binary/845/UsbDeviceDxe/UsbDeviceDxe.depex @@ -0,0 +1 @@ + \ No newline at end of file diff --git a/sdm845Pkg/Binary/845/UsbDeviceDxe/UsbDeviceDxe.efi b/sdm845Pkg/Binary/845/UsbDeviceDxe/UsbDeviceDxe.efi new file mode 100644 index 0000000..531da44 Binary files /dev/null and b/sdm845Pkg/Binary/845/UsbDeviceDxe/UsbDeviceDxe.efi differ diff --git a/sdm845Pkg/Binary/845/UsbInitDxe/UsbInitDxe.depex b/sdm845Pkg/Binary/845/UsbInitDxe/UsbInitDxe.depex new file mode 100644 index 0000000..2faa00f --- /dev/null +++ b/sdm845Pkg/Binary/845/UsbInitDxe/UsbInitDxe.depex @@ -0,0 +1 @@ +?°"çP˛ÎBŽ˝[ŐĐ7 \ No newline at end of file diff --git a/sdm845Pkg/Binary/845/UsbInitDxe/UsbInitDxe.efi b/sdm845Pkg/Binary/845/UsbInitDxe/UsbInitDxe.efi new file mode 100644 index 0000000..24a6c8d Binary files /dev/null and b/sdm845Pkg/Binary/845/UsbInitDxe/UsbInitDxe.efi differ diff --git a/sdm845Pkg/Binary/845/UsbMsdDxe/UsbMsdDxe.depex b/sdm845Pkg/Binary/845/UsbMsdDxe/UsbMsdDxe.depex new file mode 100644 index 0000000..2a47cc2 --- /dev/null +++ b/sdm845Pkg/Binary/845/UsbMsdDxe/UsbMsdDxe.depex @@ -0,0 +1 @@ + \ No newline at end of file diff --git a/sdm845Pkg/Binary/845/UsbMsdDxe/UsbMsdDxe.efi b/sdm845Pkg/Binary/845/UsbMsdDxe/UsbMsdDxe.efi new file mode 100644 index 0000000..5328a6b Binary files /dev/null and b/sdm845Pkg/Binary/845/UsbMsdDxe/UsbMsdDxe.efi differ diff --git a/sdm845Pkg/Binary/845/UsbPwrCtrlDxe/UsbPwrCtrlDxe.depex b/sdm845Pkg/Binary/845/UsbPwrCtrlDxe/UsbPwrCtrlDxe.depex new file mode 100644 index 0000000..2a47cc2 --- /dev/null +++ b/sdm845Pkg/Binary/845/UsbPwrCtrlDxe/UsbPwrCtrlDxe.depex @@ -0,0 +1 @@ + \ No newline at end of file diff --git a/sdm845Pkg/Binary/845/UsbPwrCtrlDxe/UsbPwrCtrlDxe.efi b/sdm845Pkg/Binary/845/UsbPwrCtrlDxe/UsbPwrCtrlDxe.efi new file mode 100644 index 0000000..e019c2c Binary files /dev/null and b/sdm845Pkg/Binary/845/UsbPwrCtrlDxe/UsbPwrCtrlDxe.efi differ diff --git a/sdm845Pkg/Binary/845/UsbfnDwc3Dxe/UsbfnDwc3Dxe.depex b/sdm845Pkg/Binary/845/UsbfnDwc3Dxe/UsbfnDwc3Dxe.depex new file mode 100644 index 0000000..43d06b2 Binary files /dev/null and b/sdm845Pkg/Binary/845/UsbfnDwc3Dxe/UsbfnDwc3Dxe.depex differ diff --git a/sdm845Pkg/Binary/845/UsbfnDwc3Dxe/UsbfnDwc3Dxe.efi b/sdm845Pkg/Binary/845/UsbfnDwc3Dxe/UsbfnDwc3Dxe.efi new file mode 100644 index 0000000..f36b035 Binary files /dev/null and b/sdm845Pkg/Binary/845/UsbfnDwc3Dxe/UsbfnDwc3Dxe.efi differ diff --git a/sdm845Pkg/Devices/845.fdf b/sdm845Pkg/Devices/845.fdf new file mode 100644 index 0000000..c55876f --- /dev/null +++ b/sdm845Pkg/Devices/845.fdf @@ -0,0 +1,612 @@ +# +# Copyright (c) 2018, Linaro Limited. All rights reserved. +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# + +################################################################################ +# +# FD Section +# The [FD] Section is made up of the definition statements and a +# description of what goes into the Flash Device Image. Each FD section +# defines one flash "device" image. A flash device image may be one of +# the following: Removable media bootable image (like a boot floppy +# image,) an Option ROM image (that would be "flashed" into an add-in +# card,) a System "Flash" image (that would be burned into a system's +# flash) or an Update ("Capsule") image that will be used to update and +# existing system flash. +# +################################################################################ + +[FD.sdm845Pkg_UEFI] +BaseAddress = 0xd0000000|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in NOR Flash. +Size = 0x00200000|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the FLASH Device +ErasePolarity = 1 + +# This one is tricky, it must be: BlockSize * NumBlocks = Size +BlockSize = 0x00001000 +NumBlocks = 0x200 + +################################################################################ +# +# Following are lists of FD Region layout which correspond to the locations of different +# images within the flash device. +# +# Regions must be defined in ascending order and may not overlap. +# +# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by +# the pipe "|" character, followed by the size of the region, also in hex with the leading +# "0x" characters. Like: +# Offset|Size +# PcdOffsetCName|PcdSizeCName +# RegionType +# +################################################################################ + +# from ArmVirtPkg/ArmVirtQemuKernel.fdf +# +# Implement the Linux kernel header layout so that the loader will identify +# it as something bootable, and execute it with a FDT pointer in x0 or r2. +# +0x00000000|0x00008000 +DATA = { + 0x01, 0x00, 0x00, 0x10, # code0: adr x1, . + 0xff, 0x1f, 0x00, 0x14, # code1: b 0x8000 + 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, # text_offset: 512 KB + 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, # image_size: 2 MB + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, # flags + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, # res2 + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, # res3 + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, # res4 + 0x41, 0x52, 0x4d, 0x64, # magic: "ARM\x64" + 0x00, 0x00, 0x00, 0x00 # res5 +} + +0x00008000|0x001f8000 +gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize +FV = FVMAIN_COMPACT + + +################################################################################ +# +# FV Section +# +# [FV] section is used to define what components or modules are placed within a flash +# device file. This section also defines order the components and modules are positioned +# within the image. The [FV] section consists of define statements, set statements and +# module statements. +# +################################################################################ + +[FV.FvMain] +BlockSize = 0x40 +NumBlocks = 0 # This FV gets compressed so make it just big enough +FvAlignment = 8 # FV alignment and FV attributes setting. +ERASE_POLARITY = 1 +MEMORY_MAPPED = TRUE +STICKY_WRITE = TRUE +LOCK_CAP = TRUE +LOCK_STATUS = TRUE +WRITE_DISABLED_CAP = TRUE +WRITE_ENABLED_CAP = TRUE +WRITE_STATUS = TRUE +WRITE_LOCK_CAP = TRUE +WRITE_LOCK_STATUS = TRUE +READ_DISABLED_CAP = TRUE +READ_ENABLED_CAP = TRUE +READ_STATUS = TRUE +READ_LOCK_CAP = TRUE +READ_LOCK_STATUS = TRUE + + APRIORI DXE { + + + # + # PI DXE Drivers producing Architectural Protocols (EFI Services) + # + INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf + INF MdeModulePkg/Core/Dxe/DxeMain.inf + INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf + INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf + INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf + INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf + INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf + INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf + INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf + INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf + INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf + + # + # FAT filesystem + GPT/MBR partitioning + # + INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf + INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf + INF FatPkg/EnhancedFatDxe/Fat.inf + INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf + INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf + + INF EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf + INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf + INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf + INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf + INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf + INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf + + INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf + INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf + INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf + + + + FILE DRIVER = 9A5163E7-5C29-453F-825C-837A46A81E15 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/SerialDxe/SerialDxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/SerialDxe/SerialDxe.efi + SECTION UI = "SerialDxe" + } + + FILE DRIVER = f541d663-4a48-40aa-aabf-ff158ccae34c { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/SmemDxe/SmemDxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/SmemDxe/SmemDxe.efi + SECTION UI = "SmemDxe" + } + + FILE DRIVER = 8E9BD160-B184-11DF-94E2-0800200C9A66 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/DALSys/DALSys.depex + SECTION PE32 = sdm845Pkg/Binary/845/DALSys/DALSys.efi + SECTION UI = "DALSys" + } + + FILE DRIVER = 8681CC5A-0DF6-441E-B4B8-E915C538F067 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/HWIODxeDriver/HWIODxeDriver.depex + SECTION PE32 = sdm845Pkg/Binary/845/HWIODxeDriver/HWIODxeDriver.efi + SECTION UI = "HWIODxeDriver" + } + + FILE DRIVER = 10e193df-9966-44e7-b17c-59dd831e20fc { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/ChipInfo/ChipInfo.depex + SECTION PE32 = sdm845Pkg/Binary/845/ChipInfo/ChipInfo.efi + SECTION UI = "ChipInfo" + } + + FILE DRIVER = B105211B-BBBD-4ADD-A3B0-D1CF4A52154C { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/PlatformInfoDxeDriver/PlatformInfoDxeDriver.depex + SECTION PE32 = sdm845Pkg/Binary/845/PlatformInfoDxeDriver/PlatformInfoDxeDriver.efi + SECTION UI = "PlatformInfoDxeDriver" + } + + FILE DRIVER = 9A00771F-36D4-4DD5-8916-C48ED9B16B86 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/HALIOMMU/HALIOMMU.depex + SECTION PE32 = sdm845Pkg/Binary/845/HALIOMMU/HALIOMMU.efi + SECTION UI = "HALIOMMU" + } + + FILE DRIVER = E43128A8-8692-42B6-8AFA-676158578D18 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/ULogDxe/ULogDxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/ULogDxe/ULogDxe.efi + SECTION UI = "ULogDxe" + } + + FILE DRIVER = ABA01FF8-2CCB-4E12-8B2E-CD3F4A742993 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/CmdDbDxe/CmdDbDxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/CmdDbDxe/CmdDbDxe.efi + SECTION UI = "CmdDbDxe" + } + + FILE DRIVER = CB29F4D1-7F37-4692-A416-93E82E219711 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/NpaDxe/NpaDxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/NpaDxe/NpaDxe.efi + SECTION UI = "NpaDxe" + } + + FILE DRIVER = CB29F4D1-7F37-4692-A416-93E82E219766 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/RpmhDxe/RpmhDxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/RpmhDxe/RpmhDxe.efi + SECTION UI = "RpmhDxe" + } + + FILE DRIVER = B43C22DB-6333-490C-872D-0A73439059FD { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/PdcDxe/PdcDxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/PdcDxe/PdcDxe.efi + SECTION UI = "PdcDxe" + } + + FILE DRIVER = 4DB5DEA6-5302-4D1A-8A82-677A683B0D29 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/ClockDxe/ClockDxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/ClockDxe/ClockDxe.efi + SECTION UI = "ClockDxe" + } + + FILE DRIVER = 1B52138D-3FA3-4E50-B958-20887353F809 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/CPRDxe/CPRDxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/CPRDxe/CPRDxe.efi + SECTION UI = "CPRDxe" + } + + FILE DRIVER = AF9763A2-033B-4109-8E17-56A98D380C92 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/DALTLMM/DALTLMM.depex + SECTION PE32 = sdm845Pkg/Binary/845/DALTLMM/DALTLMM.efi + SECTION UI = "DALTLMM" + } + + FILE DRIVER = 04DE8591-D2B3-4077-BBBE-B12070094EB6 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/I2C/I2C.depex + SECTION PE32 = sdm845Pkg/Binary/845/I2C/I2C.efi + SECTION UI = "I2C" + } + + FILE DRIVER = 2a7b4bef-80cd-49e1-b473-374ba4d673fc { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/SPMI/SPMI.depex + SECTION PE32 = sdm845Pkg/Binary/845/SPMI/SPMI.efi + SECTION UI = "SPMI" + } + + FILE DRIVER = 5776232e-082d-4b75-9a0e-fe1d13f7a5d9 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/PmicDxe/PmicDxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/PmicDxe/PmicDxe.efi + SECTION UI = "PmicDxe" + } + + FILE DRIVER = 11faed4c-b21f-4d88-8e48-c4c28a1e50df { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/UsbPwrCtrlDxe/UsbPwrCtrlDxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/UsbPwrCtrlDxe/UsbPwrCtrlDxe.efi + SECTION UI = "UsbPwrCtrlDxe" + } + + FILE DRIVER = 94f8a6a7-dc34-4101-88c1-99179cceae83 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/UsbfnDwc3Dxe/UsbfnDwc3Dxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/UsbfnDwc3Dxe/UsbfnDwc3Dxe.efi + SECTION UI = "UsbfnDwc3Dxe" + } + + FILE DRIVER = cd823a4d-7dec-4531-ae5d-4134fa4127b8 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/UsbConfigDxe/UsbConfigDxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/UsbConfigDxe/UsbConfigDxe.efi + SECTION UI = "UsbConfigDxe" + } + + FILE DRIVER = 0A134F0E-075E-40B3-9C63-3B3906804663 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/UsbInitDxe/UsbInitDxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/UsbInitDxe/UsbInitDxe.efi + SECTION UI = "UsbInitDxe" + } + + FILE DRIVER = 3299a266-15f0-4346-8318-716336736d3e { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/UsbDeviceDxe/UsbDeviceDxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/UsbDeviceDxe/UsbDeviceDxe.efi + SECTION UI = "UsbDeviceDxe" + } + + FILE DRIVER = 5bd181db-0487-4f1a-ae73-820e165611b3 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/ButtonsDxe/ButtonsDxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/ButtonsDxe/ButtonsDxe.efi + SECTION UI = "ButtonsDxe" + } + + + INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf + +} + + INF MdeModulePkg/Core/Dxe/DxeMain.inf + + + # + # PI DXE Drivers producing Architectural Protocols (EFI Services) + # + INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf + INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf + INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf + INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf + INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf + INF EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf + INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf + INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf + INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf + + + + # + # Multiple Console IO support + # + INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf + INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf + INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf + INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf + + + INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf + INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf + + INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf + + FILE DRIVER = 9A5163E7-5C29-453F-825C-837A46A81E15 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/SerialDxe/SerialDxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/SerialDxe/SerialDxe.efi + SECTION UI = "SerialDxe" + } + + FILE DRIVER = f541d663-4a48-40aa-aabf-ff158ccae34c { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/SmemDxe/SmemDxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/SmemDxe/SmemDxe.efi + SECTION UI = "SmemDxe" + } + + FILE DRIVER = 8E9BD160-B184-11DF-94E2-0800200C9A66 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/DALSys/DALSys.depex + SECTION PE32 = sdm845Pkg/Binary/845/DALSys/DALSys.efi + SECTION UI = "DALSys" + } + + FILE DRIVER = 8681CC5A-0DF6-441E-B4B8-E915C538F067 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/HWIODxeDriver/HWIODxeDriver.depex + SECTION PE32 = sdm845Pkg/Binary/845/HWIODxeDriver/HWIODxeDriver.efi + SECTION UI = "HWIODxeDriver" + } + + FILE DRIVER = 10e193df-9966-44e7-b17c-59dd831e20fc { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/ChipInfo/ChipInfo.depex + SECTION PE32 = sdm845Pkg/Binary/845/ChipInfo/ChipInfo.efi + SECTION UI = "ChipInfo" + } + + FILE DRIVER = B105211B-BBBD-4ADD-A3B0-D1CF4A52154C { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/PlatformInfoDxeDriver/PlatformInfoDxeDriver.depex + SECTION PE32 = sdm845Pkg/Binary/845/PlatformInfoDxeDriver/PlatformInfoDxeDriver.efi + SECTION UI = "PlatformInfoDxeDriver" + } + + FILE DRIVER = 9A00771F-36D4-4DD5-8916-C48ED9B16B86 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/HALIOMMU/HALIOMMU.depex + SECTION PE32 = sdm845Pkg/Binary/845/HALIOMMU/HALIOMMU.efi + SECTION UI = "HALIOMMU" + } + + FILE DRIVER = E43128A8-8692-42B6-8AFA-676158578D18 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/ULogDxe/ULogDxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/ULogDxe/ULogDxe.efi + SECTION UI = "ULogDxe" + } + + FILE DRIVER = ABA01FF8-2CCB-4E12-8B2E-CD3F4A742993 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/CmdDbDxe/CmdDbDxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/CmdDbDxe/CmdDbDxe.efi + SECTION UI = "CmdDbDxe" + } + + FILE DRIVER = CB29F4D1-7F37-4692-A416-93E82E219711 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/NpaDxe/NpaDxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/NpaDxe/NpaDxe.efi + SECTION UI = "NpaDxe" + } + + FILE DRIVER = CB29F4D1-7F37-4692-A416-93E82E219766 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/RpmhDxe/RpmhDxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/RpmhDxe/RpmhDxe.efi + SECTION UI = "RpmhDxe" + } + + FILE DRIVER = B43C22DB-6333-490C-872D-0A73439059FD { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/PdcDxe/PdcDxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/PdcDxe/PdcDxe.efi + SECTION UI = "PdcDxe" + } + + FILE DRIVER = 4DB5DEA6-5302-4D1A-8A82-677A683B0D29 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/ClockDxe/ClockDxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/ClockDxe/ClockDxe.efi + SECTION UI = "ClockDxe" + } + + FILE DRIVER = 1B52138D-3FA3-4E50-B958-20887353F809 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/CPRDxe/CPRDxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/CPRDxe/CPRDxe.efi + SECTION UI = "CPRDxe" + } + + FILE DRIVER = AF9763A2-033B-4109-8E17-56A98D380C92 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/DALTLMM/DALTLMM.depex + SECTION PE32 = sdm845Pkg/Binary/845/DALTLMM/DALTLMM.efi + SECTION UI = "DALTLMM" + } + + FILE DRIVER = 04DE8591-D2B3-4077-BBBE-B12070094EB6 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/I2C/I2C.depex + SECTION PE32 = sdm845Pkg/Binary/845/I2C/I2C.efi + SECTION UI = "I2C" + } + + FILE DRIVER = 2a7b4bef-80cd-49e1-b473-374ba4d673fc { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/SPMI/SPMI.depex + SECTION PE32 = sdm845Pkg/Binary/845/SPMI/SPMI.efi + SECTION UI = "SPMI" + } + + FILE DRIVER = 5776232e-082d-4b75-9a0e-fe1d13f7a5d9 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/PmicDxe/PmicDxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/PmicDxe/PmicDxe.efi + SECTION UI = "PmicDxe" + } + + FILE DRIVER = 11faed4c-b21f-4d88-8e48-c4c28a1e50df { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/UsbPwrCtrlDxe/UsbPwrCtrlDxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/UsbPwrCtrlDxe/UsbPwrCtrlDxe.efi + SECTION UI = "UsbPwrCtrlDxe" + } + + FILE DRIVER = 94f8a6a7-dc34-4101-88c1-99179cceae83 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/UsbfnDwc3Dxe/UsbfnDwc3Dxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/UsbfnDwc3Dxe/UsbfnDwc3Dxe.efi + SECTION UI = "UsbfnDwc3Dxe" + } + + FILE DRIVER = cd823a4d-7dec-4531-ae5d-4134fa4127b8 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/UsbConfigDxe/UsbConfigDxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/UsbConfigDxe/UsbConfigDxe.efi + SECTION UI = "UsbConfigDxe" + } + + FILE DRIVER = 0A134F0E-075E-40B3-9C63-3B3906804663 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/UsbInitDxe/UsbInitDxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/UsbInitDxe/UsbInitDxe.efi + SECTION UI = "UsbInitDxe" + } + + FILE DRIVER = 3299a266-15f0-4346-8318-716336736d3e { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/UsbDeviceDxe/UsbDeviceDxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/UsbDeviceDxe/UsbDeviceDxe.efi + SECTION UI = "UsbDeviceDxe" + } + + FILE DRIVER = 5bd181db-0487-4f1a-ae73-820e165611b3 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/ButtonsDxe/ButtonsDxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/ButtonsDxe/ButtonsDxe.efi + SECTION UI = "ButtonsDxe" + } + + FILE DRIVER = 5af77f10-90df-4e7e-8325-a17ec09d5443 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/UsbMsdDxe/UsbMsdDxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/UsbMsdDxe/UsbMsdDxe.efi + SECTION UI = "UsbMsdDxe" + } + + FILE DRIVER = 0d35cd8e-97ea-4f9a-96af-0f0d89f76567 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/UFSDxe/UFSDxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/UFSDxe/UFSDxe.efi + SECTION UI = "UFSDxe" + } + + + # + # GPIO + # + + # + # Virtual Keyboard + # + INF EmbeddedPkg/Drivers/VirtualKeyboardDxe/VirtualKeyboardDxe.inf + + INF sdm845Pkg/Drivers/sdm845Dxe/sdm845Dxe.inf + INF sdm845Pkg/Drivers/SimpleFbDxe/SimpleFbDxe.inf + + + + + + # + # USB Host Support + # + INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf + + # + # USB Mass Storage Support + # + INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf + + # + # USB Peripheral Support + # + INF EmbeddedPkg/Drivers/AndroidFastbootTransportUsbDxe/FastbootTransportUsbDxe.inf + + # + # Fastboot + # + INF EmbeddedPkg/Application/AndroidFastboot/AndroidFastbootApp.inf + + # + # FAT filesystem + GPT/MBR partitioning + # + INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf + INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf + INF FatPkg/EnhancedFatDxe/Fat.inf + INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf + + INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf + + INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf + + # + # ACPI Support + # + INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf + INF MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf + INF MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf + # INF RuleOverride = ACPITABLE sdm845Pkg/AcpiTables/AcpiTables.inf + + FILE FREEFORM = 7E374E25-8E01-4FEE-87F2-390C23C606CD { + + + SECTION RAW = sdm845Pkg/AcpiTables/testing/DBG2.aml + SECTION RAW = sdm845Pkg/AcpiTables/845/DSDT.aml + SECTION RAW = sdm845Pkg/AcpiTables/testing/CSRT.aml + SECTION RAW = sdm845Pkg/AcpiTables/testing/FADT.aml + SECTION RAW = sdm845Pkg/AcpiTables/testing/FACS.aml + SECTION RAW = sdm845Pkg/AcpiTables/testing/GTDT.aml + SECTION RAW = sdm845Pkg/AcpiTables/testing/IORT.aml + SECTION RAW = sdm845Pkg/AcpiTables/testing/MCFG.aml + SECTION RAW = sdm845Pkg/AcpiTables/testing/MADT.aml + SECTION RAW = sdm845Pkg/AcpiTables/testing/PPTT.aml + SECTION RAW = sdm845Pkg/AcpiTables/testing/TPM2.aml + SECTION UI = "AcpiTables" + } + + # + # SMBIOS Support + # + INF sdm845Pkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf + INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf + + # + # UEFI applications + # + INF ShellPkg/Application/Shell/Shell.inf +!ifdef $(INCLUDE_TFTP_COMMAND) + INF ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf +!endif #$(INCLUDE_TFTP_COMMAND) + + # + # Bds + # + INF MdeModulePkg/Universal/PrintDxe/PrintDxe.inf + INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf + INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf + INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf + INF MdeModulePkg/Universal/DriverHealthManagerDxe/DriverHealthManagerDxe.inf + INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf + INF MdeModulePkg/Application/UiApp/UiApp.inf + INF sdm845Pkg/Drivers/LogoDxe/LogoDxe.inf + +[FV.FVMAIN_COMPACT] +FvAlignment = 8 +ERASE_POLARITY = 1 +MEMORY_MAPPED = TRUE +STICKY_WRITE = TRUE +LOCK_CAP = TRUE +LOCK_STATUS = TRUE +WRITE_DISABLED_CAP = TRUE +WRITE_ENABLED_CAP = TRUE +WRITE_STATUS = TRUE +WRITE_LOCK_CAP = TRUE +WRITE_LOCK_STATUS = TRUE +READ_DISABLED_CAP = TRUE +READ_ENABLED_CAP = TRUE +READ_STATUS = TRUE +READ_LOCK_CAP = TRUE +READ_LOCK_STATUS = TRUE + + INF ArmPlatformPkg/PrePi/PeiUniCore.inf + + FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 { + SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE { + SECTION FV_IMAGE = FVMAIN + } + } + +!include sdm845Pkg/CommonFdf.fdf.inc + + diff --git a/sdm845Pkg/beryllium.dsc b/sdm845Pkg/Devices/beryllium.dsc similarity index 92% rename from sdm845Pkg/beryllium.dsc rename to sdm845Pkg/Devices/beryllium.dsc index 55659c7..534da82 100755 --- a/sdm845Pkg/beryllium.dsc +++ b/sdm845Pkg/Devices/beryllium.dsc @@ -1,26 +1,26 @@ -[Defines] - PLATFORM_NAME = sdm845Pkg - PLATFORM_GUID = 28f1a3bf-193a-47e3-a7b9-5a435eaab2ee - PLATFORM_VERSION = 0.1 - DSC_SPECIFICATION = 0x00010019 - OUTPUT_DIRECTORY = Build/$(PLATFORM_NAME) - SUPPORTED_ARCHITECTURES = AARCH64 - BUILD_TARGETS = DEBUG|RELEASE - SKUID_IDENTIFIER = DEFAULT - FLASH_DEFINITION = sdm845Pkg/beryllium.fdf - -!include sdm845Pkg/sdm845Pkg.dsc - -[PcdsFixedAtBuild.common] - # System Memory (5GB) - gArmTokenSpaceGuid.PcdSystemMemorySize|0x140000000 - - gsdm845PkgTokenSpaceGuid.PcdMipiFrameBufferAddress|0x9D469780 - gsdm845PkgTokenSpaceGuid.PcdMipiFrameBufferWidth|1080 - gsdm845PkgTokenSpaceGuid.PcdMipiFrameBufferHeight|2140 - - #uncomment section underneath and comment out the above section to use full display, including the notch - #gsdm845PkgTokenSpaceGuid.PcdMipiFrameBufferPixelBpp|32|UINT32|0x0000a403 - #gsdm845PkgTokenSpaceGuid.PcdMipiFrameBufferVisibleWidth|1080|UINT32|0x0000a404 - #gsdm845PkgTokenSpaceGuid.PcdMipiFrameBufferVisibleHeight|2234|UINT32|0x0000a405 - +[Defines] + PLATFORM_NAME = sdm845Pkg + PLATFORM_GUID = 28f1a3bf-193a-47e3-a7b9-5a435eaab2ee + PLATFORM_VERSION = 0.1 + DSC_SPECIFICATION = 0x00010019 + OUTPUT_DIRECTORY = Build/$(PLATFORM_NAME) + SUPPORTED_ARCHITECTURES = AARCH64 + BUILD_TARGETS = DEBUG|RELEASE + SKUID_IDENTIFIER = DEFAULT + FLASH_DEFINITION = sdm845Pkg/Devices/845.fdf + +!include sdm845Pkg/sdm845Pkg.dsc + +[PcdsFixedAtBuild.common] + # System Memory (5GB) + gArmTokenSpaceGuid.PcdSystemMemorySize|0x140000000 + + gsdm845PkgTokenSpaceGuid.PcdMipiFrameBufferAddress|0x9D469780 + gsdm845PkgTokenSpaceGuid.PcdMipiFrameBufferWidth|1080 + gsdm845PkgTokenSpaceGuid.PcdMipiFrameBufferHeight|2140 + + #uncomment section underneath and comment out the above section to use full display, including the notch + #gsdm845PkgTokenSpaceGuid.PcdMipiFrameBufferPixelBpp|32|UINT32|0x0000a403 + #gsdm845PkgTokenSpaceGuid.PcdMipiFrameBufferVisibleWidth|1080|UINT32|0x0000a404 + #gsdm845PkgTokenSpaceGuid.PcdMipiFrameBufferVisibleHeight|2234|UINT32|0x0000a405 + diff --git a/sdm845Pkg/Devices/beryllium.fdf b/sdm845Pkg/Devices/beryllium.fdf new file mode 100644 index 0000000..c55876f --- /dev/null +++ b/sdm845Pkg/Devices/beryllium.fdf @@ -0,0 +1,612 @@ +# +# Copyright (c) 2018, Linaro Limited. All rights reserved. +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# + +################################################################################ +# +# FD Section +# The [FD] Section is made up of the definition statements and a +# description of what goes into the Flash Device Image. Each FD section +# defines one flash "device" image. A flash device image may be one of +# the following: Removable media bootable image (like a boot floppy +# image,) an Option ROM image (that would be "flashed" into an add-in +# card,) a System "Flash" image (that would be burned into a system's +# flash) or an Update ("Capsule") image that will be used to update and +# existing system flash. +# +################################################################################ + +[FD.sdm845Pkg_UEFI] +BaseAddress = 0xd0000000|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in NOR Flash. +Size = 0x00200000|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the FLASH Device +ErasePolarity = 1 + +# This one is tricky, it must be: BlockSize * NumBlocks = Size +BlockSize = 0x00001000 +NumBlocks = 0x200 + +################################################################################ +# +# Following are lists of FD Region layout which correspond to the locations of different +# images within the flash device. +# +# Regions must be defined in ascending order and may not overlap. +# +# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by +# the pipe "|" character, followed by the size of the region, also in hex with the leading +# "0x" characters. Like: +# Offset|Size +# PcdOffsetCName|PcdSizeCName +# RegionType +# +################################################################################ + +# from ArmVirtPkg/ArmVirtQemuKernel.fdf +# +# Implement the Linux kernel header layout so that the loader will identify +# it as something bootable, and execute it with a FDT pointer in x0 or r2. +# +0x00000000|0x00008000 +DATA = { + 0x01, 0x00, 0x00, 0x10, # code0: adr x1, . + 0xff, 0x1f, 0x00, 0x14, # code1: b 0x8000 + 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, # text_offset: 512 KB + 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, # image_size: 2 MB + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, # flags + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, # res2 + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, # res3 + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, # res4 + 0x41, 0x52, 0x4d, 0x64, # magic: "ARM\x64" + 0x00, 0x00, 0x00, 0x00 # res5 +} + +0x00008000|0x001f8000 +gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize +FV = FVMAIN_COMPACT + + +################################################################################ +# +# FV Section +# +# [FV] section is used to define what components or modules are placed within a flash +# device file. This section also defines order the components and modules are positioned +# within the image. The [FV] section consists of define statements, set statements and +# module statements. +# +################################################################################ + +[FV.FvMain] +BlockSize = 0x40 +NumBlocks = 0 # This FV gets compressed so make it just big enough +FvAlignment = 8 # FV alignment and FV attributes setting. +ERASE_POLARITY = 1 +MEMORY_MAPPED = TRUE +STICKY_WRITE = TRUE +LOCK_CAP = TRUE +LOCK_STATUS = TRUE +WRITE_DISABLED_CAP = TRUE +WRITE_ENABLED_CAP = TRUE +WRITE_STATUS = TRUE +WRITE_LOCK_CAP = TRUE +WRITE_LOCK_STATUS = TRUE +READ_DISABLED_CAP = TRUE +READ_ENABLED_CAP = TRUE +READ_STATUS = TRUE +READ_LOCK_CAP = TRUE +READ_LOCK_STATUS = TRUE + + APRIORI DXE { + + + # + # PI DXE Drivers producing Architectural Protocols (EFI Services) + # + INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf + INF MdeModulePkg/Core/Dxe/DxeMain.inf + INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf + INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf + INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf + INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf + INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf + INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf + INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf + INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf + INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf + + # + # FAT filesystem + GPT/MBR partitioning + # + INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf + INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf + INF FatPkg/EnhancedFatDxe/Fat.inf + INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf + INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf + + INF EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf + INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf + INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf + INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf + INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf + INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf + + INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf + INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf + INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf + + + + FILE DRIVER = 9A5163E7-5C29-453F-825C-837A46A81E15 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/SerialDxe/SerialDxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/SerialDxe/SerialDxe.efi + SECTION UI = "SerialDxe" + } + + FILE DRIVER = f541d663-4a48-40aa-aabf-ff158ccae34c { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/SmemDxe/SmemDxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/SmemDxe/SmemDxe.efi + SECTION UI = "SmemDxe" + } + + FILE DRIVER = 8E9BD160-B184-11DF-94E2-0800200C9A66 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/DALSys/DALSys.depex + SECTION PE32 = sdm845Pkg/Binary/845/DALSys/DALSys.efi + SECTION UI = "DALSys" + } + + FILE DRIVER = 8681CC5A-0DF6-441E-B4B8-E915C538F067 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/HWIODxeDriver/HWIODxeDriver.depex + SECTION PE32 = sdm845Pkg/Binary/845/HWIODxeDriver/HWIODxeDriver.efi + SECTION UI = "HWIODxeDriver" + } + + FILE DRIVER = 10e193df-9966-44e7-b17c-59dd831e20fc { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/ChipInfo/ChipInfo.depex + SECTION PE32 = sdm845Pkg/Binary/845/ChipInfo/ChipInfo.efi + SECTION UI = "ChipInfo" + } + + FILE DRIVER = B105211B-BBBD-4ADD-A3B0-D1CF4A52154C { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/PlatformInfoDxeDriver/PlatformInfoDxeDriver.depex + SECTION PE32 = sdm845Pkg/Binary/845/PlatformInfoDxeDriver/PlatformInfoDxeDriver.efi + SECTION UI = "PlatformInfoDxeDriver" + } + + FILE DRIVER = 9A00771F-36D4-4DD5-8916-C48ED9B16B86 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/HALIOMMU/HALIOMMU.depex + SECTION PE32 = sdm845Pkg/Binary/845/HALIOMMU/HALIOMMU.efi + SECTION UI = "HALIOMMU" + } + + FILE DRIVER = E43128A8-8692-42B6-8AFA-676158578D18 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/ULogDxe/ULogDxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/ULogDxe/ULogDxe.efi + SECTION UI = "ULogDxe" + } + + FILE DRIVER = ABA01FF8-2CCB-4E12-8B2E-CD3F4A742993 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/CmdDbDxe/CmdDbDxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/CmdDbDxe/CmdDbDxe.efi + SECTION UI = "CmdDbDxe" + } + + FILE DRIVER = CB29F4D1-7F37-4692-A416-93E82E219711 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/NpaDxe/NpaDxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/NpaDxe/NpaDxe.efi + SECTION UI = "NpaDxe" + } + + FILE DRIVER = CB29F4D1-7F37-4692-A416-93E82E219766 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/RpmhDxe/RpmhDxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/RpmhDxe/RpmhDxe.efi + SECTION UI = "RpmhDxe" + } + + FILE DRIVER = B43C22DB-6333-490C-872D-0A73439059FD { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/PdcDxe/PdcDxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/PdcDxe/PdcDxe.efi + SECTION UI = "PdcDxe" + } + + FILE DRIVER = 4DB5DEA6-5302-4D1A-8A82-677A683B0D29 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/ClockDxe/ClockDxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/ClockDxe/ClockDxe.efi + SECTION UI = "ClockDxe" + } + + FILE DRIVER = 1B52138D-3FA3-4E50-B958-20887353F809 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/CPRDxe/CPRDxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/CPRDxe/CPRDxe.efi + SECTION UI = "CPRDxe" + } + + FILE DRIVER = AF9763A2-033B-4109-8E17-56A98D380C92 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/DALTLMM/DALTLMM.depex + SECTION PE32 = sdm845Pkg/Binary/845/DALTLMM/DALTLMM.efi + SECTION UI = "DALTLMM" + } + + FILE DRIVER = 04DE8591-D2B3-4077-BBBE-B12070094EB6 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/I2C/I2C.depex + SECTION PE32 = sdm845Pkg/Binary/845/I2C/I2C.efi + SECTION UI = "I2C" + } + + FILE DRIVER = 2a7b4bef-80cd-49e1-b473-374ba4d673fc { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/SPMI/SPMI.depex + SECTION PE32 = sdm845Pkg/Binary/845/SPMI/SPMI.efi + SECTION UI = "SPMI" + } + + FILE DRIVER = 5776232e-082d-4b75-9a0e-fe1d13f7a5d9 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/PmicDxe/PmicDxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/PmicDxe/PmicDxe.efi + SECTION UI = "PmicDxe" + } + + FILE DRIVER = 11faed4c-b21f-4d88-8e48-c4c28a1e50df { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/UsbPwrCtrlDxe/UsbPwrCtrlDxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/UsbPwrCtrlDxe/UsbPwrCtrlDxe.efi + SECTION UI = "UsbPwrCtrlDxe" + } + + FILE DRIVER = 94f8a6a7-dc34-4101-88c1-99179cceae83 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/UsbfnDwc3Dxe/UsbfnDwc3Dxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/UsbfnDwc3Dxe/UsbfnDwc3Dxe.efi + SECTION UI = "UsbfnDwc3Dxe" + } + + FILE DRIVER = cd823a4d-7dec-4531-ae5d-4134fa4127b8 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/UsbConfigDxe/UsbConfigDxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/UsbConfigDxe/UsbConfigDxe.efi + SECTION UI = "UsbConfigDxe" + } + + FILE DRIVER = 0A134F0E-075E-40B3-9C63-3B3906804663 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/UsbInitDxe/UsbInitDxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/UsbInitDxe/UsbInitDxe.efi + SECTION UI = "UsbInitDxe" + } + + FILE DRIVER = 3299a266-15f0-4346-8318-716336736d3e { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/UsbDeviceDxe/UsbDeviceDxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/UsbDeviceDxe/UsbDeviceDxe.efi + SECTION UI = "UsbDeviceDxe" + } + + FILE DRIVER = 5bd181db-0487-4f1a-ae73-820e165611b3 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/ButtonsDxe/ButtonsDxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/ButtonsDxe/ButtonsDxe.efi + SECTION UI = "ButtonsDxe" + } + + + INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf + +} + + INF MdeModulePkg/Core/Dxe/DxeMain.inf + + + # + # PI DXE Drivers producing Architectural Protocols (EFI Services) + # + INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf + INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf + INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf + INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf + INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf + INF EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf + INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf + INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf + INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf + + + + # + # Multiple Console IO support + # + INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf + INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf + INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf + INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf + + + INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf + INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf + + INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf + + FILE DRIVER = 9A5163E7-5C29-453F-825C-837A46A81E15 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/SerialDxe/SerialDxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/SerialDxe/SerialDxe.efi + SECTION UI = "SerialDxe" + } + + FILE DRIVER = f541d663-4a48-40aa-aabf-ff158ccae34c { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/SmemDxe/SmemDxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/SmemDxe/SmemDxe.efi + SECTION UI = "SmemDxe" + } + + FILE DRIVER = 8E9BD160-B184-11DF-94E2-0800200C9A66 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/DALSys/DALSys.depex + SECTION PE32 = sdm845Pkg/Binary/845/DALSys/DALSys.efi + SECTION UI = "DALSys" + } + + FILE DRIVER = 8681CC5A-0DF6-441E-B4B8-E915C538F067 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/HWIODxeDriver/HWIODxeDriver.depex + SECTION PE32 = sdm845Pkg/Binary/845/HWIODxeDriver/HWIODxeDriver.efi + SECTION UI = "HWIODxeDriver" + } + + FILE DRIVER = 10e193df-9966-44e7-b17c-59dd831e20fc { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/ChipInfo/ChipInfo.depex + SECTION PE32 = sdm845Pkg/Binary/845/ChipInfo/ChipInfo.efi + SECTION UI = "ChipInfo" + } + + FILE DRIVER = B105211B-BBBD-4ADD-A3B0-D1CF4A52154C { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/PlatformInfoDxeDriver/PlatformInfoDxeDriver.depex + SECTION PE32 = sdm845Pkg/Binary/845/PlatformInfoDxeDriver/PlatformInfoDxeDriver.efi + SECTION UI = "PlatformInfoDxeDriver" + } + + FILE DRIVER = 9A00771F-36D4-4DD5-8916-C48ED9B16B86 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/HALIOMMU/HALIOMMU.depex + SECTION PE32 = sdm845Pkg/Binary/845/HALIOMMU/HALIOMMU.efi + SECTION UI = "HALIOMMU" + } + + FILE DRIVER = E43128A8-8692-42B6-8AFA-676158578D18 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/ULogDxe/ULogDxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/ULogDxe/ULogDxe.efi + SECTION UI = "ULogDxe" + } + + FILE DRIVER = ABA01FF8-2CCB-4E12-8B2E-CD3F4A742993 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/CmdDbDxe/CmdDbDxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/CmdDbDxe/CmdDbDxe.efi + SECTION UI = "CmdDbDxe" + } + + FILE DRIVER = CB29F4D1-7F37-4692-A416-93E82E219711 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/NpaDxe/NpaDxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/NpaDxe/NpaDxe.efi + SECTION UI = "NpaDxe" + } + + FILE DRIVER = CB29F4D1-7F37-4692-A416-93E82E219766 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/RpmhDxe/RpmhDxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/RpmhDxe/RpmhDxe.efi + SECTION UI = "RpmhDxe" + } + + FILE DRIVER = B43C22DB-6333-490C-872D-0A73439059FD { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/PdcDxe/PdcDxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/PdcDxe/PdcDxe.efi + SECTION UI = "PdcDxe" + } + + FILE DRIVER = 4DB5DEA6-5302-4D1A-8A82-677A683B0D29 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/ClockDxe/ClockDxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/ClockDxe/ClockDxe.efi + SECTION UI = "ClockDxe" + } + + FILE DRIVER = 1B52138D-3FA3-4E50-B958-20887353F809 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/CPRDxe/CPRDxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/CPRDxe/CPRDxe.efi + SECTION UI = "CPRDxe" + } + + FILE DRIVER = AF9763A2-033B-4109-8E17-56A98D380C92 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/DALTLMM/DALTLMM.depex + SECTION PE32 = sdm845Pkg/Binary/845/DALTLMM/DALTLMM.efi + SECTION UI = "DALTLMM" + } + + FILE DRIVER = 04DE8591-D2B3-4077-BBBE-B12070094EB6 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/I2C/I2C.depex + SECTION PE32 = sdm845Pkg/Binary/845/I2C/I2C.efi + SECTION UI = "I2C" + } + + FILE DRIVER = 2a7b4bef-80cd-49e1-b473-374ba4d673fc { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/SPMI/SPMI.depex + SECTION PE32 = sdm845Pkg/Binary/845/SPMI/SPMI.efi + SECTION UI = "SPMI" + } + + FILE DRIVER = 5776232e-082d-4b75-9a0e-fe1d13f7a5d9 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/PmicDxe/PmicDxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/PmicDxe/PmicDxe.efi + SECTION UI = "PmicDxe" + } + + FILE DRIVER = 11faed4c-b21f-4d88-8e48-c4c28a1e50df { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/UsbPwrCtrlDxe/UsbPwrCtrlDxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/UsbPwrCtrlDxe/UsbPwrCtrlDxe.efi + SECTION UI = "UsbPwrCtrlDxe" + } + + FILE DRIVER = 94f8a6a7-dc34-4101-88c1-99179cceae83 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/UsbfnDwc3Dxe/UsbfnDwc3Dxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/UsbfnDwc3Dxe/UsbfnDwc3Dxe.efi + SECTION UI = "UsbfnDwc3Dxe" + } + + FILE DRIVER = cd823a4d-7dec-4531-ae5d-4134fa4127b8 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/UsbConfigDxe/UsbConfigDxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/UsbConfigDxe/UsbConfigDxe.efi + SECTION UI = "UsbConfigDxe" + } + + FILE DRIVER = 0A134F0E-075E-40B3-9C63-3B3906804663 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/UsbInitDxe/UsbInitDxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/UsbInitDxe/UsbInitDxe.efi + SECTION UI = "UsbInitDxe" + } + + FILE DRIVER = 3299a266-15f0-4346-8318-716336736d3e { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/UsbDeviceDxe/UsbDeviceDxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/UsbDeviceDxe/UsbDeviceDxe.efi + SECTION UI = "UsbDeviceDxe" + } + + FILE DRIVER = 5bd181db-0487-4f1a-ae73-820e165611b3 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/ButtonsDxe/ButtonsDxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/ButtonsDxe/ButtonsDxe.efi + SECTION UI = "ButtonsDxe" + } + + FILE DRIVER = 5af77f10-90df-4e7e-8325-a17ec09d5443 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/UsbMsdDxe/UsbMsdDxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/UsbMsdDxe/UsbMsdDxe.efi + SECTION UI = "UsbMsdDxe" + } + + FILE DRIVER = 0d35cd8e-97ea-4f9a-96af-0f0d89f76567 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/845/UFSDxe/UFSDxe.depex + SECTION PE32 = sdm845Pkg/Binary/845/UFSDxe/UFSDxe.efi + SECTION UI = "UFSDxe" + } + + + # + # GPIO + # + + # + # Virtual Keyboard + # + INF EmbeddedPkg/Drivers/VirtualKeyboardDxe/VirtualKeyboardDxe.inf + + INF sdm845Pkg/Drivers/sdm845Dxe/sdm845Dxe.inf + INF sdm845Pkg/Drivers/SimpleFbDxe/SimpleFbDxe.inf + + + + + + # + # USB Host Support + # + INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf + + # + # USB Mass Storage Support + # + INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf + + # + # USB Peripheral Support + # + INF EmbeddedPkg/Drivers/AndroidFastbootTransportUsbDxe/FastbootTransportUsbDxe.inf + + # + # Fastboot + # + INF EmbeddedPkg/Application/AndroidFastboot/AndroidFastbootApp.inf + + # + # FAT filesystem + GPT/MBR partitioning + # + INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf + INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf + INF FatPkg/EnhancedFatDxe/Fat.inf + INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf + + INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf + + INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf + + # + # ACPI Support + # + INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf + INF MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf + INF MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf + # INF RuleOverride = ACPITABLE sdm845Pkg/AcpiTables/AcpiTables.inf + + FILE FREEFORM = 7E374E25-8E01-4FEE-87F2-390C23C606CD { + + + SECTION RAW = sdm845Pkg/AcpiTables/testing/DBG2.aml + SECTION RAW = sdm845Pkg/AcpiTables/845/DSDT.aml + SECTION RAW = sdm845Pkg/AcpiTables/testing/CSRT.aml + SECTION RAW = sdm845Pkg/AcpiTables/testing/FADT.aml + SECTION RAW = sdm845Pkg/AcpiTables/testing/FACS.aml + SECTION RAW = sdm845Pkg/AcpiTables/testing/GTDT.aml + SECTION RAW = sdm845Pkg/AcpiTables/testing/IORT.aml + SECTION RAW = sdm845Pkg/AcpiTables/testing/MCFG.aml + SECTION RAW = sdm845Pkg/AcpiTables/testing/MADT.aml + SECTION RAW = sdm845Pkg/AcpiTables/testing/PPTT.aml + SECTION RAW = sdm845Pkg/AcpiTables/testing/TPM2.aml + SECTION UI = "AcpiTables" + } + + # + # SMBIOS Support + # + INF sdm845Pkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf + INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf + + # + # UEFI applications + # + INF ShellPkg/Application/Shell/Shell.inf +!ifdef $(INCLUDE_TFTP_COMMAND) + INF ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf +!endif #$(INCLUDE_TFTP_COMMAND) + + # + # Bds + # + INF MdeModulePkg/Universal/PrintDxe/PrintDxe.inf + INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf + INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf + INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf + INF MdeModulePkg/Universal/DriverHealthManagerDxe/DriverHealthManagerDxe.inf + INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf + INF MdeModulePkg/Application/UiApp/UiApp.inf + INF sdm845Pkg/Drivers/LogoDxe/LogoDxe.inf + +[FV.FVMAIN_COMPACT] +FvAlignment = 8 +ERASE_POLARITY = 1 +MEMORY_MAPPED = TRUE +STICKY_WRITE = TRUE +LOCK_CAP = TRUE +LOCK_STATUS = TRUE +WRITE_DISABLED_CAP = TRUE +WRITE_ENABLED_CAP = TRUE +WRITE_STATUS = TRUE +WRITE_LOCK_CAP = TRUE +WRITE_LOCK_STATUS = TRUE +READ_DISABLED_CAP = TRUE +READ_ENABLED_CAP = TRUE +READ_STATUS = TRUE +READ_LOCK_CAP = TRUE +READ_LOCK_STATUS = TRUE + + INF ArmPlatformPkg/PrePi/PeiUniCore.inf + + FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 { + SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE { + SECTION FV_IMAGE = FVMAIN + } + } + +!include sdm845Pkg/CommonFdf.fdf.inc + + diff --git a/sdm845Pkg/dipper.dsc b/sdm845Pkg/Devices/dipper.dsc similarity index 89% rename from sdm845Pkg/dipper.dsc rename to sdm845Pkg/Devices/dipper.dsc index 4425a17..08b1c2b 100644 --- a/sdm845Pkg/dipper.dsc +++ b/sdm845Pkg/Devices/dipper.dsc @@ -1,19 +1,19 @@ -[Defines] - PLATFORM_NAME = sdm845Pkg - PLATFORM_GUID = 28f1a3bf-193a-47e3-a7b9-5a435eaab2ee - PLATFORM_VERSION = 0.1 - DSC_SPECIFICATION = 0x00010019 - OUTPUT_DIRECTORY = Build/$(PLATFORM_NAME) - SUPPORTED_ARCHITECTURES = AARCH64 - BUILD_TARGETS = DEBUG|RELEASE - SKUID_IDENTIFIER = DEFAULT - FLASH_DEFINITION = sdm845Pkg/dipper.fdf - -!include sdm845Pkg/sdm845Pkg.dsc - -[PcdsFixedAtBuild.common] - # System Memory (5GB) - gArmTokenSpaceGuid.PcdSystemMemorySize|0x140000000 - - gsdm845PkgTokenSpaceGuid.PcdMipiFrameBufferWidth|1080 - gsdm845PkgTokenSpaceGuid.PcdMipiFrameBufferHeight|2248 +[Defines] + PLATFORM_NAME = sdm845Pkg + PLATFORM_GUID = 28f1a3bf-193a-47e3-a7b9-5a435eaab2ee + PLATFORM_VERSION = 0.1 + DSC_SPECIFICATION = 0x00010019 + OUTPUT_DIRECTORY = Build/$(PLATFORM_NAME) + SUPPORTED_ARCHITECTURES = AARCH64 + BUILD_TARGETS = DEBUG|RELEASE + SKUID_IDENTIFIER = DEFAULT + FLASH_DEFINITION = sdm845Pkg/Devices/845.fdf + +!include sdm845Pkg/sdm845Pkg.dsc + +[PcdsFixedAtBuild.common] + # System Memory (5GB) + gArmTokenSpaceGuid.PcdSystemMemorySize|0x140000000 + + gsdm845PkgTokenSpaceGuid.PcdMipiFrameBufferWidth|1080 + gsdm845PkgTokenSpaceGuid.PcdMipiFrameBufferHeight|2248 diff --git a/sdm845Pkg/dipper.fdf b/sdm845Pkg/Devices/dipper.fdf similarity index 96% rename from sdm845Pkg/dipper.fdf rename to sdm845Pkg/Devices/dipper.fdf index c134763..f3db33c 100644 --- a/sdm845Pkg/dipper.fdf +++ b/sdm845Pkg/Devices/dipper.fdf @@ -1,343 +1,343 @@ -# -# Copyright (c) 2018, Linaro Limited. All rights reserved. -# -# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# - -################################################################################ -# -# FD Section -# The [FD] Section is made up of the definition statements and a -# description of what goes into the Flash Device Image. Each FD section -# defines one flash "device" image. A flash device image may be one of -# the following: Removable media bootable image (like a boot floppy -# image,) an Option ROM image (that would be "flashed" into an add-in -# card,) a System "Flash" image (that would be burned into a system's -# flash) or an Update ("Capsule") image that will be used to update and -# existing system flash. -# -################################################################################ - -[FD.sdm845Pkg_UEFI] -BaseAddress = 0xd0000000|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in NOR Flash. -Size = 0x00200000|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the FLASH Device -ErasePolarity = 1 - -# This one is tricky, it must be: BlockSize * NumBlocks = Size -BlockSize = 0x00001000 -NumBlocks = 0x200 - -################################################################################ -# -# Following are lists of FD Region layout which correspond to the locations of different -# images within the flash device. -# -# Regions must be defined in ascending order and may not overlap. -# -# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by -# the pipe "|" character, followed by the size of the region, also in hex with the leading -# "0x" characters. Like: -# Offset|Size -# PcdOffsetCName|PcdSizeCName -# RegionType -# -################################################################################ - -# from ArmVirtPkg/ArmVirtQemuKernel.fdf -# -# Implement the Linux kernel header layout so that the loader will identify -# it as something bootable, and execute it with a FDT pointer in x0 or r2. -# -0x00000000|0x00008000 -DATA = { - 0x01, 0x00, 0x00, 0x10, # code0: adr x1, . - 0xff, 0x1f, 0x00, 0x14, # code1: b 0x8000 - 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, # text_offset: 512 KB - 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, # image_size: 2 MB - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, # flags - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, # res2 - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, # res3 - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, # res4 - 0x41, 0x52, 0x4d, 0x64, # magic: "ARM\x64" - 0x00, 0x00, 0x00, 0x00 # res5 -} - -0x00008000|0x001f8000 -gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize -FV = FVMAIN_COMPACT - - -################################################################################ -# -# FV Section -# -# [FV] section is used to define what components or modules are placed within a flash -# device file. This section also defines order the components and modules are positioned -# within the image. The [FV] section consists of define statements, set statements and -# module statements. -# -################################################################################ - -[FV.FvMain] -BlockSize = 0x40 -NumBlocks = 0 # This FV gets compressed so make it just big enough -FvAlignment = 8 # FV alignment and FV attributes setting. -ERASE_POLARITY = 1 -MEMORY_MAPPED = TRUE -STICKY_WRITE = TRUE -LOCK_CAP = TRUE -LOCK_STATUS = TRUE -WRITE_DISABLED_CAP = TRUE -WRITE_ENABLED_CAP = TRUE -WRITE_STATUS = TRUE -WRITE_LOCK_CAP = TRUE -WRITE_LOCK_STATUS = TRUE -READ_DISABLED_CAP = TRUE -READ_ENABLED_CAP = TRUE -READ_STATUS = TRUE -READ_LOCK_CAP = TRUE -READ_LOCK_STATUS = TRUE - - APRIORI DXE { - INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf - } - - INF MdeModulePkg/Core/Dxe/DxeMain.inf - - # - # PI DXE Drivers producing Architectural Protocols (EFI Services) - # - INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf - INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf - INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf - INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf - INF EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf - INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf - INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf - INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf - - FILE DRIVER = af9763a2-033b-4109-8e17-56a98d380c92 { - SECTION DXE_DEPEX = sdm845Pkg/Binary/dipper/HWIODxeDriver/HWIODxeDriver.depex - SECTION PE32 = sdm845Pkg/Binary/dipper/HWIODxeDriver/HWIODxeDriver.efi - SECTION UI = "HWIODxeDriver" - } - - FILE DRIVER = 5776232e-082d-4b75-9a0e-fe1d13f7a5d9 { - SECTION DXE_DEPEX = sdm845Pkg/Binary/dipper/PmicDxe/PmicDxe.depex - SECTION PE32 = sdm845Pkg/Binary/dipper/PmicDxe/PmicDxe.efi - SECTION UI = "PmicDxe" - } - - FILE DRIVER = 5bd181db-0487-4f1a-ae73-820e165611b3 { - SECTION DXE_DEPEX = sdm845Pkg/Binary/dipper/ButtonsDxe/ButtonsDxe.depex - SECTION PE32 = sdm845Pkg/Binary/dipper/ButtonsDxe/ButtonsDxe.efi - SECTION UI = "ButtonsDxe" - } - - # - # Multiple Console IO support - # - INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf - INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf - INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf - INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf - INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf - - INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf - INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf - - INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf - - INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf - - FILE DRIVER = 3299a266-15f0-4346-8318-716336736d3e { - SECTION DXE_DEPEX = sdm845Pkg/Binary/dipper/UsbDeviceDxe/UsbDeviceDxe.depex - SECTION PE32 = sdm845Pkg/Binary/dipper/UsbDeviceDxe/UsbDeviceDxe.efi - SECTION UI = "UsbDeviceDxe" - } - - FILE DRIVER = 11faed4c-b21f-4d88-8e48-c4c28a1e50df { - SECTION DXE_DEPEX = sdm845Pkg/Binary/dipper/UsbPwrCtrlDxe/UsbPwrCtrlDxe.depex - SECTION PE32 = sdm845Pkg/Binary/dipper/UsbPwrCtrlDxe/UsbPwrCtrlDxe.efi - SECTION UI = "UsbPwrCtrlDxe" - } - - FILE DRIVER = 5af77f10-90df-4e7e-8325-a17ec09d5443 { - SECTION DXE_DEPEX = sdm845Pkg/Binary/dipper/UsbMsdDxe/UsbMsdDxe.depex - SECTION PE32 = sdm845Pkg/Binary/dipper/UsbMsdDxe/UsbMsdDxe.efi - SECTION UI = "UsbMsdDxe" - } - - FILE DRIVER = 94f8a6a7-dc34-4101-88c1-99179cceae83 { - SECTION DXE_DEPEX = sdm845Pkg/Binary/dipper/UsbfnDwc3Dxe/UsbfnDwc3Dxe.depex - SECTION PE32 = sdm845Pkg/Binary/dipper/UsbfnDwc3Dxe/UsbfnDwc3Dxe.efi - SECTION UI = "UsbfnDwc3Dxe" - } - - FILE DRIVER = cd823a4d-7dec-4531-ae5d-4134fa4127b8 { - SECTION DXE_DEPEX = sdm845Pkg/Binary/dipper/UsbConfigDxe/UsbConfigDxe.depex - SECTION PE32 = sdm845Pkg/Binary/dipper/UsbConfigDxe/UsbConfigDxe.efi - SECTION UI = "UsbDeviceDxe" - } - - # - # GPIO - # - - # - # Virtual Keyboard - # - INF EmbeddedPkg/Drivers/VirtualKeyboardDxe/VirtualKeyboardDxe.inf - - INF sdm845Pkg/sdm845Dxe/sdm845Dxe.inf - INF sdm845Pkg/SimpleFbDxe/SimpleFbDxe.inf - - FILE DRIVER = 0d35cd8e-97ea-4f9a-96af-0f0d89f76567 { - SECTION DXE_DEPEX = sdm845Pkg/Binary/dipper/UFSDxe/UFSDxe.depex - SECTION PE32 = sdm845Pkg/Binary/dipper/UFSDxe/UFSDxe.efi - SECTION UI = "UFSDxe" - } - FILE DRIVER = 2a7b4bef-80cd-49e1-b473-374ba4d673fc { - SECTION DXE_DEPEX = sdm845Pkg/Binary/dipper/SPMI/SPMI.depex - SECTION PE32 = sdm845Pkg/Binary/dipper/SPMI/SPMI.efi - SECTION UI = "SPMI" - } - - FILE DRIVER = f541d663-4a48-40aa-aabf-ff158ccae34c { - SECTION DXE_DEPEX = sdm845Pkg/Binary/dipper/SmemDxe/SmemDxe.depex - SECTION PE32 = sdm845Pkg/Binary/dipper/SmemDxe/SmemDxe.efi - SECTION UI = "SmemDxe" - } - - FILE DRIVER = 10e193df-9966-44e7-b17c-59dd831e20fc { - SECTION DXE_DEPEX = sdm845Pkg/Binary/dipper/ChipInfo/ChipInfo.depex - SECTION PE32 = sdm845Pkg/Binary/dipper/ChipInfo/ChipInfo.efi - SECTION UI = "ChipInfo" - } - - FILE DRIVER = 7a32bd23-f735-4f57-aa1a-447d2fe3be0d { - SECTION DXE_DEPEX = sdm845Pkg/Binary/dipper/SPI/SPI.depex - SECTION PE32 = sdm845Pkg/Binary/dipper/SPI/SPI.efi - SECTION UI = "SPI" - } - - - # - # USB Host Support - # - INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf - - # - # USB Mass Storage Support - # - INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf - - # - # USB Peripheral Support - # - INF EmbeddedPkg/Drivers/AndroidFastbootTransportUsbDxe/FastbootTransportUsbDxe.inf - - # - # Fastboot - # - INF EmbeddedPkg/Application/AndroidFastboot/AndroidFastbootApp.inf - - # - # FAT filesystem + GPT/MBR partitioning - # - INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf - INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf - INF FatPkg/EnhancedFatDxe/Fat.inf - INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf - - INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf - - INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf - - # - # ACPI Support - # - INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf - INF MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf - INF MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf - # INF RuleOverride = ACPITABLE sdm845Pkg/AcpiTables/AcpiTables.inf - - FILE FREEFORM = 7E374E25-8E01-4FEE-87F2-390C23C606CD { - # SECTION RAW = sdm845Pkg/AcpiTables/minimal/DBG2.aml - # SECTION RAW = sdm845Pkg/AcpiTables/minimal/DSDT.aml - # SECTION RAW = sdm845Pkg/AcpiTables/minimal/FACP.aml - # SECTION RAW = sdm845Pkg/AcpiTables/minimal/GTDT.aml - # SECTION RAW = sdm845Pkg/AcpiTables/minimal/APIC.aml - SECTION RAW = sdm845Pkg/AcpiTables/testing/DBG2.aml - SECTION RAW = sdm845Pkg/AcpiTables/testing/DSDT.aml - SECTION RAW = sdm845Pkg/AcpiTables/testing/CSRT.aml - SECTION RAW = sdm845Pkg/AcpiTables/testing/FADT.aml - SECTION RAW = sdm845Pkg/AcpiTables/testing/FACS.aml - SECTION RAW = sdm845Pkg/AcpiTables/testing/GTDT.aml - SECTION RAW = sdm845Pkg/AcpiTables/testing/IORT.aml - SECTION RAW = sdm845Pkg/AcpiTables/testing/MCFG.aml - SECTION RAW = sdm845Pkg/AcpiTables/testing/MADT.aml - SECTION RAW = sdm845Pkg/AcpiTables/testing/PPTT.aml - SECTION RAW = sdm845Pkg/AcpiTables/testing/TPM2.aml - SECTION UI = "AcpiTables" - } - - # - # SMBIOS Support - # - INF sdm845Pkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf - INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf - - # - # UEFI applications - # - INF ShellPkg/Application/Shell/Shell.inf -!ifdef $(INCLUDE_TFTP_COMMAND) - INF ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf -!endif #$(INCLUDE_TFTP_COMMAND) - - # - # Bds - # - INF MdeModulePkg/Universal/PrintDxe/PrintDxe.inf - INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf - INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf - INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf - INF MdeModulePkg/Universal/DriverHealthManagerDxe/DriverHealthManagerDxe.inf - INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf - INF MdeModulePkg/Application/UiApp/UiApp.inf - INF sdm845Pkg/Drivers/LogoDxe/LogoDxe.inf - -[FV.FVMAIN_COMPACT] -FvAlignment = 8 -ERASE_POLARITY = 1 -MEMORY_MAPPED = TRUE -STICKY_WRITE = TRUE -LOCK_CAP = TRUE -LOCK_STATUS = TRUE -WRITE_DISABLED_CAP = TRUE -WRITE_ENABLED_CAP = TRUE -WRITE_STATUS = TRUE -WRITE_LOCK_CAP = TRUE -WRITE_LOCK_STATUS = TRUE -READ_DISABLED_CAP = TRUE -READ_ENABLED_CAP = TRUE -READ_STATUS = TRUE -READ_LOCK_CAP = TRUE -READ_LOCK_STATUS = TRUE - - INF ArmPlatformPkg/PrePi/PeiUniCore.inf - - FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 { - SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE { - SECTION FV_IMAGE = FVMAIN - } - } - -!include sdm845Pkg/CommonFdf.fdf.inc +# +# Copyright (c) 2018, Linaro Limited. All rights reserved. +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# + +################################################################################ +# +# FD Section +# The [FD] Section is made up of the definition statements and a +# description of what goes into the Flash Device Image. Each FD section +# defines one flash "device" image. A flash device image may be one of +# the following: Removable media bootable image (like a boot floppy +# image,) an Option ROM image (that would be "flashed" into an add-in +# card,) a System "Flash" image (that would be burned into a system's +# flash) or an Update ("Capsule") image that will be used to update and +# existing system flash. +# +################################################################################ + +[FD.sdm845Pkg_UEFI] +BaseAddress = 0xd0000000|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in NOR Flash. +Size = 0x00200000|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the FLASH Device +ErasePolarity = 1 + +# This one is tricky, it must be: BlockSize * NumBlocks = Size +BlockSize = 0x00001000 +NumBlocks = 0x200 + +################################################################################ +# +# Following are lists of FD Region layout which correspond to the locations of different +# images within the flash device. +# +# Regions must be defined in ascending order and may not overlap. +# +# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by +# the pipe "|" character, followed by the size of the region, also in hex with the leading +# "0x" characters. Like: +# Offset|Size +# PcdOffsetCName|PcdSizeCName +# RegionType +# +################################################################################ + +# from ArmVirtPkg/ArmVirtQemuKernel.fdf +# +# Implement the Linux kernel header layout so that the loader will identify +# it as something bootable, and execute it with a FDT pointer in x0 or r2. +# +0x00000000|0x00008000 +DATA = { + 0x01, 0x00, 0x00, 0x10, # code0: adr x1, . + 0xff, 0x1f, 0x00, 0x14, # code1: b 0x8000 + 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, # text_offset: 512 KB + 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, # image_size: 2 MB + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, # flags + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, # res2 + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, # res3 + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, # res4 + 0x41, 0x52, 0x4d, 0x64, # magic: "ARM\x64" + 0x00, 0x00, 0x00, 0x00 # res5 +} + +0x00008000|0x001f8000 +gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize +FV = FVMAIN_COMPACT + + +################################################################################ +# +# FV Section +# +# [FV] section is used to define what components or modules are placed within a flash +# device file. This section also defines order the components and modules are positioned +# within the image. The [FV] section consists of define statements, set statements and +# module statements. +# +################################################################################ + +[FV.FvMain] +BlockSize = 0x40 +NumBlocks = 0 # This FV gets compressed so make it just big enough +FvAlignment = 8 # FV alignment and FV attributes setting. +ERASE_POLARITY = 1 +MEMORY_MAPPED = TRUE +STICKY_WRITE = TRUE +LOCK_CAP = TRUE +LOCK_STATUS = TRUE +WRITE_DISABLED_CAP = TRUE +WRITE_ENABLED_CAP = TRUE +WRITE_STATUS = TRUE +WRITE_LOCK_CAP = TRUE +WRITE_LOCK_STATUS = TRUE +READ_DISABLED_CAP = TRUE +READ_ENABLED_CAP = TRUE +READ_STATUS = TRUE +READ_LOCK_CAP = TRUE +READ_LOCK_STATUS = TRUE + + APRIORI DXE { + INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf + } + + INF MdeModulePkg/Core/Dxe/DxeMain.inf + + # + # PI DXE Drivers producing Architectural Protocols (EFI Services) + # + INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf + INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf + INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf + INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf + INF EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf + INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf + INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf + INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf + + FILE DRIVER = af9763a2-033b-4109-8e17-56a98d380c92 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/dipper/HWIODxeDriver/HWIODxeDriver.depex + SECTION PE32 = sdm845Pkg/Binary/dipper/HWIODxeDriver/HWIODxeDriver.efi + SECTION UI = "HWIODxeDriver" + } + + FILE DRIVER = 5776232e-082d-4b75-9a0e-fe1d13f7a5d9 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/dipper/PmicDxe/PmicDxe.depex + SECTION PE32 = sdm845Pkg/Binary/dipper/PmicDxe/PmicDxe.efi + SECTION UI = "PmicDxe" + } + + FILE DRIVER = 5bd181db-0487-4f1a-ae73-820e165611b3 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/dipper/ButtonsDxe/ButtonsDxe.depex + SECTION PE32 = sdm845Pkg/Binary/dipper/ButtonsDxe/ButtonsDxe.efi + SECTION UI = "ButtonsDxe" + } + + # + # Multiple Console IO support + # + INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf + INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf + INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf + INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf + INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf + + INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf + INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf + + INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf + + INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf + + FILE DRIVER = 3299a266-15f0-4346-8318-716336736d3e { + SECTION DXE_DEPEX = sdm845Pkg/Binary/dipper/UsbDeviceDxe/UsbDeviceDxe.depex + SECTION PE32 = sdm845Pkg/Binary/dipper/UsbDeviceDxe/UsbDeviceDxe.efi + SECTION UI = "UsbDeviceDxe" + } + + FILE DRIVER = 11faed4c-b21f-4d88-8e48-c4c28a1e50df { + SECTION DXE_DEPEX = sdm845Pkg/Binary/dipper/UsbPwrCtrlDxe/UsbPwrCtrlDxe.depex + SECTION PE32 = sdm845Pkg/Binary/dipper/UsbPwrCtrlDxe/UsbPwrCtrlDxe.efi + SECTION UI = "UsbPwrCtrlDxe" + } + + FILE DRIVER = 5af77f10-90df-4e7e-8325-a17ec09d5443 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/dipper/UsbMsdDxe/UsbMsdDxe.depex + SECTION PE32 = sdm845Pkg/Binary/dipper/UsbMsdDxe/UsbMsdDxe.efi + SECTION UI = "UsbMsdDxe" + } + + FILE DRIVER = 94f8a6a7-dc34-4101-88c1-99179cceae83 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/dipper/UsbfnDwc3Dxe/UsbfnDwc3Dxe.depex + SECTION PE32 = sdm845Pkg/Binary/dipper/UsbfnDwc3Dxe/UsbfnDwc3Dxe.efi + SECTION UI = "UsbfnDwc3Dxe" + } + + FILE DRIVER = cd823a4d-7dec-4531-ae5d-4134fa4127b8 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/dipper/UsbConfigDxe/UsbConfigDxe.depex + SECTION PE32 = sdm845Pkg/Binary/dipper/UsbConfigDxe/UsbConfigDxe.efi + SECTION UI = "UsbDeviceDxe" + } + + # + # GPIO + # + + # + # Virtual Keyboard + # + INF EmbeddedPkg/Drivers/VirtualKeyboardDxe/VirtualKeyboardDxe.inf + + INF sdm845Pkg/Drivers/sdm845Dxe/sdm845Dxe.inf + INF sdm845Pkg/Drivers/SimpleFbDxe/SimpleFbDxe.inf + + FILE DRIVER = 0d35cd8e-97ea-4f9a-96af-0f0d89f76567 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/dipper/UFSDxe/UFSDxe.depex + SECTION PE32 = sdm845Pkg/Binary/dipper/UFSDxe/UFSDxe.efi + SECTION UI = "UFSDxe" + } + FILE DRIVER = 2a7b4bef-80cd-49e1-b473-374ba4d673fc { + SECTION DXE_DEPEX = sdm845Pkg/Binary/dipper/SPMI/SPMI.depex + SECTION PE32 = sdm845Pkg/Binary/dipper/SPMI/SPMI.efi + SECTION UI = "SPMI" + } + + FILE DRIVER = f541d663-4a48-40aa-aabf-ff158ccae34c { + SECTION DXE_DEPEX = sdm845Pkg/Binary/dipper/SmemDxe/SmemDxe.depex + SECTION PE32 = sdm845Pkg/Binary/dipper/SmemDxe/SmemDxe.efi + SECTION UI = "SmemDxe" + } + + FILE DRIVER = 10e193df-9966-44e7-b17c-59dd831e20fc { + SECTION DXE_DEPEX = sdm845Pkg/Binary/dipper/ChipInfo/ChipInfo.depex + SECTION PE32 = sdm845Pkg/Binary/dipper/ChipInfo/ChipInfo.efi + SECTION UI = "ChipInfo" + } + + FILE DRIVER = 7a32bd23-f735-4f57-aa1a-447d2fe3be0d { + SECTION DXE_DEPEX = sdm845Pkg/Binary/dipper/SPI/SPI.depex + SECTION PE32 = sdm845Pkg/Binary/dipper/SPI/SPI.efi + SECTION UI = "SPI" + } + + + # + # USB Host Support + # + INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf + + # + # USB Mass Storage Support + # + INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf + + # + # USB Peripheral Support + # + INF EmbeddedPkg/Drivers/AndroidFastbootTransportUsbDxe/FastbootTransportUsbDxe.inf + + # + # Fastboot + # + INF EmbeddedPkg/Application/AndroidFastboot/AndroidFastbootApp.inf + + # + # FAT filesystem + GPT/MBR partitioning + # + INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf + INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf + INF FatPkg/EnhancedFatDxe/Fat.inf + INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf + + INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf + + INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf + + # + # ACPI Support + # + INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf + INF MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf + INF MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf + # INF RuleOverride = ACPITABLE sdm845Pkg/AcpiTables/AcpiTables.inf + + FILE FREEFORM = 7E374E25-8E01-4FEE-87F2-390C23C606CD { + # SECTION RAW = sdm845Pkg/AcpiTables/minimal/DBG2.aml + # SECTION RAW = sdm845Pkg/AcpiTables/minimal/DSDT.aml + # SECTION RAW = sdm845Pkg/AcpiTables/minimal/FACP.aml + # SECTION RAW = sdm845Pkg/AcpiTables/minimal/GTDT.aml + # SECTION RAW = sdm845Pkg/AcpiTables/minimal/APIC.aml + SECTION RAW = sdm845Pkg/AcpiTables/testing/DBG2.aml + SECTION RAW = sdm845Pkg/AcpiTables/testing/DSDT.aml + SECTION RAW = sdm845Pkg/AcpiTables/testing/CSRT.aml + SECTION RAW = sdm845Pkg/AcpiTables/testing/FADT.aml + SECTION RAW = sdm845Pkg/AcpiTables/testing/FACS.aml + SECTION RAW = sdm845Pkg/AcpiTables/testing/GTDT.aml + SECTION RAW = sdm845Pkg/AcpiTables/testing/IORT.aml + SECTION RAW = sdm845Pkg/AcpiTables/testing/MCFG.aml + SECTION RAW = sdm845Pkg/AcpiTables/testing/MADT.aml + SECTION RAW = sdm845Pkg/AcpiTables/testing/PPTT.aml + SECTION RAW = sdm845Pkg/AcpiTables/testing/TPM2.aml + SECTION UI = "AcpiTables" + } + + # + # SMBIOS Support + # + INF sdm845Pkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf + INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf + + # + # UEFI applications + # + INF ShellPkg/Application/Shell/Shell.inf +!ifdef $(INCLUDE_TFTP_COMMAND) + INF ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf +!endif #$(INCLUDE_TFTP_COMMAND) + + # + # Bds + # + INF MdeModulePkg/Universal/PrintDxe/PrintDxe.inf + INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf + INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf + INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf + INF MdeModulePkg/Universal/DriverHealthManagerDxe/DriverHealthManagerDxe.inf + INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf + INF MdeModulePkg/Application/UiApp/UiApp.inf + INF sdm845Pkg/Drivers/LogoDxe/LogoDxe.inf + +[FV.FVMAIN_COMPACT] +FvAlignment = 8 +ERASE_POLARITY = 1 +MEMORY_MAPPED = TRUE +STICKY_WRITE = TRUE +LOCK_CAP = TRUE +LOCK_STATUS = TRUE +WRITE_DISABLED_CAP = TRUE +WRITE_ENABLED_CAP = TRUE +WRITE_STATUS = TRUE +WRITE_LOCK_CAP = TRUE +WRITE_LOCK_STATUS = TRUE +READ_DISABLED_CAP = TRUE +READ_ENABLED_CAP = TRUE +READ_STATUS = TRUE +READ_LOCK_CAP = TRUE +READ_LOCK_STATUS = TRUE + + INF ArmPlatformPkg/PrePi/PeiUniCore.inf + + FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 { + SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE { + SECTION FV_IMAGE = FVMAIN + } + } + +!include sdm845Pkg/CommonFdf.fdf.inc diff --git a/sdm845Pkg/enchilada.dsc b/sdm845Pkg/Devices/enchilada.dsc similarity index 89% rename from sdm845Pkg/enchilada.dsc rename to sdm845Pkg/Devices/enchilada.dsc index a42e735..1cf6a9d 100644 --- a/sdm845Pkg/enchilada.dsc +++ b/sdm845Pkg/Devices/enchilada.dsc @@ -1,19 +1,19 @@ -[Defines] - PLATFORM_NAME = sdm845Pkg - PLATFORM_GUID = 28f1a3bf-193a-47e3-a7b9-5a435eaab2ee - PLATFORM_VERSION = 0.1 - DSC_SPECIFICATION = 0x00010019 - OUTPUT_DIRECTORY = Build/$(PLATFORM_NAME) - SUPPORTED_ARCHITECTURES = AARCH64 - BUILD_TARGETS = DEBUG|RELEASE - SKUID_IDENTIFIER = DEFAULT - FLASH_DEFINITION = sdm845Pkg/enchilada.fdf - -!include sdm845Pkg/sdm845Pkg.dsc - -[PcdsFixedAtBuild.common] - # System Memory (5GB) - gArmTokenSpaceGuid.PcdSystemMemorySize|0x140000000 - - gsdm845PkgTokenSpaceGuid.PcdMipiFrameBufferWidth|1080 - gsdm845PkgTokenSpaceGuid.PcdMipiFrameBufferHeight|2280 +[Defines] + PLATFORM_NAME = sdm845Pkg + PLATFORM_GUID = 28f1a3bf-193a-47e3-a7b9-5a435eaab2ee + PLATFORM_VERSION = 0.1 + DSC_SPECIFICATION = 0x00010019 + OUTPUT_DIRECTORY = Build/$(PLATFORM_NAME) + SUPPORTED_ARCHITECTURES = AARCH64 + BUILD_TARGETS = DEBUG|RELEASE + SKUID_IDENTIFIER = DEFAULT + FLASH_DEFINITION = sdm845Pkg/Devices/845.fdf + +!include sdm845Pkg/sdm845Pkg.dsc + +[PcdsFixedAtBuild.common] + # System Memory (5GB) + gArmTokenSpaceGuid.PcdSystemMemorySize|0x140000000 + + gsdm845PkgTokenSpaceGuid.PcdMipiFrameBufferWidth|1080 + gsdm845PkgTokenSpaceGuid.PcdMipiFrameBufferHeight|2280 diff --git a/sdm845Pkg/enchilada.fdf b/sdm845Pkg/Devices/enchilada.fdf similarity index 96% rename from sdm845Pkg/enchilada.fdf rename to sdm845Pkg/Devices/enchilada.fdf index a0c5fdf..8f36fb6 100644 --- a/sdm845Pkg/enchilada.fdf +++ b/sdm845Pkg/Devices/enchilada.fdf @@ -1,343 +1,343 @@ -# -# Copyright (c) 2018, Linaro Limited. All rights reserved. -# -# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# - -################################################################################ -# -# FD Section -# The [FD] Section is made up of the definition statements and a -# description of what goes into the Flash Device Image. Each FD section -# defines one flash "device" image. A flash device image may be one of -# the following: Removable media bootable image (like a boot floppy -# image,) an Option ROM image (that would be "flashed" into an add-in -# card,) a System "Flash" image (that would be burned into a system's -# flash) or an Update ("Capsule") image that will be used to update and -# existing system flash. -# -################################################################################ - -[FD.sdm845Pkg_UEFI] -BaseAddress = 0xd0000000|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in NOR Flash. -Size = 0x00200000|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the FLASH Device -ErasePolarity = 1 - -# This one is tricky, it must be: BlockSize * NumBlocks = Size -BlockSize = 0x00001000 -NumBlocks = 0x200 - -################################################################################ -# -# Following are lists of FD Region layout which correspond to the locations of different -# images within the flash device. -# -# Regions must be defined in ascending order and may not overlap. -# -# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by -# the pipe "|" character, followed by the size of the region, also in hex with the leading -# "0x" characters. Like: -# Offset|Size -# PcdOffsetCName|PcdSizeCName -# RegionType -# -################################################################################ - -# from ArmVirtPkg/ArmVirtQemuKernel.fdf -# -# Implement the Linux kernel header layout so that the loader will identify -# it as something bootable, and execute it with a FDT pointer in x0 or r2. -# -0x00000000|0x00008000 -DATA = { - 0x01, 0x00, 0x00, 0x10, # code0: adr x1, . - 0xff, 0x1f, 0x00, 0x14, # code1: b 0x8000 - 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, # text_offset: 512 KB - 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, # image_size: 2 MB - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, # flags - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, # res2 - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, # res3 - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, # res4 - 0x41, 0x52, 0x4d, 0x64, # magic: "ARM\x64" - 0x00, 0x00, 0x00, 0x00 # res5 -} - -0x00008000|0x001f8000 -gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize -FV = FVMAIN_COMPACT - - -################################################################################ -# -# FV Section -# -# [FV] section is used to define what components or modules are placed within a flash -# device file. This section also defines order the components and modules are positioned -# within the image. The [FV] section consists of define statements, set statements and -# module statements. -# -################################################################################ - -[FV.FvMain] -BlockSize = 0x40 -NumBlocks = 0 # This FV gets compressed so make it just big enough -FvAlignment = 8 # FV alignment and FV attributes setting. -ERASE_POLARITY = 1 -MEMORY_MAPPED = TRUE -STICKY_WRITE = TRUE -LOCK_CAP = TRUE -LOCK_STATUS = TRUE -WRITE_DISABLED_CAP = TRUE -WRITE_ENABLED_CAP = TRUE -WRITE_STATUS = TRUE -WRITE_LOCK_CAP = TRUE -WRITE_LOCK_STATUS = TRUE -READ_DISABLED_CAP = TRUE -READ_ENABLED_CAP = TRUE -READ_STATUS = TRUE -READ_LOCK_CAP = TRUE -READ_LOCK_STATUS = TRUE - - APRIORI DXE { - INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf - } - - INF MdeModulePkg/Core/Dxe/DxeMain.inf - - # - # PI DXE Drivers producing Architectural Protocols (EFI Services) - # - INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf - INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf - INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf - INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf - INF EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf - INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf - INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf - INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf - - FILE DRIVER = af9763a2-033b-4109-8e17-56a98d380c92 { - SECTION DXE_DEPEX = sdm845Pkg/Binary/enchilada/HWIODxeDriver/HWIODxeDriver.depex - SECTION PE32 = sdm845Pkg/Binary/enchilada/HWIODxeDriver/HWIODxeDriver.efi - SECTION UI = "HWIODxeDriver" - } - - FILE DRIVER = 5776232e-082d-4b75-9a0e-fe1d13f7a5d9 { - SECTION DXE_DEPEX = sdm845Pkg/Binary/enchilada/PmicDxe/PmicDxe.depex - SECTION PE32 = sdm845Pkg/Binary/enchilada/PmicDxe/PmicDxe.efi - SECTION UI = "PmicDxe" - } - - FILE DRIVER = 5bd181db-0487-4f1a-ae73-820e165611b3 { - SECTION DXE_DEPEX = sdm845Pkg/Binary/enchilada/ButtonsDxe/ButtonsDxe.depex - SECTION PE32 = sdm845Pkg/Binary/enchilada/ButtonsDxe/ButtonsDxe.efi - SECTION UI = "ButtonsDxe" - } - - # - # Multiple Console IO support - # - INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf - INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf - INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf - INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf - INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf - - INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf - INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf - - INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf - - INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf - - FILE DRIVER = 3299a266-15f0-4346-8318-716336736d3e { - SECTION DXE_DEPEX = sdm845Pkg/Binary/enchilada/UsbDeviceDxe/UsbDeviceDxe.depex - SECTION PE32 = sdm845Pkg/Binary/enchilada/UsbDeviceDxe/UsbDeviceDxe.efi - SECTION UI = "UsbDeviceDxe" - } - - FILE DRIVER = 11faed4c-b21f-4d88-8e48-c4c28a1e50df { - SECTION DXE_DEPEX = sdm845Pkg/Binary/enchilada/UsbPwrCtrlDxe/UsbPwrCtrlDxe.depex - SECTION PE32 = sdm845Pkg/Binary/enchilada/UsbPwrCtrlDxe/UsbPwrCtrlDxe.efi - SECTION UI = "UsbPwrCtrlDxe" - } - - FILE DRIVER = 5af77f10-90df-4e7e-8325-a17ec09d5443 { - SECTION DXE_DEPEX = sdm845Pkg/Binary/enchilada/UsbMsdDxe/UsbMsdDxe.depex - SECTION PE32 = sdm845Pkg/Binary/enchilada/UsbMsdDxe/UsbMsdDxe.efi - SECTION UI = "UsbMsdDxe" - } - - FILE DRIVER = 94f8a6a7-dc34-4101-88c1-99179cceae83 { - SECTION DXE_DEPEX = sdm845Pkg/Binary/enchilada/UsbfnDwc3Dxe/UsbfnDwc3Dxe.depex - SECTION PE32 = sdm845Pkg/Binary/enchilada/UsbfnDwc3Dxe/UsbfnDwc3Dxe.efi - SECTION UI = "UsbfnDwc3Dxe" - } - - FILE DRIVER = cd823a4d-7dec-4531-ae5d-4134fa4127b8 { - SECTION DXE_DEPEX = sdm845Pkg/Binary/enchilada/UsbConfigDxe/UsbConfigDxe.depex - SECTION PE32 = sdm845Pkg/Binary/enchilada/UsbConfigDxe/UsbConfigDxe.efi - SECTION UI = "UsbConfigDxe" - } - - # - # GPIO - # - - # - # Virtual Keyboard - # - INF EmbeddedPkg/Drivers/VirtualKeyboardDxe/VirtualKeyboardDxe.inf - - INF sdm845Pkg/sdm845Dxe/sdm845Dxe.inf - INF sdm845Pkg/SimpleFbDxe/SimpleFbDxe.inf - - FILE DRIVER = 0d35cd8e-97ea-4f9a-96af-0f0d89f76567 { - SECTION DXE_DEPEX = sdm845Pkg/Binary/enchilada/UFSDxe/UFSDxe.depex - SECTION PE32 = sdm845Pkg/Binary/enchilada/UFSDxe/UFSDxe.efi - SECTION UI = "UFSDxe" - } - FILE DRIVER = 2a7b4bef-80cd-49e1-b473-374ba4d673fc { - SECTION DXE_DEPEX = sdm845Pkg/Binary/enchilada/SPMI/SPMI.depex - SECTION PE32 = sdm845Pkg/Binary/enchilada/SPMI/SPMI.efi - SECTION UI = "SPMI" - } - - FILE DRIVER = f541d663-4a48-40aa-aabf-ff158ccae34c { - SECTION DXE_DEPEX = sdm845Pkg/Binary/enchilada/SmemDxe/SmemDxe.depex - SECTION PE32 = sdm845Pkg/Binary/enchilada/SmemDxe/SmemDxe.efi - SECTION UI = "SmemDxe" - } - - FILE DRIVER = 10e193df-9966-44e7-b17c-59dd831e20fc { - SECTION DXE_DEPEX = sdm845Pkg/Binary/enchilada/ChipInfo/ChipInfo.depex - SECTION PE32 = sdm845Pkg/Binary/enchilada/ChipInfo/ChipInfo.efi - SECTION UI = "ChipInfo" - } - - #FILE DRIVER = 7a32bd23-f735-4f57-aa1a-447d2fe3be0d { - # SECTION DXE_DEPEX = sdm845Pkg/Binary/enchilada/SPI/SPI.depex - # SECTION PE32 = sdm845Pkg/Binary/enchilada/SPI/SPI.efi - # SECTION UI = "SPI" - #} - - - # - # USB Host Support - # - INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf - - # - # USB Mass Storage Support - # - INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf - - # - # USB Peripheral Support - # - INF EmbeddedPkg/Drivers/AndroidFastbootTransportUsbDxe/FastbootTransportUsbDxe.inf - - # - # Fastboot - # - INF EmbeddedPkg/Application/AndroidFastboot/AndroidFastbootApp.inf - - # - # FAT filesystem + GPT/MBR partitioning - # - INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf - INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf - INF FatPkg/EnhancedFatDxe/Fat.inf - INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf - - INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf - - INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf - - # - # ACPI Support - # - INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf - INF MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf - INF MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf - # INF RuleOverride = ACPITABLE sdm845Pkg/AcpiTables/AcpiTables.inf - - FILE FREEFORM = 7E374E25-8E01-4FEE-87F2-390C23C606CD { - # SECTION RAW = sdm845Pkg/AcpiTables/minimal/DBG2.aml - # SECTION RAW = sdm845Pkg/AcpiTables/minimal/DSDT.aml - # SECTION RAW = sdm845Pkg/AcpiTables/minimal/FACP.aml - # SECTION RAW = sdm845Pkg/AcpiTables/minimal/GTDT.aml - # SECTION RAW = sdm845Pkg/AcpiTables/minimal/APIC.aml - SECTION RAW = sdm845Pkg/AcpiTables/testing/DBG2.aml - SECTION RAW = sdm845Pkg/AcpiTables/testing/DSDT.aml - SECTION RAW = sdm845Pkg/AcpiTables/testing/CSRT.aml - SECTION RAW = sdm845Pkg/AcpiTables/testing/FADT.aml - SECTION RAW = sdm845Pkg/AcpiTables/testing/FACS.aml - SECTION RAW = sdm845Pkg/AcpiTables/testing/GTDT.aml - SECTION RAW = sdm845Pkg/AcpiTables/testing/IORT.aml - SECTION RAW = sdm845Pkg/AcpiTables/testing/MCFG.aml - SECTION RAW = sdm845Pkg/AcpiTables/testing/MADT.aml - SECTION RAW = sdm845Pkg/AcpiTables/testing/PPTT.aml - SECTION RAW = sdm845Pkg/AcpiTables/testing/TPM2.aml - SECTION UI = "AcpiTables" - } - - # - # SMBIOS Support - # - INF sdm845Pkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf - INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf - - # - # UEFI applications - # - INF ShellPkg/Application/Shell/Shell.inf -!ifdef $(INCLUDE_TFTP_COMMAND) - INF ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf -!endif #$(INCLUDE_TFTP_COMMAND) - - # - # Bds - # - INF MdeModulePkg/Universal/PrintDxe/PrintDxe.inf - INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf - INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf - INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf - INF MdeModulePkg/Universal/DriverHealthManagerDxe/DriverHealthManagerDxe.inf - INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf - INF MdeModulePkg/Application/UiApp/UiApp.inf - INF sdm845Pkg/Drivers/LogoDxe/LogoDxe.inf - -[FV.FVMAIN_COMPACT] -FvAlignment = 8 -ERASE_POLARITY = 1 -MEMORY_MAPPED = TRUE -STICKY_WRITE = TRUE -LOCK_CAP = TRUE -LOCK_STATUS = TRUE -WRITE_DISABLED_CAP = TRUE -WRITE_ENABLED_CAP = TRUE -WRITE_STATUS = TRUE -WRITE_LOCK_CAP = TRUE -WRITE_LOCK_STATUS = TRUE -READ_DISABLED_CAP = TRUE -READ_ENABLED_CAP = TRUE -READ_STATUS = TRUE -READ_LOCK_CAP = TRUE -READ_LOCK_STATUS = TRUE - - INF ArmPlatformPkg/PrePi/PeiUniCore.inf - - FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 { - SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE { - SECTION FV_IMAGE = FVMAIN - } - } - -!include sdm845Pkg/CommonFdf.fdf.inc +# +# Copyright (c) 2018, Linaro Limited. All rights reserved. +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# + +################################################################################ +# +# FD Section +# The [FD] Section is made up of the definition statements and a +# description of what goes into the Flash Device Image. Each FD section +# defines one flash "device" image. A flash device image may be one of +# the following: Removable media bootable image (like a boot floppy +# image,) an Option ROM image (that would be "flashed" into an add-in +# card,) a System "Flash" image (that would be burned into a system's +# flash) or an Update ("Capsule") image that will be used to update and +# existing system flash. +# +################################################################################ + +[FD.sdm845Pkg_UEFI] +BaseAddress = 0xd0000000|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in NOR Flash. +Size = 0x00200000|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the FLASH Device +ErasePolarity = 1 + +# This one is tricky, it must be: BlockSize * NumBlocks = Size +BlockSize = 0x00001000 +NumBlocks = 0x200 + +################################################################################ +# +# Following are lists of FD Region layout which correspond to the locations of different +# images within the flash device. +# +# Regions must be defined in ascending order and may not overlap. +# +# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by +# the pipe "|" character, followed by the size of the region, also in hex with the leading +# "0x" characters. Like: +# Offset|Size +# PcdOffsetCName|PcdSizeCName +# RegionType +# +################################################################################ + +# from ArmVirtPkg/ArmVirtQemuKernel.fdf +# +# Implement the Linux kernel header layout so that the loader will identify +# it as something bootable, and execute it with a FDT pointer in x0 or r2. +# +0x00000000|0x00008000 +DATA = { + 0x01, 0x00, 0x00, 0x10, # code0: adr x1, . + 0xff, 0x1f, 0x00, 0x14, # code1: b 0x8000 + 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, # text_offset: 512 KB + 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, # image_size: 2 MB + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, # flags + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, # res2 + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, # res3 + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, # res4 + 0x41, 0x52, 0x4d, 0x64, # magic: "ARM\x64" + 0x00, 0x00, 0x00, 0x00 # res5 +} + +0x00008000|0x001f8000 +gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize +FV = FVMAIN_COMPACT + + +################################################################################ +# +# FV Section +# +# [FV] section is used to define what components or modules are placed within a flash +# device file. This section also defines order the components and modules are positioned +# within the image. The [FV] section consists of define statements, set statements and +# module statements. +# +################################################################################ + +[FV.FvMain] +BlockSize = 0x40 +NumBlocks = 0 # This FV gets compressed so make it just big enough +FvAlignment = 8 # FV alignment and FV attributes setting. +ERASE_POLARITY = 1 +MEMORY_MAPPED = TRUE +STICKY_WRITE = TRUE +LOCK_CAP = TRUE +LOCK_STATUS = TRUE +WRITE_DISABLED_CAP = TRUE +WRITE_ENABLED_CAP = TRUE +WRITE_STATUS = TRUE +WRITE_LOCK_CAP = TRUE +WRITE_LOCK_STATUS = TRUE +READ_DISABLED_CAP = TRUE +READ_ENABLED_CAP = TRUE +READ_STATUS = TRUE +READ_LOCK_CAP = TRUE +READ_LOCK_STATUS = TRUE + + APRIORI DXE { + INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf + } + + INF MdeModulePkg/Core/Dxe/DxeMain.inf + + # + # PI DXE Drivers producing Architectural Protocols (EFI Services) + # + INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf + INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf + INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf + INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf + INF EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf + INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf + INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf + INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf + + FILE DRIVER = af9763a2-033b-4109-8e17-56a98d380c92 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/enchilada/HWIODxeDriver/HWIODxeDriver.depex + SECTION PE32 = sdm845Pkg/Binary/enchilada/HWIODxeDriver/HWIODxeDriver.efi + SECTION UI = "HWIODxeDriver" + } + + FILE DRIVER = 5776232e-082d-4b75-9a0e-fe1d13f7a5d9 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/enchilada/PmicDxe/PmicDxe.depex + SECTION PE32 = sdm845Pkg/Binary/enchilada/PmicDxe/PmicDxe.efi + SECTION UI = "PmicDxe" + } + + FILE DRIVER = 5bd181db-0487-4f1a-ae73-820e165611b3 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/enchilada/ButtonsDxe/ButtonsDxe.depex + SECTION PE32 = sdm845Pkg/Binary/enchilada/ButtonsDxe/ButtonsDxe.efi + SECTION UI = "ButtonsDxe" + } + + # + # Multiple Console IO support + # + INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf + INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf + INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf + INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf + INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf + + INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf + INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf + + INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf + + INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf + + FILE DRIVER = 3299a266-15f0-4346-8318-716336736d3e { + SECTION DXE_DEPEX = sdm845Pkg/Binary/enchilada/UsbDeviceDxe/UsbDeviceDxe.depex + SECTION PE32 = sdm845Pkg/Binary/enchilada/UsbDeviceDxe/UsbDeviceDxe.efi + SECTION UI = "UsbDeviceDxe" + } + + FILE DRIVER = 11faed4c-b21f-4d88-8e48-c4c28a1e50df { + SECTION DXE_DEPEX = sdm845Pkg/Binary/enchilada/UsbPwrCtrlDxe/UsbPwrCtrlDxe.depex + SECTION PE32 = sdm845Pkg/Binary/enchilada/UsbPwrCtrlDxe/UsbPwrCtrlDxe.efi + SECTION UI = "UsbPwrCtrlDxe" + } + + FILE DRIVER = 5af77f10-90df-4e7e-8325-a17ec09d5443 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/enchilada/UsbMsdDxe/UsbMsdDxe.depex + SECTION PE32 = sdm845Pkg/Binary/enchilada/UsbMsdDxe/UsbMsdDxe.efi + SECTION UI = "UsbMsdDxe" + } + + FILE DRIVER = 94f8a6a7-dc34-4101-88c1-99179cceae83 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/enchilada/UsbfnDwc3Dxe/UsbfnDwc3Dxe.depex + SECTION PE32 = sdm845Pkg/Binary/enchilada/UsbfnDwc3Dxe/UsbfnDwc3Dxe.efi + SECTION UI = "UsbfnDwc3Dxe" + } + + FILE DRIVER = cd823a4d-7dec-4531-ae5d-4134fa4127b8 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/enchilada/UsbConfigDxe/UsbConfigDxe.depex + SECTION PE32 = sdm845Pkg/Binary/enchilada/UsbConfigDxe/UsbConfigDxe.efi + SECTION UI = "UsbConfigDxe" + } + + # + # GPIO + # + + # + # Virtual Keyboard + # + INF EmbeddedPkg/Drivers/VirtualKeyboardDxe/VirtualKeyboardDxe.inf + + INF sdm845Pkg/Drivers/sdm845Dxe/sdm845Dxe.inf + INF sdm845Pkg/Drivers/SimpleFbDxe/SimpleFbDxe.inf + + FILE DRIVER = 0d35cd8e-97ea-4f9a-96af-0f0d89f76567 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/enchilada/UFSDxe/UFSDxe.depex + SECTION PE32 = sdm845Pkg/Binary/enchilada/UFSDxe/UFSDxe.efi + SECTION UI = "UFSDxe" + } + FILE DRIVER = 2a7b4bef-80cd-49e1-b473-374ba4d673fc { + SECTION DXE_DEPEX = sdm845Pkg/Binary/enchilada/SPMI/SPMI.depex + SECTION PE32 = sdm845Pkg/Binary/enchilada/SPMI/SPMI.efi + SECTION UI = "SPMI" + } + + FILE DRIVER = f541d663-4a48-40aa-aabf-ff158ccae34c { + SECTION DXE_DEPEX = sdm845Pkg/Binary/enchilada/SmemDxe/SmemDxe.depex + SECTION PE32 = sdm845Pkg/Binary/enchilada/SmemDxe/SmemDxe.efi + SECTION UI = "SmemDxe" + } + + FILE DRIVER = 10e193df-9966-44e7-b17c-59dd831e20fc { + SECTION DXE_DEPEX = sdm845Pkg/Binary/enchilada/ChipInfo/ChipInfo.depex + SECTION PE32 = sdm845Pkg/Binary/enchilada/ChipInfo/ChipInfo.efi + SECTION UI = "ChipInfo" + } + + #FILE DRIVER = 7a32bd23-f735-4f57-aa1a-447d2fe3be0d { + # SECTION DXE_DEPEX = sdm845Pkg/Binary/enchilada/SPI/SPI.depex + # SECTION PE32 = sdm845Pkg/Binary/enchilada/SPI/SPI.efi + # SECTION UI = "SPI" + #} + + + # + # USB Host Support + # + INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf + + # + # USB Mass Storage Support + # + INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf + + # + # USB Peripheral Support + # + INF EmbeddedPkg/Drivers/AndroidFastbootTransportUsbDxe/FastbootTransportUsbDxe.inf + + # + # Fastboot + # + INF EmbeddedPkg/Application/AndroidFastboot/AndroidFastbootApp.inf + + # + # FAT filesystem + GPT/MBR partitioning + # + INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf + INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf + INF FatPkg/EnhancedFatDxe/Fat.inf + INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf + + INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf + + INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf + + # + # ACPI Support + # + INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf + INF MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf + INF MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf + # INF RuleOverride = ACPITABLE sdm845Pkg/AcpiTables/AcpiTables.inf + + FILE FREEFORM = 7E374E25-8E01-4FEE-87F2-390C23C606CD { + # SECTION RAW = sdm845Pkg/AcpiTables/minimal/DBG2.aml + # SECTION RAW = sdm845Pkg/AcpiTables/minimal/DSDT.aml + # SECTION RAW = sdm845Pkg/AcpiTables/minimal/FACP.aml + # SECTION RAW = sdm845Pkg/AcpiTables/minimal/GTDT.aml + # SECTION RAW = sdm845Pkg/AcpiTables/minimal/APIC.aml + SECTION RAW = sdm845Pkg/AcpiTables/testing/DBG2.aml + SECTION RAW = sdm845Pkg/AcpiTables/testing/DSDT.aml + SECTION RAW = sdm845Pkg/AcpiTables/testing/CSRT.aml + SECTION RAW = sdm845Pkg/AcpiTables/testing/FADT.aml + SECTION RAW = sdm845Pkg/AcpiTables/testing/FACS.aml + SECTION RAW = sdm845Pkg/AcpiTables/testing/GTDT.aml + SECTION RAW = sdm845Pkg/AcpiTables/testing/IORT.aml + SECTION RAW = sdm845Pkg/AcpiTables/testing/MCFG.aml + SECTION RAW = sdm845Pkg/AcpiTables/testing/MADT.aml + SECTION RAW = sdm845Pkg/AcpiTables/testing/PPTT.aml + SECTION RAW = sdm845Pkg/AcpiTables/testing/TPM2.aml + SECTION UI = "AcpiTables" + } + + # + # SMBIOS Support + # + INF sdm845Pkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf + INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf + + # + # UEFI applications + # + INF ShellPkg/Application/Shell/Shell.inf +!ifdef $(INCLUDE_TFTP_COMMAND) + INF ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf +!endif #$(INCLUDE_TFTP_COMMAND) + + # + # Bds + # + INF MdeModulePkg/Universal/PrintDxe/PrintDxe.inf + INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf + INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf + INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf + INF MdeModulePkg/Universal/DriverHealthManagerDxe/DriverHealthManagerDxe.inf + INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf + INF MdeModulePkg/Application/UiApp/UiApp.inf + INF sdm845Pkg/Drivers/LogoDxe/LogoDxe.inf + +[FV.FVMAIN_COMPACT] +FvAlignment = 8 +ERASE_POLARITY = 1 +MEMORY_MAPPED = TRUE +STICKY_WRITE = TRUE +LOCK_CAP = TRUE +LOCK_STATUS = TRUE +WRITE_DISABLED_CAP = TRUE +WRITE_ENABLED_CAP = TRUE +WRITE_STATUS = TRUE +WRITE_LOCK_CAP = TRUE +WRITE_LOCK_STATUS = TRUE +READ_DISABLED_CAP = TRUE +READ_ENABLED_CAP = TRUE +READ_STATUS = TRUE +READ_LOCK_CAP = TRUE +READ_LOCK_STATUS = TRUE + + INF ArmPlatformPkg/PrePi/PeiUniCore.inf + + FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 { + SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE { + SECTION FV_IMAGE = FVMAIN + } + } + +!include sdm845Pkg/CommonFdf.fdf.inc diff --git a/sdm845Pkg/fajita.dsc b/sdm845Pkg/Devices/fajita.dsc similarity index 89% rename from sdm845Pkg/fajita.dsc rename to sdm845Pkg/Devices/fajita.dsc index cff782b..1cf6a9d 100644 --- a/sdm845Pkg/fajita.dsc +++ b/sdm845Pkg/Devices/fajita.dsc @@ -1,19 +1,19 @@ -[Defines] - PLATFORM_NAME = sdm845Pkg - PLATFORM_GUID = 28f1a3bf-193a-47e3-a7b9-5a435eaab2ee - PLATFORM_VERSION = 0.1 - DSC_SPECIFICATION = 0x00010019 - OUTPUT_DIRECTORY = Build/$(PLATFORM_NAME) - SUPPORTED_ARCHITECTURES = AARCH64 - BUILD_TARGETS = DEBUG|RELEASE - SKUID_IDENTIFIER = DEFAULT - FLASH_DEFINITION = sdm845Pkg/fajita.fdf - -!include sdm845Pkg/sdm845Pkg.dsc - -[PcdsFixedAtBuild.common] - # System Memory (5GB) - gArmTokenSpaceGuid.PcdSystemMemorySize|0x140000000 - - gsdm845PkgTokenSpaceGuid.PcdMipiFrameBufferWidth|1080 - gsdm845PkgTokenSpaceGuid.PcdMipiFrameBufferHeight|2280 +[Defines] + PLATFORM_NAME = sdm845Pkg + PLATFORM_GUID = 28f1a3bf-193a-47e3-a7b9-5a435eaab2ee + PLATFORM_VERSION = 0.1 + DSC_SPECIFICATION = 0x00010019 + OUTPUT_DIRECTORY = Build/$(PLATFORM_NAME) + SUPPORTED_ARCHITECTURES = AARCH64 + BUILD_TARGETS = DEBUG|RELEASE + SKUID_IDENTIFIER = DEFAULT + FLASH_DEFINITION = sdm845Pkg/Devices/845.fdf + +!include sdm845Pkg/sdm845Pkg.dsc + +[PcdsFixedAtBuild.common] + # System Memory (5GB) + gArmTokenSpaceGuid.PcdSystemMemorySize|0x140000000 + + gsdm845PkgTokenSpaceGuid.PcdMipiFrameBufferWidth|1080 + gsdm845PkgTokenSpaceGuid.PcdMipiFrameBufferHeight|2280 diff --git a/sdm845Pkg/fajita.fdf b/sdm845Pkg/Devices/fajita.fdf similarity index 96% rename from sdm845Pkg/fajita.fdf rename to sdm845Pkg/Devices/fajita.fdf index 6ab418d..eaa6ae0 100644 --- a/sdm845Pkg/fajita.fdf +++ b/sdm845Pkg/Devices/fajita.fdf @@ -1,343 +1,343 @@ -# -# Copyright (c) 2018, Linaro Limited. All rights reserved. -# -# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# - -################################################################################ -# -# FD Section -# The [FD] Section is made up of the definition statements and a -# description of what goes into the Flash Device Image. Each FD section -# defines one flash "device" image. A flash device image may be one of -# the following: Removable media bootable image (like a boot floppy -# image,) an Option ROM image (that would be "flashed" into an add-in -# card,) a System "Flash" image (that would be burned into a system's -# flash) or an Update ("Capsule") image that will be used to update and -# existing system flash. -# -################################################################################ - -[FD.sdm845Pkg_UEFI] -BaseAddress = 0xd0000000|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in NOR Flash. -Size = 0x00200000|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the FLASH Device -ErasePolarity = 1 - -# This one is tricky, it must be: BlockSize * NumBlocks = Size -BlockSize = 0x00001000 -NumBlocks = 0x200 - -################################################################################ -# -# Following are lists of FD Region layout which correspond to the locations of different -# images within the flash device. -# -# Regions must be defined in ascending order and may not overlap. -# -# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by -# the pipe "|" character, followed by the size of the region, also in hex with the leading -# "0x" characters. Like: -# Offset|Size -# PcdOffsetCName|PcdSizeCName -# RegionType -# -################################################################################ - -# from ArmVirtPkg/ArmVirtQemuKernel.fdf -# -# Implement the Linux kernel header layout so that the loader will identify -# it as something bootable, and execute it with a FDT pointer in x0 or r2. -# -0x00000000|0x00008000 -DATA = { - 0x01, 0x00, 0x00, 0x10, # code0: adr x1, . - 0xff, 0x1f, 0x00, 0x14, # code1: b 0x8000 - 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, # text_offset: 512 KB - 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, # image_size: 2 MB - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, # flags - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, # res2 - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, # res3 - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, # res4 - 0x41, 0x52, 0x4d, 0x64, # magic: "ARM\x64" - 0x00, 0x00, 0x00, 0x00 # res5 -} - -0x00008000|0x001f8000 -gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize -FV = FVMAIN_COMPACT - - -################################################################################ -# -# FV Section -# -# [FV] section is used to define what components or modules are placed within a flash -# device file. This section also defines order the components and modules are positioned -# within the image. The [FV] section consists of define statements, set statements and -# module statements. -# -################################################################################ - -[FV.FvMain] -BlockSize = 0x40 -NumBlocks = 0 # This FV gets compressed so make it just big enough -FvAlignment = 8 # FV alignment and FV attributes setting. -ERASE_POLARITY = 1 -MEMORY_MAPPED = TRUE -STICKY_WRITE = TRUE -LOCK_CAP = TRUE -LOCK_STATUS = TRUE -WRITE_DISABLED_CAP = TRUE -WRITE_ENABLED_CAP = TRUE -WRITE_STATUS = TRUE -WRITE_LOCK_CAP = TRUE -WRITE_LOCK_STATUS = TRUE -READ_DISABLED_CAP = TRUE -READ_ENABLED_CAP = TRUE -READ_STATUS = TRUE -READ_LOCK_CAP = TRUE -READ_LOCK_STATUS = TRUE - - APRIORI DXE { - INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf - } - - INF MdeModulePkg/Core/Dxe/DxeMain.inf - - # - # PI DXE Drivers producing Architectural Protocols (EFI Services) - # - INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf - INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf - INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf - INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf - INF EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf - INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf - INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf - INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf - - FILE DRIVER = af9763a2-033b-4109-8e17-56a98d380c92 { - SECTION DXE_DEPEX = sdm845Pkg/Binary/fajita/HWIODxeDriver/HWIODxeDriver.depex - SECTION PE32 = sdm845Pkg/Binary/fajita/HWIODxeDriver/HWIODxeDriver.efi - SECTION UI = "HWIODxeDriver" - } - - FILE DRIVER = 5776232e-082d-4b75-9a0e-fe1d13f7a5d9 { - SECTION DXE_DEPEX = sdm845Pkg/Binary/fajita/PmicDxe/PmicDxe.depex - SECTION PE32 = sdm845Pkg/Binary/fajita/PmicDxe/PmicDxe.efi - SECTION UI = "PmicDxe" - } - - FILE DRIVER = 5bd181db-0487-4f1a-ae73-820e165611b3 { - SECTION DXE_DEPEX = sdm845Pkg/Binary/fajita/ButtonsDxe/ButtonsDxe.depex - SECTION PE32 = sdm845Pkg/Binary/fajita/ButtonsDxe/ButtonsDxe.efi - SECTION UI = "ButtonsDxe" - } - - # - # Multiple Console IO support - # - INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf - INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf - INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf - INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf - INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf - - INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf - INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf - - INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf - - INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf - - FILE DRIVER = 3299a266-15f0-4346-8318-716336736d3e { - SECTION DXE_DEPEX = sdm845Pkg/Binary/fajita/UsbDeviceDxe/UsbDeviceDxe.depex - SECTION PE32 = sdm845Pkg/Binary/fajita/UsbDeviceDxe/UsbDeviceDxe.efi - SECTION UI = "UsbDeviceDxe" - } - - FILE DRIVER = 11faed4c-b21f-4d88-8e48-c4c28a1e50df { - SECTION DXE_DEPEX = sdm845Pkg/Binary/fajita/UsbPwrCtrlDxe/UsbPwrCtrlDxe.depex - SECTION PE32 = sdm845Pkg/Binary/fajita/UsbPwrCtrlDxe/UsbPwrCtrlDxe.efi - SECTION UI = "UsbPwrCtrlDxe" - } - - FILE DRIVER = 5af77f10-90df-4e7e-8325-a17ec09d5443 { - SECTION DXE_DEPEX = sdm845Pkg/Binary/fajita/UsbMsdDxe/UsbMsdDxe.depex - SECTION PE32 = sdm845Pkg/Binary/fajita/UsbMsdDxe/UsbMsdDxe.efi - SECTION UI = "UsbMsdDxe" - } - - FILE DRIVER = 94f8a6a7-dc34-4101-88c1-99179cceae83 { - SECTION DXE_DEPEX = sdm845Pkg/Binary/fajita/UsbfnDwc3Dxe/UsbfnDwc3Dxe.depex - SECTION PE32 = sdm845Pkg/Binary/fajita/UsbfnDwc3Dxe/UsbfnDwc3Dxe.efi - SECTION UI = "UsbfnDwc3Dxe" - } - - FILE DRIVER = cd823a4d-7dec-4531-ae5d-4134fa4127b8 { - SECTION DXE_DEPEX = sdm845Pkg/Binary/fajita/UsbConfigDxe/UsbConfigDxe.depex - SECTION PE32 = sdm845Pkg/Binary/fajita/UsbConfigDxe/UsbConfigDxe.efi - SECTION UI = "UsbDeviceDxe" - } - - # - # GPIO - # - - # - # Virtual Keyboard - # - INF EmbeddedPkg/Drivers/VirtualKeyboardDxe/VirtualKeyboardDxe.inf - - INF sdm845Pkg/sdm845Dxe/sdm845Dxe.inf - INF sdm845Pkg/SimpleFbDxe/SimpleFbDxe.inf - - FILE DRIVER = 0d35cd8e-97ea-4f9a-96af-0f0d89f76567 { - SECTION DXE_DEPEX = sdm845Pkg/Binary/fajita/UFSDxe/UFSDxe.depex - SECTION PE32 = sdm845Pkg/Binary/fajita/UFSDxe/UFSDxe.efi - SECTION UI = "UFSDxe" - } - FILE DRIVER = 2a7b4bef-80cd-49e1-b473-374ba4d673fc { - SECTION DXE_DEPEX = sdm845Pkg/Binary/fajita/SPMI/SPMI.depex - SECTION PE32 = sdm845Pkg/Binary/fajita/SPMI/SPMI.efi - SECTION UI = "SPMI" - } - - FILE DRIVER = f541d663-4a48-40aa-aabf-ff158ccae34c { - SECTION DXE_DEPEX = sdm845Pkg/Binary/fajita/SmemDxe/SmemDxe.depex - SECTION PE32 = sdm845Pkg/Binary/fajita/SmemDxe/SmemDxe.efi - SECTION UI = "SmemDxe" - } - - FILE DRIVER = 10e193df-9966-44e7-b17c-59dd831e20fc { - SECTION DXE_DEPEX = sdm845Pkg/Binary/fajita/ChipInfo/ChipInfo.depex - SECTION PE32 = sdm845Pkg/Binary/fajita/ChipInfo/ChipInfo.efi - SECTION UI = "ChipInfo" - } - - #FILE DRIVER = 7a32bd23-f735-4f57-aa1a-447d2fe3be0d { - # SECTION DXE_DEPEX = sdm845Pkg/Binary/fajita/SPI/SPI.depex - # SECTION PE32 = sdm845Pkg/Binary/fajita/SPI/SPI.efi - # SECTION UI = "SPI" - #} - - - # - # USB Host Support - # - INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf - - # - # USB Mass Storage Support - # - INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf - - # - # USB Peripheral Support - # - INF EmbeddedPkg/Drivers/AndroidFastbootTransportUsbDxe/FastbootTransportUsbDxe.inf - - # - # Fastboot - # - INF EmbeddedPkg/Application/AndroidFastboot/AndroidFastbootApp.inf - - # - # FAT filesystem + GPT/MBR partitioning - # - INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf - INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf - INF FatPkg/EnhancedFatDxe/Fat.inf - INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf - - INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf - - INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf - - # - # ACPI Support - # - INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf - INF MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf - INF MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf - # INF RuleOverride = ACPITABLE sdm845Pkg/AcpiTables/AcpiTables.inf - - FILE FREEFORM = 7E374E25-8E01-4FEE-87F2-390C23C606CD { - # SECTION RAW = sdm845Pkg/AcpiTables/minimal/DBG2.aml - # SECTION RAW = sdm845Pkg/AcpiTables/minimal/DSDT.aml - # SECTION RAW = sdm845Pkg/AcpiTables/minimal/FACP.aml - # SECTION RAW = sdm845Pkg/AcpiTables/minimal/GTDT.aml - # SECTION RAW = sdm845Pkg/AcpiTables/minimal/APIC.aml - SECTION RAW = sdm845Pkg/AcpiTables/testing/DBG2.aml - SECTION RAW = sdm845Pkg/AcpiTables/testing/DSDT.aml - SECTION RAW = sdm845Pkg/AcpiTables/testing/CSRT.aml - SECTION RAW = sdm845Pkg/AcpiTables/testing/FADT.aml - SECTION RAW = sdm845Pkg/AcpiTables/testing/FACS.aml - SECTION RAW = sdm845Pkg/AcpiTables/testing/GTDT.aml - SECTION RAW = sdm845Pkg/AcpiTables/testing/IORT.aml - SECTION RAW = sdm845Pkg/AcpiTables/testing/MCFG.aml - SECTION RAW = sdm845Pkg/AcpiTables/testing/MADT.aml - SECTION RAW = sdm845Pkg/AcpiTables/testing/PPTT.aml - SECTION RAW = sdm845Pkg/AcpiTables/testing/TPM2.aml - SECTION UI = "AcpiTables" - } - - # - # SMBIOS Support - # - INF sdm845Pkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf - INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf - - # - # UEFI applications - # - INF ShellPkg/Application/Shell/Shell.inf -!ifdef $(INCLUDE_TFTP_COMMAND) - INF ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf -!endif #$(INCLUDE_TFTP_COMMAND) - - # - # Bds - # - INF MdeModulePkg/Universal/PrintDxe/PrintDxe.inf - INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf - INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf - INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf - INF MdeModulePkg/Universal/DriverHealthManagerDxe/DriverHealthManagerDxe.inf - INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf - INF MdeModulePkg/Application/UiApp/UiApp.inf - INF sdm845Pkg/Drivers/LogoDxe/LogoDxe.inf - -[FV.FVMAIN_COMPACT] -FvAlignment = 8 -ERASE_POLARITY = 1 -MEMORY_MAPPED = TRUE -STICKY_WRITE = TRUE -LOCK_CAP = TRUE -LOCK_STATUS = TRUE -WRITE_DISABLED_CAP = TRUE -WRITE_ENABLED_CAP = TRUE -WRITE_STATUS = TRUE -WRITE_LOCK_CAP = TRUE -WRITE_LOCK_STATUS = TRUE -READ_DISABLED_CAP = TRUE -READ_ENABLED_CAP = TRUE -READ_STATUS = TRUE -READ_LOCK_CAP = TRUE -READ_LOCK_STATUS = TRUE - - INF ArmPlatformPkg/PrePi/PeiUniCore.inf - - FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 { - SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE { - SECTION FV_IMAGE = FVMAIN - } - } - -!include sdm845Pkg/CommonFdf.fdf.inc +# +# Copyright (c) 2018, Linaro Limited. All rights reserved. +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# + +################################################################################ +# +# FD Section +# The [FD] Section is made up of the definition statements and a +# description of what goes into the Flash Device Image. Each FD section +# defines one flash "device" image. A flash device image may be one of +# the following: Removable media bootable image (like a boot floppy +# image,) an Option ROM image (that would be "flashed" into an add-in +# card,) a System "Flash" image (that would be burned into a system's +# flash) or an Update ("Capsule") image that will be used to update and +# existing system flash. +# +################################################################################ + +[FD.sdm845Pkg_UEFI] +BaseAddress = 0xd0000000|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in NOR Flash. +Size = 0x00200000|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the FLASH Device +ErasePolarity = 1 + +# This one is tricky, it must be: BlockSize * NumBlocks = Size +BlockSize = 0x00001000 +NumBlocks = 0x200 + +################################################################################ +# +# Following are lists of FD Region layout which correspond to the locations of different +# images within the flash device. +# +# Regions must be defined in ascending order and may not overlap. +# +# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by +# the pipe "|" character, followed by the size of the region, also in hex with the leading +# "0x" characters. Like: +# Offset|Size +# PcdOffsetCName|PcdSizeCName +# RegionType +# +################################################################################ + +# from ArmVirtPkg/ArmVirtQemuKernel.fdf +# +# Implement the Linux kernel header layout so that the loader will identify +# it as something bootable, and execute it with a FDT pointer in x0 or r2. +# +0x00000000|0x00008000 +DATA = { + 0x01, 0x00, 0x00, 0x10, # code0: adr x1, . + 0xff, 0x1f, 0x00, 0x14, # code1: b 0x8000 + 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, # text_offset: 512 KB + 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, # image_size: 2 MB + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, # flags + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, # res2 + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, # res3 + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, # res4 + 0x41, 0x52, 0x4d, 0x64, # magic: "ARM\x64" + 0x00, 0x00, 0x00, 0x00 # res5 +} + +0x00008000|0x001f8000 +gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize +FV = FVMAIN_COMPACT + + +################################################################################ +# +# FV Section +# +# [FV] section is used to define what components or modules are placed within a flash +# device file. This section also defines order the components and modules are positioned +# within the image. The [FV] section consists of define statements, set statements and +# module statements. +# +################################################################################ + +[FV.FvMain] +BlockSize = 0x40 +NumBlocks = 0 # This FV gets compressed so make it just big enough +FvAlignment = 8 # FV alignment and FV attributes setting. +ERASE_POLARITY = 1 +MEMORY_MAPPED = TRUE +STICKY_WRITE = TRUE +LOCK_CAP = TRUE +LOCK_STATUS = TRUE +WRITE_DISABLED_CAP = TRUE +WRITE_ENABLED_CAP = TRUE +WRITE_STATUS = TRUE +WRITE_LOCK_CAP = TRUE +WRITE_LOCK_STATUS = TRUE +READ_DISABLED_CAP = TRUE +READ_ENABLED_CAP = TRUE +READ_STATUS = TRUE +READ_LOCK_CAP = TRUE +READ_LOCK_STATUS = TRUE + + APRIORI DXE { + INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf + } + + INF MdeModulePkg/Core/Dxe/DxeMain.inf + + # + # PI DXE Drivers producing Architectural Protocols (EFI Services) + # + INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf + INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf + INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf + INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf + INF EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf + INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf + INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf + INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf + + FILE DRIVER = af9763a2-033b-4109-8e17-56a98d380c92 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/fajita/HWIODxeDriver/HWIODxeDriver.depex + SECTION PE32 = sdm845Pkg/Binary/fajita/HWIODxeDriver/HWIODxeDriver.efi + SECTION UI = "HWIODxeDriver" + } + + FILE DRIVER = 5776232e-082d-4b75-9a0e-fe1d13f7a5d9 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/fajita/PmicDxe/PmicDxe.depex + SECTION PE32 = sdm845Pkg/Binary/fajita/PmicDxe/PmicDxe.efi + SECTION UI = "PmicDxe" + } + + FILE DRIVER = 5bd181db-0487-4f1a-ae73-820e165611b3 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/fajita/ButtonsDxe/ButtonsDxe.depex + SECTION PE32 = sdm845Pkg/Binary/fajita/ButtonsDxe/ButtonsDxe.efi + SECTION UI = "ButtonsDxe" + } + + # + # Multiple Console IO support + # + INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf + INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf + INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf + INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf + INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf + + INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf + INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf + + INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf + + INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf + + FILE DRIVER = 3299a266-15f0-4346-8318-716336736d3e { + SECTION DXE_DEPEX = sdm845Pkg/Binary/fajita/UsbDeviceDxe/UsbDeviceDxe.depex + SECTION PE32 = sdm845Pkg/Binary/fajita/UsbDeviceDxe/UsbDeviceDxe.efi + SECTION UI = "UsbDeviceDxe" + } + + FILE DRIVER = 11faed4c-b21f-4d88-8e48-c4c28a1e50df { + SECTION DXE_DEPEX = sdm845Pkg/Binary/fajita/UsbPwrCtrlDxe/UsbPwrCtrlDxe.depex + SECTION PE32 = sdm845Pkg/Binary/fajita/UsbPwrCtrlDxe/UsbPwrCtrlDxe.efi + SECTION UI = "UsbPwrCtrlDxe" + } + + FILE DRIVER = 5af77f10-90df-4e7e-8325-a17ec09d5443 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/fajita/UsbMsdDxe/UsbMsdDxe.depex + SECTION PE32 = sdm845Pkg/Binary/fajita/UsbMsdDxe/UsbMsdDxe.efi + SECTION UI = "UsbMsdDxe" + } + + FILE DRIVER = 94f8a6a7-dc34-4101-88c1-99179cceae83 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/fajita/UsbfnDwc3Dxe/UsbfnDwc3Dxe.depex + SECTION PE32 = sdm845Pkg/Binary/fajita/UsbfnDwc3Dxe/UsbfnDwc3Dxe.efi + SECTION UI = "UsbfnDwc3Dxe" + } + + FILE DRIVER = cd823a4d-7dec-4531-ae5d-4134fa4127b8 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/fajita/UsbConfigDxe/UsbConfigDxe.depex + SECTION PE32 = sdm845Pkg/Binary/fajita/UsbConfigDxe/UsbConfigDxe.efi + SECTION UI = "UsbDeviceDxe" + } + + # + # GPIO + # + + # + # Virtual Keyboard + # + INF EmbeddedPkg/Drivers/VirtualKeyboardDxe/VirtualKeyboardDxe.inf + + INF sdm845Pkg/Drivers/sdm845Dxe/sdm845Dxe.inf + INF sdm845Pkg/Drivers/SimpleFbDxe/SimpleFbDxe.inf + + FILE DRIVER = 0d35cd8e-97ea-4f9a-96af-0f0d89f76567 { + SECTION DXE_DEPEX = sdm845Pkg/Binary/fajita/UFSDxe/UFSDxe.depex + SECTION PE32 = sdm845Pkg/Binary/fajita/UFSDxe/UFSDxe.efi + SECTION UI = "UFSDxe" + } + FILE DRIVER = 2a7b4bef-80cd-49e1-b473-374ba4d673fc { + SECTION DXE_DEPEX = sdm845Pkg/Binary/fajita/SPMI/SPMI.depex + SECTION PE32 = sdm845Pkg/Binary/fajita/SPMI/SPMI.efi + SECTION UI = "SPMI" + } + + FILE DRIVER = f541d663-4a48-40aa-aabf-ff158ccae34c { + SECTION DXE_DEPEX = sdm845Pkg/Binary/fajita/SmemDxe/SmemDxe.depex + SECTION PE32 = sdm845Pkg/Binary/fajita/SmemDxe/SmemDxe.efi + SECTION UI = "SmemDxe" + } + + FILE DRIVER = 10e193df-9966-44e7-b17c-59dd831e20fc { + SECTION DXE_DEPEX = sdm845Pkg/Binary/fajita/ChipInfo/ChipInfo.depex + SECTION PE32 = sdm845Pkg/Binary/fajita/ChipInfo/ChipInfo.efi + SECTION UI = "ChipInfo" + } + + #FILE DRIVER = 7a32bd23-f735-4f57-aa1a-447d2fe3be0d { + # SECTION DXE_DEPEX = sdm845Pkg/Binary/fajita/SPI/SPI.depex + # SECTION PE32 = sdm845Pkg/Binary/fajita/SPI/SPI.efi + # SECTION UI = "SPI" + #} + + + # + # USB Host Support + # + INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf + + # + # USB Mass Storage Support + # + INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf + + # + # USB Peripheral Support + # + INF EmbeddedPkg/Drivers/AndroidFastbootTransportUsbDxe/FastbootTransportUsbDxe.inf + + # + # Fastboot + # + INF EmbeddedPkg/Application/AndroidFastboot/AndroidFastbootApp.inf + + # + # FAT filesystem + GPT/MBR partitioning + # + INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf + INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf + INF FatPkg/EnhancedFatDxe/Fat.inf + INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf + + INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf + + INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf + + # + # ACPI Support + # + INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf + INF MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf + INF MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf + # INF RuleOverride = ACPITABLE sdm845Pkg/AcpiTables/AcpiTables.inf + + FILE FREEFORM = 7E374E25-8E01-4FEE-87F2-390C23C606CD { + # SECTION RAW = sdm845Pkg/AcpiTables/minimal/DBG2.aml + # SECTION RAW = sdm845Pkg/AcpiTables/minimal/DSDT.aml + # SECTION RAW = sdm845Pkg/AcpiTables/minimal/FACP.aml + # SECTION RAW = sdm845Pkg/AcpiTables/minimal/GTDT.aml + # SECTION RAW = sdm845Pkg/AcpiTables/minimal/APIC.aml + SECTION RAW = sdm845Pkg/AcpiTables/testing/DBG2.aml + SECTION RAW = sdm845Pkg/AcpiTables/testing/DSDT.aml + SECTION RAW = sdm845Pkg/AcpiTables/testing/CSRT.aml + SECTION RAW = sdm845Pkg/AcpiTables/testing/FADT.aml + SECTION RAW = sdm845Pkg/AcpiTables/testing/FACS.aml + SECTION RAW = sdm845Pkg/AcpiTables/testing/GTDT.aml + SECTION RAW = sdm845Pkg/AcpiTables/testing/IORT.aml + SECTION RAW = sdm845Pkg/AcpiTables/testing/MCFG.aml + SECTION RAW = sdm845Pkg/AcpiTables/testing/MADT.aml + SECTION RAW = sdm845Pkg/AcpiTables/testing/PPTT.aml + SECTION RAW = sdm845Pkg/AcpiTables/testing/TPM2.aml + SECTION UI = "AcpiTables" + } + + # + # SMBIOS Support + # + INF sdm845Pkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf + INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf + + # + # UEFI applications + # + INF ShellPkg/Application/Shell/Shell.inf +!ifdef $(INCLUDE_TFTP_COMMAND) + INF ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf +!endif #$(INCLUDE_TFTP_COMMAND) + + # + # Bds + # + INF MdeModulePkg/Universal/PrintDxe/PrintDxe.inf + INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf + INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf + INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf + INF MdeModulePkg/Universal/DriverHealthManagerDxe/DriverHealthManagerDxe.inf + INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf + INF MdeModulePkg/Application/UiApp/UiApp.inf + INF sdm845Pkg/Drivers/LogoDxe/LogoDxe.inf + +[FV.FVMAIN_COMPACT] +FvAlignment = 8 +ERASE_POLARITY = 1 +MEMORY_MAPPED = TRUE +STICKY_WRITE = TRUE +LOCK_CAP = TRUE +LOCK_STATUS = TRUE +WRITE_DISABLED_CAP = TRUE +WRITE_ENABLED_CAP = TRUE +WRITE_STATUS = TRUE +WRITE_LOCK_CAP = TRUE +WRITE_LOCK_STATUS = TRUE +READ_DISABLED_CAP = TRUE +READ_ENABLED_CAP = TRUE +READ_STATUS = TRUE +READ_LOCK_CAP = TRUE +READ_LOCK_STATUS = TRUE + + INF ArmPlatformPkg/PrePi/PeiUniCore.inf + + FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 { + SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE { + SECTION FV_IMAGE = FVMAIN + } + } + +!include sdm845Pkg/CommonFdf.fdf.inc diff --git a/sdm845Pkg/Devices/generic.dsc b/sdm845Pkg/Devices/generic.dsc new file mode 100644 index 0000000..986fa1a --- /dev/null +++ b/sdm845Pkg/Devices/generic.dsc @@ -0,0 +1,19 @@ +[Defines] + PLATFORM_NAME = sdm845Pkg + PLATFORM_GUID = 28f1a3bf-193a-47e3-a7b9-5a435eaab2ee + PLATFORM_VERSION = 0.1 + DSC_SPECIFICATION = 0x00010019 + OUTPUT_DIRECTORY = Build/$(PLATFORM_NAME) + SUPPORTED_ARCHITECTURES = AARCH64 + BUILD_TARGETS = DEBUG|RELEASE + SKUID_IDENTIFIER = DEFAULT + FLASH_DEFINITION = sdm845Pkg/Devices/845.fdf + +!include sdm845Pkg/sdm845Pkg.dsc + +[PcdsFixedAtBuild.common] + # System Memory (5GB) + gArmTokenSpaceGuid.PcdSystemMemorySize|0x140000000 + + gsdm845PkgTokenSpaceGuid.PcdMipiFrameBufferWidth|1080 + gsdm845PkgTokenSpaceGuid.PcdMipiFrameBufferHeight|1920 diff --git a/sdm845Pkg/perseus.dsc b/sdm845Pkg/Devices/perseus.dsc similarity index 91% rename from sdm845Pkg/perseus.dsc rename to sdm845Pkg/Devices/perseus.dsc index add24f8..633545d 100644 --- a/sdm845Pkg/perseus.dsc +++ b/sdm845Pkg/Devices/perseus.dsc @@ -7,7 +7,7 @@ SUPPORTED_ARCHITECTURES = AARCH64 BUILD_TARGETS = DEBUG|RELEASE SKUID_IDENTIFIER = DEFAULT - FLASH_DEFINITION = sdm845Pkg/perseus.fdf + FLASH_DEFINITION = sdm845Pkg/Devices/845.fdf !include sdm845Pkg/sdm845Pkg.dsc diff --git a/sdm845Pkg/perseus.fdf b/sdm845Pkg/Devices/perseus.fdf similarity index 99% rename from sdm845Pkg/perseus.fdf rename to sdm845Pkg/Devices/perseus.fdf index e8b5d6c..8afc5b1 100644 --- a/sdm845Pkg/perseus.fdf +++ b/sdm845Pkg/Devices/perseus.fdf @@ -201,8 +201,8 @@ READ_LOCK_STATUS = TRUE # INF EmbeddedPkg/Drivers/VirtualKeyboardDxe/VirtualKeyboardDxe.inf - INF sdm845Pkg/sdm845Dxe/sdm845Dxe.inf - INF sdm845Pkg/SimpleFbDxe/SimpleFbDxe.inf + INF sdm845Pkg/Drivers/sdm845Dxe/sdm845Dxe.inf + INF sdm845Pkg/Drivers/SimpleFbDxe/SimpleFbDxe.inf FILE DRIVER = 0d35cd8e-97ea-4f9a-96af-0f0d89f76567 { SECTION DXE_DEPEX = sdm845Pkg/Binary/perseus/UFSDxe/UFSDxe.depex diff --git a/sdm845Pkg/polaris.dsc b/sdm845Pkg/Devices/polaris.dsc similarity index 89% rename from sdm845Pkg/polaris.dsc rename to sdm845Pkg/Devices/polaris.dsc index e07f4a0..18ba6b2 100644 --- a/sdm845Pkg/polaris.dsc +++ b/sdm845Pkg/Devices/polaris.dsc @@ -1,19 +1,19 @@ -[Defines] - PLATFORM_NAME = sdm845Pkg - PLATFORM_GUID = 28f1a3bf-193a-47e3-a7b9-5a435eaab2ee - PLATFORM_VERSION = 0.1 - DSC_SPECIFICATION = 0x00010019 - OUTPUT_DIRECTORY = Build/$(PLATFORM_NAME) - SUPPORTED_ARCHITECTURES = AARCH64 - BUILD_TARGETS = DEBUG|RELEASE - SKUID_IDENTIFIER = DEFAULT - FLASH_DEFINITION = sdm845Pkg/polaris.fdf - -!include sdm845Pkg/sdm845Pkg.dsc - -[PcdsFixedAtBuild.common] - # System Memory (5GB) - gArmTokenSpaceGuid.PcdSystemMemorySize|0x140000000 - - gsdm845PkgTokenSpaceGuid.PcdMipiFrameBufferWidth|1080 - gsdm845PkgTokenSpaceGuid.PcdMipiFrameBufferHeight|2160 +[Defines] + PLATFORM_NAME = sdm845Pkg + PLATFORM_GUID = 28f1a3bf-193a-47e3-a7b9-5a435eaab2ee + PLATFORM_VERSION = 0.1 + DSC_SPECIFICATION = 0x00010019 + OUTPUT_DIRECTORY = Build/$(PLATFORM_NAME) + SUPPORTED_ARCHITECTURES = AARCH64 + BUILD_TARGETS = DEBUG|RELEASE + SKUID_IDENTIFIER = DEFAULT + FLASH_DEFINITION = sdm845Pkg/Devices/845.fdf + +!include sdm845Pkg/sdm845Pkg.dsc + +[PcdsFixedAtBuild.common] + # System Memory (5GB) + gArmTokenSpaceGuid.PcdSystemMemorySize|0x140000000 + + gsdm845PkgTokenSpaceGuid.PcdMipiFrameBufferWidth|1080 + gsdm845PkgTokenSpaceGuid.PcdMipiFrameBufferHeight|2160 diff --git a/sdm845Pkg/polaris.fdf b/sdm845Pkg/Devices/polaris.fdf similarity index 99% rename from sdm845Pkg/polaris.fdf rename to sdm845Pkg/Devices/polaris.fdf index 1766a0b..e6b9318 100644 --- a/sdm845Pkg/polaris.fdf +++ b/sdm845Pkg/Devices/polaris.fdf @@ -144,8 +144,8 @@ READ_LOCK_STATUS = TRUE # INF EmbeddedPkg/Drivers/VirtualKeyboardDxe/VirtualKeyboardDxe.inf - INF sdm845Pkg/sdm845Dxe/sdm845Dxe.inf - INF sdm845Pkg/SimpleFbDxe/SimpleFbDxe.inf + INF sdm845Pkg/Drivers/sdm845Dxe/sdm845Dxe.inf + INF sdm845Pkg/Drivers/SimpleFbDxe/SimpleFbDxe.inf FILE DRIVER = 0d35cd8e-97ea-4f9a-96af-0f0d89f76567 { SECTION DXE_DEPEX = sdm845Pkg/Binary/polaris/UFSDxe/UFSDxe.depex diff --git a/sdm845Pkg/SimpleFbDxe/SimpleFbDxe.c b/sdm845Pkg/Drivers/SimpleFbDxe/SimpleFbDxe.c similarity index 100% rename from sdm845Pkg/SimpleFbDxe/SimpleFbDxe.c rename to sdm845Pkg/Drivers/SimpleFbDxe/SimpleFbDxe.c diff --git a/sdm845Pkg/SimpleFbDxe/SimpleFbDxe.inf b/sdm845Pkg/Drivers/SimpleFbDxe/SimpleFbDxe.inf similarity index 100% rename from sdm845Pkg/SimpleFbDxe/SimpleFbDxe.inf rename to sdm845Pkg/Drivers/SimpleFbDxe/SimpleFbDxe.inf diff --git a/sdm845Pkg/sdm845Dxe/sdm845Dxe.c b/sdm845Pkg/Drivers/sdm845Dxe/sdm845Dxe.c similarity index 100% rename from sdm845Pkg/sdm845Dxe/sdm845Dxe.c rename to sdm845Pkg/Drivers/sdm845Dxe/sdm845Dxe.c diff --git a/sdm845Pkg/sdm845Dxe/sdm845Dxe.h b/sdm845Pkg/Drivers/sdm845Dxe/sdm845Dxe.h similarity index 100% rename from sdm845Pkg/sdm845Dxe/sdm845Dxe.h rename to sdm845Pkg/Drivers/sdm845Dxe/sdm845Dxe.h diff --git a/sdm845Pkg/sdm845Dxe/sdm845Dxe.inf b/sdm845Pkg/Drivers/sdm845Dxe/sdm845Dxe.inf similarity index 100% rename from sdm845Pkg/sdm845Dxe/sdm845Dxe.inf rename to sdm845Pkg/Drivers/sdm845Dxe/sdm845Dxe.inf diff --git a/sdm845Pkg/beryllium.fdf b/sdm845Pkg/beryllium.fdf deleted file mode 100644 index 83cada0..0000000 --- a/sdm845Pkg/beryllium.fdf +++ /dev/null @@ -1,337 +0,0 @@ -# -# Copyright (c) 2018, Linaro Limited. All rights reserved. -# -# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# - -################################################################################ -# -# FD Section -# The [FD] Section is made up of the definition statements and a -# description of what goes into the Flash Device Image. Each FD section -# defines one flash "device" image. A flash device image may be one of -# the following: Removable media bootable image (like a boot floppy -# image,) an Option ROM image (that would be "flashed" into an add-in -# card,) a System "Flash" image (that would be burned into a system's -# flash) or an Update ("Capsule") image that will be used to update and -# existing system flash. -# -################################################################################ - -[FD.sdm845Pkg_UEFI] -BaseAddress = 0xd0000000|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in NOR Flash. -Size = 0x00200000|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the FLASH Device -ErasePolarity = 1 - -# This one is tricky, it must be: BlockSize * NumBlocks = Size -BlockSize = 0x00001000 -NumBlocks = 0x200 - -################################################################################ -# -# Following are lists of FD Region layout which correspond to the locations of different -# images within the flash device. -# -# Regions must be defined in ascending order and may not overlap. -# -# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by -# the pipe "|" character, followed by the size of the region, also in hex with the leading -# "0x" characters. Like: -# Offset|Size -# PcdOffsetCName|PcdSizeCName -# RegionType -# -################################################################################ - -# from ArmVirtPkg/ArmVirtQemuKernel.fdf -# -# Implement the Linux kernel header layout so that the loader will identify -# it as something bootable, and execute it with a FDT pointer in x0 or r2. -# -0x00000000|0x00008000 -DATA = { - 0x01, 0x00, 0x00, 0x10, # code0: adr x1, . - 0xff, 0x1f, 0x00, 0x14, # code1: b 0x8000 - 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, # text_offset: 512 KB - 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, # image_size: 2 MB - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, # flags - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, # res2 - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, # res3 - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, # res4 - 0x41, 0x52, 0x4d, 0x64, # magic: "ARM\x64" - 0x00, 0x00, 0x00, 0x00 # res5 -} - -0x00008000|0x001f8000 -gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize -FV = FVMAIN_COMPACT - - -################################################################################ -# -# FV Section -# -# [FV] section is used to define what components or modules are placed within a flash -# device file. This section also defines order the components and modules are positioned -# within the image. The [FV] section consists of define statements, set statements and -# module statements. -# -################################################################################ - -[FV.FvMain] -BlockSize = 0x40 -NumBlocks = 0 # This FV gets compressed so make it just big enough -FvAlignment = 8 # FV alignment and FV attributes setting. -ERASE_POLARITY = 1 -MEMORY_MAPPED = TRUE -STICKY_WRITE = TRUE -LOCK_CAP = TRUE -LOCK_STATUS = TRUE -WRITE_DISABLED_CAP = TRUE -WRITE_ENABLED_CAP = TRUE -WRITE_STATUS = TRUE -WRITE_LOCK_CAP = TRUE -WRITE_LOCK_STATUS = TRUE -READ_DISABLED_CAP = TRUE -READ_ENABLED_CAP = TRUE -READ_STATUS = TRUE -READ_LOCK_CAP = TRUE -READ_LOCK_STATUS = TRUE - - APRIORI DXE { - INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf - } - - INF MdeModulePkg/Core/Dxe/DxeMain.inf - - # - # PI DXE Drivers producing Architectural Protocols (EFI Services) - # - INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf - INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf - INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf - INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf - INF EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf - INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf - INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf - INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf - - FILE DRIVER = af9763a2-033b-4109-8e17-56a98d380c92 { - SECTION DXE_DEPEX = sdm845Pkg/Binary/beryllium/HWIODxeDriver/HWIODxeDriver.depex - SECTION PE32 = sdm845Pkg/Binary/beryllium/HWIODxeDriver/HWIODxeDriver.efi - SECTION UI = "HWIODxeDriver" - } - - FILE DRIVER = 5776232e-082d-4b75-9a0e-fe1d13f7a5d9 { - SECTION DXE_DEPEX = sdm845Pkg/Binary/beryllium/PmicDxe/PmicDxe.depex - SECTION PE32 = sdm845Pkg/Binary/beryllium/PmicDxe/PmicDxe.efi - SECTION UI = "PmicDxe" - } - - FILE DRIVER = 5bd181db-0487-4f1a-ae73-820e165611b3 { - SECTION DXE_DEPEX = sdm845Pkg/Binary/beryllium/ButtonsDxe/ButtonsDxe.depex - SECTION PE32 = sdm845Pkg/Binary/beryllium/ButtonsDxe/ButtonsDxe.efi - SECTION UI = "ButtonsDxe" - } - - # - # Multiple Console IO support - # - INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf - INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf - INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf - INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf - INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf - - INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf - INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf - - INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf - - INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf - - FILE DRIVER = 3299a266-15f0-4346-8318-716336736d3e { - SECTION DXE_DEPEX = sdm845Pkg/Binary/beryllium/UsbDeviceDxe/UsbDeviceDxe.depex - SECTION PE32 = sdm845Pkg/Binary/beryllium/UsbDeviceDxe/UsbDeviceDxe.efi - SECTION UI = "UsbDeviceDxe" - } - - FILE DRIVER = 11faed4c-b21f-4d88-8e48-c4c28a1e50df { - SECTION DXE_DEPEX = sdm845Pkg/Binary/beryllium/UsbPwrCtrlDxe/UsbPwrCtrlDxe.depex - SECTION PE32 = sdm845Pkg/Binary/beryllium/UsbPwrCtrlDxe/UsbPwrCtrlDxe.efi - SECTION UI = "UsbPwrCtrlDxe" - } - - FILE DRIVER = 5af77f10-90df-4e7e-8325-a17ec09d5443 { - SECTION DXE_DEPEX = sdm845Pkg/Binary/beryllium/UsbMsdDxe/UsbMsdDxe.depex - SECTION PE32 = sdm845Pkg/Binary/beryllium/UsbMsdDxe/UsbMsdDxe.efi - SECTION UI = "UsbMsdDxe" - } - - FILE DRIVER = 94f8a6a7-dc34-4101-88c1-99179cceae83 { - SECTION DXE_DEPEX = sdm845Pkg/Binary/beryllium/UsbfnDwc3Dxe/UsbfnDwc3Dxe.depex - SECTION PE32 = sdm845Pkg/Binary/beryllium/UsbfnDwc3Dxe/UsbfnDwc3Dxe.efi - SECTION UI = "UsbfnDwc3Dxe" - } - - FILE DRIVER = cd823a4d-7dec-4531-ae5d-4134fa4127b8 { - SECTION DXE_DEPEX = sdm845Pkg/Binary/beryllium/UsbConfigDxe/UsbConfigDxe.depex - SECTION PE32 = sdm845Pkg/Binary/beryllium/UsbConfigDxe/UsbConfigDxe.efi - SECTION UI = "UsbDeviceDxe" - } - - # - # GPIO - # - - # - # Virtual Keyboard - # - INF EmbeddedPkg/Drivers/VirtualKeyboardDxe/VirtualKeyboardDxe.inf - - INF sdm845Pkg/sdm845Dxe/sdm845Dxe.inf - INF sdm845Pkg/SimpleFbDxe/SimpleFbDxe.inf - - FILE DRIVER = 0d35cd8e-97ea-4f9a-96af-0f0d89f76567 { - SECTION DXE_DEPEX = sdm845Pkg/Binary/beryllium/UFSDxe/UFSDxe.depex - SECTION PE32 = sdm845Pkg/Binary/beryllium/UFSDxe/UFSDxe.efi - SECTION UI = "UFSDxe" - } - FILE DRIVER = 2a7b4bef-80cd-49e1-b473-374ba4d673fc { - SECTION DXE_DEPEX = sdm845Pkg/Binary/beryllium/SPMI/SPMI.depex - SECTION PE32 = sdm845Pkg/Binary/beryllium/SPMI/SPMI.efi - SECTION UI = "SPMI" - } - - FILE DRIVER = f541d663-4a48-40aa-aabf-ff158ccae34c { - SECTION DXE_DEPEX = sdm845Pkg/Binary/beryllium/SmemDxe/SmemDxe.depex - SECTION PE32 = sdm845Pkg/Binary/beryllium/SmemDxe/SmemDxe.efi - SECTION UI = "SmemDxe" - } - - FILE DRIVER = 10e193df-9966-44e7-b17c-59dd831e20fc { - SECTION DXE_DEPEX = sdm845Pkg/Binary/beryllium/ChipInfo/ChipInfo.depex - SECTION PE32 = sdm845Pkg/Binary/beryllium/ChipInfo/ChipInfo.efi - SECTION UI = "ChipInfo" - } - - - # - # USB Host Support - # - INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf - - # - # USB Mass Storage Support - # - INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf - - # - # USB Peripheral Support - # - INF EmbeddedPkg/Drivers/AndroidFastbootTransportUsbDxe/FastbootTransportUsbDxe.inf - - # - # Fastboot - # - INF EmbeddedPkg/Application/AndroidFastboot/AndroidFastbootApp.inf - - # - # FAT filesystem + GPT/MBR partitioning - # - INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf - INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf - INF FatPkg/EnhancedFatDxe/Fat.inf - INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf - - INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf - - INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf - - # - # ACPI Support - # - INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf - INF MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf - INF MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf - # INF RuleOverride = ACPITABLE sdm845Pkg/AcpiTables/AcpiTables.inf - - FILE FREEFORM = 7E374E25-8E01-4FEE-87F2-390C23C606CD { - # SECTION RAW = sdm845Pkg/AcpiTables/minimal/DBG2.aml - # SECTION RAW = sdm845Pkg/AcpiTables/minimal/DSDT.aml - # SECTION RAW = sdm845Pkg/AcpiTables/minimal/FACP.aml - # SECTION RAW = sdm845Pkg/AcpiTables/minimal/GTDT.aml - # SECTION RAW = sdm845Pkg/AcpiTables/minimal/APIC.aml - SECTION RAW = sdm845Pkg/AcpiTables/testing/DBG2.aml - SECTION RAW = sdm845Pkg/AcpiTables/testing/DSDT.aml - SECTION RAW = sdm845Pkg/AcpiTables/testing/CSRT.aml - SECTION RAW = sdm845Pkg/AcpiTables/testing/FADT.aml - SECTION RAW = sdm845Pkg/AcpiTables/testing/FACS.aml - SECTION RAW = sdm845Pkg/AcpiTables/testing/GTDT.aml - SECTION RAW = sdm845Pkg/AcpiTables/testing/IORT.aml - SECTION RAW = sdm845Pkg/AcpiTables/testing/MCFG.aml - SECTION RAW = sdm845Pkg/AcpiTables/testing/MADT.aml - SECTION RAW = sdm845Pkg/AcpiTables/testing/PPTT.aml - SECTION RAW = sdm845Pkg/AcpiTables/testing/TPM2.aml - SECTION UI = "AcpiTables" - } - - # - # SMBIOS Support - # - INF sdm845Pkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf - INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf - - # - # UEFI applications - # - INF ShellPkg/Application/Shell/Shell.inf -!ifdef $(INCLUDE_TFTP_COMMAND) - INF ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf -!endif #$(INCLUDE_TFTP_COMMAND) - - # - # Bds - # - INF MdeModulePkg/Universal/PrintDxe/PrintDxe.inf - INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf - INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf - INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf - INF MdeModulePkg/Universal/DriverHealthManagerDxe/DriverHealthManagerDxe.inf - INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf - INF MdeModulePkg/Application/UiApp/UiApp.inf - INF sdm845Pkg/Drivers/LogoDxe/LogoDxe.inf - -[FV.FVMAIN_COMPACT] -FvAlignment = 8 -ERASE_POLARITY = 1 -MEMORY_MAPPED = TRUE -STICKY_WRITE = TRUE -LOCK_CAP = TRUE -LOCK_STATUS = TRUE -WRITE_DISABLED_CAP = TRUE -WRITE_ENABLED_CAP = TRUE -WRITE_STATUS = TRUE -WRITE_LOCK_CAP = TRUE -WRITE_LOCK_STATUS = TRUE -READ_DISABLED_CAP = TRUE -READ_ENABLED_CAP = TRUE -READ_STATUS = TRUE -READ_LOCK_CAP = TRUE -READ_LOCK_STATUS = TRUE - - INF ArmPlatformPkg/PrePi/PeiUniCore.inf - - FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 { - SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE { - SECTION FV_IMAGE = FVMAIN - } - } - -!include sdm845Pkg/CommonFdf.fdf.inc diff --git a/sdm845Pkg/sdm845Pkg.dsc b/sdm845Pkg/sdm845Pkg.dsc index 446ee37..47d3712 100644 --- a/sdm845Pkg/sdm845Pkg.dsc +++ b/sdm845Pkg/sdm845Pkg.dsc @@ -182,6 +182,10 @@ RealTimeClockLib|sdm845Pkg/Library/VirtualRealTimeClockLib/VirtualRealTimeClockLib.inf } + + MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf + MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf + # # GPIO # @@ -191,8 +195,8 @@ # EmbeddedPkg/Drivers/VirtualKeyboardDxe/VirtualKeyboardDxe.inf - sdm845Pkg/sdm845Dxe/sdm845Dxe.inf - sdm845Pkg/SimpleFbDxe/SimpleFbDxe.inf + sdm845Pkg/Drivers/sdm845Dxe/sdm845Dxe.inf + sdm845Pkg/Drivers/SimpleFbDxe/SimpleFbDxe.inf # # USB Host Support