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106 Commits 3 Branches 22 Tags 1.4 MiB
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106 Commits

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Author SHA1 Message Date
Jianjun Jiang
3aa3aea44d [xfel]rename cmdbuf and cmdlen to cbuf and clen 2021-06-13 01:04:33 +08:00
Jianjun Jiang
05907b73cb [fel]update fel_spi_xfer, 256 bytes for cmdbuf 2021-06-13 00:09:41 +08:00
Jianjun Jiang
a6a79aa844 [spinor]clean up some code for spinor 2021-06-12 23:05:52 +08:00
Jianjun Jiang
ca72f5e8f0 [spinor]rewrite spinor_block_write, speed up 2021-06-12 23:01:09 +08:00
Jianjun Jiang
47e6bcf713 [spinor]rewrite spinor_helper_write, speed up 2021-06-12 22:46:02 +08:00
Jianjun Jiang
53ed767e93 [v831]change swaplen to 65536 2021-06-12 21:44:10 +08:00
Jianjun Jiang
18a29f1e4c [spinor]update spinor_write_enable 2021-06-12 21:43:36 +08:00
Jianjun Jiang
5e25f910db [spi]add SPI_CMD_FAST command 2021-06-12 21:07:18 +08:00
Jianjun Jiang
ae33a7e188 [spinor]update spinor_wait_for_busy 2021-06-12 20:39:31 +08:00
Jianjun Jiang
db2b792fbd [spi]add SPI_CMD_SPINOR_WAIT and SPI_CMD_SPINAND_WAIT command 2021-06-12 20:16:19 +08:00
Jianjun Jiang
0ddad2daf9 [spi]speed up fel_spi_xfer function 2021-06-12 18:30:53 +08:00
Jianjun Jiang
6f04d3c684 [spi]update spi interface 2021-06-12 18:04:08 +08:00
JianjunJiang
e7dca9ca81 [spinor]update spi nor 2021-06-11 16:32:09 +08:00
Jianjun Jiang
32c58db0bd [spinor]cleanup spinor source code 2021-06-11 00:06:49 +08:00
Jianjun Jiang
67de7ac2c1 [spi]remove some spi interface 2021-06-10 23:28:17 +08:00
Jianjun Jiang
e4fa6d2ddc [v3s]update v3s spi payload 2021-06-10 23:24:47 +08:00
Jianjun Jiang
95f248787a [h3]update h3 spi payload 2021-06-10 23:23:07 +08:00
Jianjun Jiang
432bb37acb [v3s]update v3s spi payload 2021-06-10 23:17:12 +08:00
Jianjun Jiang
2c17186631 [v831]update v831 spi payload 2021-06-10 23:11:23 +08:00
Jianjun Jiang
05ac7ed012 [f1c100s]update spi payload 2021-06-10 23:00:45 +08:00
JianjunJiang
d8892b1802 [f1c100s]new spi payload 2021-06-10 18:18:03 +08:00
JianjunJiang
83bf3a0c9b [spinor]rewrite some spi nor flash code 2021-06-10 10:59:32 +08:00
JianjunJiang
af00cdd8dd [f1c100s]change spi xfer buffer, speed up! 2021-06-10 09:54:45 +08:00
JianjunJiang
e056815773 [fel]fix some words 2021-06-10 09:35:50 +08:00
JianjunJiang
39ea4eddf9 [udev]update 99-xfel.rules 2021-06-09 12:04:15 +08:00
JianjunJiang
6c9d515fbd [Makefile]update makefile 2021-06-09 11:57:25 +08:00
JianjunJiang
0f5228c745 [Makefile]restyle makefile 2021-06-09 11:14:55 +08:00
jiang jianjun
79f292858f
Merge pull request #4 from taotieren/fixMakefile 
Update Makefile
 2021-06-09 11:08:48 +08:00
taotieren
b47dd15d45 Update Makefile 2021-06-09 11:05:08 +08:00
JianjunJiang
3ea5f881a6 Merge branch 'taotieren-99-xfel' 2021-06-09 10:51:12 +08:00
taotieren
7d3b5fc755 Add 99-xfel.rules 2021-06-09 10:47:31 +08:00
JianjunJiang
815dac9b65 [Makefile]add make install support 2021-06-09 09:08:15 +08:00
JianjunJiang
81a4e8581b [fel]add some comment for R32 and W32 
This R32 and W32 macro can only be used for byte access address, Don't used for address
that can only support word access. Because the fel protocol can only support
byte operation, VERY IMPORTANT !!!
 2021-06-08 16:58:30 +08:00
JianjunJiang
1f6a8dad1e [f1c100s]add jtag payload for f1c100s 2021-06-08 12:18:50 +08:00
JianjunJiang
b403b7f9ee [v3s-jtag]remove some space 2021-06-08 12:18:34 +08:00
JianjunJiang
a0d5740afc [f1c100s]add ddr payload for f1c100s 2021-06-08 12:10:37 +08:00
JianjunJiang
8df351ba79 [v3s]add jtag payload for v3s 2021-06-08 11:22:09 +08:00
JianjunJiang
08d5d8925d [d1]update d1 ddr payload 2021-06-08 10:36:50 +08:00
JianjunJiang
209bbfd7ea [d1]add d1 jtag payload support 2021-06-08 10:02:36 +08:00
JianjunJiang
99b4ade807 [v831]add jtag payload for v831 2021-06-08 09:51:40 +08:00
JianjunJiang
7dc17c14c3 [fel]remove some ununsed function 2021-06-08 09:37:36 +08:00
JianjunJiang
53957719ab [fel]fix fel chunk to 64kb 2021-06-08 09:31:28 +08:00
JianjunJiang
72f7fb6b7e [h3]add h3 jtag payload 2021-06-07 20:40:32 +08:00
JianjunJiang
2b7f302317 [xfel]remove help command 2021-06-07 17:46:00 +08:00
JianjunJiang
830b2f6351 [chips]add a40i chip support 2021-06-07 17:40:43 +08:00
JianjunJiang
8f8cba5c47 [h3]add spi payload for h3 2021-06-07 14:26:38 +08:00
JianjunJiang
cf1fc25457 [h3]add h3 ddr payload 2021-06-07 14:16:22 +08:00
JianjunJiang
dedb746206 [v3s]using 16kB buffer for spi xfer, speed up! 2021-06-07 12:05:31 +08:00
JianjunJiang
f45646b9bf [v3s]change link address to 0x8000 2021-06-07 11:51:23 +08:00
JianjunJiang
15bc8609ca [v3s]add spi payload for v3s 2021-06-07 09:58:48 +08:00