[h3]add spi payload for h3

This commit is contained in:
JianjunJiang 2021-06-07 14:26:38 +08:00
parent cf1fc25457
commit 8f8cba5c47
81 changed files with 4942 additions and 5 deletions

View File

@ -543,27 +543,265 @@ static int chip_ddr(struct xfel_ctx_t * ctx, const char * type)
static int chip_spi_init(struct xfel_ctx_t * ctx)
{
return 0;
static const uint8_t payload[] = {
0xff, 0xff, 0xff, 0xea, 0x40, 0x00, 0xa0, 0xe3, 0x00, 0xd0, 0x80, 0xe5,
0x04, 0xe0, 0x80, 0xe5, 0x00, 0xe0, 0x0f, 0xe1, 0x08, 0xe0, 0x80, 0xe5,
0x10, 0xef, 0x11, 0xee, 0x0c, 0xe0, 0x80, 0xe5, 0x10, 0xef, 0x1c, 0xee,
0x10, 0xe0, 0x80, 0xe5, 0x10, 0xef, 0x11, 0xee, 0x14, 0xe0, 0x80, 0xe5,
0x0b, 0x00, 0x00, 0xeb, 0x40, 0x00, 0xa0, 0xe3, 0x00, 0xd0, 0x90, 0xe5,
0x04, 0xe0, 0x90, 0xe5, 0x14, 0x10, 0x90, 0xe5, 0x10, 0x1f, 0x01, 0xee,
0x10, 0x10, 0x90, 0xe5, 0x10, 0x1f, 0x0c, 0xee, 0x0c, 0x10, 0x90, 0xe5,
0x10, 0x1f, 0x01, 0xee, 0x08, 0x10, 0x90, 0xe5, 0x01, 0xf0, 0x29, 0xe1,
0x1e, 0xff, 0x2f, 0xe1, 0x00, 0x30, 0xa0, 0xe3, 0x02, 0x19, 0xa0, 0xe3,
0xc2, 0x31, 0x40, 0xe3, 0x01, 0xca, 0xa0, 0xe3, 0xc6, 0x11, 0x40, 0xe3,
0x48, 0x08, 0x93, 0xe5, 0x01, 0x20, 0xa0, 0xe1, 0x0f, 0x00, 0xc0, 0xe3,
0x03, 0x00, 0x80, 0xe3, 0x48, 0x08, 0x83, 0xe5, 0x48, 0x08, 0x93, 0xe5,
0xf0, 0x00, 0xc0, 0xe3, 0x30, 0x00, 0x80, 0xe3, 0x48, 0x08, 0x83, 0xe5,
0x48, 0x08, 0x93, 0xe5, 0x0f, 0x0c, 0xc0, 0xe3, 0x03, 0x0c, 0x80, 0xe3,
0x48, 0x08, 0x83, 0xe5, 0x48, 0x08, 0x93, 0xe5, 0x0f, 0x0a, 0xc0, 0xe3,
0x03, 0x0a, 0x80, 0xe3, 0x48, 0x08, 0x83, 0xe5, 0xc0, 0x02, 0x93, 0xe5,
0x01, 0x06, 0x80, 0xe3, 0xc0, 0x02, 0x83, 0xe5, 0xa0, 0x00, 0x93, 0xe5,
0x02, 0x01, 0x80, 0xe3, 0xa0, 0x00, 0x83, 0xe5, 0x60, 0x00, 0x93, 0xe5,
0x01, 0x06, 0x80, 0xe3, 0x60, 0x00, 0x83, 0xe5, 0xa0, 0x00, 0x93, 0xe5,
0x03, 0x04, 0xc0, 0xe3, 0x01, 0x04, 0x80, 0xe3, 0xa0, 0x00, 0x83, 0xe5,
0xa0, 0x00, 0x93, 0xe5, 0x03, 0x08, 0xc0, 0xe3, 0xa0, 0x00, 0x83, 0xe5,
0xa0, 0x00, 0x93, 0xe5, 0x0f, 0x00, 0xc0, 0xe3, 0x05, 0x00, 0x80, 0xe3,
0xa0, 0x00, 0x83, 0xe5, 0x24, 0xc0, 0x81, 0xe5, 0x04, 0x30, 0x91, 0xe5,
0x02, 0x31, 0x83, 0xe3, 0x83, 0x30, 0x83, 0xe3, 0x04, 0x30, 0x81, 0xe5,
0x04, 0x30, 0x92, 0xe5, 0x00, 0x00, 0x53, 0xe3, 0xfc, 0xff, 0xff, 0xba,
0x08, 0x30, 0x92, 0xe5, 0x03, 0x30, 0xc3, 0xe3, 0x44, 0x30, 0x83, 0xe3,
0x08, 0x30, 0x82, 0xe5, 0x18, 0x30, 0x92, 0xe5, 0x02, 0x31, 0x83, 0xe3,
0x02, 0x39, 0x83, 0xe3, 0x18, 0x30, 0x82, 0xe5, 0x1e, 0xff, 0x2f, 0xe1,
0x04, 0x00, 0x00, 0x00, 0x14, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,
0x47, 0x4e, 0x55, 0x00, 0x63, 0xde, 0x38, 0xcc, 0xe3, 0xec, 0x5e, 0x0d,
0x5f, 0xe1, 0x72, 0x58, 0xca, 0xee, 0x18, 0x18, 0xc0, 0x91, 0x64, 0x3e,
0x2f, 0x6c, 0x69, 0x62, 0x2f, 0x6c, 0x64, 0x2d, 0x6c, 0x69, 0x6e, 0x75,
0x78, 0x2d, 0x61, 0x72, 0x6d, 0x68, 0x66, 0x2e, 0x73, 0x6f, 0x2e, 0x33,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0xf5, 0xfe, 0xff, 0x6f, 0xa4, 0x81, 0x00, 0x00,
0x05, 0x00, 0x00, 0x00, 0xa0, 0x81, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00,
0x90, 0x81, 0x00, 0x00, 0x0a, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
0x0b, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x15, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x1e, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
0xfb, 0xff, 0xff, 0x6f, 0x01, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x81, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
};
fel_write(ctx, 0x00008000, (void *)&payload[0], sizeof(payload));
fel_exec(ctx, 0x00008000);
return 1;
}
static int chip_spi_exit(struct xfel_ctx_t * ctx)
{
return 0;
static const uint8_t payload[] = {
0xff, 0xff, 0xff, 0xea, 0x40, 0x00, 0xa0, 0xe3, 0x00, 0xd0, 0x80, 0xe5,
0x04, 0xe0, 0x80, 0xe5, 0x00, 0xe0, 0x0f, 0xe1, 0x08, 0xe0, 0x80, 0xe5,
0x10, 0xef, 0x11, 0xee, 0x0c, 0xe0, 0x80, 0xe5, 0x10, 0xef, 0x1c, 0xee,
0x10, 0xe0, 0x80, 0xe5, 0x10, 0xef, 0x11, 0xee, 0x14, 0xe0, 0x80, 0xe5,
0x0b, 0x00, 0x00, 0xeb, 0x40, 0x00, 0xa0, 0xe3, 0x00, 0xd0, 0x90, 0xe5,
0x04, 0xe0, 0x90, 0xe5, 0x14, 0x10, 0x90, 0xe5, 0x10, 0x1f, 0x01, 0xee,
0x10, 0x10, 0x90, 0xe5, 0x10, 0x1f, 0x0c, 0xee, 0x0c, 0x10, 0x90, 0xe5,
0x10, 0x1f, 0x01, 0xee, 0x08, 0x10, 0x90, 0xe5, 0x01, 0xf0, 0x29, 0xe1,
0x1e, 0xff, 0x2f, 0xe1, 0x02, 0x39, 0xa0, 0xe3, 0xc6, 0x31, 0x40, 0xe3,
0x04, 0x20, 0x93, 0xe5, 0x03, 0x20, 0xc2, 0xe3, 0x04, 0x20, 0x83, 0xe5,
0x1e, 0xff, 0x2f, 0xe1, 0x04, 0x00, 0x00, 0x00, 0x14, 0x00, 0x00, 0x00,
0x03, 0x00, 0x00, 0x00, 0x47, 0x4e, 0x55, 0x00, 0x3d, 0x95, 0x1b, 0x18,
0xa6, 0xde, 0x41, 0xe3, 0x50, 0x54, 0x7f, 0x9e, 0x83, 0x9d, 0x0b, 0x73,
0x3f, 0xb9, 0x78, 0xc9, 0x2f, 0x6c, 0x69, 0x62, 0x2f, 0x6c, 0x64, 0x2d,
0x6c, 0x69, 0x6e, 0x75, 0x78, 0x2d, 0x61, 0x72, 0x6d, 0x68, 0x66, 0x2e,
0x73, 0x6f, 0x2e, 0x33, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0xf5, 0xfe, 0xff, 0x6f, 0xd0, 0x80, 0x00, 0x00,
0x05, 0x00, 0x00, 0x00, 0xcc, 0x80, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00,
0xbc, 0x80, 0x00, 0x00, 0x0a, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
0x0b, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x15, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x1e, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
0xfb, 0xff, 0xff, 0x6f, 0x01, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe8, 0x80, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
};
fel_write(ctx, 0x00008000, (void *)&payload[0], sizeof(payload));
fel_exec(ctx, 0x00008000);
return 1;
}
static int chip_spi_select(struct xfel_ctx_t * ctx)
{
return 0;
static const uint8_t payload[] = {
0xff, 0xff, 0xff, 0xea, 0x40, 0x00, 0xa0, 0xe3, 0x00, 0xd0, 0x80, 0xe5,
0x04, 0xe0, 0x80, 0xe5, 0x00, 0xe0, 0x0f, 0xe1, 0x08, 0xe0, 0x80, 0xe5,
0x10, 0xef, 0x11, 0xee, 0x0c, 0xe0, 0x80, 0xe5, 0x10, 0xef, 0x1c, 0xee,
0x10, 0xe0, 0x80, 0xe5, 0x10, 0xef, 0x11, 0xee, 0x14, 0xe0, 0x80, 0xe5,
0x0b, 0x00, 0x00, 0xeb, 0x40, 0x00, 0xa0, 0xe3, 0x00, 0xd0, 0x90, 0xe5,
0x04, 0xe0, 0x90, 0xe5, 0x14, 0x10, 0x90, 0xe5, 0x10, 0x1f, 0x01, 0xee,
0x10, 0x10, 0x90, 0xe5, 0x10, 0x1f, 0x0c, 0xee, 0x0c, 0x10, 0x90, 0xe5,
0x10, 0x1f, 0x01, 0xee, 0x08, 0x10, 0x90, 0xe5, 0x01, 0xf0, 0x29, 0xe1,
0x1e, 0xff, 0x2f, 0xe1, 0x02, 0x39, 0xa0, 0xe3, 0xc6, 0x31, 0x40, 0xe3,
0x08, 0x20, 0x93, 0xe5, 0xb0, 0x20, 0xc2, 0xe3, 0x08, 0x20, 0x83, 0xe5,
0x1e, 0xff, 0x2f, 0xe1, 0x04, 0x00, 0x00, 0x00, 0x14, 0x00, 0x00, 0x00,
0x03, 0x00, 0x00, 0x00, 0x47, 0x4e, 0x55, 0x00, 0xf6, 0xa8, 0xb2, 0x7a,
0xdc, 0xa7, 0xdf, 0x3d, 0xfb, 0xe6, 0x93, 0xc8, 0xb8, 0x81, 0x7c, 0xb5,
0xb3, 0x12, 0x01, 0x2a, 0x2f, 0x6c, 0x69, 0x62, 0x2f, 0x6c, 0x64, 0x2d,
0x6c, 0x69, 0x6e, 0x75, 0x78, 0x2d, 0x61, 0x72, 0x6d, 0x68, 0x66, 0x2e,
0x73, 0x6f, 0x2e, 0x33, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0xf5, 0xfe, 0xff, 0x6f, 0xd0, 0x80, 0x00, 0x00,
0x05, 0x00, 0x00, 0x00, 0xcc, 0x80, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00,
0xbc, 0x80, 0x00, 0x00, 0x0a, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
0x0b, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x15, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x1e, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
0xfb, 0xff, 0xff, 0x6f, 0x01, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe8, 0x80, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
};
fel_write(ctx, 0x00008000, (void *)&payload[0], sizeof(payload));
fel_exec(ctx, 0x00008000);
return 1;
}
static int chip_spi_deselect(struct xfel_ctx_t * ctx)
{
return 0;
static const uint8_t payload[] = {
0xff, 0xff, 0xff, 0xea, 0x40, 0x00, 0xa0, 0xe3, 0x00, 0xd0, 0x80, 0xe5,
0x04, 0xe0, 0x80, 0xe5, 0x00, 0xe0, 0x0f, 0xe1, 0x08, 0xe0, 0x80, 0xe5,
0x10, 0xef, 0x11, 0xee, 0x0c, 0xe0, 0x80, 0xe5, 0x10, 0xef, 0x1c, 0xee,
0x10, 0xe0, 0x80, 0xe5, 0x10, 0xef, 0x11, 0xee, 0x14, 0xe0, 0x80, 0xe5,
0x0b, 0x00, 0x00, 0xeb, 0x40, 0x00, 0xa0, 0xe3, 0x00, 0xd0, 0x90, 0xe5,
0x04, 0xe0, 0x90, 0xe5, 0x14, 0x10, 0x90, 0xe5, 0x10, 0x1f, 0x01, 0xee,
0x10, 0x10, 0x90, 0xe5, 0x10, 0x1f, 0x0c, 0xee, 0x0c, 0x10, 0x90, 0xe5,
0x10, 0x1f, 0x01, 0xee, 0x08, 0x10, 0x90, 0xe5, 0x01, 0xf0, 0x29, 0xe1,
0x1e, 0xff, 0x2f, 0xe1, 0x02, 0x29, 0xa0, 0xe3, 0xc6, 0x21, 0x40, 0xe3,
0x08, 0x30, 0x92, 0xe5, 0xb0, 0x30, 0xc3, 0xe3, 0x80, 0x30, 0x83, 0xe3,
0x08, 0x30, 0x82, 0xe5, 0x1e, 0xff, 0x2f, 0xe1, 0x04, 0x00, 0x00, 0x00,
0x14, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x47, 0x4e, 0x55, 0x00,
0xc6, 0xe0, 0xbb, 0xd8, 0x81, 0xd1, 0xe2, 0xcd, 0xe9, 0x7e, 0xe5, 0x48,
0xaf, 0xe7, 0x74, 0x4a, 0x94, 0x22, 0x81, 0xa3, 0x2f, 0x6c, 0x69, 0x62,
0x2f, 0x6c, 0x64, 0x2d, 0x6c, 0x69, 0x6e, 0x75, 0x78, 0x2d, 0x61, 0x72,
0x6d, 0x68, 0x66, 0x2e, 0x73, 0x6f, 0x2e, 0x33, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0xf5, 0xfe, 0xff, 0x6f, 0xd4, 0x80, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00,
0xd0, 0x80, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0xc0, 0x80, 0x00, 0x00,
0x0a, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x0b, 0x00, 0x00, 0x00,
0x10, 0x00, 0x00, 0x00, 0x15, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x1e, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0xfb, 0xff, 0xff, 0x6f,
0x01, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0xf0, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00
};
fel_write(ctx, 0x00008000, (void *)&payload[0], sizeof(payload));
fel_exec(ctx, 0x00008000);
return 1;
}
static int chip_spi_xfer(struct xfel_ctx_t * ctx, void * txbuf, uint32_t txlen, void * rxbuf, uint32_t rxlen)
{
return 0;
static const uint8_t payload[] = {
0x02, 0x00, 0x00, 0xea, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x40, 0x00, 0xa0, 0xe3, 0x00, 0xd0, 0x80, 0xe5,
0x04, 0xe0, 0x80, 0xe5, 0x00, 0xe0, 0x0f, 0xe1, 0x08, 0xe0, 0x80, 0xe5,
0x10, 0xef, 0x11, 0xee, 0x0c, 0xe0, 0x80, 0xe5, 0x10, 0xef, 0x1c, 0xee,
0x10, 0xe0, 0x80, 0xe5, 0x10, 0xef, 0x11, 0xee, 0x14, 0xe0, 0x80, 0xe5,
0x40, 0x00, 0x1f, 0xe5, 0x40, 0x10, 0x1f, 0xe5, 0x40, 0x20, 0x1f, 0xe5,
0x0b, 0x00, 0x00, 0xeb, 0x40, 0x00, 0xa0, 0xe3, 0x00, 0xd0, 0x90, 0xe5,
0x04, 0xe0, 0x90, 0xe5, 0x14, 0x10, 0x90, 0xe5, 0x10, 0x1f, 0x01, 0xee,
0x10, 0x10, 0x90, 0xe5, 0x10, 0x1f, 0x0c, 0xee, 0x0c, 0x10, 0x90, 0xe5,
0x10, 0x1f, 0x01, 0xee, 0x08, 0x10, 0x90, 0xe5, 0x01, 0xf0, 0x29, 0xe1,
0x1e, 0xff, 0x2f, 0xe1, 0xf0, 0x41, 0x2d, 0xe9, 0x00, 0x70, 0x52, 0xe2,
0xf0, 0x81, 0xbd, 0x08, 0x02, 0x49, 0xa0, 0xe3, 0x82, 0x5c, 0xa0, 0xe3,
0xc6, 0x41, 0x40, 0xe3, 0x83, 0x6c, 0xa0, 0xe3, 0xc6, 0x51, 0x40, 0xe3,
0x00, 0x80, 0xe0, 0xe3, 0xc6, 0x61, 0x40, 0xe3, 0x40, 0x00, 0x57, 0xe3,
0x07, 0x20, 0xa0, 0x31, 0x40, 0x20, 0xa0, 0x23, 0x30, 0x20, 0x84, 0xe5,
0x00, 0x00, 0x50, 0xe3, 0x34, 0x20, 0x84, 0xe5, 0x38, 0x20, 0x84, 0xe5,
0x2a, 0x00, 0x00, 0x0a, 0x00, 0xc0, 0xa0, 0xe1, 0x00, 0x30, 0xa0, 0xe3,
0x01, 0xe0, 0xdc, 0xe4, 0x01, 0x30, 0x83, 0xe2, 0x03, 0x00, 0x52, 0xe1,
0x00, 0xe0, 0xc5, 0xe5, 0xfa, 0xff, 0xff, 0xca, 0x08, 0x30, 0x94, 0xe5,
0x02, 0x31, 0x83, 0xe3, 0x08, 0x30, 0x84, 0xe5, 0x1c, 0x30, 0x94, 0xe5,
0x73, 0x30, 0xef, 0xe6, 0x03, 0x00, 0x52, 0xe1, 0xfb, 0xff, 0xff, 0x8a,
0x00, 0x30, 0xa0, 0xe3, 0x00, 0xe0, 0xd6, 0xe5, 0x00, 0x00, 0x51, 0xe3,
0x01, 0xc0, 0xa0, 0xe1, 0x01, 0x30, 0x83, 0xe2, 0x7e, 0xe0, 0xef, 0xe6,
0x08, 0x00, 0x00, 0x0a, 0x03, 0x00, 0x52, 0xe1, 0x01, 0xe0, 0xcc, 0xe4,
0x0c, 0x10, 0xa0, 0xe1, 0xf5, 0xff, 0xff, 0xca, 0x00, 0x00, 0x50, 0xe3,
0x02, 0x00, 0x80, 0x10, 0x02, 0x70, 0x57, 0xe0, 0xda, 0xff, 0xff, 0x1a,
0xf0, 0x81, 0xbd, 0xe8, 0x02, 0x00, 0x53, 0xe1, 0x01, 0xc0, 0x83, 0xe2,
0x02, 0x30, 0x83, 0xe2, 0xf6, 0xff, 0xff, 0xaa, 0x0c, 0x00, 0x52, 0xe1,
0x00, 0xc0, 0xd6, 0xe5, 0xf3, 0xff, 0xff, 0xda, 0x02, 0x00, 0x53, 0xe1,
0x00, 0xc0, 0xd6, 0xe5, 0x01, 0xc0, 0x83, 0xe2, 0x02, 0x30, 0x83, 0xe2,
0xf7, 0xff, 0xff, 0xba, 0xed, 0xff, 0xff, 0xea, 0x00, 0x30, 0xa0, 0xe1,
0x08, 0xc0, 0xa0, 0xe1, 0x00, 0xc0, 0xc5, 0xe5, 0x01, 0x30, 0x83, 0xe2,
0x03, 0x00, 0x52, 0xe1, 0xfb, 0xff, 0xff, 0xca, 0xd4, 0xff, 0xff, 0xea,
0x04, 0x00, 0x00, 0x00, 0x14, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,
0x47, 0x4e, 0x55, 0x00, 0xc0, 0x42, 0x71, 0xf2, 0xea, 0x07, 0x3b, 0xbc,
0xcd, 0xbb, 0xd0, 0x76, 0x07, 0xb7, 0xa0, 0xf5, 0x5e, 0x5d, 0x28, 0x7e,
0x2f, 0x6c, 0x69, 0x62, 0x2f, 0x6c, 0x64, 0x2d, 0x6c, 0x69, 0x6e, 0x75,
0x78, 0x2d, 0x61, 0x72, 0x6d, 0x68, 0x66, 0x2e, 0x73, 0x6f, 0x2e, 0x33,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0xf5, 0xfe, 0xff, 0x6f, 0xe0, 0x81, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00,
0xdc, 0x81, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0xcc, 0x81, 0x00, 0x00,
0x0a, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x0b, 0x00, 0x00, 0x00,
0x10, 0x00, 0x00, 0x00, 0x15, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x1e, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0xfb, 0xff, 0xff, 0x6f,
0x01, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0xf8, 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00
};
uint32_t param[3];
uint32_t n;
fel_write(ctx, 0x00008000, (void *)&payload[0], sizeof(payload));
while(txlen > 0)
{
n = txlen > 16384 ? 16384 : txlen;
param[0] = cpu_to_le32(0x00009000);
param[1] = 0;
param[2] = n;
fel_write(ctx, 0x00008000 + 0x4, (void *)&param, sizeof(param));
fel_write(ctx, 0x00009000, txbuf, n);
fel_exec(ctx, 0x00008000);
txbuf += n;
txlen -= n;
}
while(rxlen > 0)
{
n = rxlen > 16384 ? 16384 : rxlen;
param[0] = 0;
param[1] = cpu_to_le32(0x00009000);
param[2] = n;
fel_write(ctx, 0x00008000 + 0x4, (void *)&param, sizeof(param));
fel_exec(ctx, 0x00008000);
fel_read(ctx, 0x00009000, rxbuf, n);
rxbuf += n;
rxlen -= n;
}
return 1;
}
struct chip_t h3 = {

10
payloads/h3/h3-spi-deselect/.gitignore vendored Normal file
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#
# Normal rules
#
*~
#
# Generated files
#
/.obj
/output

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#
# Top makefile
#
CROSS ?= arm-linux-gnueabihf-
NAME := h3-spi-deselect
#
# System environment variable.
#
#
# System environment variable.
#
ifeq ($(OS), Windows_NT)
HOSTOS := windows
else
ifneq (,$(findstring Linux, $(shell uname -a)))
HOSTOS := linux
endif
endif
#
# Load default variables.
#
ASFLAGS := -g -ggdb -Wall -O3
CFLAGS := -g -ggdb -Wall -O3
CXXFLAGS := -g -ggdb -Wall -O3
LDFLAGS := -T link.ld -nostdlib
ARFLAGS := -rcs
OCFLAGS := -v -O binary
ODFLAGS :=
MCFLAGS := -march=armv7-a -mtune=cortex-a7 -mfpu=vfpv4 -mfloat-abi=hard -marm -mno-thumb-interwork -mno-unaligned-access -fno-stack-protector
LIBDIRS :=
LIBS :=
INCDIRS :=
SRCDIRS :=
#
# Add external library
#
INCDIRS += include \
include/external
SRCDIRS += source \
source/external
#
# You shouldn't need to change anything below this point.
#
AS := $(CROSS)gcc -x assembler-with-cpp
CC := $(CROSS)gcc
CXX := $(CROSS)g++
LD := $(CROSS)ld
AR := $(CROSS)ar
OC := $(CROSS)objcopy
OD := $(CROSS)objdump
MKDIR := mkdir -p
CP := cp -af
RM := rm -fr
CD := cd
FIND := find
#
# X variables
#
X_ASFLAGS := $(MCFLAGS) $(ASFLAGS)
X_CFLAGS := $(MCFLAGS) $(CFLAGS)
X_CXXFLAGS := $(MCFLAGS) $(CXXFLAGS)
X_LDFLAGS := $(LDFLAGS)
X_OCFLAGS := $(OCFLAGS)
X_LIBDIRS := $(LIBDIRS)
X_LIBS := $(LIBS) -lgcc
X_OUT := output
X_NAME := $(patsubst %, $(X_OUT)/%, $(NAME))
X_INCDIRS := $(patsubst %, -I %, $(INCDIRS))
X_SRCDIRS := $(patsubst %, %, $(SRCDIRS))
X_OBJDIRS := $(patsubst %, .obj/%, $(X_SRCDIRS))
X_SFILES := $(foreach dir, $(X_SRCDIRS), $(wildcard $(dir)/*.S))
X_CFILES := $(foreach dir, $(X_SRCDIRS), $(wildcard $(dir)/*.c))
X_CPPFILES := $(foreach dir, $(X_SRCDIRS), $(wildcard $(dir)/*.cpp))
X_SDEPS := $(patsubst %, .obj/%, $(X_SFILES:.S=.o.d))
X_CDEPS := $(patsubst %, .obj/%, $(X_CFILES:.c=.o.d))
X_CPPDEPS := $(patsubst %, .obj/%, $(X_CPPFILES:.cpp=.o.d))
X_DEPS := $(X_SDEPS) $(X_CDEPS) $(X_CPPDEPS)
X_SOBJS := $(patsubst %, .obj/%, $(X_SFILES:.S=.o))
X_COBJS := $(patsubst %, .obj/%, $(X_CFILES:.c=.o))
X_CPPOBJS := $(patsubst %, .obj/%, $(X_CPPFILES:.cpp=.o))
X_OBJS := $(X_SOBJS) $(X_COBJS) $(X_CPPOBJS)
VPATH := $(X_OBJDIRS)
.PHONY: all clean
all : $(X_NAME)
$(X_NAME) : $(X_OBJS)
@echo [LD] Linking $@.elf
@$(CC) $(X_LDFLAGS) $(X_LIBDIRS) -Wl,--cref,-Map=$@.map $^ -o $@.elf $(X_LIBS)
@echo [OC] Objcopying $@.bin
@$(OC) $(X_OCFLAGS) $@.elf $@.bin
$(X_SOBJS) : .obj/%.o : %.S
@echo [AS] $<
@$(AS) $(X_ASFLAGS) -MD -MP -MF $@.d $(X_INCDIRS) -c $< -o $@
$(X_COBJS) : .obj/%.o : %.c
@echo [CC] $<
@$(CC) $(X_CFLAGS) -MD -MP -MF $@.d $(X_INCDIRS) -c $< -o $@
$(X_CPPOBJS) : .obj/%.o : %.cpp
@echo [CXX] $<
@$(CXX) $(X_CXXFLAGS) -MD -MP -MF $@.d $(X_INCDIRS) -c $< -o $@
clean:
@$(RM) .obj $(X_OUT)
#
# Include the dependency files, should be place the last of makefile
#
sinclude $(shell $(MKDIR) $(X_OBJDIRS) $(X_OUT)) $(X_DEPS)

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#ifndef __BYTEORDER_H__
#define __BYTEORDER_H__
#ifdef __cplusplus
extern "C" {
#endif
#include <types.h>
static inline u16_t __swab16(u16_t x)
{
return ( (x<<8) | (x>>8) );
}
static inline u32_t __swab32(u32_t x)
{
return ( (x<<24) | (x>>24) | \
((x & (u32_t)0x0000ff00UL)<<8) | \
((x & (u32_t)0x00ff0000UL)>>8) );
}
static inline u64_t __swab64(u64_t x)
{
return ( (x<<56) | (x>>56) | \
((x & (u64_t)0x000000000000ff00ULL)<<40) | \
((x & (u64_t)0x0000000000ff0000ULL)<<24) | \
((x & (u64_t)0x00000000ff000000ULL)<< 8) | \
((x & (u64_t)0x000000ff00000000ULL)>> 8) | \
((x & (u64_t)0x0000ff0000000000ULL)>>24) | \
((x & (u64_t)0x00ff000000000000ULL)>>40) );
}
/*
* swap bytes bizarrely.
* swahw32 - swap 16-bit half-words in a 32-bit word
*/
static inline u32_t __swahw32(u32_t x)
{
return ( ((x & (u32_t)0x0000ffffUL)<<16) | ((x & (u32_t)0xffff0000UL)>>16) );
}
/*
* swap bytes bizarrely.
* swahb32 - swap 8-bit halves of each 16-bit half-word in a 32-bit word
*/
static inline u32_t __swahb32(u32_t x)
{
return ( ((x & (u32_t)0x00ff00ffUL)<<8) | ((x & (u32_t)0xff00ff00UL)>>8) );
}
#if (BYTE_ORDER == BIG_ENDIAN)
#define cpu_to_le64(x) (__swab64((u64_t)(x)))
#define le64_to_cpu(x) (__swab64((u64_t)(x)))
#define cpu_to_le32(x) (__swab32((u32_t)(x)))
#define le32_to_cpu(x) (__swab32((u32_t)(x)))
#define cpu_to_le16(x) (__swab16((u16_t)(x)))
#define le16_to_cpu(x) (__swab16((u16_t)(x)))
#define cpu_to_be64(x) ((u64_t)(x))
#define be64_to_cpu(x) ((u64_t)(x))
#define cpu_to_be32(x) ((u32_t)(x))
#define be32_to_cpu(x) ((u32_t)(x))
#define cpu_to_be16(x) ((u16_t)(x))
#define be16_to_cpu(x) ((u16_t)(x))
#else
#define cpu_to_le64(x) ((u64_t)(x))
#define le64_to_cpu(x) ((u64_t)(x))
#define cpu_to_le32(x) ((u32_t)(x))
#define le32_to_cpu(x) ((u32_t)(x))
#define cpu_to_le16(x) ((u16_t)(x))
#define le16_to_cpu(x) ((u16_t)(x))
#define cpu_to_be64(x) (__swab64((u64_t)(x)))
#define be64_to_cpu(x) (__swab64((u64_t)(x)))
#define cpu_to_be32(x) (__swab32((u32_t)(x)))
#define be32_to_cpu(x) (__swab32((u32_t)(x)))
#define cpu_to_be16(x) (__swab16((u16_t)(x)))
#define be16_to_cpu(x) (__swab16((u16_t)(x)))
#endif
#ifdef __cplusplus
}
#endif
#endif /* __BYTEORDER_H__ */

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#ifndef __ARM32_ENDIAN_H__
#define __ARM32_ENDIAN_H__
#ifdef __cplusplus
extern "C" {
#endif
#define LITTLE_ENDIAN (0x1234)
#define BIG_ENDIAN (0x4321)
#if ( !defined(__LITTLE_ENDIAN) && !defined(__BIG_ENDIAN) )
#define __LITTLE_ENDIAN
#endif
#if defined(__LITTLE_ENDIAN)
#define BYTE_ORDER LITTLE_ENDIAN
#elif defined(__BIG_ENDIAN)
#define BYTE_ORDER BIG_ENDIAN
#else
#error "Unknown byte order!"
#endif
#ifdef __cplusplus
}
#endif
#endif /* __ARM32_ENDIAN_H__ */

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#ifndef __H3_REG_CCU_H__
#define __H3_REG_CCU_H__
#define H3_CCU_BASE (0x01c20000)
#define CCU_PLL_CPUX_CTRL (0x000)
#define CCU_PLL_AUDIO_CTRL (0x008)
#define CCU_PLL_VIDEO_CTRL (0x010)
#define CCU_PLL_VE_CTRL (0x018)
#define CCU_PLL_DDR_CTRL (0x020)
#define CCU_PLL_PERIPH0_CTRL (0x028)
#define CCU_PLL_GPU_CTRL (0x038)
#define CCU_PLL_PERIPH1_CTRL (0x044)
#define CCU_PLL_DE_CTRL (0x048)
#define CCU_CPUX_AXI_CFG (0x050)
#define CCU_AHB1_APB1_CFG (0x054)
#define CCU_APB1_CFG (0x058)
#define CCU_AHB2_CFG (0x05c)
#define CCU_BUS_CLK_GATE0 (0x060)
#define CCU_BUS_CLK_GATE1 (0x064)
#define CCU_BUS_CLK_GATE2 (0x068)
#define CCU_BUS_CLK_GATE3 (0x06c)
#define CCU_BUS_CLK_GATE4 (0x070)
#define CCU_THS_CLK (0x074)
#define CCU_NAND_CLK (0x080)
#define CCU_SDMMC0_CLK (0x088)
#define CCU_SDMMC1_CLK (0x08c)
#define CCU_SDMMC2_CLK (0x090)
#define CCU_CE_CLK (0x09c)
#define CCU_SPI0_CLK (0x0a0)
#define CCU_SPI1_CLK (0x0a4)
#define CCU_I2S0_CLK (0x0b0)
#define CCU_I2S1_CLK (0x0b4)
#define CCU_I2S2_CLK (0x0b8)
#define CCU_OWA_CLK (0x0c0)
#define CCU_USBPHY_CFG (0x0cc)
#define CCU_DRAM_CFG (0x0f4)
#define CCU_MBUS_RST (0x0fc)
#define CCU_DRAM_CLK_GATE (0x100)
#define CCU_TCON0_CLK (0x118)
#define CCU_TVE_CLK (0x120)
#define CCU_DEINTERLACE_CLK (0x124)
#define CCU_CSI_MISC_CLK (0x130)
#define CCU_CSI_CLK (0x134)
#define CCU_VE_CLK (0x13c)
#define CCU_AC_DIG_CLK (0x140)
#define CCU_AVS_CLK (0x144)
#define CCU_HDMI_CLK (0x150)
#define CCU_HDMI_SLOW_CLK (0x154)
#define CCU_MBUS_CLK (0x15c)
#define CCU_GPU_CLK (0x1a0)
#define CCU_PLL_STABLE_TIME0 (0x200)
#define CCU_PLL_STABLE_TIME1 (0x204)
#define CCU_PLL_CPUX_BIAS (0x220)
#define CCU_PLL_AUDIO_BIAS (0x224)
#define CCU_PLL_VIDEO_BIAS (0x228)
#define CCU_PLL_VE_BIAS (0x22c)
#define CCU_PLL_DDR_BIAS (0x230)
#define CCU_PLL_PERIPH0_BIAS (0x234)
#define CCU_PLL_GPU_BIAS (0x23c)
#define CCU_PLL_PERIPH1_BIAS (0x244)
#define CCU_PLL_DE_BIAS (0x248)
#define CCU_PLL_CPUX_TUN (0x250)
#define CCU_PLL_DDR_TUN (0x260)
#define CCU_PLL_CPUX_PAT (0x280)
#define CCU_PLL_AUDIO_PAT (0x284)
#define CCU_PLL_VIDEO_PAT (0x288)
#define CCU_PLL_VE_PAT (0x28c)
#define CCU_PLL_DDR_PAT (0x290)
#define CCU_PLL_GPU_PAT (0x29c)
#define CCU_PLL_PERIPH1_PAT (0x2a4)
#define CCU_PLL_DE_PAT (0x2a8)
#define CCU_BUS_SOFT_RST0 (0x2c0)
#define CCU_BUS_SOFT_RST1 (0x2c4)
#define CCU_BUS_SOFT_RST2 (0x2c8)
#define CCU_BUS_SOFT_RST3 (0x2d0)
#define CCU_BUS_SOFT_RST4 (0x2d8)
#define CCU_SEC_SWITCH (0x2f0)
#define CCU_PS_CTRL (0x300)
#define CCU_PS_CNT (0x304)
#endif /* __H3_REG_CCU_H__ */

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#ifndef __H3_REG_DRAM_H__
#define __H3_REG_DRAM_H__
#define H3_DRAM_COM_BASE (0x01c62000)
#define H3_DRAM_CTL0_BASE (0x01c63000)
#define H3_DRAM_CTL1_BASE (0x01c64000)
#define H3_DRAM_PHY0_BASE (0x01c65000)
#define H3_DRAM_PHY1_BASE (0x01c66000)
#define MCTL_CR_BL8 (0x4 << 20)
#define MCTL_CR_1T (0x1 << 19)
#define MCTL_CR_2T (0x0 << 19)
#define MCTL_CR_LPDDR3 (0x7 << 16)
#define MCTL_CR_LPDDR2 (0x6 << 16)
#define MCTL_CR_DDR3 (0x3 << 16)
#define MCTL_CR_DDR2 (0x2 << 16)
#define MCTL_CR_SEQUENTIAL (0x1 << 15)
#define MCTL_CR_INTERLEAVED (0x0 << 15)
#define MCTL_CR_FULL_WIDTH (0x1 << 12)
#define MCTL_CR_HALF_WIDTH (0x0 << 12)
#define MCTL_CR_BUS_FULL_WIDTH(x) ((x) << 12)
#define MCTL_CR_PAGE_SIZE(x) ((gfls(x) - 4) << 8)
#define MCTL_CR_ROW_BITS(x) (((x) - 1) << 4)
#define MCTL_CR_EIGHT_BANKS (0x1 << 2)
#define MCTL_CR_FOUR_BANKS (0x0 << 2)
#define MCTL_CR_DUAL_RANK (0x1 << 0)
#define MCTL_CR_SINGLE_RANK (0x0 << 0)
#define DRAMTMG0_TWTP(x) ((x) << 24)
#define DRAMTMG0_TFAW(x) ((x) << 16)
#define DRAMTMG0_TRAS_MAX(x) ((x) << 8)
#define DRAMTMG0_TRAS(x) ((x) << 0)
#define DRAMTMG1_TXP(x) ((x) << 16)
#define DRAMTMG1_TRTP(x) ((x) << 8)
#define DRAMTMG1_TRC(x) ((x) << 0)
#define DRAMTMG2_TCWL(x) ((x) << 24)
#define DRAMTMG2_TCL(x) ((x) << 16)
#define DRAMTMG2_TRD2WR(x) ((x) << 8)
#define DRAMTMG2_TWR2RD(x) ((x) << 0)
#define DRAMTMG3_TMRW(x) ((x) << 16)
#define DRAMTMG3_TMRD(x) ((x) << 12)
#define DRAMTMG3_TMOD(x) ((x) << 0)
#define DRAMTMG4_TRCD(x) ((x) << 24)
#define DRAMTMG4_TCCD(x) ((x) << 16)
#define DRAMTMG4_TRRD(x) ((x) << 8)
#define DRAMTMG4_TRP(x) ((x) << 0)
#define DRAMTMG5_TCKSRX(x) ((x) << 24)
#define DRAMTMG5_TCKSRE(x) ((x) << 16)
#define DRAMTMG5_TCKESR(x) ((x) << 8)
#define DRAMTMG5_TCKE(x) ((x) << 0)
#define PTR3_TDINIT1(x) ((x) << 20)
#define PTR3_TDINIT0(x) ((x) << 0)
#define PTR4_TDINIT3(x) ((x) << 20)
#define PTR4_TDINIT2(x) ((x) << 0)
#define RFSHTMG_TREFI(x) ((x) << 16)
#define RFSHTMG_TRFC(x) ((x) << 0)
#define PIR_CLRSR (0x1 << 27) /* Clear status registers */
#define PIR_QSGATE (0x1 << 10) /* Read DQS gate training */
#define PIR_DRAMINIT (0x1 << 8) /* DRAM initialization */
#define PIR_DRAMRST (0x1 << 7) /* DRAM reset */
#define PIR_PHYRST (0x1 << 6) /* PHY reset */
#define PIR_DCAL (0x1 << 5) /* DDL calibration */
#define PIR_PLLINIT (0x1 << 4) /* PLL initialization */
#define PIR_ZCAL (0x1 << 1) /* ZQ calibration */
#define PIR_INIT (0x1 << 0) /* PHY initialization trigger */
#define PGSR_INIT_DONE (0x1 << 0) /* PHY init done */
#define ZQCR_PWRDOWN (0x1 << 31) /* ZQ power down */
#define DXBDLR_DQ(x) (x) /* DQ0-7 BDLR index */
#define DXBDLR_DM (8) /* DM BDLR index */
#define DXBDLR_DQS (9) /* DQS BDLR index */
#define DXBDLR_DQSN (10) /* DQSN BDLR index */
#define DXBDLR_WRITE_DELAY(x) ((x) << 8)
#define DXBDLR_READ_DELAY(x) ((x) << 0)
#define ACBDLR_WRITE_DELAY(x) ((x) << 8)
#endif /* __H3_REG_DRAM_H__ */

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@ -0,0 +1,54 @@
#ifndef __IO_H__
#define __IO_H__
#ifdef __cplusplus
extern "C" {
#endif
#include <types.h>
static inline u8_t read8(virtual_addr_t addr)
{
return( *((volatile u8_t *)(addr)) );
}
static inline u16_t read16(virtual_addr_t addr)
{
return( *((volatile u16_t *)(addr)) );
}
static inline u32_t read32(virtual_addr_t addr)
{
return( *((volatile u32_t *)(addr)) );
}
static inline u64_t read64(virtual_addr_t addr)
{
return( *((volatile u64_t *)(addr)) );
}
static inline void write8(virtual_addr_t addr, u8_t value)
{
*((volatile u8_t *)(addr)) = value;
}
static inline void write16(virtual_addr_t addr, u16_t value)
{
*((volatile u16_t *)(addr)) = value;
}
static inline void write32(virtual_addr_t addr, u32_t value)
{
*((volatile u32_t *)(addr)) = value;
}
static inline void write64(virtual_addr_t addr, u64_t value)
{
*((volatile u64_t *)(addr)) = value;
}
#ifdef __cplusplus
}
#endif
#endif /* __IO_H__ */

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@ -0,0 +1,34 @@
#ifndef __STDARG_H__
#define __STDARG_H__
#ifdef __cplusplus
extern "C" {
#endif
typedef __builtin_va_list va_list;
/*
* prepare to access variable args
*/
#define va_start(v, l) __builtin_va_start(v, l)
/*
* the caller will get the value of current argument
*/
#define va_arg(v, l) __builtin_va_arg(v, l)
/*
* end for variable args
*/
#define va_end(v) __builtin_va_end(v)
/*
* copy variable args
*/
#define va_copy(d, s) __builtin_va_copy(d, s)
#ifdef __cplusplus
}
#endif
#endif /* __STDARG_H__ */

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@ -0,0 +1,49 @@
#ifndef __STDDEF_H__
#define __STDDEF_H__
#ifdef __cplusplus
extern "C" {
#endif
#if defined(__cplusplus)
#define NULL (0)
#else
#define NULL ((void *)0)
#endif
#if (defined(__GNUC__) && (__GNUC__ >= 4))
#define offsetof(type, member) __builtin_offsetof(type, member)
#else
#define offsetof(type, field) ((size_t)(&((type *)0)->field))
#endif
#define container_of(ptr, type, member) ({const typeof(((type *)0)->member) *__mptr = (ptr); (type *)((char *)__mptr - offsetof(type,member));})
#if (defined(__GNUC__) && (__GNUC__ >= 3))
#define likely(expr) (__builtin_expect(!!(expr), 1))
#define unlikely(expr) (__builtin_expect(!!(expr), 0))
#else
#define likely(expr) (!!(expr))
#define unlikely(expr) (!!(expr))
#endif
#define min(a, b) ({typeof(a) _amin = (a); typeof(b) _bmin = (b); (void)(&_amin == &_bmin); _amin < _bmin ? _amin : _bmin;})
#define max(a, b) ({typeof(a) _amax = (a); typeof(b) _bmax = (b); (void)(&_amax == &_bmax); _amax > _bmax ? _amax : _bmax;})
#define clamp(v, a, b) min(max(a, v), b)
#define ifloor(x) ((x) > 0 ? (int)(x) : (int)((x) - 0.9999999999))
#define iround(x) ((x) > 0 ? (int)((x) + 0.5) : (int)((x) - 0.5))
#define iceil(x) ((x) > 0 ? (int)((x) + 0.9999999999) : (int)(x))
#define idiv255(x) ((((int)(x) + 1) * 257) >> 16)
#define X(...) ("" #__VA_ARGS__ "")
enum {
FALSE = 0,
TRUE = 1,
};
#ifdef __cplusplus
}
#endif
#endif /* __STDDEF_H__ */

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@ -0,0 +1,31 @@
#ifndef __STDINT_H__
#define __STDINT_H__
#ifdef __cplusplus
extern "C" {
#endif
#include <types.h>
typedef s8_t int8_t;
typedef u8_t uint8_t;
typedef s16_t int16_t;
typedef u16_t uint16_t;
typedef s32_t int32_t;
typedef u32_t uint32_t;
typedef s64_t int64_t;
typedef u64_t uint64_t;
#define UINT8_MAX (0xff)
#define UINT16_MAX (0xffff)
#define UINT32_MAX (0xffffffff)
#define UINT64_MAX (0xffffffffffffffffULL)
#ifdef __cplusplus
}
#endif
#endif /* __STDINT_H__ */

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@ -0,0 +1,17 @@
#ifndef __STRING_H__
#define __STRING_H__
#ifdef __cplusplus
extern "C" {
#endif
#include <types.h>
void * memset(void * s, int c, size_t n);
void * memcpy(void * dest, const void * src, size_t len);
#ifdef __cplusplus
}
#endif
#endif /* __STRING_H__ */

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@ -0,0 +1,53 @@
#ifndef __ARM32_TYPES_H__
#define __ARM32_TYPES_H__
#ifdef __cplusplus
extern "C" {
#endif
typedef signed char s8_t;
typedef unsigned char u8_t;
typedef signed short s16_t;
typedef unsigned short u16_t;
typedef signed int s32_t;
typedef unsigned int u32_t;
typedef signed long long s64_t;
typedef unsigned long long u64_t;
typedef signed long long intmax_t;
typedef unsigned long long uintmax_t;
typedef signed int ptrdiff_t;
typedef signed int intptr_t;
typedef unsigned int uintptr_t;
typedef unsigned int size_t;
typedef signed int ssize_t;
typedef signed int off_t;
typedef signed long long loff_t;
typedef signed int bool_t;
typedef unsigned int irq_flags_t;
typedef unsigned int virtual_addr_t;
typedef unsigned int virtual_size_t;
typedef unsigned int physical_addr_t;
typedef unsigned int physical_size_t;
typedef struct {
volatile int counter;
} atomic_t;
typedef struct {
volatile int lock;
} spinlock_t;
#ifdef __cplusplus
}
#endif
#endif /* __ARM32_TYPES_H__ */

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@ -0,0 +1,21 @@
#ifndef __XBOOT_H__
#define __XBOOT_H__
#ifdef __cplusplus
extern "C" {
#endif
#include <types.h>
#include <io.h>
#include <stdarg.h>
#include <stddef.h>
#include <stdint.h>
#include <string.h>
#include <endian.h>
#include <byteorder.h>
#ifdef __cplusplus
}
#endif
#endif /* __XBOOT_H__ */

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@ -0,0 +1,122 @@
OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
STACK_UND_SIZE = 0x010;
STACK_ABT_SIZE = 0x010;
STACK_IRQ_SIZE = 0x010;
STACK_FIQ_SIZE = 0x010;
STACK_SRV_SIZE = 0x400;
MEMORY
{
ram : org = 0x00008000, len = 0x00001000 /* 4 KB */
}
SECTIONS
{
.text :
{
PROVIDE(__image_start = .);
PROVIDE(__text_start = .);
.obj/source/start.o (.text)
.obj/source/sys-spi.o (.text)
*(.text*)
*(.glue*)
*(.note.gnu.build-id)
PROVIDE(__text_end = .);
} > ram
.ARM.exidx ALIGN(8) :
{
PROVIDE (__exidx_start = .);
*(.ARM.exidx*)
PROVIDE (__exidx_end = .);
} > ram
.ARM.extab ALIGN(8) :
{
PROVIDE (__extab_start = .);
*(.ARM.extab*)
PROVIDE (__extab_end = .);
} > ram
.ksymtab ALIGN(16) :
{
PROVIDE(__ksymtab_start = .);
KEEP(*(.ksymtab.text))
PROVIDE(__ksymtab_end = .);
} > ram
.romdisk ALIGN(8) :
{
PROVIDE(__romdisk_start = .);
KEEP(*(.romdisk))
PROVIDE(__romdisk_end = .);
} > ram
.rodata ALIGN(8) :
{
PROVIDE(__rodata_start = .);
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
PROVIDE(__rodata_end = .);
} > ram
.data ALIGN(8) :
{
PROVIDE(__data_start = .);
*(.data*)
. = ALIGN(8);
PROVIDE(__data_end = .);
PROVIDE(__image_end = .);
} > ram
.bss ALIGN(8) (NOLOAD) :
{
PROVIDE(__bss_start = .);
*(.bss*)
*(.sbss*)
*(COMMON)
. = ALIGN(8);
PROVIDE(__bss_end = .);
} > ram
.stack ALIGN(8) (NOLOAD) :
{
PROVIDE(__stack_start = .);
PROVIDE(__stack_und_start = .);
. += STACK_UND_SIZE;
PROVIDE(__stack_und_end = .);
. = ALIGN(8);
PROVIDE(__stack_abt_start = .);
. += STACK_ABT_SIZE;
PROVIDE(__stack_abt_end = .);
. = ALIGN(8);
PROVIDE(__stack_irq_start = .);
. += STACK_IRQ_SIZE;
PROVIDE(__stack_irq_end = .);
. = ALIGN(8);
PROVIDE(__stack_fiq_start = .);
. += STACK_FIQ_SIZE;
PROVIDE(__stack_fiq_end = .);
. = ALIGN(8);
PROVIDE(__stack_srv_start = .);
. += STACK_SRV_SIZE;
PROVIDE(__stack_srv_end = .);
. = ALIGN(8);
PROVIDE(__stack_end = .);
} > ram
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}

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@ -0,0 +1,60 @@
/*
* start.S
*
* Copyright(c) 2007-2021 Jianjun Jiang <8192542@qq.com>
* Official site: http://xboot.org
* Mobile phone: +86-18665388956
* QQ: 8192542
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
*/
.global _start
_start:
b reset
reset:
ldr r0, =0x00000040
str sp, [r0, #0]
str lr, [r0, #4]
mrs lr, cpsr
str lr, [r0, #8]
mrc p15, 0, lr, c1, c0, 0
str lr, [r0, #12]
mrc p15, 0, lr, c12, c0, 0
str lr, [r0, #16]
mrc p15, 0, lr, c1, c0, 0
str lr, [r0, #20]
bl sys_spi_deselect
ldr r0, =0x00000040
ldr sp, [r0, #0]
ldr lr, [r0, #4]
ldr r1, [r0, #20]
mcr p15, 0, r1, c1, c0, 0
ldr r1, [r0, #16]
mcr p15, 0, r1, c12, c0, 0
ldr r1, [r0, #12]
mcr p15, 0, r1, c1, c0, 0
ldr r1, [r0, #8]
msr cpsr, r1
bx lr

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@ -0,0 +1,57 @@
/*
* sys-spi.c
*
* Copyright(c) 2007-2021 Jianjun Jiang <8192542@qq.com>
* Official site: http://xboot.org
* Mobile phone: +86-18665388956
* QQ: 8192542
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
*/
#include <xboot.h>
enum {
SPI_GCR = 0x04,
SPI_TCR = 0x08,
SPI_IER = 0x10,
SPI_ISR = 0x14,
SPI_FCR = 0x18,
SPI_FSR = 0x1c,
SPI_WCR = 0x20,
SPI_CCR = 0x24,
SPI_MBC = 0x30,
SPI_MTC = 0x34,
SPI_BCC = 0x38,
SPI_TXD = 0x200,
SPI_RXD = 0x300,
};
void sys_spi_deselect(void)
{
virtual_addr_t addr = 0x01c68000;
u32_t val;
val = read32(addr + SPI_TCR);
val &= ~((0x3 << 4) | (0x1 << 7));
val |= ((0 & 0x3) << 4) | (0x1 << 7);
write32(addr + SPI_TCR, val);
}

10
payloads/h3/h3-spi-exit/.gitignore vendored Normal file
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@ -0,0 +1,10 @@
#
# Normal rules
#
*~
#
# Generated files
#
/.obj
/output

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@ -0,0 +1,123 @@
#
# Top makefile
#
CROSS ?= arm-linux-gnueabihf-
NAME := h3-spi-exit
#
# System environment variable.
#
#
# System environment variable.
#
ifeq ($(OS), Windows_NT)
HOSTOS := windows
else
ifneq (,$(findstring Linux, $(shell uname -a)))
HOSTOS := linux
endif
endif
#
# Load default variables.
#
ASFLAGS := -g -ggdb -Wall -O3
CFLAGS := -g -ggdb -Wall -O3
CXXFLAGS := -g -ggdb -Wall -O3
LDFLAGS := -T link.ld -nostdlib
ARFLAGS := -rcs
OCFLAGS := -v -O binary
ODFLAGS :=
MCFLAGS := -march=armv7-a -mtune=cortex-a7 -mfpu=vfpv4 -mfloat-abi=hard -marm -mno-thumb-interwork -mno-unaligned-access -fno-stack-protector
LIBDIRS :=
LIBS :=
INCDIRS :=
SRCDIRS :=
#
# Add external library
#
INCDIRS += include \
include/external
SRCDIRS += source \
source/external
#
# You shouldn't need to change anything below this point.
#
AS := $(CROSS)gcc -x assembler-with-cpp
CC := $(CROSS)gcc
CXX := $(CROSS)g++
LD := $(CROSS)ld
AR := $(CROSS)ar
OC := $(CROSS)objcopy
OD := $(CROSS)objdump
MKDIR := mkdir -p
CP := cp -af
RM := rm -fr
CD := cd
FIND := find
#
# X variables
#
X_ASFLAGS := $(MCFLAGS) $(ASFLAGS)
X_CFLAGS := $(MCFLAGS) $(CFLAGS)
X_CXXFLAGS := $(MCFLAGS) $(CXXFLAGS)
X_LDFLAGS := $(LDFLAGS)
X_OCFLAGS := $(OCFLAGS)
X_LIBDIRS := $(LIBDIRS)
X_LIBS := $(LIBS) -lgcc
X_OUT := output
X_NAME := $(patsubst %, $(X_OUT)/%, $(NAME))
X_INCDIRS := $(patsubst %, -I %, $(INCDIRS))
X_SRCDIRS := $(patsubst %, %, $(SRCDIRS))
X_OBJDIRS := $(patsubst %, .obj/%, $(X_SRCDIRS))
X_SFILES := $(foreach dir, $(X_SRCDIRS), $(wildcard $(dir)/*.S))
X_CFILES := $(foreach dir, $(X_SRCDIRS), $(wildcard $(dir)/*.c))
X_CPPFILES := $(foreach dir, $(X_SRCDIRS), $(wildcard $(dir)/*.cpp))
X_SDEPS := $(patsubst %, .obj/%, $(X_SFILES:.S=.o.d))
X_CDEPS := $(patsubst %, .obj/%, $(X_CFILES:.c=.o.d))
X_CPPDEPS := $(patsubst %, .obj/%, $(X_CPPFILES:.cpp=.o.d))
X_DEPS := $(X_SDEPS) $(X_CDEPS) $(X_CPPDEPS)
X_SOBJS := $(patsubst %, .obj/%, $(X_SFILES:.S=.o))
X_COBJS := $(patsubst %, .obj/%, $(X_CFILES:.c=.o))
X_CPPOBJS := $(patsubst %, .obj/%, $(X_CPPFILES:.cpp=.o))
X_OBJS := $(X_SOBJS) $(X_COBJS) $(X_CPPOBJS)
VPATH := $(X_OBJDIRS)
.PHONY: all clean
all : $(X_NAME)
$(X_NAME) : $(X_OBJS)
@echo [LD] Linking $@.elf
@$(CC) $(X_LDFLAGS) $(X_LIBDIRS) -Wl,--cref,-Map=$@.map $^ -o $@.elf $(X_LIBS)
@echo [OC] Objcopying $@.bin
@$(OC) $(X_OCFLAGS) $@.elf $@.bin
$(X_SOBJS) : .obj/%.o : %.S
@echo [AS] $<
@$(AS) $(X_ASFLAGS) -MD -MP -MF $@.d $(X_INCDIRS) -c $< -o $@
$(X_COBJS) : .obj/%.o : %.c
@echo [CC] $<
@$(CC) $(X_CFLAGS) -MD -MP -MF $@.d $(X_INCDIRS) -c $< -o $@
$(X_CPPOBJS) : .obj/%.o : %.cpp
@echo [CXX] $<
@$(CXX) $(X_CXXFLAGS) -MD -MP -MF $@.d $(X_INCDIRS) -c $< -o $@
clean:
@$(RM) .obj $(X_OUT)
#
# Include the dependency files, should be place the last of makefile
#
sinclude $(shell $(MKDIR) $(X_OBJDIRS) $(X_OUT)) $(X_DEPS)

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#ifndef __BYTEORDER_H__
#define __BYTEORDER_H__
#ifdef __cplusplus
extern "C" {
#endif
#include <types.h>
static inline u16_t __swab16(u16_t x)
{
return ( (x<<8) | (x>>8) );
}
static inline u32_t __swab32(u32_t x)
{
return ( (x<<24) | (x>>24) | \
((x & (u32_t)0x0000ff00UL)<<8) | \
((x & (u32_t)0x00ff0000UL)>>8) );
}
static inline u64_t __swab64(u64_t x)
{
return ( (x<<56) | (x>>56) | \
((x & (u64_t)0x000000000000ff00ULL)<<40) | \
((x & (u64_t)0x0000000000ff0000ULL)<<24) | \
((x & (u64_t)0x00000000ff000000ULL)<< 8) | \
((x & (u64_t)0x000000ff00000000ULL)>> 8) | \
((x & (u64_t)0x0000ff0000000000ULL)>>24) | \
((x & (u64_t)0x00ff000000000000ULL)>>40) );
}
/*
* swap bytes bizarrely.
* swahw32 - swap 16-bit half-words in a 32-bit word
*/
static inline u32_t __swahw32(u32_t x)
{
return ( ((x & (u32_t)0x0000ffffUL)<<16) | ((x & (u32_t)0xffff0000UL)>>16) );
}
/*
* swap bytes bizarrely.
* swahb32 - swap 8-bit halves of each 16-bit half-word in a 32-bit word
*/
static inline u32_t __swahb32(u32_t x)
{
return ( ((x & (u32_t)0x00ff00ffUL)<<8) | ((x & (u32_t)0xff00ff00UL)>>8) );
}
#if (BYTE_ORDER == BIG_ENDIAN)
#define cpu_to_le64(x) (__swab64((u64_t)(x)))
#define le64_to_cpu(x) (__swab64((u64_t)(x)))
#define cpu_to_le32(x) (__swab32((u32_t)(x)))
#define le32_to_cpu(x) (__swab32((u32_t)(x)))
#define cpu_to_le16(x) (__swab16((u16_t)(x)))
#define le16_to_cpu(x) (__swab16((u16_t)(x)))
#define cpu_to_be64(x) ((u64_t)(x))
#define be64_to_cpu(x) ((u64_t)(x))
#define cpu_to_be32(x) ((u32_t)(x))
#define be32_to_cpu(x) ((u32_t)(x))
#define cpu_to_be16(x) ((u16_t)(x))
#define be16_to_cpu(x) ((u16_t)(x))
#else
#define cpu_to_le64(x) ((u64_t)(x))
#define le64_to_cpu(x) ((u64_t)(x))
#define cpu_to_le32(x) ((u32_t)(x))
#define le32_to_cpu(x) ((u32_t)(x))
#define cpu_to_le16(x) ((u16_t)(x))
#define le16_to_cpu(x) ((u16_t)(x))
#define cpu_to_be64(x) (__swab64((u64_t)(x)))
#define be64_to_cpu(x) (__swab64((u64_t)(x)))
#define cpu_to_be32(x) (__swab32((u32_t)(x)))
#define be32_to_cpu(x) (__swab32((u32_t)(x)))
#define cpu_to_be16(x) (__swab16((u16_t)(x)))
#define be16_to_cpu(x) (__swab16((u16_t)(x)))
#endif
#ifdef __cplusplus
}
#endif
#endif /* __BYTEORDER_H__ */

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@ -0,0 +1,27 @@
#ifndef __ARM32_ENDIAN_H__
#define __ARM32_ENDIAN_H__
#ifdef __cplusplus
extern "C" {
#endif
#define LITTLE_ENDIAN (0x1234)
#define BIG_ENDIAN (0x4321)
#if ( !defined(__LITTLE_ENDIAN) && !defined(__BIG_ENDIAN) )
#define __LITTLE_ENDIAN
#endif
#if defined(__LITTLE_ENDIAN)
#define BYTE_ORDER LITTLE_ENDIAN
#elif defined(__BIG_ENDIAN)
#define BYTE_ORDER BIG_ENDIAN
#else
#error "Unknown byte order!"
#endif
#ifdef __cplusplus
}
#endif
#endif /* __ARM32_ENDIAN_H__ */

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@ -0,0 +1,88 @@
#ifndef __H3_REG_CCU_H__
#define __H3_REG_CCU_H__
#define H3_CCU_BASE (0x01c20000)
#define CCU_PLL_CPUX_CTRL (0x000)
#define CCU_PLL_AUDIO_CTRL (0x008)
#define CCU_PLL_VIDEO_CTRL (0x010)
#define CCU_PLL_VE_CTRL (0x018)
#define CCU_PLL_DDR_CTRL (0x020)
#define CCU_PLL_PERIPH0_CTRL (0x028)
#define CCU_PLL_GPU_CTRL (0x038)
#define CCU_PLL_PERIPH1_CTRL (0x044)
#define CCU_PLL_DE_CTRL (0x048)
#define CCU_CPUX_AXI_CFG (0x050)
#define CCU_AHB1_APB1_CFG (0x054)
#define CCU_APB1_CFG (0x058)
#define CCU_AHB2_CFG (0x05c)
#define CCU_BUS_CLK_GATE0 (0x060)
#define CCU_BUS_CLK_GATE1 (0x064)
#define CCU_BUS_CLK_GATE2 (0x068)
#define CCU_BUS_CLK_GATE3 (0x06c)
#define CCU_BUS_CLK_GATE4 (0x070)
#define CCU_THS_CLK (0x074)
#define CCU_NAND_CLK (0x080)
#define CCU_SDMMC0_CLK (0x088)
#define CCU_SDMMC1_CLK (0x08c)
#define CCU_SDMMC2_CLK (0x090)
#define CCU_CE_CLK (0x09c)
#define CCU_SPI0_CLK (0x0a0)
#define CCU_SPI1_CLK (0x0a4)
#define CCU_I2S0_CLK (0x0b0)
#define CCU_I2S1_CLK (0x0b4)
#define CCU_I2S2_CLK (0x0b8)
#define CCU_OWA_CLK (0x0c0)
#define CCU_USBPHY_CFG (0x0cc)
#define CCU_DRAM_CFG (0x0f4)
#define CCU_MBUS_RST (0x0fc)
#define CCU_DRAM_CLK_GATE (0x100)
#define CCU_TCON0_CLK (0x118)
#define CCU_TVE_CLK (0x120)
#define CCU_DEINTERLACE_CLK (0x124)
#define CCU_CSI_MISC_CLK (0x130)
#define CCU_CSI_CLK (0x134)
#define CCU_VE_CLK (0x13c)
#define CCU_AC_DIG_CLK (0x140)
#define CCU_AVS_CLK (0x144)
#define CCU_HDMI_CLK (0x150)
#define CCU_HDMI_SLOW_CLK (0x154)
#define CCU_MBUS_CLK (0x15c)
#define CCU_GPU_CLK (0x1a0)
#define CCU_PLL_STABLE_TIME0 (0x200)
#define CCU_PLL_STABLE_TIME1 (0x204)
#define CCU_PLL_CPUX_BIAS (0x220)
#define CCU_PLL_AUDIO_BIAS (0x224)
#define CCU_PLL_VIDEO_BIAS (0x228)
#define CCU_PLL_VE_BIAS (0x22c)
#define CCU_PLL_DDR_BIAS (0x230)
#define CCU_PLL_PERIPH0_BIAS (0x234)
#define CCU_PLL_GPU_BIAS (0x23c)
#define CCU_PLL_PERIPH1_BIAS (0x244)
#define CCU_PLL_DE_BIAS (0x248)
#define CCU_PLL_CPUX_TUN (0x250)
#define CCU_PLL_DDR_TUN (0x260)
#define CCU_PLL_CPUX_PAT (0x280)
#define CCU_PLL_AUDIO_PAT (0x284)
#define CCU_PLL_VIDEO_PAT (0x288)
#define CCU_PLL_VE_PAT (0x28c)
#define CCU_PLL_DDR_PAT (0x290)
#define CCU_PLL_GPU_PAT (0x29c)
#define CCU_PLL_PERIPH1_PAT (0x2a4)
#define CCU_PLL_DE_PAT (0x2a8)
#define CCU_BUS_SOFT_RST0 (0x2c0)
#define CCU_BUS_SOFT_RST1 (0x2c4)
#define CCU_BUS_SOFT_RST2 (0x2c8)
#define CCU_BUS_SOFT_RST3 (0x2d0)
#define CCU_BUS_SOFT_RST4 (0x2d8)
#define CCU_SEC_SWITCH (0x2f0)
#define CCU_PS_CTRL (0x300)
#define CCU_PS_CNT (0x304)
#endif /* __H3_REG_CCU_H__ */

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@ -0,0 +1,87 @@
#ifndef __H3_REG_DRAM_H__
#define __H3_REG_DRAM_H__
#define H3_DRAM_COM_BASE (0x01c62000)
#define H3_DRAM_CTL0_BASE (0x01c63000)
#define H3_DRAM_CTL1_BASE (0x01c64000)
#define H3_DRAM_PHY0_BASE (0x01c65000)
#define H3_DRAM_PHY1_BASE (0x01c66000)
#define MCTL_CR_BL8 (0x4 << 20)
#define MCTL_CR_1T (0x1 << 19)
#define MCTL_CR_2T (0x0 << 19)
#define MCTL_CR_LPDDR3 (0x7 << 16)
#define MCTL_CR_LPDDR2 (0x6 << 16)
#define MCTL_CR_DDR3 (0x3 << 16)
#define MCTL_CR_DDR2 (0x2 << 16)
#define MCTL_CR_SEQUENTIAL (0x1 << 15)
#define MCTL_CR_INTERLEAVED (0x0 << 15)
#define MCTL_CR_FULL_WIDTH (0x1 << 12)
#define MCTL_CR_HALF_WIDTH (0x0 << 12)
#define MCTL_CR_BUS_FULL_WIDTH(x) ((x) << 12)
#define MCTL_CR_PAGE_SIZE(x) ((gfls(x) - 4) << 8)
#define MCTL_CR_ROW_BITS(x) (((x) - 1) << 4)
#define MCTL_CR_EIGHT_BANKS (0x1 << 2)
#define MCTL_CR_FOUR_BANKS (0x0 << 2)
#define MCTL_CR_DUAL_RANK (0x1 << 0)
#define MCTL_CR_SINGLE_RANK (0x0 << 0)
#define DRAMTMG0_TWTP(x) ((x) << 24)
#define DRAMTMG0_TFAW(x) ((x) << 16)
#define DRAMTMG0_TRAS_MAX(x) ((x) << 8)
#define DRAMTMG0_TRAS(x) ((x) << 0)
#define DRAMTMG1_TXP(x) ((x) << 16)
#define DRAMTMG1_TRTP(x) ((x) << 8)
#define DRAMTMG1_TRC(x) ((x) << 0)
#define DRAMTMG2_TCWL(x) ((x) << 24)
#define DRAMTMG2_TCL(x) ((x) << 16)
#define DRAMTMG2_TRD2WR(x) ((x) << 8)
#define DRAMTMG2_TWR2RD(x) ((x) << 0)
#define DRAMTMG3_TMRW(x) ((x) << 16)
#define DRAMTMG3_TMRD(x) ((x) << 12)
#define DRAMTMG3_TMOD(x) ((x) << 0)
#define DRAMTMG4_TRCD(x) ((x) << 24)
#define DRAMTMG4_TCCD(x) ((x) << 16)
#define DRAMTMG4_TRRD(x) ((x) << 8)
#define DRAMTMG4_TRP(x) ((x) << 0)
#define DRAMTMG5_TCKSRX(x) ((x) << 24)
#define DRAMTMG5_TCKSRE(x) ((x) << 16)
#define DRAMTMG5_TCKESR(x) ((x) << 8)
#define DRAMTMG5_TCKE(x) ((x) << 0)
#define PTR3_TDINIT1(x) ((x) << 20)
#define PTR3_TDINIT0(x) ((x) << 0)
#define PTR4_TDINIT3(x) ((x) << 20)
#define PTR4_TDINIT2(x) ((x) << 0)
#define RFSHTMG_TREFI(x) ((x) << 16)
#define RFSHTMG_TRFC(x) ((x) << 0)
#define PIR_CLRSR (0x1 << 27) /* Clear status registers */
#define PIR_QSGATE (0x1 << 10) /* Read DQS gate training */
#define PIR_DRAMINIT (0x1 << 8) /* DRAM initialization */
#define PIR_DRAMRST (0x1 << 7) /* DRAM reset */
#define PIR_PHYRST (0x1 << 6) /* PHY reset */
#define PIR_DCAL (0x1 << 5) /* DDL calibration */
#define PIR_PLLINIT (0x1 << 4) /* PLL initialization */
#define PIR_ZCAL (0x1 << 1) /* ZQ calibration */
#define PIR_INIT (0x1 << 0) /* PHY initialization trigger */
#define PGSR_INIT_DONE (0x1 << 0) /* PHY init done */
#define ZQCR_PWRDOWN (0x1 << 31) /* ZQ power down */
#define DXBDLR_DQ(x) (x) /* DQ0-7 BDLR index */
#define DXBDLR_DM (8) /* DM BDLR index */
#define DXBDLR_DQS (9) /* DQS BDLR index */
#define DXBDLR_DQSN (10) /* DQSN BDLR index */
#define DXBDLR_WRITE_DELAY(x) ((x) << 8)
#define DXBDLR_READ_DELAY(x) ((x) << 0)
#define ACBDLR_WRITE_DELAY(x) ((x) << 8)
#endif /* __H3_REG_DRAM_H__ */

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#ifndef __IO_H__
#define __IO_H__
#ifdef __cplusplus
extern "C" {
#endif
#include <types.h>
static inline u8_t read8(virtual_addr_t addr)
{
return( *((volatile u8_t *)(addr)) );
}
static inline u16_t read16(virtual_addr_t addr)
{
return( *((volatile u16_t *)(addr)) );
}
static inline u32_t read32(virtual_addr_t addr)
{
return( *((volatile u32_t *)(addr)) );
}
static inline u64_t read64(virtual_addr_t addr)
{
return( *((volatile u64_t *)(addr)) );
}
static inline void write8(virtual_addr_t addr, u8_t value)
{
*((volatile u8_t *)(addr)) = value;
}
static inline void write16(virtual_addr_t addr, u16_t value)
{
*((volatile u16_t *)(addr)) = value;
}
static inline void write32(virtual_addr_t addr, u32_t value)
{
*((volatile u32_t *)(addr)) = value;
}
static inline void write64(virtual_addr_t addr, u64_t value)
{
*((volatile u64_t *)(addr)) = value;
}
#ifdef __cplusplus
}
#endif
#endif /* __IO_H__ */

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#ifndef __STDARG_H__
#define __STDARG_H__
#ifdef __cplusplus
extern "C" {
#endif
typedef __builtin_va_list va_list;
/*
* prepare to access variable args
*/
#define va_start(v, l) __builtin_va_start(v, l)
/*
* the caller will get the value of current argument
*/
#define va_arg(v, l) __builtin_va_arg(v, l)
/*
* end for variable args
*/
#define va_end(v) __builtin_va_end(v)
/*
* copy variable args
*/
#define va_copy(d, s) __builtin_va_copy(d, s)
#ifdef __cplusplus
}
#endif
#endif /* __STDARG_H__ */

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@ -0,0 +1,49 @@
#ifndef __STDDEF_H__
#define __STDDEF_H__
#ifdef __cplusplus
extern "C" {
#endif
#if defined(__cplusplus)
#define NULL (0)
#else
#define NULL ((void *)0)
#endif
#if (defined(__GNUC__) && (__GNUC__ >= 4))
#define offsetof(type, member) __builtin_offsetof(type, member)
#else
#define offsetof(type, field) ((size_t)(&((type *)0)->field))
#endif
#define container_of(ptr, type, member) ({const typeof(((type *)0)->member) *__mptr = (ptr); (type *)((char *)__mptr - offsetof(type,member));})
#if (defined(__GNUC__) && (__GNUC__ >= 3))
#define likely(expr) (__builtin_expect(!!(expr), 1))
#define unlikely(expr) (__builtin_expect(!!(expr), 0))
#else
#define likely(expr) (!!(expr))
#define unlikely(expr) (!!(expr))
#endif
#define min(a, b) ({typeof(a) _amin = (a); typeof(b) _bmin = (b); (void)(&_amin == &_bmin); _amin < _bmin ? _amin : _bmin;})
#define max(a, b) ({typeof(a) _amax = (a); typeof(b) _bmax = (b); (void)(&_amax == &_bmax); _amax > _bmax ? _amax : _bmax;})
#define clamp(v, a, b) min(max(a, v), b)
#define ifloor(x) ((x) > 0 ? (int)(x) : (int)((x) - 0.9999999999))
#define iround(x) ((x) > 0 ? (int)((x) + 0.5) : (int)((x) - 0.5))
#define iceil(x) ((x) > 0 ? (int)((x) + 0.9999999999) : (int)(x))
#define idiv255(x) ((((int)(x) + 1) * 257) >> 16)
#define X(...) ("" #__VA_ARGS__ "")
enum {
FALSE = 0,
TRUE = 1,
};
#ifdef __cplusplus
}
#endif
#endif /* __STDDEF_H__ */

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#ifndef __STDINT_H__
#define __STDINT_H__
#ifdef __cplusplus
extern "C" {
#endif
#include <types.h>
typedef s8_t int8_t;
typedef u8_t uint8_t;
typedef s16_t int16_t;
typedef u16_t uint16_t;
typedef s32_t int32_t;
typedef u32_t uint32_t;
typedef s64_t int64_t;
typedef u64_t uint64_t;
#define UINT8_MAX (0xff)
#define UINT16_MAX (0xffff)
#define UINT32_MAX (0xffffffff)
#define UINT64_MAX (0xffffffffffffffffULL)
#ifdef __cplusplus
}
#endif
#endif /* __STDINT_H__ */

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@ -0,0 +1,17 @@
#ifndef __STRING_H__
#define __STRING_H__
#ifdef __cplusplus
extern "C" {
#endif
#include <types.h>
void * memset(void * s, int c, size_t n);
void * memcpy(void * dest, const void * src, size_t len);
#ifdef __cplusplus
}
#endif
#endif /* __STRING_H__ */

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@ -0,0 +1,53 @@
#ifndef __ARM32_TYPES_H__
#define __ARM32_TYPES_H__
#ifdef __cplusplus
extern "C" {
#endif
typedef signed char s8_t;
typedef unsigned char u8_t;
typedef signed short s16_t;
typedef unsigned short u16_t;
typedef signed int s32_t;
typedef unsigned int u32_t;
typedef signed long long s64_t;
typedef unsigned long long u64_t;
typedef signed long long intmax_t;
typedef unsigned long long uintmax_t;
typedef signed int ptrdiff_t;
typedef signed int intptr_t;
typedef unsigned int uintptr_t;
typedef unsigned int size_t;
typedef signed int ssize_t;
typedef signed int off_t;
typedef signed long long loff_t;
typedef signed int bool_t;
typedef unsigned int irq_flags_t;
typedef unsigned int virtual_addr_t;
typedef unsigned int virtual_size_t;
typedef unsigned int physical_addr_t;
typedef unsigned int physical_size_t;
typedef struct {
volatile int counter;
} atomic_t;
typedef struct {
volatile int lock;
} spinlock_t;
#ifdef __cplusplus
}
#endif
#endif /* __ARM32_TYPES_H__ */

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@ -0,0 +1,21 @@
#ifndef __XBOOT_H__
#define __XBOOT_H__
#ifdef __cplusplus
extern "C" {
#endif
#include <types.h>
#include <io.h>
#include <stdarg.h>
#include <stddef.h>
#include <stdint.h>
#include <string.h>
#include <endian.h>
#include <byteorder.h>
#ifdef __cplusplus
}
#endif
#endif /* __XBOOT_H__ */

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@ -0,0 +1,122 @@
OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
STACK_UND_SIZE = 0x010;
STACK_ABT_SIZE = 0x010;
STACK_IRQ_SIZE = 0x010;
STACK_FIQ_SIZE = 0x010;
STACK_SRV_SIZE = 0x400;
MEMORY
{
ram : org = 0x00008000, len = 0x00001000 /* 4 KB */
}
SECTIONS
{
.text :
{
PROVIDE(__image_start = .);
PROVIDE(__text_start = .);
.obj/source/start.o (.text)
.obj/source/sys-spi.o (.text)
*(.text*)
*(.glue*)
*(.note.gnu.build-id)
PROVIDE(__text_end = .);
} > ram
.ARM.exidx ALIGN(8) :
{
PROVIDE (__exidx_start = .);
*(.ARM.exidx*)
PROVIDE (__exidx_end = .);
} > ram
.ARM.extab ALIGN(8) :
{
PROVIDE (__extab_start = .);
*(.ARM.extab*)
PROVIDE (__extab_end = .);
} > ram
.ksymtab ALIGN(16) :
{
PROVIDE(__ksymtab_start = .);
KEEP(*(.ksymtab.text))
PROVIDE(__ksymtab_end = .);
} > ram
.romdisk ALIGN(8) :
{
PROVIDE(__romdisk_start = .);
KEEP(*(.romdisk))
PROVIDE(__romdisk_end = .);
} > ram
.rodata ALIGN(8) :
{
PROVIDE(__rodata_start = .);
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
PROVIDE(__rodata_end = .);
} > ram
.data ALIGN(8) :
{
PROVIDE(__data_start = .);
*(.data*)
. = ALIGN(8);
PROVIDE(__data_end = .);
PROVIDE(__image_end = .);
} > ram
.bss ALIGN(8) (NOLOAD) :
{
PROVIDE(__bss_start = .);
*(.bss*)
*(.sbss*)
*(COMMON)
. = ALIGN(8);
PROVIDE(__bss_end = .);
} > ram
.stack ALIGN(8) (NOLOAD) :
{
PROVIDE(__stack_start = .);
PROVIDE(__stack_und_start = .);
. += STACK_UND_SIZE;
PROVIDE(__stack_und_end = .);
. = ALIGN(8);
PROVIDE(__stack_abt_start = .);
. += STACK_ABT_SIZE;
PROVIDE(__stack_abt_end = .);
. = ALIGN(8);
PROVIDE(__stack_irq_start = .);
. += STACK_IRQ_SIZE;
PROVIDE(__stack_irq_end = .);
. = ALIGN(8);
PROVIDE(__stack_fiq_start = .);
. += STACK_FIQ_SIZE;
PROVIDE(__stack_fiq_end = .);
. = ALIGN(8);
PROVIDE(__stack_srv_start = .);
. += STACK_SRV_SIZE;
PROVIDE(__stack_srv_end = .);
. = ALIGN(8);
PROVIDE(__stack_end = .);
} > ram
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}

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/*
* start.S
*
* Copyright(c) 2007-2021 Jianjun Jiang <8192542@qq.com>
* Official site: http://xboot.org
* Mobile phone: +86-18665388956
* QQ: 8192542
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
*/
.global _start
_start:
b reset
reset:
ldr r0, =0x00000040
str sp, [r0, #0]
str lr, [r0, #4]
mrs lr, cpsr
str lr, [r0, #8]
mrc p15, 0, lr, c1, c0, 0
str lr, [r0, #12]
mrc p15, 0, lr, c12, c0, 0
str lr, [r0, #16]
mrc p15, 0, lr, c1, c0, 0
str lr, [r0, #20]
bl sys_spi_exit
ldr r0, =0x00000040
ldr sp, [r0, #0]
ldr lr, [r0, #4]
ldr r1, [r0, #20]
mcr p15, 0, r1, c1, c0, 0
ldr r1, [r0, #16]
mcr p15, 0, r1, c12, c0, 0
ldr r1, [r0, #12]
mcr p15, 0, r1, c1, c0, 0
ldr r1, [r0, #8]
msr cpsr, r1
bx lr

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@ -0,0 +1,57 @@
/*
* sys-spi.c
*
* Copyright(c) 2007-2021 Jianjun Jiang <8192542@qq.com>
* Official site: http://xboot.org
* Mobile phone: +86-18665388956
* QQ: 8192542
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
*/
#include <xboot.h>
enum {
SPI_GCR = 0x04,
SPI_TCR = 0x08,
SPI_IER = 0x10,
SPI_ISR = 0x14,
SPI_FCR = 0x18,
SPI_FSR = 0x1c,
SPI_WCR = 0x20,
SPI_CCR = 0x24,
SPI_MBC = 0x30,
SPI_MTC = 0x34,
SPI_BCC = 0x38,
SPI_TXD = 0x200,
SPI_RXD = 0x300,
};
void sys_spi_exit(void)
{
virtual_addr_t addr = 0x01c68000;
u32_t val;
/* Disable the spi0 controller */
val = read32(addr + SPI_GCR);
val &= ~((1 << 1) | (1 << 0));
write32(addr + SPI_GCR, val);
}

10
payloads/h3/h3-spi-init/.gitignore vendored Normal file
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@ -0,0 +1,10 @@
#
# Normal rules
#
*~
#
# Generated files
#
/.obj
/output

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@ -0,0 +1,123 @@
#
# Top makefile
#
CROSS ?= arm-linux-gnueabihf-
NAME := h3-spi-init
#
# System environment variable.
#
#
# System environment variable.
#
ifeq ($(OS), Windows_NT)
HOSTOS := windows
else
ifneq (,$(findstring Linux, $(shell uname -a)))
HOSTOS := linux
endif
endif
#
# Load default variables.
#
ASFLAGS := -g -ggdb -Wall -O3
CFLAGS := -g -ggdb -Wall -O3
CXXFLAGS := -g -ggdb -Wall -O3
LDFLAGS := -T link.ld -nostdlib
ARFLAGS := -rcs
OCFLAGS := -v -O binary
ODFLAGS :=
MCFLAGS := -march=armv7-a -mtune=cortex-a7 -mfpu=vfpv4 -mfloat-abi=hard -marm -mno-thumb-interwork -mno-unaligned-access -fno-stack-protector
LIBDIRS :=
LIBS :=
INCDIRS :=
SRCDIRS :=
#
# Add external library
#
INCDIRS += include \
include/external
SRCDIRS += source \
source/external
#
# You shouldn't need to change anything below this point.
#
AS := $(CROSS)gcc -x assembler-with-cpp
CC := $(CROSS)gcc
CXX := $(CROSS)g++
LD := $(CROSS)ld
AR := $(CROSS)ar
OC := $(CROSS)objcopy
OD := $(CROSS)objdump
MKDIR := mkdir -p
CP := cp -af
RM := rm -fr
CD := cd
FIND := find
#
# X variables
#
X_ASFLAGS := $(MCFLAGS) $(ASFLAGS)
X_CFLAGS := $(MCFLAGS) $(CFLAGS)
X_CXXFLAGS := $(MCFLAGS) $(CXXFLAGS)
X_LDFLAGS := $(LDFLAGS)
X_OCFLAGS := $(OCFLAGS)
X_LIBDIRS := $(LIBDIRS)
X_LIBS := $(LIBS) -lgcc
X_OUT := output
X_NAME := $(patsubst %, $(X_OUT)/%, $(NAME))
X_INCDIRS := $(patsubst %, -I %, $(INCDIRS))
X_SRCDIRS := $(patsubst %, %, $(SRCDIRS))
X_OBJDIRS := $(patsubst %, .obj/%, $(X_SRCDIRS))
X_SFILES := $(foreach dir, $(X_SRCDIRS), $(wildcard $(dir)/*.S))
X_CFILES := $(foreach dir, $(X_SRCDIRS), $(wildcard $(dir)/*.c))
X_CPPFILES := $(foreach dir, $(X_SRCDIRS), $(wildcard $(dir)/*.cpp))
X_SDEPS := $(patsubst %, .obj/%, $(X_SFILES:.S=.o.d))
X_CDEPS := $(patsubst %, .obj/%, $(X_CFILES:.c=.o.d))
X_CPPDEPS := $(patsubst %, .obj/%, $(X_CPPFILES:.cpp=.o.d))
X_DEPS := $(X_SDEPS) $(X_CDEPS) $(X_CPPDEPS)
X_SOBJS := $(patsubst %, .obj/%, $(X_SFILES:.S=.o))
X_COBJS := $(patsubst %, .obj/%, $(X_CFILES:.c=.o))
X_CPPOBJS := $(patsubst %, .obj/%, $(X_CPPFILES:.cpp=.o))
X_OBJS := $(X_SOBJS) $(X_COBJS) $(X_CPPOBJS)
VPATH := $(X_OBJDIRS)
.PHONY: all clean
all : $(X_NAME)
$(X_NAME) : $(X_OBJS)
@echo [LD] Linking $@.elf
@$(CC) $(X_LDFLAGS) $(X_LIBDIRS) -Wl,--cref,-Map=$@.map $^ -o $@.elf $(X_LIBS)
@echo [OC] Objcopying $@.bin
@$(OC) $(X_OCFLAGS) $@.elf $@.bin
$(X_SOBJS) : .obj/%.o : %.S
@echo [AS] $<
@$(AS) $(X_ASFLAGS) -MD -MP -MF $@.d $(X_INCDIRS) -c $< -o $@
$(X_COBJS) : .obj/%.o : %.c
@echo [CC] $<
@$(CC) $(X_CFLAGS) -MD -MP -MF $@.d $(X_INCDIRS) -c $< -o $@
$(X_CPPOBJS) : .obj/%.o : %.cpp
@echo [CXX] $<
@$(CXX) $(X_CXXFLAGS) -MD -MP -MF $@.d $(X_INCDIRS) -c $< -o $@
clean:
@$(RM) .obj $(X_OUT)
#
# Include the dependency files, should be place the last of makefile
#
sinclude $(shell $(MKDIR) $(X_OBJDIRS) $(X_OUT)) $(X_DEPS)

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@ -0,0 +1,83 @@
#ifndef __BYTEORDER_H__
#define __BYTEORDER_H__
#ifdef __cplusplus
extern "C" {
#endif
#include <types.h>
static inline u16_t __swab16(u16_t x)
{
return ( (x<<8) | (x>>8) );
}
static inline u32_t __swab32(u32_t x)
{
return ( (x<<24) | (x>>24) | \
((x & (u32_t)0x0000ff00UL)<<8) | \
((x & (u32_t)0x00ff0000UL)>>8) );
}
static inline u64_t __swab64(u64_t x)
{
return ( (x<<56) | (x>>56) | \
((x & (u64_t)0x000000000000ff00ULL)<<40) | \
((x & (u64_t)0x0000000000ff0000ULL)<<24) | \
((x & (u64_t)0x00000000ff000000ULL)<< 8) | \
((x & (u64_t)0x000000ff00000000ULL)>> 8) | \
((x & (u64_t)0x0000ff0000000000ULL)>>24) | \
((x & (u64_t)0x00ff000000000000ULL)>>40) );
}
/*
* swap bytes bizarrely.
* swahw32 - swap 16-bit half-words in a 32-bit word
*/
static inline u32_t __swahw32(u32_t x)
{
return ( ((x & (u32_t)0x0000ffffUL)<<16) | ((x & (u32_t)0xffff0000UL)>>16) );
}
/*
* swap bytes bizarrely.
* swahb32 - swap 8-bit halves of each 16-bit half-word in a 32-bit word
*/
static inline u32_t __swahb32(u32_t x)
{
return ( ((x & (u32_t)0x00ff00ffUL)<<8) | ((x & (u32_t)0xff00ff00UL)>>8) );
}
#if (BYTE_ORDER == BIG_ENDIAN)
#define cpu_to_le64(x) (__swab64((u64_t)(x)))
#define le64_to_cpu(x) (__swab64((u64_t)(x)))
#define cpu_to_le32(x) (__swab32((u32_t)(x)))
#define le32_to_cpu(x) (__swab32((u32_t)(x)))
#define cpu_to_le16(x) (__swab16((u16_t)(x)))
#define le16_to_cpu(x) (__swab16((u16_t)(x)))
#define cpu_to_be64(x) ((u64_t)(x))
#define be64_to_cpu(x) ((u64_t)(x))
#define cpu_to_be32(x) ((u32_t)(x))
#define be32_to_cpu(x) ((u32_t)(x))
#define cpu_to_be16(x) ((u16_t)(x))
#define be16_to_cpu(x) ((u16_t)(x))
#else
#define cpu_to_le64(x) ((u64_t)(x))
#define le64_to_cpu(x) ((u64_t)(x))
#define cpu_to_le32(x) ((u32_t)(x))
#define le32_to_cpu(x) ((u32_t)(x))
#define cpu_to_le16(x) ((u16_t)(x))
#define le16_to_cpu(x) ((u16_t)(x))
#define cpu_to_be64(x) (__swab64((u64_t)(x)))
#define be64_to_cpu(x) (__swab64((u64_t)(x)))
#define cpu_to_be32(x) (__swab32((u32_t)(x)))
#define be32_to_cpu(x) (__swab32((u32_t)(x)))
#define cpu_to_be16(x) (__swab16((u16_t)(x)))
#define be16_to_cpu(x) (__swab16((u16_t)(x)))
#endif
#ifdef __cplusplus
}
#endif
#endif /* __BYTEORDER_H__ */

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#ifndef __ARM32_ENDIAN_H__
#define __ARM32_ENDIAN_H__
#ifdef __cplusplus
extern "C" {
#endif
#define LITTLE_ENDIAN (0x1234)
#define BIG_ENDIAN (0x4321)
#if ( !defined(__LITTLE_ENDIAN) && !defined(__BIG_ENDIAN) )
#define __LITTLE_ENDIAN
#endif
#if defined(__LITTLE_ENDIAN)
#define BYTE_ORDER LITTLE_ENDIAN
#elif defined(__BIG_ENDIAN)
#define BYTE_ORDER BIG_ENDIAN
#else
#error "Unknown byte order!"
#endif
#ifdef __cplusplus
}
#endif
#endif /* __ARM32_ENDIAN_H__ */

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#ifndef __H3_REG_CCU_H__
#define __H3_REG_CCU_H__
#define H3_CCU_BASE (0x01c20000)
#define CCU_PLL_CPUX_CTRL (0x000)
#define CCU_PLL_AUDIO_CTRL (0x008)
#define CCU_PLL_VIDEO_CTRL (0x010)
#define CCU_PLL_VE_CTRL (0x018)
#define CCU_PLL_DDR_CTRL (0x020)
#define CCU_PLL_PERIPH0_CTRL (0x028)
#define CCU_PLL_GPU_CTRL (0x038)
#define CCU_PLL_PERIPH1_CTRL (0x044)
#define CCU_PLL_DE_CTRL (0x048)
#define CCU_CPUX_AXI_CFG (0x050)
#define CCU_AHB1_APB1_CFG (0x054)
#define CCU_APB1_CFG (0x058)
#define CCU_AHB2_CFG (0x05c)
#define CCU_BUS_CLK_GATE0 (0x060)
#define CCU_BUS_CLK_GATE1 (0x064)
#define CCU_BUS_CLK_GATE2 (0x068)
#define CCU_BUS_CLK_GATE3 (0x06c)
#define CCU_BUS_CLK_GATE4 (0x070)
#define CCU_THS_CLK (0x074)
#define CCU_NAND_CLK (0x080)
#define CCU_SDMMC0_CLK (0x088)
#define CCU_SDMMC1_CLK (0x08c)
#define CCU_SDMMC2_CLK (0x090)
#define CCU_CE_CLK (0x09c)
#define CCU_SPI0_CLK (0x0a0)
#define CCU_SPI1_CLK (0x0a4)
#define CCU_I2S0_CLK (0x0b0)
#define CCU_I2S1_CLK (0x0b4)
#define CCU_I2S2_CLK (0x0b8)
#define CCU_OWA_CLK (0x0c0)
#define CCU_USBPHY_CFG (0x0cc)
#define CCU_DRAM_CFG (0x0f4)
#define CCU_MBUS_RST (0x0fc)
#define CCU_DRAM_CLK_GATE (0x100)
#define CCU_TCON0_CLK (0x118)
#define CCU_TVE_CLK (0x120)
#define CCU_DEINTERLACE_CLK (0x124)
#define CCU_CSI_MISC_CLK (0x130)
#define CCU_CSI_CLK (0x134)
#define CCU_VE_CLK (0x13c)
#define CCU_AC_DIG_CLK (0x140)
#define CCU_AVS_CLK (0x144)
#define CCU_HDMI_CLK (0x150)
#define CCU_HDMI_SLOW_CLK (0x154)
#define CCU_MBUS_CLK (0x15c)
#define CCU_GPU_CLK (0x1a0)
#define CCU_PLL_STABLE_TIME0 (0x200)
#define CCU_PLL_STABLE_TIME1 (0x204)
#define CCU_PLL_CPUX_BIAS (0x220)
#define CCU_PLL_AUDIO_BIAS (0x224)
#define CCU_PLL_VIDEO_BIAS (0x228)
#define CCU_PLL_VE_BIAS (0x22c)
#define CCU_PLL_DDR_BIAS (0x230)
#define CCU_PLL_PERIPH0_BIAS (0x234)
#define CCU_PLL_GPU_BIAS (0x23c)
#define CCU_PLL_PERIPH1_BIAS (0x244)
#define CCU_PLL_DE_BIAS (0x248)
#define CCU_PLL_CPUX_TUN (0x250)
#define CCU_PLL_DDR_TUN (0x260)
#define CCU_PLL_CPUX_PAT (0x280)
#define CCU_PLL_AUDIO_PAT (0x284)
#define CCU_PLL_VIDEO_PAT (0x288)
#define CCU_PLL_VE_PAT (0x28c)
#define CCU_PLL_DDR_PAT (0x290)
#define CCU_PLL_GPU_PAT (0x29c)
#define CCU_PLL_PERIPH1_PAT (0x2a4)
#define CCU_PLL_DE_PAT (0x2a8)
#define CCU_BUS_SOFT_RST0 (0x2c0)
#define CCU_BUS_SOFT_RST1 (0x2c4)
#define CCU_BUS_SOFT_RST2 (0x2c8)
#define CCU_BUS_SOFT_RST3 (0x2d0)
#define CCU_BUS_SOFT_RST4 (0x2d8)
#define CCU_SEC_SWITCH (0x2f0)
#define CCU_PS_CTRL (0x300)
#define CCU_PS_CNT (0x304)
#endif /* __H3_REG_CCU_H__ */

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#ifndef __H3_REG_DRAM_H__
#define __H3_REG_DRAM_H__
#define H3_DRAM_COM_BASE (0x01c62000)
#define H3_DRAM_CTL0_BASE (0x01c63000)
#define H3_DRAM_CTL1_BASE (0x01c64000)
#define H3_DRAM_PHY0_BASE (0x01c65000)
#define H3_DRAM_PHY1_BASE (0x01c66000)
#define MCTL_CR_BL8 (0x4 << 20)
#define MCTL_CR_1T (0x1 << 19)
#define MCTL_CR_2T (0x0 << 19)
#define MCTL_CR_LPDDR3 (0x7 << 16)
#define MCTL_CR_LPDDR2 (0x6 << 16)
#define MCTL_CR_DDR3 (0x3 << 16)
#define MCTL_CR_DDR2 (0x2 << 16)
#define MCTL_CR_SEQUENTIAL (0x1 << 15)
#define MCTL_CR_INTERLEAVED (0x0 << 15)
#define MCTL_CR_FULL_WIDTH (0x1 << 12)
#define MCTL_CR_HALF_WIDTH (0x0 << 12)
#define MCTL_CR_BUS_FULL_WIDTH(x) ((x) << 12)
#define MCTL_CR_PAGE_SIZE(x) ((gfls(x) - 4) << 8)
#define MCTL_CR_ROW_BITS(x) (((x) - 1) << 4)
#define MCTL_CR_EIGHT_BANKS (0x1 << 2)
#define MCTL_CR_FOUR_BANKS (0x0 << 2)
#define MCTL_CR_DUAL_RANK (0x1 << 0)
#define MCTL_CR_SINGLE_RANK (0x0 << 0)
#define DRAMTMG0_TWTP(x) ((x) << 24)
#define DRAMTMG0_TFAW(x) ((x) << 16)
#define DRAMTMG0_TRAS_MAX(x) ((x) << 8)
#define DRAMTMG0_TRAS(x) ((x) << 0)
#define DRAMTMG1_TXP(x) ((x) << 16)
#define DRAMTMG1_TRTP(x) ((x) << 8)
#define DRAMTMG1_TRC(x) ((x) << 0)
#define DRAMTMG2_TCWL(x) ((x) << 24)
#define DRAMTMG2_TCL(x) ((x) << 16)
#define DRAMTMG2_TRD2WR(x) ((x) << 8)
#define DRAMTMG2_TWR2RD(x) ((x) << 0)
#define DRAMTMG3_TMRW(x) ((x) << 16)
#define DRAMTMG3_TMRD(x) ((x) << 12)
#define DRAMTMG3_TMOD(x) ((x) << 0)
#define DRAMTMG4_TRCD(x) ((x) << 24)
#define DRAMTMG4_TCCD(x) ((x) << 16)
#define DRAMTMG4_TRRD(x) ((x) << 8)
#define DRAMTMG4_TRP(x) ((x) << 0)
#define DRAMTMG5_TCKSRX(x) ((x) << 24)
#define DRAMTMG5_TCKSRE(x) ((x) << 16)
#define DRAMTMG5_TCKESR(x) ((x) << 8)
#define DRAMTMG5_TCKE(x) ((x) << 0)
#define PTR3_TDINIT1(x) ((x) << 20)
#define PTR3_TDINIT0(x) ((x) << 0)
#define PTR4_TDINIT3(x) ((x) << 20)
#define PTR4_TDINIT2(x) ((x) << 0)
#define RFSHTMG_TREFI(x) ((x) << 16)
#define RFSHTMG_TRFC(x) ((x) << 0)
#define PIR_CLRSR (0x1 << 27) /* Clear status registers */
#define PIR_QSGATE (0x1 << 10) /* Read DQS gate training */
#define PIR_DRAMINIT (0x1 << 8) /* DRAM initialization */
#define PIR_DRAMRST (0x1 << 7) /* DRAM reset */
#define PIR_PHYRST (0x1 << 6) /* PHY reset */
#define PIR_DCAL (0x1 << 5) /* DDL calibration */
#define PIR_PLLINIT (0x1 << 4) /* PLL initialization */
#define PIR_ZCAL (0x1 << 1) /* ZQ calibration */
#define PIR_INIT (0x1 << 0) /* PHY initialization trigger */
#define PGSR_INIT_DONE (0x1 << 0) /* PHY init done */
#define ZQCR_PWRDOWN (0x1 << 31) /* ZQ power down */
#define DXBDLR_DQ(x) (x) /* DQ0-7 BDLR index */
#define DXBDLR_DM (8) /* DM BDLR index */
#define DXBDLR_DQS (9) /* DQS BDLR index */
#define DXBDLR_DQSN (10) /* DQSN BDLR index */
#define DXBDLR_WRITE_DELAY(x) ((x) << 8)
#define DXBDLR_READ_DELAY(x) ((x) << 0)
#define ACBDLR_WRITE_DELAY(x) ((x) << 8)
#endif /* __H3_REG_DRAM_H__ */

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#ifndef __IO_H__
#define __IO_H__
#ifdef __cplusplus
extern "C" {
#endif
#include <types.h>
static inline u8_t read8(virtual_addr_t addr)
{
return( *((volatile u8_t *)(addr)) );
}
static inline u16_t read16(virtual_addr_t addr)
{
return( *((volatile u16_t *)(addr)) );
}
static inline u32_t read32(virtual_addr_t addr)
{
return( *((volatile u32_t *)(addr)) );
}
static inline u64_t read64(virtual_addr_t addr)
{
return( *((volatile u64_t *)(addr)) );
}
static inline void write8(virtual_addr_t addr, u8_t value)
{
*((volatile u8_t *)(addr)) = value;
}
static inline void write16(virtual_addr_t addr, u16_t value)
{
*((volatile u16_t *)(addr)) = value;
}
static inline void write32(virtual_addr_t addr, u32_t value)
{
*((volatile u32_t *)(addr)) = value;
}
static inline void write64(virtual_addr_t addr, u64_t value)
{
*((volatile u64_t *)(addr)) = value;
}
#ifdef __cplusplus
}
#endif
#endif /* __IO_H__ */

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#ifndef __STDARG_H__
#define __STDARG_H__
#ifdef __cplusplus
extern "C" {
#endif
typedef __builtin_va_list va_list;
/*
* prepare to access variable args
*/
#define va_start(v, l) __builtin_va_start(v, l)
/*
* the caller will get the value of current argument
*/
#define va_arg(v, l) __builtin_va_arg(v, l)
/*
* end for variable args
*/
#define va_end(v) __builtin_va_end(v)
/*
* copy variable args
*/
#define va_copy(d, s) __builtin_va_copy(d, s)
#ifdef __cplusplus
}
#endif
#endif /* __STDARG_H__ */

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#ifndef __STDDEF_H__
#define __STDDEF_H__
#ifdef __cplusplus
extern "C" {
#endif
#if defined(__cplusplus)
#define NULL (0)
#else
#define NULL ((void *)0)
#endif
#if (defined(__GNUC__) && (__GNUC__ >= 4))
#define offsetof(type, member) __builtin_offsetof(type, member)
#else
#define offsetof(type, field) ((size_t)(&((type *)0)->field))
#endif
#define container_of(ptr, type, member) ({const typeof(((type *)0)->member) *__mptr = (ptr); (type *)((char *)__mptr - offsetof(type,member));})
#if (defined(__GNUC__) && (__GNUC__ >= 3))
#define likely(expr) (__builtin_expect(!!(expr), 1))
#define unlikely(expr) (__builtin_expect(!!(expr), 0))
#else
#define likely(expr) (!!(expr))
#define unlikely(expr) (!!(expr))
#endif
#define min(a, b) ({typeof(a) _amin = (a); typeof(b) _bmin = (b); (void)(&_amin == &_bmin); _amin < _bmin ? _amin : _bmin;})
#define max(a, b) ({typeof(a) _amax = (a); typeof(b) _bmax = (b); (void)(&_amax == &_bmax); _amax > _bmax ? _amax : _bmax;})
#define clamp(v, a, b) min(max(a, v), b)
#define ifloor(x) ((x) > 0 ? (int)(x) : (int)((x) - 0.9999999999))
#define iround(x) ((x) > 0 ? (int)((x) + 0.5) : (int)((x) - 0.5))
#define iceil(x) ((x) > 0 ? (int)((x) + 0.9999999999) : (int)(x))
#define idiv255(x) ((((int)(x) + 1) * 257) >> 16)
#define X(...) ("" #__VA_ARGS__ "")
enum {
FALSE = 0,
TRUE = 1,
};
#ifdef __cplusplus
}
#endif
#endif /* __STDDEF_H__ */

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#ifndef __STDINT_H__
#define __STDINT_H__
#ifdef __cplusplus
extern "C" {
#endif
#include <types.h>
typedef s8_t int8_t;
typedef u8_t uint8_t;
typedef s16_t int16_t;
typedef u16_t uint16_t;
typedef s32_t int32_t;
typedef u32_t uint32_t;
typedef s64_t int64_t;
typedef u64_t uint64_t;
#define UINT8_MAX (0xff)
#define UINT16_MAX (0xffff)
#define UINT32_MAX (0xffffffff)
#define UINT64_MAX (0xffffffffffffffffULL)
#ifdef __cplusplus
}
#endif
#endif /* __STDINT_H__ */

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@ -0,0 +1,17 @@
#ifndef __STRING_H__
#define __STRING_H__
#ifdef __cplusplus
extern "C" {
#endif
#include <types.h>
void * memset(void * s, int c, size_t n);
void * memcpy(void * dest, const void * src, size_t len);
#ifdef __cplusplus
}
#endif
#endif /* __STRING_H__ */

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#ifndef __ARM32_TYPES_H__
#define __ARM32_TYPES_H__
#ifdef __cplusplus
extern "C" {
#endif
typedef signed char s8_t;
typedef unsigned char u8_t;
typedef signed short s16_t;
typedef unsigned short u16_t;
typedef signed int s32_t;
typedef unsigned int u32_t;
typedef signed long long s64_t;
typedef unsigned long long u64_t;
typedef signed long long intmax_t;
typedef unsigned long long uintmax_t;
typedef signed int ptrdiff_t;
typedef signed int intptr_t;
typedef unsigned int uintptr_t;
typedef unsigned int size_t;
typedef signed int ssize_t;
typedef signed int off_t;
typedef signed long long loff_t;
typedef signed int bool_t;
typedef unsigned int irq_flags_t;
typedef unsigned int virtual_addr_t;
typedef unsigned int virtual_size_t;
typedef unsigned int physical_addr_t;
typedef unsigned int physical_size_t;
typedef struct {
volatile int counter;
} atomic_t;
typedef struct {
volatile int lock;
} spinlock_t;
#ifdef __cplusplus
}
#endif
#endif /* __ARM32_TYPES_H__ */

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@ -0,0 +1,21 @@
#ifndef __XBOOT_H__
#define __XBOOT_H__
#ifdef __cplusplus
extern "C" {
#endif
#include <types.h>
#include <io.h>
#include <stdarg.h>
#include <stddef.h>
#include <stdint.h>
#include <string.h>
#include <endian.h>
#include <byteorder.h>
#ifdef __cplusplus
}
#endif
#endif /* __XBOOT_H__ */

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OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
STACK_UND_SIZE = 0x010;
STACK_ABT_SIZE = 0x010;
STACK_IRQ_SIZE = 0x010;
STACK_FIQ_SIZE = 0x010;
STACK_SRV_SIZE = 0x400;
MEMORY
{
ram : org = 0x00008000, len = 0x00001000 /* 4 KB */
}
SECTIONS
{
.text :
{
PROVIDE(__image_start = .);
PROVIDE(__text_start = .);
.obj/source/start.o (.text)
.obj/source/sys-spi.o (.text)
*(.text*)
*(.glue*)
*(.note.gnu.build-id)
PROVIDE(__text_end = .);
} > ram
.ARM.exidx ALIGN(8) :
{
PROVIDE (__exidx_start = .);
*(.ARM.exidx*)
PROVIDE (__exidx_end = .);
} > ram
.ARM.extab ALIGN(8) :
{
PROVIDE (__extab_start = .);
*(.ARM.extab*)
PROVIDE (__extab_end = .);
} > ram
.ksymtab ALIGN(16) :
{
PROVIDE(__ksymtab_start = .);
KEEP(*(.ksymtab.text))
PROVIDE(__ksymtab_end = .);
} > ram
.romdisk ALIGN(8) :
{
PROVIDE(__romdisk_start = .);
KEEP(*(.romdisk))
PROVIDE(__romdisk_end = .);
} > ram
.rodata ALIGN(8) :
{
PROVIDE(__rodata_start = .);
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
PROVIDE(__rodata_end = .);
} > ram
.data ALIGN(8) :
{
PROVIDE(__data_start = .);
*(.data*)
. = ALIGN(8);
PROVIDE(__data_end = .);
PROVIDE(__image_end = .);
} > ram
.bss ALIGN(8) (NOLOAD) :
{
PROVIDE(__bss_start = .);
*(.bss*)
*(.sbss*)
*(COMMON)
. = ALIGN(8);
PROVIDE(__bss_end = .);
} > ram
.stack ALIGN(8) (NOLOAD) :
{
PROVIDE(__stack_start = .);
PROVIDE(__stack_und_start = .);
. += STACK_UND_SIZE;
PROVIDE(__stack_und_end = .);
. = ALIGN(8);
PROVIDE(__stack_abt_start = .);
. += STACK_ABT_SIZE;
PROVIDE(__stack_abt_end = .);
. = ALIGN(8);
PROVIDE(__stack_irq_start = .);
. += STACK_IRQ_SIZE;
PROVIDE(__stack_irq_end = .);
. = ALIGN(8);
PROVIDE(__stack_fiq_start = .);
. += STACK_FIQ_SIZE;
PROVIDE(__stack_fiq_end = .);
. = ALIGN(8);
PROVIDE(__stack_srv_start = .);
. += STACK_SRV_SIZE;
PROVIDE(__stack_srv_end = .);
. = ALIGN(8);
PROVIDE(__stack_end = .);
} > ram
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}

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@ -0,0 +1,60 @@
/*
* start.S
*
* Copyright(c) 2007-2021 Jianjun Jiang <8192542@qq.com>
* Official site: http://xboot.org
* Mobile phone: +86-18665388956
* QQ: 8192542
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
*/
.global _start
_start:
b reset
reset:
ldr r0, =0x00000040
str sp, [r0, #0]
str lr, [r0, #4]
mrs lr, cpsr
str lr, [r0, #8]
mrc p15, 0, lr, c1, c0, 0
str lr, [r0, #12]
mrc p15, 0, lr, c12, c0, 0
str lr, [r0, #16]
mrc p15, 0, lr, c1, c0, 0
str lr, [r0, #20]
bl sys_spi_init
ldr r0, =0x00000040
ldr sp, [r0, #0]
ldr lr, [r0, #4]
ldr r1, [r0, #20]
mcr p15, 0, r1, c1, c0, 0
ldr r1, [r0, #16]
mcr p15, 0, r1, c12, c0, 0
ldr r1, [r0, #12]
mcr p15, 0, r1, c1, c0, 0
ldr r1, [r0, #8]
msr cpsr, r1
bx lr

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@ -0,0 +1,132 @@
/*
* sys-spi.c
*
* Copyright(c) 2007-2021 Jianjun Jiang <8192542@qq.com>
* Official site: http://xboot.org
* Mobile phone: +86-18665388956
* QQ: 8192542
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
*/
#include <xboot.h>
enum {
SPI_GCR = 0x04,
SPI_TCR = 0x08,
SPI_IER = 0x10,
SPI_ISR = 0x14,
SPI_FCR = 0x18,
SPI_FSR = 0x1c,
SPI_WCR = 0x20,
SPI_CCR = 0x24,
SPI_MBC = 0x30,
SPI_MTC = 0x34,
SPI_BCC = 0x38,
SPI_TXD = 0x200,
SPI_RXD = 0x300,
};
void sys_spi_init(void)
{
virtual_addr_t addr;
u32_t val;
/* Config GPIOC0, GPIOC1, GPIOC2 and GPIOC3 */
addr = 0x01c20848 + 0x00;
val = read32(addr);
val &= ~(0xf << ((0 & 0x7) << 2));
val |= ((0x3 & 0x7) << ((0 & 0x7) << 2));
write32(addr, val);
val = read32(addr);
val &= ~(0xf << ((1 & 0x7) << 2));
val |= ((0x3 & 0x7) << ((1 & 0x7) << 2));
write32(addr, val);
val = read32(addr);
val &= ~(0xf << ((2 & 0x7) << 2));
val |= ((0x3 & 0x7) << ((2 & 0x7) << 2));
write32(addr, val);
val = read32(addr);
val &= ~(0xf << ((3 & 0x7) << 2));
val |= ((0x3 & 0x7) << ((3 & 0x7) << 2));
write32(addr, val);
/* Deassert spi0 reset */
addr = 0x01c202c0;
val = read32(addr);
val |= (1 << 20);
write32(addr, val);
/* Open the spi0 gate */
addr = 0x01c20000 + 0xa0;
val = read32(addr);
val |= (1 << 31);
write32(addr, val);
/* Open the spi0 bus gate */
addr = 0x01c20000 + 0x60;
val = read32(addr);
val |= (1 << 20);
write32(addr, val);
/* Select pll-periph0 for spi0 clk */
addr = 0x01c200a0;
val = read32(addr);
val &= ~(0x3 << 24);
val |= 0x1 << 24;
write32(addr, val);
/* Set clock pre divide ratio, divided by 1 */
addr = 0x01c200a0;
val = read32(addr);
val &= ~(0x3 << 16);
val |= 0x0 << 16;
write32(addr, val);
/* Set clock divide ratio, divided by 6 */
addr = 0x01c200a0;
val = read32(addr);
val &= ~(0xf << 0);
val |= (6 - 1) << 0;
write32(addr, val);
/* Set spi clock rate control register, divided by 2 */
addr = 0x01c68000;
write32(addr + SPI_CCR, 0x1000);
/* Enable spi0 and do a soft reset */
addr = 0x01c68000;
val = read32(addr + SPI_GCR);
val |= (1 << 31) | (1 << 7) | (1 << 1) | (1 << 0);
write32(addr + SPI_GCR, val);
while(read32(addr + SPI_GCR) & (1 << 31));
val = read32(addr + SPI_TCR);
val &= ~(0x3 << 0);
val |= (1 << 6) | (1 << 2);
write32(addr + SPI_TCR, val);
val = read32(addr + SPI_FCR);
val |= (1 << 31) | (1 << 15);
write32(addr + SPI_FCR, val);
}

10
payloads/h3/h3-spi-select/.gitignore vendored Normal file
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@ -0,0 +1,10 @@
#
# Normal rules
#
*~
#
# Generated files
#
/.obj
/output

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@ -0,0 +1,123 @@
#
# Top makefile
#
CROSS ?= arm-linux-gnueabihf-
NAME := h3-spi-select
#
# System environment variable.
#
#
# System environment variable.
#
ifeq ($(OS), Windows_NT)
HOSTOS := windows
else
ifneq (,$(findstring Linux, $(shell uname -a)))
HOSTOS := linux
endif
endif
#
# Load default variables.
#
ASFLAGS := -g -ggdb -Wall -O3
CFLAGS := -g -ggdb -Wall -O3
CXXFLAGS := -g -ggdb -Wall -O3
LDFLAGS := -T link.ld -nostdlib
ARFLAGS := -rcs
OCFLAGS := -v -O binary
ODFLAGS :=
MCFLAGS := -march=armv7-a -mtune=cortex-a7 -mfpu=vfpv4 -mfloat-abi=hard -marm -mno-thumb-interwork -mno-unaligned-access -fno-stack-protector
LIBDIRS :=
LIBS :=
INCDIRS :=
SRCDIRS :=
#
# Add external library
#
INCDIRS += include \
include/external
SRCDIRS += source \
source/external
#
# You shouldn't need to change anything below this point.
#
AS := $(CROSS)gcc -x assembler-with-cpp
CC := $(CROSS)gcc
CXX := $(CROSS)g++
LD := $(CROSS)ld
AR := $(CROSS)ar
OC := $(CROSS)objcopy
OD := $(CROSS)objdump
MKDIR := mkdir -p
CP := cp -af
RM := rm -fr
CD := cd
FIND := find
#
# X variables
#
X_ASFLAGS := $(MCFLAGS) $(ASFLAGS)
X_CFLAGS := $(MCFLAGS) $(CFLAGS)
X_CXXFLAGS := $(MCFLAGS) $(CXXFLAGS)
X_LDFLAGS := $(LDFLAGS)
X_OCFLAGS := $(OCFLAGS)
X_LIBDIRS := $(LIBDIRS)
X_LIBS := $(LIBS) -lgcc
X_OUT := output
X_NAME := $(patsubst %, $(X_OUT)/%, $(NAME))
X_INCDIRS := $(patsubst %, -I %, $(INCDIRS))
X_SRCDIRS := $(patsubst %, %, $(SRCDIRS))
X_OBJDIRS := $(patsubst %, .obj/%, $(X_SRCDIRS))
X_SFILES := $(foreach dir, $(X_SRCDIRS), $(wildcard $(dir)/*.S))
X_CFILES := $(foreach dir, $(X_SRCDIRS), $(wildcard $(dir)/*.c))
X_CPPFILES := $(foreach dir, $(X_SRCDIRS), $(wildcard $(dir)/*.cpp))
X_SDEPS := $(patsubst %, .obj/%, $(X_SFILES:.S=.o.d))
X_CDEPS := $(patsubst %, .obj/%, $(X_CFILES:.c=.o.d))
X_CPPDEPS := $(patsubst %, .obj/%, $(X_CPPFILES:.cpp=.o.d))
X_DEPS := $(X_SDEPS) $(X_CDEPS) $(X_CPPDEPS)
X_SOBJS := $(patsubst %, .obj/%, $(X_SFILES:.S=.o))
X_COBJS := $(patsubst %, .obj/%, $(X_CFILES:.c=.o))
X_CPPOBJS := $(patsubst %, .obj/%, $(X_CPPFILES:.cpp=.o))
X_OBJS := $(X_SOBJS) $(X_COBJS) $(X_CPPOBJS)
VPATH := $(X_OBJDIRS)
.PHONY: all clean
all : $(X_NAME)
$(X_NAME) : $(X_OBJS)
@echo [LD] Linking $@.elf
@$(CC) $(X_LDFLAGS) $(X_LIBDIRS) -Wl,--cref,-Map=$@.map $^ -o $@.elf $(X_LIBS)
@echo [OC] Objcopying $@.bin
@$(OC) $(X_OCFLAGS) $@.elf $@.bin
$(X_SOBJS) : .obj/%.o : %.S
@echo [AS] $<
@$(AS) $(X_ASFLAGS) -MD -MP -MF $@.d $(X_INCDIRS) -c $< -o $@
$(X_COBJS) : .obj/%.o : %.c
@echo [CC] $<
@$(CC) $(X_CFLAGS) -MD -MP -MF $@.d $(X_INCDIRS) -c $< -o $@
$(X_CPPOBJS) : .obj/%.o : %.cpp
@echo [CXX] $<
@$(CXX) $(X_CXXFLAGS) -MD -MP -MF $@.d $(X_INCDIRS) -c $< -o $@
clean:
@$(RM) .obj $(X_OUT)
#
# Include the dependency files, should be place the last of makefile
#
sinclude $(shell $(MKDIR) $(X_OBJDIRS) $(X_OUT)) $(X_DEPS)

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@ -0,0 +1,83 @@
#ifndef __BYTEORDER_H__
#define __BYTEORDER_H__
#ifdef __cplusplus
extern "C" {
#endif
#include <types.h>
static inline u16_t __swab16(u16_t x)
{
return ( (x<<8) | (x>>8) );
}
static inline u32_t __swab32(u32_t x)
{
return ( (x<<24) | (x>>24) | \
((x & (u32_t)0x0000ff00UL)<<8) | \
((x & (u32_t)0x00ff0000UL)>>8) );
}
static inline u64_t __swab64(u64_t x)
{
return ( (x<<56) | (x>>56) | \
((x & (u64_t)0x000000000000ff00ULL)<<40) | \
((x & (u64_t)0x0000000000ff0000ULL)<<24) | \
((x & (u64_t)0x00000000ff000000ULL)<< 8) | \
((x & (u64_t)0x000000ff00000000ULL)>> 8) | \
((x & (u64_t)0x0000ff0000000000ULL)>>24) | \
((x & (u64_t)0x00ff000000000000ULL)>>40) );
}
/*
* swap bytes bizarrely.
* swahw32 - swap 16-bit half-words in a 32-bit word
*/
static inline u32_t __swahw32(u32_t x)
{
return ( ((x & (u32_t)0x0000ffffUL)<<16) | ((x & (u32_t)0xffff0000UL)>>16) );
}
/*
* swap bytes bizarrely.
* swahb32 - swap 8-bit halves of each 16-bit half-word in a 32-bit word
*/
static inline u32_t __swahb32(u32_t x)
{
return ( ((x & (u32_t)0x00ff00ffUL)<<8) | ((x & (u32_t)0xff00ff00UL)>>8) );
}
#if (BYTE_ORDER == BIG_ENDIAN)
#define cpu_to_le64(x) (__swab64((u64_t)(x)))
#define le64_to_cpu(x) (__swab64((u64_t)(x)))
#define cpu_to_le32(x) (__swab32((u32_t)(x)))
#define le32_to_cpu(x) (__swab32((u32_t)(x)))
#define cpu_to_le16(x) (__swab16((u16_t)(x)))
#define le16_to_cpu(x) (__swab16((u16_t)(x)))
#define cpu_to_be64(x) ((u64_t)(x))
#define be64_to_cpu(x) ((u64_t)(x))
#define cpu_to_be32(x) ((u32_t)(x))
#define be32_to_cpu(x) ((u32_t)(x))
#define cpu_to_be16(x) ((u16_t)(x))
#define be16_to_cpu(x) ((u16_t)(x))
#else
#define cpu_to_le64(x) ((u64_t)(x))
#define le64_to_cpu(x) ((u64_t)(x))
#define cpu_to_le32(x) ((u32_t)(x))
#define le32_to_cpu(x) ((u32_t)(x))
#define cpu_to_le16(x) ((u16_t)(x))
#define le16_to_cpu(x) ((u16_t)(x))
#define cpu_to_be64(x) (__swab64((u64_t)(x)))
#define be64_to_cpu(x) (__swab64((u64_t)(x)))
#define cpu_to_be32(x) (__swab32((u32_t)(x)))
#define be32_to_cpu(x) (__swab32((u32_t)(x)))
#define cpu_to_be16(x) (__swab16((u16_t)(x)))
#define be16_to_cpu(x) (__swab16((u16_t)(x)))
#endif
#ifdef __cplusplus
}
#endif
#endif /* __BYTEORDER_H__ */

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#ifndef __ARM32_ENDIAN_H__
#define __ARM32_ENDIAN_H__
#ifdef __cplusplus
extern "C" {
#endif
#define LITTLE_ENDIAN (0x1234)
#define BIG_ENDIAN (0x4321)
#if ( !defined(__LITTLE_ENDIAN) && !defined(__BIG_ENDIAN) )
#define __LITTLE_ENDIAN
#endif
#if defined(__LITTLE_ENDIAN)
#define BYTE_ORDER LITTLE_ENDIAN
#elif defined(__BIG_ENDIAN)
#define BYTE_ORDER BIG_ENDIAN
#else
#error "Unknown byte order!"
#endif
#ifdef __cplusplus
}
#endif
#endif /* __ARM32_ENDIAN_H__ */

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#ifndef __H3_REG_CCU_H__
#define __H3_REG_CCU_H__
#define H3_CCU_BASE (0x01c20000)
#define CCU_PLL_CPUX_CTRL (0x000)
#define CCU_PLL_AUDIO_CTRL (0x008)
#define CCU_PLL_VIDEO_CTRL (0x010)
#define CCU_PLL_VE_CTRL (0x018)
#define CCU_PLL_DDR_CTRL (0x020)
#define CCU_PLL_PERIPH0_CTRL (0x028)
#define CCU_PLL_GPU_CTRL (0x038)
#define CCU_PLL_PERIPH1_CTRL (0x044)
#define CCU_PLL_DE_CTRL (0x048)
#define CCU_CPUX_AXI_CFG (0x050)
#define CCU_AHB1_APB1_CFG (0x054)
#define CCU_APB1_CFG (0x058)
#define CCU_AHB2_CFG (0x05c)
#define CCU_BUS_CLK_GATE0 (0x060)
#define CCU_BUS_CLK_GATE1 (0x064)
#define CCU_BUS_CLK_GATE2 (0x068)
#define CCU_BUS_CLK_GATE3 (0x06c)
#define CCU_BUS_CLK_GATE4 (0x070)
#define CCU_THS_CLK (0x074)
#define CCU_NAND_CLK (0x080)
#define CCU_SDMMC0_CLK (0x088)
#define CCU_SDMMC1_CLK (0x08c)
#define CCU_SDMMC2_CLK (0x090)
#define CCU_CE_CLK (0x09c)
#define CCU_SPI0_CLK (0x0a0)
#define CCU_SPI1_CLK (0x0a4)
#define CCU_I2S0_CLK (0x0b0)
#define CCU_I2S1_CLK (0x0b4)
#define CCU_I2S2_CLK (0x0b8)
#define CCU_OWA_CLK (0x0c0)
#define CCU_USBPHY_CFG (0x0cc)
#define CCU_DRAM_CFG (0x0f4)
#define CCU_MBUS_RST (0x0fc)
#define CCU_DRAM_CLK_GATE (0x100)
#define CCU_TCON0_CLK (0x118)
#define CCU_TVE_CLK (0x120)
#define CCU_DEINTERLACE_CLK (0x124)
#define CCU_CSI_MISC_CLK (0x130)
#define CCU_CSI_CLK (0x134)
#define CCU_VE_CLK (0x13c)
#define CCU_AC_DIG_CLK (0x140)
#define CCU_AVS_CLK (0x144)
#define CCU_HDMI_CLK (0x150)
#define CCU_HDMI_SLOW_CLK (0x154)
#define CCU_MBUS_CLK (0x15c)
#define CCU_GPU_CLK (0x1a0)
#define CCU_PLL_STABLE_TIME0 (0x200)
#define CCU_PLL_STABLE_TIME1 (0x204)
#define CCU_PLL_CPUX_BIAS (0x220)
#define CCU_PLL_AUDIO_BIAS (0x224)
#define CCU_PLL_VIDEO_BIAS (0x228)
#define CCU_PLL_VE_BIAS (0x22c)
#define CCU_PLL_DDR_BIAS (0x230)
#define CCU_PLL_PERIPH0_BIAS (0x234)
#define CCU_PLL_GPU_BIAS (0x23c)
#define CCU_PLL_PERIPH1_BIAS (0x244)
#define CCU_PLL_DE_BIAS (0x248)
#define CCU_PLL_CPUX_TUN (0x250)
#define CCU_PLL_DDR_TUN (0x260)
#define CCU_PLL_CPUX_PAT (0x280)
#define CCU_PLL_AUDIO_PAT (0x284)
#define CCU_PLL_VIDEO_PAT (0x288)
#define CCU_PLL_VE_PAT (0x28c)
#define CCU_PLL_DDR_PAT (0x290)
#define CCU_PLL_GPU_PAT (0x29c)
#define CCU_PLL_PERIPH1_PAT (0x2a4)
#define CCU_PLL_DE_PAT (0x2a8)
#define CCU_BUS_SOFT_RST0 (0x2c0)
#define CCU_BUS_SOFT_RST1 (0x2c4)
#define CCU_BUS_SOFT_RST2 (0x2c8)
#define CCU_BUS_SOFT_RST3 (0x2d0)
#define CCU_BUS_SOFT_RST4 (0x2d8)
#define CCU_SEC_SWITCH (0x2f0)
#define CCU_PS_CTRL (0x300)
#define CCU_PS_CNT (0x304)
#endif /* __H3_REG_CCU_H__ */

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#ifndef __H3_REG_DRAM_H__
#define __H3_REG_DRAM_H__
#define H3_DRAM_COM_BASE (0x01c62000)
#define H3_DRAM_CTL0_BASE (0x01c63000)
#define H3_DRAM_CTL1_BASE (0x01c64000)
#define H3_DRAM_PHY0_BASE (0x01c65000)
#define H3_DRAM_PHY1_BASE (0x01c66000)
#define MCTL_CR_BL8 (0x4 << 20)
#define MCTL_CR_1T (0x1 << 19)
#define MCTL_CR_2T (0x0 << 19)
#define MCTL_CR_LPDDR3 (0x7 << 16)
#define MCTL_CR_LPDDR2 (0x6 << 16)
#define MCTL_CR_DDR3 (0x3 << 16)
#define MCTL_CR_DDR2 (0x2 << 16)
#define MCTL_CR_SEQUENTIAL (0x1 << 15)
#define MCTL_CR_INTERLEAVED (0x0 << 15)
#define MCTL_CR_FULL_WIDTH (0x1 << 12)
#define MCTL_CR_HALF_WIDTH (0x0 << 12)
#define MCTL_CR_BUS_FULL_WIDTH(x) ((x) << 12)
#define MCTL_CR_PAGE_SIZE(x) ((gfls(x) - 4) << 8)
#define MCTL_CR_ROW_BITS(x) (((x) - 1) << 4)
#define MCTL_CR_EIGHT_BANKS (0x1 << 2)
#define MCTL_CR_FOUR_BANKS (0x0 << 2)
#define MCTL_CR_DUAL_RANK (0x1 << 0)
#define MCTL_CR_SINGLE_RANK (0x0 << 0)
#define DRAMTMG0_TWTP(x) ((x) << 24)
#define DRAMTMG0_TFAW(x) ((x) << 16)
#define DRAMTMG0_TRAS_MAX(x) ((x) << 8)
#define DRAMTMG0_TRAS(x) ((x) << 0)
#define DRAMTMG1_TXP(x) ((x) << 16)
#define DRAMTMG1_TRTP(x) ((x) << 8)
#define DRAMTMG1_TRC(x) ((x) << 0)
#define DRAMTMG2_TCWL(x) ((x) << 24)
#define DRAMTMG2_TCL(x) ((x) << 16)
#define DRAMTMG2_TRD2WR(x) ((x) << 8)
#define DRAMTMG2_TWR2RD(x) ((x) << 0)
#define DRAMTMG3_TMRW(x) ((x) << 16)
#define DRAMTMG3_TMRD(x) ((x) << 12)
#define DRAMTMG3_TMOD(x) ((x) << 0)
#define DRAMTMG4_TRCD(x) ((x) << 24)
#define DRAMTMG4_TCCD(x) ((x) << 16)
#define DRAMTMG4_TRRD(x) ((x) << 8)
#define DRAMTMG4_TRP(x) ((x) << 0)
#define DRAMTMG5_TCKSRX(x) ((x) << 24)
#define DRAMTMG5_TCKSRE(x) ((x) << 16)
#define DRAMTMG5_TCKESR(x) ((x) << 8)
#define DRAMTMG5_TCKE(x) ((x) << 0)
#define PTR3_TDINIT1(x) ((x) << 20)
#define PTR3_TDINIT0(x) ((x) << 0)
#define PTR4_TDINIT3(x) ((x) << 20)
#define PTR4_TDINIT2(x) ((x) << 0)
#define RFSHTMG_TREFI(x) ((x) << 16)
#define RFSHTMG_TRFC(x) ((x) << 0)
#define PIR_CLRSR (0x1 << 27) /* Clear status registers */
#define PIR_QSGATE (0x1 << 10) /* Read DQS gate training */
#define PIR_DRAMINIT (0x1 << 8) /* DRAM initialization */
#define PIR_DRAMRST (0x1 << 7) /* DRAM reset */
#define PIR_PHYRST (0x1 << 6) /* PHY reset */
#define PIR_DCAL (0x1 << 5) /* DDL calibration */
#define PIR_PLLINIT (0x1 << 4) /* PLL initialization */
#define PIR_ZCAL (0x1 << 1) /* ZQ calibration */
#define PIR_INIT (0x1 << 0) /* PHY initialization trigger */
#define PGSR_INIT_DONE (0x1 << 0) /* PHY init done */
#define ZQCR_PWRDOWN (0x1 << 31) /* ZQ power down */
#define DXBDLR_DQ(x) (x) /* DQ0-7 BDLR index */
#define DXBDLR_DM (8) /* DM BDLR index */
#define DXBDLR_DQS (9) /* DQS BDLR index */
#define DXBDLR_DQSN (10) /* DQSN BDLR index */
#define DXBDLR_WRITE_DELAY(x) ((x) << 8)
#define DXBDLR_READ_DELAY(x) ((x) << 0)
#define ACBDLR_WRITE_DELAY(x) ((x) << 8)
#endif /* __H3_REG_DRAM_H__ */

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@ -0,0 +1,54 @@
#ifndef __IO_H__
#define __IO_H__
#ifdef __cplusplus
extern "C" {
#endif
#include <types.h>
static inline u8_t read8(virtual_addr_t addr)
{
return( *((volatile u8_t *)(addr)) );
}
static inline u16_t read16(virtual_addr_t addr)
{
return( *((volatile u16_t *)(addr)) );
}
static inline u32_t read32(virtual_addr_t addr)
{
return( *((volatile u32_t *)(addr)) );
}
static inline u64_t read64(virtual_addr_t addr)
{
return( *((volatile u64_t *)(addr)) );
}
static inline void write8(virtual_addr_t addr, u8_t value)
{
*((volatile u8_t *)(addr)) = value;
}
static inline void write16(virtual_addr_t addr, u16_t value)
{
*((volatile u16_t *)(addr)) = value;
}
static inline void write32(virtual_addr_t addr, u32_t value)
{
*((volatile u32_t *)(addr)) = value;
}
static inline void write64(virtual_addr_t addr, u64_t value)
{
*((volatile u64_t *)(addr)) = value;
}
#ifdef __cplusplus
}
#endif
#endif /* __IO_H__ */

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@ -0,0 +1,34 @@
#ifndef __STDARG_H__
#define __STDARG_H__
#ifdef __cplusplus
extern "C" {
#endif
typedef __builtin_va_list va_list;
/*
* prepare to access variable args
*/
#define va_start(v, l) __builtin_va_start(v, l)
/*
* the caller will get the value of current argument
*/
#define va_arg(v, l) __builtin_va_arg(v, l)
/*
* end for variable args
*/
#define va_end(v) __builtin_va_end(v)
/*
* copy variable args
*/
#define va_copy(d, s) __builtin_va_copy(d, s)
#ifdef __cplusplus
}
#endif
#endif /* __STDARG_H__ */

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@ -0,0 +1,49 @@
#ifndef __STDDEF_H__
#define __STDDEF_H__
#ifdef __cplusplus
extern "C" {
#endif
#if defined(__cplusplus)
#define NULL (0)
#else
#define NULL ((void *)0)
#endif
#if (defined(__GNUC__) && (__GNUC__ >= 4))
#define offsetof(type, member) __builtin_offsetof(type, member)
#else
#define offsetof(type, field) ((size_t)(&((type *)0)->field))
#endif
#define container_of(ptr, type, member) ({const typeof(((type *)0)->member) *__mptr = (ptr); (type *)((char *)__mptr - offsetof(type,member));})
#if (defined(__GNUC__) && (__GNUC__ >= 3))
#define likely(expr) (__builtin_expect(!!(expr), 1))
#define unlikely(expr) (__builtin_expect(!!(expr), 0))
#else
#define likely(expr) (!!(expr))
#define unlikely(expr) (!!(expr))
#endif
#define min(a, b) ({typeof(a) _amin = (a); typeof(b) _bmin = (b); (void)(&_amin == &_bmin); _amin < _bmin ? _amin : _bmin;})
#define max(a, b) ({typeof(a) _amax = (a); typeof(b) _bmax = (b); (void)(&_amax == &_bmax); _amax > _bmax ? _amax : _bmax;})
#define clamp(v, a, b) min(max(a, v), b)
#define ifloor(x) ((x) > 0 ? (int)(x) : (int)((x) - 0.9999999999))
#define iround(x) ((x) > 0 ? (int)((x) + 0.5) : (int)((x) - 0.5))
#define iceil(x) ((x) > 0 ? (int)((x) + 0.9999999999) : (int)(x))
#define idiv255(x) ((((int)(x) + 1) * 257) >> 16)
#define X(...) ("" #__VA_ARGS__ "")
enum {
FALSE = 0,
TRUE = 1,
};
#ifdef __cplusplus
}
#endif
#endif /* __STDDEF_H__ */

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@ -0,0 +1,31 @@
#ifndef __STDINT_H__
#define __STDINT_H__
#ifdef __cplusplus
extern "C" {
#endif
#include <types.h>
typedef s8_t int8_t;
typedef u8_t uint8_t;
typedef s16_t int16_t;
typedef u16_t uint16_t;
typedef s32_t int32_t;
typedef u32_t uint32_t;
typedef s64_t int64_t;
typedef u64_t uint64_t;
#define UINT8_MAX (0xff)
#define UINT16_MAX (0xffff)
#define UINT32_MAX (0xffffffff)
#define UINT64_MAX (0xffffffffffffffffULL)
#ifdef __cplusplus
}
#endif
#endif /* __STDINT_H__ */

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@ -0,0 +1,17 @@
#ifndef __STRING_H__
#define __STRING_H__
#ifdef __cplusplus
extern "C" {
#endif
#include <types.h>
void * memset(void * s, int c, size_t n);
void * memcpy(void * dest, const void * src, size_t len);
#ifdef __cplusplus
}
#endif
#endif /* __STRING_H__ */

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@ -0,0 +1,53 @@
#ifndef __ARM32_TYPES_H__
#define __ARM32_TYPES_H__
#ifdef __cplusplus
extern "C" {
#endif
typedef signed char s8_t;
typedef unsigned char u8_t;
typedef signed short s16_t;
typedef unsigned short u16_t;
typedef signed int s32_t;
typedef unsigned int u32_t;
typedef signed long long s64_t;
typedef unsigned long long u64_t;
typedef signed long long intmax_t;
typedef unsigned long long uintmax_t;
typedef signed int ptrdiff_t;
typedef signed int intptr_t;
typedef unsigned int uintptr_t;
typedef unsigned int size_t;
typedef signed int ssize_t;
typedef signed int off_t;
typedef signed long long loff_t;
typedef signed int bool_t;
typedef unsigned int irq_flags_t;
typedef unsigned int virtual_addr_t;
typedef unsigned int virtual_size_t;
typedef unsigned int physical_addr_t;
typedef unsigned int physical_size_t;
typedef struct {
volatile int counter;
} atomic_t;
typedef struct {
volatile int lock;
} spinlock_t;
#ifdef __cplusplus
}
#endif
#endif /* __ARM32_TYPES_H__ */

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@ -0,0 +1,21 @@
#ifndef __XBOOT_H__
#define __XBOOT_H__
#ifdef __cplusplus
extern "C" {
#endif
#include <types.h>
#include <io.h>
#include <stdarg.h>
#include <stddef.h>
#include <stdint.h>
#include <string.h>
#include <endian.h>
#include <byteorder.h>
#ifdef __cplusplus
}
#endif
#endif /* __XBOOT_H__ */

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@ -0,0 +1,122 @@
OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
STACK_UND_SIZE = 0x010;
STACK_ABT_SIZE = 0x010;
STACK_IRQ_SIZE = 0x010;
STACK_FIQ_SIZE = 0x010;
STACK_SRV_SIZE = 0x400;
MEMORY
{
ram : org = 0x00008000, len = 0x00001000 /* 4 KB */
}
SECTIONS
{
.text :
{
PROVIDE(__image_start = .);
PROVIDE(__text_start = .);
.obj/source/start.o (.text)
.obj/source/sys-spi.o (.text)
*(.text*)
*(.glue*)
*(.note.gnu.build-id)
PROVIDE(__text_end = .);
} > ram
.ARM.exidx ALIGN(8) :
{
PROVIDE (__exidx_start = .);
*(.ARM.exidx*)
PROVIDE (__exidx_end = .);
} > ram
.ARM.extab ALIGN(8) :
{
PROVIDE (__extab_start = .);
*(.ARM.extab*)
PROVIDE (__extab_end = .);
} > ram
.ksymtab ALIGN(16) :
{
PROVIDE(__ksymtab_start = .);
KEEP(*(.ksymtab.text))
PROVIDE(__ksymtab_end = .);
} > ram
.romdisk ALIGN(8) :
{
PROVIDE(__romdisk_start = .);
KEEP(*(.romdisk))
PROVIDE(__romdisk_end = .);
} > ram
.rodata ALIGN(8) :
{
PROVIDE(__rodata_start = .);
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
PROVIDE(__rodata_end = .);
} > ram
.data ALIGN(8) :
{
PROVIDE(__data_start = .);
*(.data*)
. = ALIGN(8);
PROVIDE(__data_end = .);
PROVIDE(__image_end = .);
} > ram
.bss ALIGN(8) (NOLOAD) :
{
PROVIDE(__bss_start = .);
*(.bss*)
*(.sbss*)
*(COMMON)
. = ALIGN(8);
PROVIDE(__bss_end = .);
} > ram
.stack ALIGN(8) (NOLOAD) :
{
PROVIDE(__stack_start = .);
PROVIDE(__stack_und_start = .);
. += STACK_UND_SIZE;
PROVIDE(__stack_und_end = .);
. = ALIGN(8);
PROVIDE(__stack_abt_start = .);
. += STACK_ABT_SIZE;
PROVIDE(__stack_abt_end = .);
. = ALIGN(8);
PROVIDE(__stack_irq_start = .);
. += STACK_IRQ_SIZE;
PROVIDE(__stack_irq_end = .);
. = ALIGN(8);
PROVIDE(__stack_fiq_start = .);
. += STACK_FIQ_SIZE;
PROVIDE(__stack_fiq_end = .);
. = ALIGN(8);
PROVIDE(__stack_srv_start = .);
. += STACK_SRV_SIZE;
PROVIDE(__stack_srv_end = .);
. = ALIGN(8);
PROVIDE(__stack_end = .);
} > ram
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}

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@ -0,0 +1,60 @@
/*
* start.S
*
* Copyright(c) 2007-2021 Jianjun Jiang <8192542@qq.com>
* Official site: http://xboot.org
* Mobile phone: +86-18665388956
* QQ: 8192542
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
*/
.global _start
_start:
b reset
reset:
ldr r0, =0x00000040
str sp, [r0, #0]
str lr, [r0, #4]
mrs lr, cpsr
str lr, [r0, #8]
mrc p15, 0, lr, c1, c0, 0
str lr, [r0, #12]
mrc p15, 0, lr, c12, c0, 0
str lr, [r0, #16]
mrc p15, 0, lr, c1, c0, 0
str lr, [r0, #20]
bl sys_spi_select
ldr r0, =0x00000040
ldr sp, [r0, #0]
ldr lr, [r0, #4]
ldr r1, [r0, #20]
mcr p15, 0, r1, c1, c0, 0
ldr r1, [r0, #16]
mcr p15, 0, r1, c12, c0, 0
ldr r1, [r0, #12]
mcr p15, 0, r1, c1, c0, 0
ldr r1, [r0, #8]
msr cpsr, r1
bx lr

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@ -0,0 +1,57 @@
/*
* sys-spi.c
*
* Copyright(c) 2007-2021 Jianjun Jiang <8192542@qq.com>
* Official site: http://xboot.org
* Mobile phone: +86-18665388956
* QQ: 8192542
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
*/
#include <xboot.h>
enum {
SPI_GCR = 0x04,
SPI_TCR = 0x08,
SPI_IER = 0x10,
SPI_ISR = 0x14,
SPI_FCR = 0x18,
SPI_FSR = 0x1c,
SPI_WCR = 0x20,
SPI_CCR = 0x24,
SPI_MBC = 0x30,
SPI_MTC = 0x34,
SPI_BCC = 0x38,
SPI_TXD = 0x200,
SPI_RXD = 0x300,
};
void sys_spi_select(void)
{
virtual_addr_t addr = 0x01c68000;
u32_t val;
val = read32(addr + SPI_TCR);
val &= ~((0x3 << 4) | (0x1 << 7));
val |= ((0 & 0x3) << 4) | (0x0 << 7);
write32(addr + SPI_TCR, val);
}

10
payloads/h3/h3-spi-xfer/.gitignore vendored Normal file
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@ -0,0 +1,10 @@
#
# Normal rules
#
*~
#
# Generated files
#
/.obj
/output

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@ -0,0 +1,123 @@
#
# Top makefile
#
CROSS ?= arm-linux-gnueabihf-
NAME := h3-spi-xfer
#
# System environment variable.
#
#
# System environment variable.
#
ifeq ($(OS), Windows_NT)
HOSTOS := windows
else
ifneq (,$(findstring Linux, $(shell uname -a)))
HOSTOS := linux
endif
endif
#
# Load default variables.
#
ASFLAGS := -g -ggdb -Wall -O3
CFLAGS := -g -ggdb -Wall -O3
CXXFLAGS := -g -ggdb -Wall -O3
LDFLAGS := -T link.ld -nostdlib
ARFLAGS := -rcs
OCFLAGS := -v -O binary
ODFLAGS :=
MCFLAGS := -march=armv7-a -mtune=cortex-a7 -mfpu=vfpv4 -mfloat-abi=hard -marm -mno-thumb-interwork -mno-unaligned-access -fno-stack-protector
LIBDIRS :=
LIBS :=
INCDIRS :=
SRCDIRS :=
#
# Add external library
#
INCDIRS += include \
include/external
SRCDIRS += source \
source/external
#
# You shouldn't need to change anything below this point.
#
AS := $(CROSS)gcc -x assembler-with-cpp
CC := $(CROSS)gcc
CXX := $(CROSS)g++
LD := $(CROSS)ld
AR := $(CROSS)ar
OC := $(CROSS)objcopy
OD := $(CROSS)objdump
MKDIR := mkdir -p
CP := cp -af
RM := rm -fr
CD := cd
FIND := find
#
# X variables
#
X_ASFLAGS := $(MCFLAGS) $(ASFLAGS)
X_CFLAGS := $(MCFLAGS) $(CFLAGS)
X_CXXFLAGS := $(MCFLAGS) $(CXXFLAGS)
X_LDFLAGS := $(LDFLAGS)
X_OCFLAGS := $(OCFLAGS)
X_LIBDIRS := $(LIBDIRS)
X_LIBS := $(LIBS) -lgcc
X_OUT := output
X_NAME := $(patsubst %, $(X_OUT)/%, $(NAME))
X_INCDIRS := $(patsubst %, -I %, $(INCDIRS))
X_SRCDIRS := $(patsubst %, %, $(SRCDIRS))
X_OBJDIRS := $(patsubst %, .obj/%, $(X_SRCDIRS))
X_SFILES := $(foreach dir, $(X_SRCDIRS), $(wildcard $(dir)/*.S))
X_CFILES := $(foreach dir, $(X_SRCDIRS), $(wildcard $(dir)/*.c))
X_CPPFILES := $(foreach dir, $(X_SRCDIRS), $(wildcard $(dir)/*.cpp))
X_SDEPS := $(patsubst %, .obj/%, $(X_SFILES:.S=.o.d))
X_CDEPS := $(patsubst %, .obj/%, $(X_CFILES:.c=.o.d))
X_CPPDEPS := $(patsubst %, .obj/%, $(X_CPPFILES:.cpp=.o.d))
X_DEPS := $(X_SDEPS) $(X_CDEPS) $(X_CPPDEPS)
X_SOBJS := $(patsubst %, .obj/%, $(X_SFILES:.S=.o))
X_COBJS := $(patsubst %, .obj/%, $(X_CFILES:.c=.o))
X_CPPOBJS := $(patsubst %, .obj/%, $(X_CPPFILES:.cpp=.o))
X_OBJS := $(X_SOBJS) $(X_COBJS) $(X_CPPOBJS)
VPATH := $(X_OBJDIRS)
.PHONY: all clean
all : $(X_NAME)
$(X_NAME) : $(X_OBJS)
@echo [LD] Linking $@.elf
@$(CC) $(X_LDFLAGS) $(X_LIBDIRS) -Wl,--cref,-Map=$@.map $^ -o $@.elf $(X_LIBS)
@echo [OC] Objcopying $@.bin
@$(OC) $(X_OCFLAGS) $@.elf $@.bin
$(X_SOBJS) : .obj/%.o : %.S
@echo [AS] $<
@$(AS) $(X_ASFLAGS) -MD -MP -MF $@.d $(X_INCDIRS) -c $< -o $@
$(X_COBJS) : .obj/%.o : %.c
@echo [CC] $<
@$(CC) $(X_CFLAGS) -MD -MP -MF $@.d $(X_INCDIRS) -c $< -o $@
$(X_CPPOBJS) : .obj/%.o : %.cpp
@echo [CXX] $<
@$(CXX) $(X_CXXFLAGS) -MD -MP -MF $@.d $(X_INCDIRS) -c $< -o $@
clean:
@$(RM) .obj $(X_OUT)
#
# Include the dependency files, should be place the last of makefile
#
sinclude $(shell $(MKDIR) $(X_OBJDIRS) $(X_OUT)) $(X_DEPS)

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#ifndef __BYTEORDER_H__
#define __BYTEORDER_H__
#ifdef __cplusplus
extern "C" {
#endif
#include <types.h>
static inline u16_t __swab16(u16_t x)
{
return ( (x<<8) | (x>>8) );
}
static inline u32_t __swab32(u32_t x)
{
return ( (x<<24) | (x>>24) | \
((x & (u32_t)0x0000ff00UL)<<8) | \
((x & (u32_t)0x00ff0000UL)>>8) );
}
static inline u64_t __swab64(u64_t x)
{
return ( (x<<56) | (x>>56) | \
((x & (u64_t)0x000000000000ff00ULL)<<40) | \
((x & (u64_t)0x0000000000ff0000ULL)<<24) | \
((x & (u64_t)0x00000000ff000000ULL)<< 8) | \
((x & (u64_t)0x000000ff00000000ULL)>> 8) | \
((x & (u64_t)0x0000ff0000000000ULL)>>24) | \
((x & (u64_t)0x00ff000000000000ULL)>>40) );
}
/*
* swap bytes bizarrely.
* swahw32 - swap 16-bit half-words in a 32-bit word
*/
static inline u32_t __swahw32(u32_t x)
{
return ( ((x & (u32_t)0x0000ffffUL)<<16) | ((x & (u32_t)0xffff0000UL)>>16) );
}
/*
* swap bytes bizarrely.
* swahb32 - swap 8-bit halves of each 16-bit half-word in a 32-bit word
*/
static inline u32_t __swahb32(u32_t x)
{
return ( ((x & (u32_t)0x00ff00ffUL)<<8) | ((x & (u32_t)0xff00ff00UL)>>8) );
}
#if (BYTE_ORDER == BIG_ENDIAN)
#define cpu_to_le64(x) (__swab64((u64_t)(x)))
#define le64_to_cpu(x) (__swab64((u64_t)(x)))
#define cpu_to_le32(x) (__swab32((u32_t)(x)))
#define le32_to_cpu(x) (__swab32((u32_t)(x)))
#define cpu_to_le16(x) (__swab16((u16_t)(x)))
#define le16_to_cpu(x) (__swab16((u16_t)(x)))
#define cpu_to_be64(x) ((u64_t)(x))
#define be64_to_cpu(x) ((u64_t)(x))
#define cpu_to_be32(x) ((u32_t)(x))
#define be32_to_cpu(x) ((u32_t)(x))
#define cpu_to_be16(x) ((u16_t)(x))
#define be16_to_cpu(x) ((u16_t)(x))
#else
#define cpu_to_le64(x) ((u64_t)(x))
#define le64_to_cpu(x) ((u64_t)(x))
#define cpu_to_le32(x) ((u32_t)(x))
#define le32_to_cpu(x) ((u32_t)(x))
#define cpu_to_le16(x) ((u16_t)(x))
#define le16_to_cpu(x) ((u16_t)(x))
#define cpu_to_be64(x) (__swab64((u64_t)(x)))
#define be64_to_cpu(x) (__swab64((u64_t)(x)))
#define cpu_to_be32(x) (__swab32((u32_t)(x)))
#define be32_to_cpu(x) (__swab32((u32_t)(x)))
#define cpu_to_be16(x) (__swab16((u16_t)(x)))
#define be16_to_cpu(x) (__swab16((u16_t)(x)))
#endif
#ifdef __cplusplus
}
#endif
#endif /* __BYTEORDER_H__ */

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@ -0,0 +1,27 @@
#ifndef __ARM32_ENDIAN_H__
#define __ARM32_ENDIAN_H__
#ifdef __cplusplus
extern "C" {
#endif
#define LITTLE_ENDIAN (0x1234)
#define BIG_ENDIAN (0x4321)
#if ( !defined(__LITTLE_ENDIAN) && !defined(__BIG_ENDIAN) )
#define __LITTLE_ENDIAN
#endif
#if defined(__LITTLE_ENDIAN)
#define BYTE_ORDER LITTLE_ENDIAN
#elif defined(__BIG_ENDIAN)
#define BYTE_ORDER BIG_ENDIAN
#else
#error "Unknown byte order!"
#endif
#ifdef __cplusplus
}
#endif
#endif /* __ARM32_ENDIAN_H__ */

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@ -0,0 +1,88 @@
#ifndef __H3_REG_CCU_H__
#define __H3_REG_CCU_H__
#define H3_CCU_BASE (0x01c20000)
#define CCU_PLL_CPUX_CTRL (0x000)
#define CCU_PLL_AUDIO_CTRL (0x008)
#define CCU_PLL_VIDEO_CTRL (0x010)
#define CCU_PLL_VE_CTRL (0x018)
#define CCU_PLL_DDR_CTRL (0x020)
#define CCU_PLL_PERIPH0_CTRL (0x028)
#define CCU_PLL_GPU_CTRL (0x038)
#define CCU_PLL_PERIPH1_CTRL (0x044)
#define CCU_PLL_DE_CTRL (0x048)
#define CCU_CPUX_AXI_CFG (0x050)
#define CCU_AHB1_APB1_CFG (0x054)
#define CCU_APB1_CFG (0x058)
#define CCU_AHB2_CFG (0x05c)
#define CCU_BUS_CLK_GATE0 (0x060)
#define CCU_BUS_CLK_GATE1 (0x064)
#define CCU_BUS_CLK_GATE2 (0x068)
#define CCU_BUS_CLK_GATE3 (0x06c)
#define CCU_BUS_CLK_GATE4 (0x070)
#define CCU_THS_CLK (0x074)
#define CCU_NAND_CLK (0x080)
#define CCU_SDMMC0_CLK (0x088)
#define CCU_SDMMC1_CLK (0x08c)
#define CCU_SDMMC2_CLK (0x090)
#define CCU_CE_CLK (0x09c)
#define CCU_SPI0_CLK (0x0a0)
#define CCU_SPI1_CLK (0x0a4)
#define CCU_I2S0_CLK (0x0b0)
#define CCU_I2S1_CLK (0x0b4)
#define CCU_I2S2_CLK (0x0b8)
#define CCU_OWA_CLK (0x0c0)
#define CCU_USBPHY_CFG (0x0cc)
#define CCU_DRAM_CFG (0x0f4)
#define CCU_MBUS_RST (0x0fc)
#define CCU_DRAM_CLK_GATE (0x100)
#define CCU_TCON0_CLK (0x118)
#define CCU_TVE_CLK (0x120)
#define CCU_DEINTERLACE_CLK (0x124)
#define CCU_CSI_MISC_CLK (0x130)
#define CCU_CSI_CLK (0x134)
#define CCU_VE_CLK (0x13c)
#define CCU_AC_DIG_CLK (0x140)
#define CCU_AVS_CLK (0x144)
#define CCU_HDMI_CLK (0x150)
#define CCU_HDMI_SLOW_CLK (0x154)
#define CCU_MBUS_CLK (0x15c)
#define CCU_GPU_CLK (0x1a0)
#define CCU_PLL_STABLE_TIME0 (0x200)
#define CCU_PLL_STABLE_TIME1 (0x204)
#define CCU_PLL_CPUX_BIAS (0x220)
#define CCU_PLL_AUDIO_BIAS (0x224)
#define CCU_PLL_VIDEO_BIAS (0x228)
#define CCU_PLL_VE_BIAS (0x22c)
#define CCU_PLL_DDR_BIAS (0x230)
#define CCU_PLL_PERIPH0_BIAS (0x234)
#define CCU_PLL_GPU_BIAS (0x23c)
#define CCU_PLL_PERIPH1_BIAS (0x244)
#define CCU_PLL_DE_BIAS (0x248)
#define CCU_PLL_CPUX_TUN (0x250)
#define CCU_PLL_DDR_TUN (0x260)
#define CCU_PLL_CPUX_PAT (0x280)
#define CCU_PLL_AUDIO_PAT (0x284)
#define CCU_PLL_VIDEO_PAT (0x288)
#define CCU_PLL_VE_PAT (0x28c)
#define CCU_PLL_DDR_PAT (0x290)
#define CCU_PLL_GPU_PAT (0x29c)
#define CCU_PLL_PERIPH1_PAT (0x2a4)
#define CCU_PLL_DE_PAT (0x2a8)
#define CCU_BUS_SOFT_RST0 (0x2c0)
#define CCU_BUS_SOFT_RST1 (0x2c4)
#define CCU_BUS_SOFT_RST2 (0x2c8)
#define CCU_BUS_SOFT_RST3 (0x2d0)
#define CCU_BUS_SOFT_RST4 (0x2d8)
#define CCU_SEC_SWITCH (0x2f0)
#define CCU_PS_CTRL (0x300)
#define CCU_PS_CNT (0x304)
#endif /* __H3_REG_CCU_H__ */

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#ifndef __H3_REG_DRAM_H__
#define __H3_REG_DRAM_H__
#define H3_DRAM_COM_BASE (0x01c62000)
#define H3_DRAM_CTL0_BASE (0x01c63000)
#define H3_DRAM_CTL1_BASE (0x01c64000)
#define H3_DRAM_PHY0_BASE (0x01c65000)
#define H3_DRAM_PHY1_BASE (0x01c66000)
#define MCTL_CR_BL8 (0x4 << 20)
#define MCTL_CR_1T (0x1 << 19)
#define MCTL_CR_2T (0x0 << 19)
#define MCTL_CR_LPDDR3 (0x7 << 16)
#define MCTL_CR_LPDDR2 (0x6 << 16)
#define MCTL_CR_DDR3 (0x3 << 16)
#define MCTL_CR_DDR2 (0x2 << 16)
#define MCTL_CR_SEQUENTIAL (0x1 << 15)
#define MCTL_CR_INTERLEAVED (0x0 << 15)
#define MCTL_CR_FULL_WIDTH (0x1 << 12)
#define MCTL_CR_HALF_WIDTH (0x0 << 12)
#define MCTL_CR_BUS_FULL_WIDTH(x) ((x) << 12)
#define MCTL_CR_PAGE_SIZE(x) ((gfls(x) - 4) << 8)
#define MCTL_CR_ROW_BITS(x) (((x) - 1) << 4)
#define MCTL_CR_EIGHT_BANKS (0x1 << 2)
#define MCTL_CR_FOUR_BANKS (0x0 << 2)
#define MCTL_CR_DUAL_RANK (0x1 << 0)
#define MCTL_CR_SINGLE_RANK (0x0 << 0)
#define DRAMTMG0_TWTP(x) ((x) << 24)
#define DRAMTMG0_TFAW(x) ((x) << 16)
#define DRAMTMG0_TRAS_MAX(x) ((x) << 8)
#define DRAMTMG0_TRAS(x) ((x) << 0)
#define DRAMTMG1_TXP(x) ((x) << 16)
#define DRAMTMG1_TRTP(x) ((x) << 8)
#define DRAMTMG1_TRC(x) ((x) << 0)
#define DRAMTMG2_TCWL(x) ((x) << 24)
#define DRAMTMG2_TCL(x) ((x) << 16)
#define DRAMTMG2_TRD2WR(x) ((x) << 8)
#define DRAMTMG2_TWR2RD(x) ((x) << 0)
#define DRAMTMG3_TMRW(x) ((x) << 16)
#define DRAMTMG3_TMRD(x) ((x) << 12)
#define DRAMTMG3_TMOD(x) ((x) << 0)
#define DRAMTMG4_TRCD(x) ((x) << 24)
#define DRAMTMG4_TCCD(x) ((x) << 16)
#define DRAMTMG4_TRRD(x) ((x) << 8)
#define DRAMTMG4_TRP(x) ((x) << 0)
#define DRAMTMG5_TCKSRX(x) ((x) << 24)
#define DRAMTMG5_TCKSRE(x) ((x) << 16)
#define DRAMTMG5_TCKESR(x) ((x) << 8)
#define DRAMTMG5_TCKE(x) ((x) << 0)
#define PTR3_TDINIT1(x) ((x) << 20)
#define PTR3_TDINIT0(x) ((x) << 0)
#define PTR4_TDINIT3(x) ((x) << 20)
#define PTR4_TDINIT2(x) ((x) << 0)
#define RFSHTMG_TREFI(x) ((x) << 16)
#define RFSHTMG_TRFC(x) ((x) << 0)
#define PIR_CLRSR (0x1 << 27) /* Clear status registers */
#define PIR_QSGATE (0x1 << 10) /* Read DQS gate training */
#define PIR_DRAMINIT (0x1 << 8) /* DRAM initialization */
#define PIR_DRAMRST (0x1 << 7) /* DRAM reset */
#define PIR_PHYRST (0x1 << 6) /* PHY reset */
#define PIR_DCAL (0x1 << 5) /* DDL calibration */
#define PIR_PLLINIT (0x1 << 4) /* PLL initialization */
#define PIR_ZCAL (0x1 << 1) /* ZQ calibration */
#define PIR_INIT (0x1 << 0) /* PHY initialization trigger */
#define PGSR_INIT_DONE (0x1 << 0) /* PHY init done */
#define ZQCR_PWRDOWN (0x1 << 31) /* ZQ power down */
#define DXBDLR_DQ(x) (x) /* DQ0-7 BDLR index */
#define DXBDLR_DM (8) /* DM BDLR index */
#define DXBDLR_DQS (9) /* DQS BDLR index */
#define DXBDLR_DQSN (10) /* DQSN BDLR index */
#define DXBDLR_WRITE_DELAY(x) ((x) << 8)
#define DXBDLR_READ_DELAY(x) ((x) << 0)
#define ACBDLR_WRITE_DELAY(x) ((x) << 8)
#endif /* __H3_REG_DRAM_H__ */

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#ifndef __IO_H__
#define __IO_H__
#ifdef __cplusplus
extern "C" {
#endif
#include <types.h>
static inline u8_t read8(virtual_addr_t addr)
{
return( *((volatile u8_t *)(addr)) );
}
static inline u16_t read16(virtual_addr_t addr)
{
return( *((volatile u16_t *)(addr)) );
}
static inline u32_t read32(virtual_addr_t addr)
{
return( *((volatile u32_t *)(addr)) );
}
static inline u64_t read64(virtual_addr_t addr)
{
return( *((volatile u64_t *)(addr)) );
}
static inline void write8(virtual_addr_t addr, u8_t value)
{
*((volatile u8_t *)(addr)) = value;
}
static inline void write16(virtual_addr_t addr, u16_t value)
{
*((volatile u16_t *)(addr)) = value;
}
static inline void write32(virtual_addr_t addr, u32_t value)
{
*((volatile u32_t *)(addr)) = value;
}
static inline void write64(virtual_addr_t addr, u64_t value)
{
*((volatile u64_t *)(addr)) = value;
}
#ifdef __cplusplus
}
#endif
#endif /* __IO_H__ */

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#ifndef __STDARG_H__
#define __STDARG_H__
#ifdef __cplusplus
extern "C" {
#endif
typedef __builtin_va_list va_list;
/*
* prepare to access variable args
*/
#define va_start(v, l) __builtin_va_start(v, l)
/*
* the caller will get the value of current argument
*/
#define va_arg(v, l) __builtin_va_arg(v, l)
/*
* end for variable args
*/
#define va_end(v) __builtin_va_end(v)
/*
* copy variable args
*/
#define va_copy(d, s) __builtin_va_copy(d, s)
#ifdef __cplusplus
}
#endif
#endif /* __STDARG_H__ */

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#ifndef __STDDEF_H__
#define __STDDEF_H__
#ifdef __cplusplus
extern "C" {
#endif
#if defined(__cplusplus)
#define NULL (0)
#else
#define NULL ((void *)0)
#endif
#if (defined(__GNUC__) && (__GNUC__ >= 4))
#define offsetof(type, member) __builtin_offsetof(type, member)
#else
#define offsetof(type, field) ((size_t)(&((type *)0)->field))
#endif
#define container_of(ptr, type, member) ({const typeof(((type *)0)->member) *__mptr = (ptr); (type *)((char *)__mptr - offsetof(type,member));})
#if (defined(__GNUC__) && (__GNUC__ >= 3))
#define likely(expr) (__builtin_expect(!!(expr), 1))
#define unlikely(expr) (__builtin_expect(!!(expr), 0))
#else
#define likely(expr) (!!(expr))
#define unlikely(expr) (!!(expr))
#endif
#define min(a, b) ({typeof(a) _amin = (a); typeof(b) _bmin = (b); (void)(&_amin == &_bmin); _amin < _bmin ? _amin : _bmin;})
#define max(a, b) ({typeof(a) _amax = (a); typeof(b) _bmax = (b); (void)(&_amax == &_bmax); _amax > _bmax ? _amax : _bmax;})
#define clamp(v, a, b) min(max(a, v), b)
#define ifloor(x) ((x) > 0 ? (int)(x) : (int)((x) - 0.9999999999))
#define iround(x) ((x) > 0 ? (int)((x) + 0.5) : (int)((x) - 0.5))
#define iceil(x) ((x) > 0 ? (int)((x) + 0.9999999999) : (int)(x))
#define idiv255(x) ((((int)(x) + 1) * 257) >> 16)
#define X(...) ("" #__VA_ARGS__ "")
enum {
FALSE = 0,
TRUE = 1,
};
#ifdef __cplusplus
}
#endif
#endif /* __STDDEF_H__ */

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#ifndef __STDINT_H__
#define __STDINT_H__
#ifdef __cplusplus
extern "C" {
#endif
#include <types.h>
typedef s8_t int8_t;
typedef u8_t uint8_t;
typedef s16_t int16_t;
typedef u16_t uint16_t;
typedef s32_t int32_t;
typedef u32_t uint32_t;
typedef s64_t int64_t;
typedef u64_t uint64_t;
#define UINT8_MAX (0xff)
#define UINT16_MAX (0xffff)
#define UINT32_MAX (0xffffffff)
#define UINT64_MAX (0xffffffffffffffffULL)
#ifdef __cplusplus
}
#endif
#endif /* __STDINT_H__ */

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#ifndef __STRING_H__
#define __STRING_H__
#ifdef __cplusplus
extern "C" {
#endif
#include <types.h>
void * memset(void * s, int c, size_t n);
void * memcpy(void * dest, const void * src, size_t len);
#ifdef __cplusplus
}
#endif
#endif /* __STRING_H__ */

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#ifndef __ARM32_TYPES_H__
#define __ARM32_TYPES_H__
#ifdef __cplusplus
extern "C" {
#endif
typedef signed char s8_t;
typedef unsigned char u8_t;
typedef signed short s16_t;
typedef unsigned short u16_t;
typedef signed int s32_t;
typedef unsigned int u32_t;
typedef signed long long s64_t;
typedef unsigned long long u64_t;
typedef signed long long intmax_t;
typedef unsigned long long uintmax_t;
typedef signed int ptrdiff_t;
typedef signed int intptr_t;
typedef unsigned int uintptr_t;
typedef unsigned int size_t;
typedef signed int ssize_t;
typedef signed int off_t;
typedef signed long long loff_t;
typedef signed int bool_t;
typedef unsigned int irq_flags_t;
typedef unsigned int virtual_addr_t;
typedef unsigned int virtual_size_t;
typedef unsigned int physical_addr_t;
typedef unsigned int physical_size_t;
typedef struct {
volatile int counter;
} atomic_t;
typedef struct {
volatile int lock;
} spinlock_t;
#ifdef __cplusplus
}
#endif
#endif /* __ARM32_TYPES_H__ */

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#ifndef __XBOOT_H__
#define __XBOOT_H__
#ifdef __cplusplus
extern "C" {
#endif
#include <types.h>
#include <io.h>
#include <stdarg.h>
#include <stddef.h>
#include <stdint.h>
#include <string.h>
#include <endian.h>
#include <byteorder.h>
#ifdef __cplusplus
}
#endif
#endif /* __XBOOT_H__ */

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OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
STACK_UND_SIZE = 0x010;
STACK_ABT_SIZE = 0x010;
STACK_IRQ_SIZE = 0x010;
STACK_FIQ_SIZE = 0x010;
STACK_SRV_SIZE = 0x400;
MEMORY
{
ram : org = 0x00008000, len = 0x00001000 /* 4 KB */
}
SECTIONS
{
.text :
{
PROVIDE(__image_start = .);
PROVIDE(__text_start = .);
.obj/source/start.o (.text)
.obj/source/sys-spi.o (.text)
*(.text*)
*(.glue*)
*(.note.gnu.build-id)
PROVIDE(__text_end = .);
} > ram
.ARM.exidx ALIGN(8) :
{
PROVIDE (__exidx_start = .);
*(.ARM.exidx*)
PROVIDE (__exidx_end = .);
} > ram
.ARM.extab ALIGN(8) :
{
PROVIDE (__extab_start = .);
*(.ARM.extab*)
PROVIDE (__extab_end = .);
} > ram
.ksymtab ALIGN(16) :
{
PROVIDE(__ksymtab_start = .);
KEEP(*(.ksymtab.text))
PROVIDE(__ksymtab_end = .);
} > ram
.romdisk ALIGN(8) :
{
PROVIDE(__romdisk_start = .);
KEEP(*(.romdisk))
PROVIDE(__romdisk_end = .);
} > ram
.rodata ALIGN(8) :
{
PROVIDE(__rodata_start = .);
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
PROVIDE(__rodata_end = .);
} > ram
.data ALIGN(8) :
{
PROVIDE(__data_start = .);
*(.data*)
. = ALIGN(8);
PROVIDE(__data_end = .);
PROVIDE(__image_end = .);
} > ram
.bss ALIGN(8) (NOLOAD) :
{
PROVIDE(__bss_start = .);
*(.bss*)
*(.sbss*)
*(COMMON)
. = ALIGN(8);
PROVIDE(__bss_end = .);
} > ram
.stack ALIGN(8) (NOLOAD) :
{
PROVIDE(__stack_start = .);
PROVIDE(__stack_und_start = .);
. += STACK_UND_SIZE;
PROVIDE(__stack_und_end = .);
. = ALIGN(8);
PROVIDE(__stack_abt_start = .);
. += STACK_ABT_SIZE;
PROVIDE(__stack_abt_end = .);
. = ALIGN(8);
PROVIDE(__stack_irq_start = .);
. += STACK_IRQ_SIZE;
PROVIDE(__stack_irq_end = .);
. = ALIGN(8);
PROVIDE(__stack_fiq_start = .);
. += STACK_FIQ_SIZE;
PROVIDE(__stack_fiq_end = .);
. = ALIGN(8);
PROVIDE(__stack_srv_start = .);
. += STACK_SRV_SIZE;
PROVIDE(__stack_srv_end = .);
. = ALIGN(8);
PROVIDE(__stack_end = .);
} > ram
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}

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/*
* start.S
*
* Copyright(c) 2007-2021 Jianjun Jiang <8192542@qq.com>
* Official site: http://xboot.org
* Mobile phone: +86-18665388956
* QQ: 8192542
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
*/
.global _start
_start:
b reset
spi_xfer_txbuf:
.word 0
spi_xfer_rxbuf:
.word 0
spi_xfer_length:
.word 0
reset:
ldr r0, =0x00000040
str sp, [r0, #0]
str lr, [r0, #4]
mrs lr, cpsr
str lr, [r0, #8]
mrc p15, 0, lr, c1, c0, 0
str lr, [r0, #12]
mrc p15, 0, lr, c12, c0, 0
str lr, [r0, #16]
mrc p15, 0, lr, c1, c0, 0
str lr, [r0, #20]
ldr r0, spi_xfer_txbuf
ldr r1, spi_xfer_rxbuf
ldr r2, spi_xfer_length
bl sys_spi_xfer
ldr r0, =0x00000040
ldr sp, [r0, #0]
ldr lr, [r0, #4]
ldr r1, [r0, #20]
mcr p15, 0, r1, c1, c0, 0
ldr r1, [r0, #16]
mcr p15, 0, r1, c12, c0, 0
ldr r1, [r0, #12]
mcr p15, 0, r1, c1, c0, 0
ldr r1, [r0, #8]
msr cpsr, r1
bx lr

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/*
* sys-spi.c
*
* Copyright(c) 2007-2021 Jianjun Jiang <8192542@qq.com>
* Official site: http://xboot.org
* Mobile phone: +86-18665388956
* QQ: 8192542
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
*/
#include <xboot.h>
enum {
SPI_GCR = 0x04,
SPI_TCR = 0x08,
SPI_IER = 0x10,
SPI_ISR = 0x14,
SPI_FCR = 0x18,
SPI_FSR = 0x1c,
SPI_WCR = 0x20,
SPI_CCR = 0x24,
SPI_MBC = 0x30,
SPI_MTC = 0x34,
SPI_BCC = 0x38,
SPI_TXD = 0x200,
SPI_RXD = 0x300,
};
static inline void sys_spi_write_txbuf(u8_t * buf, int len)
{
virtual_addr_t addr = 0x01c68000;
int i;
write32(addr + SPI_MTC, len & 0xffffff);
write32(addr + SPI_BCC, len & 0xffffff);
if(buf)
{
for(i = 0; i < len; i++)
write8(addr + SPI_TXD, *buf++);
}
else
{
for(i = 0; i < len; i++)
write8(addr + SPI_TXD, 0xff);
}
}
void sys_spi_xfer(void * txbuf, void * rxbuf, u32_t len)
{
virtual_addr_t addr = 0x01c68000;
u8_t * tx = txbuf;
u8_t * rx = rxbuf;
u8_t val;
int n, i;
while(len > 0)
{
n = (len <= 64) ? len : 64;
write32(addr + SPI_MBC, n);
sys_spi_write_txbuf(tx, n);
write32(addr + SPI_TCR, read32(addr + SPI_TCR) | (1 << 31));
while((read32(addr + SPI_FSR) & 0xff) < n);
for(i = 0; i < n; i++)
{
val = read8(addr + SPI_RXD);
if(rx)
*rx++ = val;
}
if(tx)
tx += n;
len -= n;
}
}