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Secure Memory Touch Arbiter is the same thing as the TrustZone Protection Controller found on A31/A31s. Access to many peripherals on the H3 can be controlled by the SMTA, and the settings default to secure access only. This patch supports the new settings, and sets them to allow non-secure access. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
28 lines
704 B
C
28 lines
704 B
C
/*
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* (C) Copyright 2015 Chen-Yu Tsai <wens@csie.org>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <asm/io.h>
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#include <asm/arch/cpu.h>
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#include <asm/arch/tzpc.h>
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/* Configure Trust Zone Protection Controller */
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void tzpc_init(void)
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{
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struct sunxi_tzpc *tzpc = (struct sunxi_tzpc *)SUNXI_TZPC_BASE;
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#ifdef CONFIG_MACH_SUN6I
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/* Enable non-secure access to the RTC */
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writel(SUN6I_TZPC_DECPORT0_RTC, &tzpc->decport0_set);
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#endif
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#ifdef CONFIG_MACH_SUN8I_H3
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/* Enable non-secure access to all peripherals */
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writel(SUN8I_H3_TZPC_DECPORT0_ALL, &tzpc->decport0_set);
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writel(SUN8I_H3_TZPC_DECPORT1_ALL, &tzpc->decport1_set);
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writel(SUN8I_H3_TZPC_DECPORT2_ALL, &tzpc->decport2_set);
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#endif
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}
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